From: Bartosz Golaszewski
We'll soon by adding a second MediaTek Ethernet driver so modify the
Kconfig prompt.
Signed-off-by: Bartosz Golaszewski
---
drivers/net/ethernet/mediatek/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/mediatek/Kconfig
From: Bartosz Golaszewski
Add the ethernet0 alias for ethernet so that u-boot can find this node
and fill in the MAC address.
Signed-off-by: Bartosz Golaszewski
---
arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/mediatek
From: Bartosz Golaszewski
Setup the pin control for the Ethernet MAC.
Signed-off-by: Bartosz Golaszewski
---
arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi
b/arch/arm64/boot
From: Bartosz Golaszewski
This adds the driver for the MediaTek STAR Ethernet MAC currently used
on the MT8* SoC family. For now we only support full-duplex.
Signed-off-by: Bartosz Golaszewski
---
drivers/net/ethernet/mediatek/Kconfig |7 +
drivers/net/ethernet/mediatek/Makefile
From: Bartosz Golaszewski
This adds support for the PERICFG register range as a syscon. This will
soon be used by the MediaTek Ethernet MAC driver for NIC configuration.
Signed-off-by: Bartosz Golaszewski
---
arch/arm64/boot/dts/mediatek/mt8516.dtsi | 5 +
1 file changed, 5 insertions(+)
From: Bartosz Golaszewski
Add remaining properties to the ethernet node and enable it.
Signed-off-by: Bartosz Golaszewski
---
.../boot/dts/mediatek/pumpkin-common.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/pumpkin-common.dtsi
From: Bartosz Golaszewski
The PERICFG controller is present on the MT8516 SoC. Add an appropriate
compatible variant.
Signed-off-by: Bartosz Golaszewski
---
.../devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devic
From: Bartosz Golaszewski
This adds yaml DT bindings for the MediaTek STAR Ethernet MAC present
on the mt8* family of SoCs.
Signed-off-by: Bartosz Golaszewski
---
.../bindings/net/mediatek,eth-mac.yaml| 89 +++
1 file changed, 89 insertions(+)
create mode 100644 Docume
From: Bartosz Golaszewski
Convert the DT binding .txt file for MediaTek's peripheral configuration
controller to YAML. There's one special case where the compatible has
three positions. Otherwise, it's a pretty normal syscon.
Signed-off-by: Bartosz Golaszewski
---
.../arm/mediatek/mediatek,per
On Fri, May 22, 2020 at 02:52:35PM +0300, Serge Semin wrote:
> On Fri, May 22, 2020 at 02:13:40PM +0300, Andy Shevchenko wrote:
> > > Changelog v4:
> > > - Get back ndelay() method to wait for an SPI transfer completion.
> > > spi_delay_exec() isn't suitable for the atomic context.
> > OTOH we
Hello Miquel,
No, nothing else changed.
I will change it again with the proper subject, sorry for that.
Best regards,
Álvaro.
> El 22 may 2020, a las 13:22, Miquel Raynal
> escribió:
>
>> v2.1: tested on Netgear DGND3700v1 (BCM6368)
On Fri, May 22, 2020 at 02:52:35PM +0300, Serge Semin wrote:
> On Fri, May 22, 2020 at 02:13:40PM +0300, Andy Shevchenko wrote:
> > On Fri, May 22, 2020 at 03:07:50AM +0300, Serge Semin wrote:
> > > Since DMA transfers are performed asynchronously with actual SPI
> > > transaction, then even if DMA
Hi Jon,
> -Original Message-
> From: Jonathan Hunter
> Sent: Friday, May 22, 2020 5:20 PM
> To: Sandipan Patra ; Thierry Reding
> ; robh...@kernel.org; u.kleine-koe...@pengutronix.de
> Cc: Bibek Basu ; Laxman Dewangan
> ; linux-...@vger.kernel.org;
> devicet...@vger.kernel.org; linux-te.
On Wed, May 20, 2020 at 09:09:33AM -0700, Sowjanya Komatineni wrote:
>
> On 5/20/20 4:26 AM, Ulf Hansson wrote:
> > On Wed, 20 May 2020 at 04:00, Dmitry Osipenko wrote:
> > > 19.05.2020 23:44, Sowjanya Komatineni пишет:
> > > > On 5/19/20 12:07 PM, Sowjanya Komatineni wrote:
> > > > > On 5/19/20
Add support for v2.1 and v2.2 NAND controllers.
v4: fix commit subject.
v3: fix v2.1 page size shift
v2: introduce changes suggested by Miquèl.
Álvaro Fernández Rojas (5):
mtd: rawnand: brcmnand: rename v4 registers
mtd: rawnand: brcmnand: fix CS0 layout
mtd: rawnand: brcmnand: rename page
v2.1: tested on Netgear DGND3700v1 (BCM6368)
v2.2: tested on Netgear DGND3700v2 (BCM6362)
Signed-off-by: Álvaro Fernández Rojas
---
v4: use proper commit subject.
v3: fix page size shift for v2.1 controllers.
v2: split page sizes rename into a different patch.
name all block and page size
These registers are also used on v3.3.
Signed-off-by: Álvaro Fernández Rojas
Reviewed-by: Miquel Raynal
---
v4: no changes.
v3: no changes.
v2: fix commit title.
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/
Current pages sizes apply to controllers after v3.4
Signed-off-by: Álvaro Fernández Rojas
---
v4: no changes.
v3: no changes.
v2: add new patch.
drivers/mtd/nand/raw/brcmnand/brcmnand.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/raw/brcmnand/brcm
Only v3.3-v5.0 have a different CS0 layout.
Controllers before v3.3 use the same layout for every CS.
Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB
NAND controller")
Signed-off-by: Álvaro Fernández Rojas
---
v4: no changes.
v3: no changes.
v2: fix commit log.
d
Added brcm,brcmnand-v2.1 and brcm,brcmnand-v2.2 as possible compatible
strings to support brcmnand controllers v2.1 and v2.2.
Signed-off-by: Álvaro Fernández Rojas
---
v4: no changes.
v3: no changes.
v2: add new patch.
Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt | 2 ++
1 file ch
On Fri, May 22, 2020 at 03:12:21PM +0300, Andy Shevchenko wrote:
> On Fri, May 22, 2020 at 02:52:35PM +0300, Serge Semin wrote:
> > Please, see it's implementation. It does atomic delay when the delay value
> > is less than 10us. But selectively gets to the usleep_range() if value is
> > greater t
Allow device power supply to enter low-power mode if device will
do nothing to save more power.
Signed-off-by: Stanley Chu
Reviewed-by: Pengshun Zhao
---
drivers/scsi/ufs/ufs-mediatek.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/scsi/ufs/ufs-mediatek.c b/
Hi,
This patchset fixes a clk-gating issue and introduces low-power mode for vccq2
in MediaTek platforms.
Stanley Chu (3):
scsi: ufs-mediatek: Fix imprecise waiting time for ref-clk control
scsi: ufs-mediatek: Do not gate clocks if auto-hibern8 is not entered
yet
scsi: ufs-mediatek: Int
There are some chances that link enters hibern8 lately by auto-hibern8
scheme during the clock-gating flow. Clocks shall not be gated if link
is still active otherwise host or device may hang.
Fix this by returning error code to the caller __ufshcd_setup_clocks()
to skip gating clocks there if lin
Currently ref-clk control timeout is implemented by Jiffies. However
jiffies is not accurate enough thus "false timeout" may happen.
Use more accurate delay mechanism instead, for example, ktime.
Signed-off-by: Stanley Chu
Reviewed-by: Andy Teng
---
drivers/scsi/ufs/ufs-mediatek.c | 7 ---
22.05.2020 15:13, Thierry Reding пишет:
> On Wed, May 20, 2020 at 09:09:33AM -0700, Sowjanya Komatineni wrote:
>>
>> On 5/20/20 4:26 AM, Ulf Hansson wrote:
>>> On Wed, 20 May 2020 at 04:00, Dmitry Osipenko wrote:
19.05.2020 23:44, Sowjanya Komatineni пишет:
> On 5/19/20 12:07 PM, Sowjanya
On Fri, May 22, 2020 at 7:01 PM Naresh Kamboju
wrote:
>
> On Tue, 5 May 2020 at 14:12, Yafang Shao wrote:
> >
> > From: Chris Down
> >
> > mem_cgroup_protected currently is both used to set effective low and min
> > and return a mem_cgroup_protection based on the result. As a user, this
> > can
On Fri, 22 May 2020 at 14:40, Sumit Garg wrote:
>
> Hi Maxim,
>
> On Thu, 21 May 2020 at 12:17, Maxim Uvarov wrote:
> >
> > Some drivers (like ftpm) can operate only after tee-supplicant
> > runs becase of tee-supplicant provides things like storage
> > services. This patch splits probe of non t
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 051143e1602d90ea71887d92363edd539d411de5
commit: 1df23c6fe5b0654ece219985a0c32e40b100bd9a compat_ioctl: move HDIO ioctl
handling into drivers/ide
date: 5 months ago
config: xtensa-randconfig-s002-20200522
On Fri, May 22, 2020 at 08:03:25PM +0800, Feng Tang wrote:
> On Fri, May 22, 2020 at 02:32:35PM +0300, Serge Semin wrote:
> > On Fri, May 22, 2020 at 03:58:44PM +0800, Feng Tang wrote:
> > > Hi Serge,
> > >
> > > On Thu, May 21, 2020 at 06:33:17PM +0300, Serge Semin wrote:
> > > > > > > > +
tx-internal-delays and rx-internal-delays are a common setting for RGMII
capable devices.
These properties are used when the phy-mode or phy-controller is set to
rgmii-id, rgmii-rxid or rgmii-txid. These modes indicate to the
controller that the PHY will add the internal delay for the connection.
Hello
The RGMII internal delay is a common setting found in most RGMII capable PHY
devices. It was found that many vendor specific device tree properties exist
to do the same function. This creates a common property to be used for PHY's
that have tunable internal delays for the Rx and Tx paths.
Add RGMII internal delay configuration for Rx and Tx.
Signed-off-by: Dan Murphy
---
drivers/net/phy/dp83869.c | 101 ++
1 file changed, 101 insertions(+)
diff --git a/drivers/net/phy/dp83869.c b/drivers/net/phy/dp83869.c
index cfb22a21a2e6..a9008d32e2b6 10064
Add the internal delay values into the header and update the binding
with the internal delay properties.
Signed-off-by: Dan Murphy
---
.../devicetree/bindings/net/ti,dp83869.yaml | 16
1 file changed, 16 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/ti,d
Add a helper function that will return the index in the array for the
passed in internal delay value. The helper requires the array, size and
delay value.
The helper will then return the index for the exact match or return the
index for the index to the closest smaller value.
Signed-off-by: Dan
On Wed, May 20, 2020 at 01:08:57PM -0700, Sowjanya Komatineni wrote:
> When auto calibration timeouts, calibration is disabled and fail-safe
> drive strength values are programmed based on the signal voltage.
>
> Different fail-safe drive strength values based on voltage are
> applicable only for
On Fri, May 22, 2020 at 02:33:11PM +0300, Tali Perry wrote:
> Add Nuvoton NPCM BMC I2C controller driver.
I thought we are waiting for Wolfram finishing his review...
In any case see couple of comments below.
...
> +#ifdef CONFIG_DEBUG_FS
Now, do we need the rest of DEBUG_FS guards?
> +
On 22/05/2020 13:12, Sandipan Patra wrote:
...
> /*
>* Compute the prescaler value for which (1 << PWM_DUTY_WIDTH)
>* cycles at the PWM clock rate will take period_ns nanoseconds.
>*/
> - rate = pc->clk_rate >> PWM_DUTY_WIDTH;
> + if (pc->soc->num_channels
20.05.2020 23:08, Sowjanya Komatineni пишет:
> When auto calibration timeouts, calibration is disabled and fail-safe
> drive strength values are programmed based on the signal voltage.
>
> Different fail-safe drive strength values based on voltage are
> applicable only for SoCs supporting 3V3 and
On Fri, May 22, 2020 at 02:33:12PM +0300, Tali Perry wrote:
> Add support for slave mode for Nuvoton
> NPCM BMC I2C controller driver.
I guess it will require v14, so, few nits below.
...
> +const int npcm_i2caddr[I2C_NUM_OWN_ADDR] = {
> + NPCM_I2CADDR1, N
On Thu, 21 May 2020, Paul Burton wrote:
> I'm reachable but lacking free time & with no access to Malta hardware
> I can't claim to be too useful here, so thanks for responding :)
Great you're still around! I hope you're doing good in this difficult
time, and overall. I have recently learnt W
Other LSM may set own capabilities to files. But its inode_killpriv
hook may not be called because cap_inode_killpriv breaks
the chain returning -ENODATA on remove xattr other than
XATTR_NAME_CAPS.
Signed-off-by: Dmitry Mastykin
---
security/commoncap.c | 2 +-
1 file changed, 1 insertion(+), 1
On Fri, May 22, 2020 at 2:53 PM Dinghao Liu wrote:
>
> pm_runtime_get_sync() increments the runtime PM usage counter even
> when it returns an error code. Thus a pairing decrement is needed on
> the error handling path to keep the counter balanced.
>
> Also, call pm_runtime_disable() when pm_runti
On Fri, May 22, 2020 at 03:18:40PM +0300, Dmitry Osipenko wrote:
> 22.05.2020 15:13, Thierry Reding пишет:
> > On Wed, May 20, 2020 at 09:09:33AM -0700, Sowjanya Komatineni wrote:
> >>
> >> On 5/20/20 4:26 AM, Ulf Hansson wrote:
> >>> On Wed, 20 May 2020 at 04:00, Dmitry Osipenko wrote:
> 19.
On Fri, May 22, 2020 at 01:18:20PM +0100, Mark Brown wrote:
> On Fri, May 22, 2020 at 03:12:21PM +0300, Andy Shevchenko wrote:
> > On Fri, May 22, 2020 at 02:52:35PM +0300, Serge Semin wrote:
>
> > > Please, see it's implementation. It does atomic delay when the delay value
> > > is less than 10us
On Mon, 18 May 2020 13:29:24 -0500
Tom Zanussi wrote:
> The in-kernel trace event API should have its own section, and the
> duplicate section numbers need fixing as well.
>
> Signed-off-by: Tom Zanussi
Acked-by: Steven Rostedt (VMware)
Jon,
Care to take this in your tree?
-- Steve
> Repo
On 2020/5/22 13:49, Xin Long wrote:
> On Fri, May 22, 2020 at 9:45 AM Yuehaibing wrote:
>>
>> On 2020/5/21 14:49, Xin Long wrote:
>>> On Tue, May 19, 2020 at 4:53 PM Steffen Klassert
>>> wrote:
On Fri, May 15, 2020 at 04:39:57PM +0800, Yuehaibing wrote:
>
> Friendly ping...
The following commit has been merged into the x86/build branch of tip:
Commit-ID: d6ee6529436a15a0541aff6e1697989ee7dc2c44
Gitweb:
https://git.kernel.org/tip/d6ee6529436a15a0541aff6e1697989ee7dc2c44
Author:Fangrui Song
AuthorDate:Wed, 20 May 2020 11:20:10 -07:00
Committer:
YueHaibing wrote:
> In file included from ./include/linux/firmware.h:6:0,
> from drivers/net/wireless/mediatek/mt76/mt7915/mcu.c:4:
> In function ‘__mt7915_mcu_msg_send’,
> inlined from ‘mt7915_mcu_send_message’ at
> drivers/net/wireless/mediatek/mt76/mt7915/mcu.c:370:6:
> .
22.05.2020 15:26, Thierry Reding пишет:
> On Wed, May 20, 2020 at 01:08:57PM -0700, Sowjanya Komatineni wrote:
>> When auto calibration timeouts, calibration is disabled and fail-safe
>> drive strength values are programmed based on the signal voltage.
>>
>> Different fail-safe drive strength value
SMCCC v1.2 adds a new optional function SMCCC_ARCH_SOC_ID to obtain a
SiP defined SoC identification value. Indeed of making it custom
attribute, let us add the same as generic attribute to soc_device.
There are various ways in which it can be represented in shortened form
for efficiency and ease
Hi,
While attempting to add custom sysfs attributes for SMCCC ARCH_SOC_ID
Arnd suggested to make it generic. Here is my first attempt.
The original thread/discussion can be found here[1]
Regards,
Sudeep
[1]
https://lore.kernel.org/r/cak8p3a3dv0b26xe3ofqgtff8ewv0aholudntpssb_t+pcfk...@mail.gmai
SMCCC v1.2 adds a new optional function SMCCC_ARCH_SOC_ID to obtain a
SiP defined SoC identification value. Add support for the same.
Also using the SoC bus infrastructure, let us expose the platform
specific SoC atrributes under sysfs.
Reviewed-by: Steven Price
Acked-by: Etienne Carriere
Signe
On 21/05/2020 20:08, Andrew Morton wrote:
On Thu, 21 May 2020 16:23:06 +0100 Steven Price wrote:
Jan alert me[1] that the W+X detection debug feature was broken in x86
by my change[2] to switch x86 to use the generic ptdump infrastructure.
Fundamentally the approach of trying to move the calc
On Fri, May 22, 2020 at 12:31:47PM +0100, Lee Jones wrote:
> On Fri, 22 May 2020, Thierry Reding wrote:
>
> > On Thu, May 21, 2020 at 08:15:05AM +0100, Lee Jones wrote:
> > > On Wed, 20 May 2020, Guru Das Srinagesh wrote:
> > >
> > > > On Mon, Apr 27, 2020 at 07:44:34AM +0100, Lee Jones wrote:
>
The new interface allows to detect if the page is protected.
A protected page cannot be accessed directly by the host: it has to be
mapped manually.
This is preparation for the next patch.
Signed-off-by: Kirill A. Shutemov
---
arch/powerpc/kvm/book3s_64_mmu_hv.c| 2 +-
arch/powerpc/kvm/boo
Mirror SEV, use SWIOTLB always if KVM memory protection is enabled.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/Kconfig | 1 +
arch/x86/kernel/kvm.c| 2 ++
arch/x86/kernel/pci-swiotlb.c| 3 ++-
arch/x86/mm/mem_encrypt.c| 20
arch
force_dma_unencrypted() has to return true for KVM guest with the memory
protected enabled. Move it out of AMD SME code.
Introduce new config option X86_MEM_ENCRYPT_COMMON that has to be
selected by all x86 memory encryption features.
This is preparation for the following patches.
Signed-off-by:
On Wed, May 20, 2020 at 03:01:22PM +0300, Andy Shevchenko wrote:
> Enables probing via the ACPI PRP0001 route but more is mostly about
> removing examples of this that might get copied into new drivers.
>
> Also fixes
> drivers/mux/adgs1408.c:112:34: warning: unused variable 'adgs1408_of_match
>
On Fri, May 22, 2020 at 03:42:18PM +0300, Dmitry Osipenko wrote:
> 22.05.2020 15:26, Thierry Reding пишет:
> > On Wed, May 20, 2020 at 01:08:57PM -0700, Sowjanya Komatineni wrote:
> >> When auto calibration timeouts, calibration is disabled and fail-safe
> >> drive strength values are programmed ba
Make force_dma_unencrypted() return true for KVM to get DMA pages mapped
as shared.
__set_memory_enc_dec() now informs the host via hypercall if the state
of the page has changed from shared to private or back.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/Kconfig | 1 +
arch/x
Hi all,
Changes since 20200521:
My fixes tree contains:
cd2b06ec45d6 ("device_cgroup: Fix RCU list debugging warning")
The ext4 tree gained a conflict against the fscrypt tree.
The jc_docs tree gained a conflict against the ext4 tree.
The drm-msm tree still had its build failure so I applie
Wire up hypercalls for the feature and define VM_KVM_PROTECTED.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/Kconfig | 1 +
arch/x86/kvm/cpuid.c | 3 +++
arch/x86/kvm/x86.c | 9 +
include/linux/mm.h | 4
4 files changed, 17 insertions(+)
diff --git a/arch/x86/Kconfig b/ar
We are going unmap guest pages from direct mapping and cannot rely on it
for guest memory access. Use temporary kmap_atomic()-style mapping to
access guest memory.
Signed-off-by: Kirill A. Shutemov
---
virt/kvm/kvm_main.c | 57 +++--
1 file changed, 55 ins
hvclock is shared between the guest and the hypervisor. It has to be
accessible by host.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/kernel/kvmclock.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index 34b18f6eeb2c
== Background / Problem ==
There are a number of hardware features (MKTME, SEV) which protect guest
memory from some unauthorized host access. The patchset proposes a purely
software feature that mitigates some of the same host-side read-only
attacks.
== What does this set mitigate? ==
- Host
If the protected memory feature enabled, unmap guest memory from
kernel's direct mappings.
Migration and KSM is disabled for protected memory as it would require a
special treatment.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/mm/pat/set_memory.c | 1 +
include/linux/kvm_host.h | 3 ++
struct kvm_steal_time is shared between guest and host. Mark it as
shared.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/kernel/kvm.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index f50d65df4412..b0f445796ed1 100644
--
We cannot access protected pages directly. Use ioremap() to
create a temporary mapping of the page. The mapping is destroyed
on __kvm_unmap_gfn().
The new interface gfn_to_pfn_memslot_protected() is used to detect if
the page is protected.
ioremap_cache_force() is a hack to bypass IORES_MAP_SYSTE
Add infrastructure that handles protected memory extension.
Arch-specific code has to provide hypercalls and define non-zero
VM_KVM_PROTECTED.
Signed-off-by: Kirill A. Shutemov
---
include/linux/kvm_host.h | 4 ++
mm/mprotect.c| 1 +
virt/kvm/kvm_main.c | 131 ++
The user mapping doesn't have the page mapping for protected memory.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/kvm/mmu/paging_tmpl.h | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kvm/mmu/paging_tmpl.h b/arch/x86/kvm/mmu/paging_tmpl.h
index 9bdf9b7d9
VirtIO for KVM is a primary way to provide IO. All memory that used for
communication with the host has to be marked as shared.
The easiest way to archive that is to use DMA API that already knows how
to deal with shared memory.
Signed-off-by: Kirill A. Shutemov
---
drivers/virtio/virtio_ring.c
The new VMA flag that indicate a VMA that is not accessible to userspace
but usable by kernel with GUP if FOLL_KVM is specified.
The FOLL_KVM is only used in the KVM code. The code has to know how to
deal with such pages.
Signed-off-by: Kirill A. Shutemov
---
include/linux/mm.h | 8
Provide basic helpers, KVM_FEATURE and a hypercall.
Host side doesn't provide the feature yet, so it is a dead code for now.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/include/asm/kvm_para.h | 5 +
arch/x86/include/uapi/asm/kvm_para.h | 3 ++-
arch/x86/kernel/kvm.c
On Thu, May 14, 2020 at 01:53:16AM +0530, Souptick Joarder wrote:
> First, when memory allocation for sg_list_unaligned failed, there
> is no point of calling put_pages() as we haven't pinned any pages.
>
> Second, if get_user_pages_fast() failed we should unpinned num_pinned
> pages, no point of
New helpers copy_from_guest()/copy_to_guest() to be used if KVM memory
protection feature is enabled.
Signed-off-by: Kirill A. Shutemov
---
include/linux/kvm_host.h | 4 +++
virt/kvm/kvm_main.c | 78 ++--
2 files changed, 72 insertions(+), 10 deletions(-
The Documentation/DMA-API-HOWTO.txt states that the dma_map_sg() function
returns the number of the created entries in the DMA address space.
However the subsequent calls to the dma_sync_sg_for_{device,cpu}() and
dma_unmap_sg must be called with the original number of the entries
passed to the dma_
Hi Daniel,
On 5/22/20 11:43 AM, Daniel Lezcano wrote:
Hi Lukasz,
On 11/05/2020 13:18, Lukasz Luba wrote:
Hi all,
This patch set introduces support for devices in the Energy Model (EM)
framework. It will unify the power model for thermal subsystem. It will
make simpler to add support for new
On Wed, May 20, 2020 at 04:12:06PM +0100, Jon Hunter wrote:
> Since commit 93d2e4322aa7 ("of: platform: Batch fwnode parsing when
> adding all top level devices") was added, the probing of the Tegra
> SRAM device has occurred later in the boot sequence, after the BPMP
> has been probed. The BPMP us
On Thu, May 21, 2020 at 09:47:05AM -0400, Joel Fernandes wrote:
> Hi Peter,
> Thanks for the comments.
>
> On Thu, May 21, 2020 at 10:51:22AM +0200, Peter Zijlstra wrote:
> > On Wed, May 20, 2020 at 06:26:42PM -0400, Joel Fernandes (Google) wrote:
> > > Add a per-thread core scheduling interface w
On Tue, May 19, 2020 at 02:03:01AM -0700, Nicolin Chen wrote:
> Though the unconditional enable/disable code is not a final solution,
> we don't want to run into a NULL pointer situation when window group
> doesn't link to its DC parent if the DC is disabled in Device Tree.
>
> So this patch simpl
Hello,
This provides a patch, but it doesn't look like the right one. It looks
like the if test should be testing opp_table,
julia
On Fri, 22 May 2020, kbuild test robot wrote:
> From: kbuild test robot
>
> drivers/devfreq/governor_passive.c:336:7-13: inconsistent IS_ERR and PTR_ERR
> on lin
On 22/05/2020 14:58, Lukasz Luba wrote:
[ ... ]
>>>
>>> The patch set is based on linux-next tag next-20200508.
>>
>> Do you think it is possible to respin against linux-pm next ?
>
> Yes, I will do it and send the v8.
>
>>
>> I wanted to try the series but I'm getting non trivial conflicts wit
Since the change to move default domain allocation to probe,
there is a refcount decrement missing for the group in
iommu_alloc_default_domain(). Because of this missing
refcount decrement, the device is never released from the
group as the devices_kobj refcount never reaches 0 in
iommu_group_remov
On Fri, May 22, 2020 at 01:05:56PM +0200, Sebastian Andrzej Siewior wrote:
> On 2020-05-20 14:04:50 [+0200], Peter Zijlstra wrote:
> > On Tue, May 19, 2020 at 10:19:05PM +0200, Sebastian Andrzej Siewior wrote:
> > > +/**
> > > + * DEFINE_LOCAL_LOCK - Define and initialize a per CPU local lock
> > >
On Sun, 17 May 2020 at 14:58, Ard Biesheuvel wrote:
>
> The following changes since commit a088b858f16af85e3db359b6c6aaa92dd3bc0921:
>
> efi/x86: Revert struct layout change to fix kexec boot regression
> (2020-04-14 08:32:17 +0200)
>
> are available in the Git repository at:
>
> git://git.ke
On Tue, Apr 28, 2020 at 05:16:55PM +0200, Joerg Roedel wrote:
> diff --git a/arch/x86/include/asm/stacktrace.h
> b/arch/x86/include/asm/stacktrace.h
> index 14db05086bbf..2f3534ef4b5f 100644
> --- a/arch/x86/include/asm/stacktrace.h
> +++ b/arch/x86/include/asm/stacktrace.h
> @@ -21,6 +21,10 @@ en
On Fri, May 22, 2020 at 11:48 AM Jassi Brar wrote:
>
> On Thu, May 21, 2020 at 7:24 AM Baolin Wang wrote:
> >
> > Hi Jassi,
> >
> > On Wed, May 13, 2020 at 2:32 PM Baolin Wang wrote:
> > >
> > > On Wed, May 13, 2020 at 2:05 PM Jassi Brar
> > > wrote:
> > > >
> > > > On Tue, May 12, 2020 at 11:
On 21/05/2020 15:32, Anup Patel wrote:
> Instead of directly calling RISC-V timer interrupt handler from
> RISC-V local interrupt conntroller driver, this patch implements
> RISC-V timer interrupt as a per-CPU interrupt using per-CPU APIs
> of Linux IRQ subsystem.
>
> Signed-off-by: Anup Patel
v
We may want to get rid of the iio_priv_to_dev() helper. The reason is that
we will hide some of the members of the iio_dev structure (to prevent
drivers from accessing them directly), and that will also mean hiding the
implementation of the iio_priv_to_dev() helper inside the IIO core.
Hiding the
We may want to get rid of the iio_priv_to_dev() helper. The reason is that
we will hide some of the members of the iio_dev structure (to prevent
drivers from accessing them directly), and that will also mean hiding the
implementation of the iio_priv_to_dev() helper inside the IIO core.
Hiding the
On Wed, May 20, 2020 at 07:57:29PM +0800, Jiaxun Yang wrote:
>
>
> 于 2020年5月14日 GMT+08:00 下午9:16:38, Jiaxun Yang 写到:
> >This controller can be found on Loongson-2K SoC, Loongson-3
> >systems with RS780E/LS7A PCH.
> >
> >The RS780E part of code was previously located at
> >arch/mips/pci/ops-loong
On Fri, May 22, 2020 at 03:52:15PM +0300, Andy Shevchenko wrote:
> On Wed, May 20, 2020 at 03:01:22PM +0300, Andy Shevchenko wrote:
> > Enables probing via the ACPI PRP0001 route but more is mostly about
> > removing examples of this that might get copied into new drivers.
> >
> > Also fixes
> >
On 21/05/2020 08:00, dinghao@zju.edu.cn wrote:
Hi Steve,
There are two bailing out points in panfrost_job_hw_submit(): one is
the error path beginning from pm_runtime_get_sync(), the other one is
the error path beginning from WARN_ON() in the if statement. The pm
imbalance fixed in this patc
On Thu, May 21, 2020 at 08:39:02PM +0300, Dan Carpenter wrote:
> On Thu, May 21, 2020 at 05:22:05PM +0200, Rafael J. Wysocki wrote:
> > On Thu, May 21, 2020 at 11:15 AM Dan Carpenter
> > wrote:
> > >
> > > On Thu, May 21, 2020 at 11:42:55AM +0800, dinghao@zju.edu.cn wrote:
> > > > Hi, Dan,
>
On Fri, May 22, 2020 at 04:37:16PM +0800, Jianyong Wu wrote:
> Export arm_smccc_1_1_get_conduit then modules can use smccc helper which
> adopts it.
>
> Acked-by: Mark Rutland
> Signed-off-by: Jianyong Wu
> ---
> drivers/firmware/psci/psci.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
On Thu, May 21, 2020 at 07:30:04PM +0800, Shengjiu Wang wrote:
> On Wed, May 20, 2020 at 8:38 PM Mark Brown wrote:
> > Other drivers having problems means those drivers should be fixed, not
> > that we should copy the problems. In the case of the PXA driver that's
> > very old code which predate
On Thu, May 21, 2020 at 11:55:21AM -0400, Joel Fernandes wrote:
> On Thu, May 21, 2020 at 11:53 AM Joel Fernandes (Google)
> wrote:
> >
> > On a modern Linux distro, compiling the following program fails:
> > #include
> > #include
> > #include
> > #include
> >
> > void main() {
> > s
On Fri, May 22, 2020 at 09:27:43AM +0200, Thomas Bogendoerfer wrote:
> On Thu, May 21, 2020 at 05:07:14PM +0300, Serge Semin wrote:
> > There are five MIPS32/64 architecture releases currently available:
> > from 1 to 6 except fourth one, which was intentionally skipped.
> > Three of them can be ca
With 'commit 461c1a7d4733 ("gpiolib: override irq_enable/disable")' gpiolib
overrides irqchip's irq_enable and irq_disable callbacks. If irq_disable
callback is implemented then genirq takes unlazy path to disable irq.
Underlying irqchip may not want to implement irq_disable callback to lazy
disab
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