On Tue, Sep 24, 2019 at 11:27 PM Biwen Li wrote:
>
> > > >
> > > > > > > > > >
> > > > > > > > > > The 'fsl,ippdexpcr-alt-addr' property is used to handle
> > > > > > > > > > an errata
> > > > > > > > > > A-008646 on LS1021A
> > > > > > > > > >
> > > > > > > > > > Signed-off-by: Biwen Li
> > > >
With the commit ad67b74d2469d9b8 ("printk: hash addresses printed with
%p"), it is a little bit harder to match the fault addresses printed by
check_bytes_and_report() or slab_pad_check() in the dump because the
fault addresses may not show up in the dump.
Print the offset of the fault addresses t
On Tue, Sep 24, 2019 at 05:52:32PM +0200, Borislav Petkov wrote:
> On Tue, Sep 03, 2019 at 05:26:33PM +0300, Jarkko Sakkinen wrote:
> > From: Kai Huang
> >
> > Add X86_FEATURE_SGX_LC, which informs whether or not the CPU supports SGX
> > Launch Control.
> >
> > Add MSR_IA32_SGXLEPUBKEYHASH{0, 1,
On Wed, 25 Sep 2019, syzbot wrote:
> Hello,
>
> syzbot found the following crash on:
>
> HEAD commit:d9e63adc usb-fuzzer: main usb gadget fuzzer driver
> git tree: https://github.com/google/kasan.git usb-fuzzer
> console output: https://syzkaller.appspot.com/x/log.txt?x=16b5fcd560
On Wed, Sep 25, 2019 at 05:09:03PM +0300, Jarkko Sakkinen wrote:
> > > [1] Intel SDM: 38.1.4 Intel SGX Launch Control Configuration
> > >
> > > Signed-off-by: Sean Christopherson
> > > Co-developed-by: Haim Cohen
> > > Signed-off-by: Haim Cohen
> > > Signed-off-by: Jarkko Sakkinen
> >
> > Thi
Commit 4fdbfd60a3a2 ("arm64: tegra: Add PCIe slot supply information
in p2972- platform") added regulators for the PCIe slot on the
Jetson Xavier platform. One of these regulators has an active-low enable
and this commit incorrectly added an active-low specifier for the GPIO
which causes the fo
Commit 34993594181d ("arm64: tegra: Enable HDMI on Jetson TX1")
added a regulator for HDMI on the Jetson TX1 platform. This regulator
has an active high enable, but the GPIO specifier for enabling the
regulator incorrectly defines it as active-low. This causes the
following warning to occur on boot
The riscv has csr_read/write macro, see arch/riscv/include/asm/csr.h,
the same function naming will cause build error, rename them to
__csr_read/write to fix it.
drivers/pci/controller/pcie-mobiveil.c:238:69: error: macro "csr_read" passed 3
arguments, but takes just 1
static u32 csr_read(struct
On Tue, Sep 24, 2019 at 9:02 PM Hongwei Zhang wrote:
> The related SGPIO driver has been accepted and merged into v5.4:
> _http://patchwork.ozlabs.org/patch/1150357/
Oh what a mess, it didn't add the necessary code into Kconfig
and Makefile, also names it sgpio-gpio.c when everything
else is nam
Fixup the following sparse warnings by making the functions and structures
static.
arch/arm/mm/dma-mapping.c:1562:6: warning: symbol '__arm_iommu_free_attrs' was
not declared. Should it be static?
arch/arm/mm/dma-mapping.c:1586:6: warning: symbol 'arm_iommu_free_attrs' was
not declared. Should i
The arch_timer_arch_init is defined in so include
that to fix the following sparse error:
arch/arm/kernel/arch_timer.c:31:12: warning: symbol 'arch_timer_arch_init' was
not declared. Should it be static?
Signed-off-by: Ben Dooks
---
arch/arm/kernel/arch_timer.c | 1 +
1 file changed, 1 insert
The module_frob_arch_sections function is missing the header declaration
which is in so include that to fix the following
sparse warning:
arch/arm/kernel/module-plts.c:188:5: warning: symbol
'module_frob_arch_sections' was not declared. Should it be static?
Signed-off-by: Ben Dooks
---
arch/a
On Tue, Sep 24, 2019 at 06:04:42PM +0200, Borislav Petkov wrote:
> > + /*
> > +* Access is blocked by the Enclave Page Cache Map (EPCM), i.e. the
> > +* access is allowed by the PTE but not the EPCM. This usually happens
> > +* when the EPCM is yanked out from under us, e.g. by hardw
Move the pcibios_report_status to include to remove the
following sparse warning and to remove the extra definition in the
footbrdige dc21285.c driver:
arch/arm/kernel/bios32.c:59:6: warning: symbol 'pcibios_report_status' was not
declared. Should it be static?
Signed-off-by: Ben Dooks
---
ar
From: Ursula Braun
Date: Wed, 25 Sep 2019 14:10:05 +0200
> we have to admit that it is already late for these patches. Nevertheless
> we think it is better to come up with them now than never. We doubt there
> exists already much userland code for it - except our own IBM-provided
> package smc-to
Fix the following warnings from sparse by removing the 0 initialiser
that is actually a pointer.
drivers/clk/hisilicon/clk-hi3670.c:298:64: warning: Using plain integer as NULL
pointer
drivers/clk/hisilicon/clk-hi3670.c:300:64: warning: Using plain integer as NULL
pointer
drivers/clk/hisilicon/c
Fix the following warnings from sparse by removing the 0 initialiser
that is actually a pointer.
drivers/clk/hisilicon/clk-hi3670.c:298:64: warning: Using plain integer as NULL
pointer
drivers/clk/hisilicon/clk-hi3670.c:300:64: warning: Using plain integer as NULL
pointer
drivers/clk/hisilicon/c
Sorry, I missed to fix few checkpatch warnings. Corrected it now
When a cpu requests broadcasting, before starting the tick broadcast
hrtimer, bc_set_next() checks if the timer callback (bc_handler) is
active using hrtimer_try_to_cancel(). But hrtimer_try_to_cancel() does
not provide the required synchronization when the callback is active on
other core.
The cal
On Wed, Sep 18, 2019 at 12:43 PM Markus Elfring wrote:
>
> From: Markus Elfring
> Date: Wed, 18 Sep 2019 21:32:14 +0200
>
> Simplify this function implementation by using a known wrapper function.
>
> This issue was detected by using the Coccinelle software.
>
> Signed-off-by: Markus Elfring
Re
Hello Christian,
On 9/25/19 3:53 PM, Christian Brauner wrote:
> On Wed, Sep 25, 2019 at 03:46:26PM +0200, Michael Kerrisk (man-pages) wrote:
>> On 9/24/19 11:53 PM, Christian Brauner wrote:
>>> On Tue, Sep 24, 2019 at 11:00:03PM +0200, Michael Kerrisk (man-pages) wrote:
Hello Christian,
On Wed 25 Sep 2019 at 19:44, Jian Hu wrote:
In addition to the comment expressed by Stephen on patch 2
> Add the documentation to support Amlogic A1 clock driver,
> and add A1 clock controller bindings.
>
> Signed-off-by: Jian Hu
> Signed-off-by: Jianxin Pan
> ---
> .../devicetree/bindings/cl
These are followups to [1] which made it to Linus meanwhile. Patches 1 and 3
are based on Kirill's review, patch 2 on KASAN request [2]. It would be nice
if all of this made it to 5.4 with [1] already there (or at least Patch 1).
[1] https://lore.kernel.org/linux-mm/20190820131828.22684-1-vba...@s
The commit 8974558f49a6 ("mm, page_owner, debug_pagealloc: save and dump
freeing stack trace") enhanced page_owner to also store freeing stack trace,
when debug_pagealloc is also enabled. KASAN would also like to do this [1] to
improve error reports to debug e.g. UAF issues. This patch therefore in
The commit 8974558f49a6 ("mm, page_owner, debug_pagealloc: save and dump
freeing stack trace") enhanced page_owner to also store freeing stack trace,
when debug_pagealloc is also enabled. KASAN would also like to do this [1] to
improve error reports to debug e.g. UAF issues. This patch therefore in
As noted by Kirill, commit 7e2f2a0cd17c ("mm, page_owner: record page owner for
each subpage") has introduced an off-by-one error in __set_page_owner_handle()
when looking up page_ext for subpages. As a result, the head page page_owner
info is set twice, while for the last tail page, it's not set a
As noted by Kirill, commit 7e2f2a0cd17c ("mm, page_owner: record page owner for
each subpage") has introduced an off-by-one error in __set_page_owner_handle()
when looking up page_ext for subpages. As a result, the head page page_owner
info is set twice, while for the last tail page, it's not set a
Commit 37389167a281 ("mm, page_owner: keep owner info when freeing the page")
has introduced a flag PAGE_EXT_OWNER_ACTIVE to indicate that page is tracked as
being allocated. Kirril suggested naming it PAGE_EXT_OWNER_ALLOCED to make it
more clear, as "active is somewhat loaded term for a page".
S
Commit 37389167a281 ("mm, page_owner: keep owner info when freeing the page")
has introduced a flag PAGE_EXT_OWNER_ACTIVE to indicate that page is tracked as
being allocated. Kirril suggested naming it PAGE_EXT_OWNER_ALLOCED to make it
more clear, as "active is somewhat loaded term for a page".
S
These are followups to [1] which made it to Linus meanwhile. Patches 1 and 3
are based on Kirill's review, patch 2 on KASAN request [2]. It would be nice
if all of this made it to 5.4 with [1] already there (or at least Patch 1).
[1] https://lore.kernel.org/linux-mm/20190820131828.22684-1-vba...@s
Commit c5665868183f ("mm: kmemleak: use the memory pool for early
allocations") renamed CONFIG_DEBUG_KMEMLEAK_EARLY_LOG_SIZE to
CONFIG_DEBUG_KMEMLEAK_MEM_POOL_SIZE. Update the documentation reference
to reflect that.
Signed-off-by: Jeremy Cline
---
Documentation/dev-tools/kmemleak.rst | 2 +-
1
On Tue, Sep 24, 2019 at 10:20:09AM -0700, Andy Lutomirski wrote:
> > I think either can be considered post-upstreaming.
>
> Indeed, as long as the overall API is actually compatible with these
> types of restrictions.
I include LSM changes to the follow up versions of the patch set. This
is done
On Wed, Sep 25, 2019 at 02:31:14PM +, Jeremy Cline wrote:
> Commit c5665868183f ("mm: kmemleak: use the memory pool for early
> allocations") renamed CONFIG_DEBUG_KMEMLEAK_EARLY_LOG_SIZE to
> CONFIG_DEBUG_KMEMLEAK_MEM_POOL_SIZE. Update the documentation reference
> to reflect that.
>
> Signed-
From: Ryder Lee
This adds a property "num-pwms" to avoid having an endless
list of compatibles with no differences for the same driver.
Signed-off-by: Ryder Lee
Signed-off-by: Sam Shih
Reviewed-by: Uwe Kleine-König
---
Changes since v6:
Add a Reviewed-by tag
Changes since v5:
Check num-pwms
Changes since v10
1. Follow reviewers's comments:
- derive the number of PWMs from the specific compatible string
2. Add mt7629 pwm description
3. Add mt7628 fixed-clock description
Changes since v9:
1. PATCH 03/11: Add an Acked-by tag
Changes since v8:
1. Fix warning and build-error
This patch drop the check for of_device_get_match_data.
Due to the only way call driver probe is compatible match.
The .data pointer which point to the SoC specify data is
directly set by driver, and it should not be NULL in our case.
We can safety remove the check for of_device_get_match_data.
Si
We can use fixed-clock to repair mt7628 pwm during configure from
userspace. The SoC is legacy MIPS and has no complex clock tree.
Due to we can get clock frequency for period calculation from DT
fixed-clock, so we can remove has-clock property, and directly
use devm_clk_get and clk_get_rate.
Sign
Use pwm_mediatek as common prefix to match the filename.
No functional change intended.
Signed-off-by: Ryder Lee
Signed-off-by: Sam Shih
Acked-by: Uwe Kleine-König
---
Changes since v6:
Add an Acked-by tag
Changes since v5:
- Follow reviewers's comments
The license stuff is a separate change
Instead of using fixed size of arrays, allocate the memory for them
based on the information we get from the DT.
Also remove the check for num_pwms, due to dynamically allocate pwm
should not cause array index out of bound.
Signed-off-by: Ryder Lee
Signed-off-by: Sam Shih
Reviewed-by: Uwe Klein
From: Ryder Lee
This adds a property "num-pwms" in example so that we could
specify the number of PWM channels via device tree.
Signed-off-by: Ryder Lee
Signed-off-by: Sam Shih
Reviewed-by: Matthias Brugger
Acked-by: Uwe Kleine-König
---
Changes since v10:
1. Follow reviewers's comments:
- d
Add SPDX identifiers to pwm-mediatek.c
Update license to GNU General Public License v2.0
Signed-off-by: Ryder Lee
Signed-off-by: Sam Shih
Reviewed-by: Uwe Kleine-König
---
Changes since v6:
Add a Reviewed-by tag
Changes since v5:
- Follow reviewers's comments
The license stuff is a separate ch
From: Ryder Lee
This adds a property "num-pwms" for PWM controller.
Signed-off-by: Ryder Lee
Signed-off-by: Sam Shih
---
arch/arm/boot/dts/mt7623.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index a79f0b6c3429..208e0d19
From: Ryder Lee
This adds a property "num-pwms" for PWM controller.
Signed-off-by: Ryder Lee
Signed-off-by: Sam Shih
---
arch/arm64/boot/dts/mediatek/mt7622.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
b/arch/arm64/boot/dts/mediatek/mt7622
This adds pwm support for MT7629, and separate mt7629 compatible string
from mt7622
Signed-off-by: Sam Shih
---
drivers/pwm/pwm-mediatek.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
index ce7525d8d71b..7035abfbdc6a 100644
---
Sakari Ailus wrote on Wed [2019-Sep-25 12:51:54
+0300]:
> Hi Benoit,
>
> On Tue, Sep 24, 2019 at 11:44:12AM -0500, Benoit Parrot wrote:
> > On some board it is possible that the sensor 'powerdown' and or 'reset'
> > pin might be controlled by gpio instead of being tied.
> >
> > To implement we
From: Ryder Lee
This updates bindings for MT7629 pwm controller.
Signed-off-by: Ryder Lee
Signed-off-by: Sam Shih
Reviewed-by: Rob Herring
Reviewed-by: Matthias Brugger
---
Changes since v7:
- add a missed Reviewed-by tag back from v1:
https://patchwork.kernel.org/patch/10769381/
Changes sin
This adds pwm support for MT7629.
Signed-off-by: Sam Shih
---
Changes since v10:
- Use "mediatek,mt7629-pwm" as compatible string
- Fix reg setting
---
arch/arm/boot/dts/mt7629.dtsi | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/mt7629.dtsi b/arch/arm/boo
On Wed, Sep 25, 2019 at 10:59:20AM +0800, Jia He wrote:
> We unconditionally set the HW_AFDBM capability and only enable it on
> CPUs which really have the feature. But sometimes we need to know
> whether this cpu has the capability of HW AF. So decouple AF from
> DBM by new helper cpu_has_hw_af().
On Wed, Sep 25, 2019 at 05:10:58PM +0300, Jarkko Sakkinen wrote:
> On Wed, Sep 25, 2019 at 05:09:03PM +0300, Jarkko Sakkinen wrote:
> > > > [1] Intel SDM: 38.1.4 Intel SGX Launch Control Configuration
> > > >
> > > > Signed-off-by: Sean Christopherson
> > > > Co-developed-by: Haim Cohen
> > > >
When looking for a bit by number we make use of the cached result from the
preceding lookup to speed up operation. Firstly we check if the requested
pfn is within the cached zone and if not lookup the new zone. We then
check if the offset for that pfn falls within the existing cached node.
This h
Hi Arthur,
Thanks for the patch, just some small comments below.
On 9/24/19 8:21 PM, Arthur Moraes do Lago wrote:
> Add mean window size parameter for debayer filter as a control in
> vimc-debayer.
>
> vimc-debayer was patched to allow changing mean windows parameter
> of the filter without need
On Wed, Sep 25, 2019 at 10:59:22AM +0800, Jia He wrote:
> When we tested pmdk unit test [1] vmmalloc_fork TEST1 in arm64 guest, there
> will be a double page fault in __copy_from_user_inatomic of cow_user_page.
>
> Below call trace is from arm64 do_page_fault for debugging purpose
> [ 110.016195]
Sorry to answer 10 month later. You certainly have lost track of this. I have.
I'm re-issuing this patchset but more piecewise to make the review easier.
In case you still care, I'm answering your comments below. But you can skip
that and wait for the new version that I'm about to post.
On Tue,
In sdma_init if rhashtable_init fails the allocated memory for
tmp_sdma_rht should be released.
Signed-off-by: Navid Emamdoost
---
drivers/infiniband/hw/hfi1/sdma.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/infiniband/hw/hfi1/sdma.c
b/drivers/infiniband/hw/
On Tue, Sep 24, 2019 at 08:21:19PM +0200, Borislav Petkov wrote:
> On Tue, Sep 24, 2019 at 10:43:11AM -0700, Sean Christopherson wrote:
> > The intent of running on every CPU is to verify MSR_IA32_FEATURE_CONTROL
> > is correctly configured on all CPUs. It's extremely unlikely that
> > firmware wo
On Wed, Sep 25, 2019 at 01:15:29PM +0300, Jarkko Sakkinen wrote:
> commit db4d8cb9c9f2af71c4d087817160d866ed572cc9 upstream
>
> This backport is for v4.14 and v4.19 The backport requires non-racy
> behaviour from TPM 1.x sysfs code. Thus, the dependecies for that
> are included.
>
> NOTE: 1/3 is
On 25.09.19 13:26, Robin Gong wrote:
> On 2019-9-24 21:28 Schrempf Frieder wrote:
>>
>> Hi Robin,
>>
>>> From: Robin Gong
>>>
>>> Because the number of ecspi1 rx event on i.mx8mm is 0, the condition
>>> check ignore such special case without dma channel enabled, which
>>> caused
>>> ecspi1 rx wor
On Tue, 10 Sep 2019, James Morris wrote:
> Hi Linus,
>
> This is the latest iteration of the kernel lockdown patchset, from Matthew
> Garrett, David Howells and others.
Seems like this didn't happen (yet) ... are there any plans to either drop
it for good, or merge it?
Thanks,
--
Jiri Kosin
On Tue 17 Sep 2019 at 10:12, Jose Abreu wrote:
> From: Loys Ollivier
> Date: Sep/17/2019, 11:02:36 (UTC+00:00)
>
>> rtnl_lock needs to be taken before calling phylink_start/stop to lock the
>> network stack.
>> Fix ASSERT_RTNL() warnings by protecting such calls with lock/unlock.
>>
>> Fixes: 7
On Sat, Sep 21, 2019 at 9:31 PM Hans de Goede wrote:
>
> Hi,
>
> On 21-09-2019 00:33, Yauhen Kharuzhy wrote:
> > Existing intel_cht_int33fe ACPI pseudo-device driver assumes that
> > hardware has Type-C connector and register related devices described as
> > I2C connections in the _CRS resource.
>
In cx23888_ir_probe if kfifo_alloc fails the allocated memory for state
should be released.
Signed-off-by: Navid Emamdoost
---
drivers/media/pci/cx23885/cx23888-ir.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/media/pci/cx23885/cx23888-ir.c
b/drivers/media/pc
When CONFIG_PRINTK_CALLER is set, struct printk_log contains an
additional member caller_id. As a result, the offset of the log text is
different.
This fixes the following error:
(gdb) lx-dmesg
Python Exception embedded null character:
Error occurred in Python command: embedded null charac
On Fri, Sep 20, 2019 at 1:55 PM Kefeng Wang wrote:
>
> As said in commit f2c2cbcc35d4 ("powerpc: Use pr_warn instead of
> pr_warning"), removing pr_warning so all logging messages use a
> consistent _warn style. Let's do it.
>
You have to send to proper mailing lists and people.
Don't spam the re
On Wed, Sep 25, 2019 at 12:48 PM Pacien TRAN-GIRARD
wrote:
>
> This patch adds a quirk disabling keyboard backlight support for the
> Dell Inspiron 1012 and 1018.
>
> Those models wrongly report supporting keyboard backlight control
> features (through SMBIOS tokens) even though they're not equipp
On Wed 25 Sep 2019 at 19:44, Jian Hu wrote:
> The Amlogic A1 clock includes three parts:
> peripheral clocks, pll clocks, CPU clocks.
> sys pll and CPU clocks will be sent in next patch.
>
> Unlike the previous series, there is no EE/AO domain
> in A1 CLK controllers.
>
> Signed-off-by: Jian Hu
Make it clear in the documentation that V4L2_CTRL_FLAG_READ_ONLY doesn't
conflict with V4L2_CTRL_FLAG_WRITE_ONLY. Also make it clear that
if both are combined then the control has read and write permissions.
Signed-off-by: Helen Koike
---
Hi,
v4l2-compliance expects both flags for read and writ
Applied, thanks.--b.
On Wed, Sep 25, 2019 at 02:09:30PM +0100, Colin King wrote:
> From: Colin Ian King
>
> There are statements that are indented incorrectly, remove the
> extraneous spacing.
>
> Signed-off-by: Colin Ian King
> ---
> net/sunrpc/svc.c | 4 ++--
> 1 file changed, 2 insertions(
On Fri, Sep 20, 2019 at 2:06 AM Philipp Puschmann
wrote:
>
> Hi Andy,
>
> Am 20.09.19 um 05:42 schrieb Andy Duan:
> > From: Philipp Puschmann Sent: Thursday,
> > September 19, 2019 10:51 PM
> >> Using only 4 DMA periods for UART RX is very few if we have a high
> >> frequency
> >> of small tran
On 9/25/19 5:09 PM, Helen Koike wrote:
> Make it clear in the documentation that V4L2_CTRL_FLAG_READ_ONLY doesn't
> conflict with V4L2_CTRL_FLAG_WRITE_ONLY. Also make it clear that
> if both are combined then the control has read and write permissions.
That doesn't look right.
This is the test in
On Wed, 2019-09-25 at 11:31 +0200, Peter Zijlstra wrote:
> On Fri, Sep 13, 2019 at 12:27:44PM -0400, Qian Cai wrote:
> > The commit b7d5dc21072c ("random: add a spinlock_t to struct
> > batched_entropy") insists on acquiring "batched_entropy_u32.lock" in
> > get_random_u32() which introduced the lo
On Wed, Sep 25, 2019 at 05:09:03PM +0300, Jarkko Sakkinen wrote:
> The driver will support only the case where the bit is set i.e. that
> it can freely write to the MSRs MSR_IA32_SGXLEPUBKEYHASH{0, 1, 2, 3}.
> It will refuse to initialize otherwise.
See this:
https://lkml.kernel.org/r/20190925085
On Wed, 2019-09-25 at 20:52 +0800, Yunfeng Ye wrote:
> It's not necessary to put kfree() in the critical area of the lock, so
> let it out.
>
> Signed-off-by: Yunfeng Ye
> ---
> kernel/async.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/kernel/async.c b/kernel
In the 1920x1080 register array an extra pair of reset ctrl disable
re-enable was causing unwanted init delays.
Signed-off-by: Benoit Parrot
---
drivers/media/i2c/ov5640.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/media/i2c/ov5640.c b/drivers/media/i2c/ov5640.
Add v4l2 controls to report the pixel rates of each mode. This is
needed by some CSI2 receiver in order to perform proper DPHY
configuration.
Signed-off-by: Benoit Parrot
---
drivers/media/i2c/ov5640.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/media/i
The sensor data sheet clearly state that 2592x1944 only works at 15 fps
make sure we don't try to miss configure the pll out of acceptable
range.
Signed-off-by: Benoit Parrot
---
drivers/media/i2c/ov5640.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/media/i2c/ov5640.c b/driv
This patch series is a collection of patches we have been carrying for a
while.
First, it adds support for PIXEL_RATE control which is used by some
CSI2 receiver driver to properly set-up their DPHY.
Then we fix an issue related to having extra sensor enable/disable in
the register array for the
to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url:
https://github.com/0day-ci/linux/commits/Codrin-Ciubotariu/i2c-at91-Send-bus-clear-command-if-SCL-or-SDA-is-down/20190925-215623
base: https://git.kernel.org/pub/scm/linux/kernel/git/wsa/linu
In fastrpc_dma_buf_attach if dma_get_sgtable fails the allocated memory
for a should be released.
Signed-off-by: Navid Emamdoost
---
drivers/misc/fastrpc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/misc/fastrpc.c b/drivers/misc/fastrpc.c
index 47ae84afac2e..1b1a794d639d 100644
On Sat, 21 Sep 2019, Kurt Garloff wrote:
> Hi,
>
>
> enabling the IOMMU on my Ryzen v1605b (UDOO Bolt v8) does result in a
> non-working EMMC driver.
> Without enabling IOMMU, it works like a charm.
> From my POV this needs fixing, and I consider this a bug.
[ CCing Joerg ]
> I looked into
Enable XSAVES supervisor states by setting MSR_IA32_XSS bits according to
CPUID enumeration results. Also revise comments at various places.
Signed-off-by: Yu-cheng Yu
Signed-off-by: Fenghua Yu
Reviewed-by: Dave Hansen
Reviewed-by: Tony Luck
---
arch/x86/kernel/fpu/xstate.c | 30
From: Fenghua Yu
The function validate_xstate_header() validates an xstate header coming
from userspace (PTRACE or sigreturn). To make it clear, rename it to
validate_xstate_header_from_user().
Suggested-by: Dave Hansen
Signed-off-by: Fenghua Yu
Signed-off-by: Yu-cheng Yu
Reviewed-by: Dave H
In response to earlier comments, fix small issues before introducing XSAVES
supervisor states:
- Add spaces around '*'.
- Fix comments of xfeature_is_supervisor().
- Replace ((u64)1 << 63) with XCOMP_BV_COMPACTED_FORMAT.
No functional changes from this patch.
Signed-off-by: Yu-cheng Yu
Reviewed-
From: Fenghua Yu
XCNTXT_MASK is 'all supported xfeatures' before introducing supervisor
xstates. It is hereby renamed to SUPPORTED_XFEATURES_MASK_USER to make it
clear that these are user xstates.
XFEATURE_MASK_SUPERVISOR is replaced with the following:
- SUPPORTED_XFEATURES_MASK_SUPERVISOR: Cu
Before the introduction of XSAVES supervisor states, 'xfeatures_mask' is
used at various places to determine XSAVE buffer components and XCR0 bits.
It contains only user xstates. To support supervisor xstates, it is
necessary to separate user and supervisor xstates:
- First, change 'xfeatures_mas
On Wed, 25 Sep 2019 at 11:17, Yunfeng Ye wrote:
>
> In efi_fake_memmap(), the commit 20b1e22d01a4 ("x86/efi: Don't allocate
> memmap through memblock after mm_init()") replace memblock_alloc() with
> efi_memmap_alloc(), but there is no matching modification of
> memblock_free() when early_memremap
There are two types of XSAVE-managed states (xstates): user and supervisor.
This series introduces the supervisor xstate support in preparation for new
features that will make use of supervisor xstates.
This series has been separated for ease of review from the series that add
supervisor xstate fe
From: Fenghua Yu
Currently, fpu__clear() clears all fpregs and xstates. Once XSAVES
supervisor states are introduced, supervisor settings must remain active
for signals; it is necessary to have separate functions:
- Create fpu__clear_user_states(): clear only user settings for signals;
- Crea
On Wed, Sep 25, 2019 at 4:10 PM Alan Stern wrote:
>
> On Wed, 25 Sep 2019, syzbot wrote:
>
> > Hello,
> >
> > syzbot found the following crash on:
> >
> > HEAD commit:d9e63adc usb-fuzzer: main usb gadget fuzzer driver
> > git tree: https://github.com/google/kasan.git usb-fuzzer
> > conso
Hi Jonathan,
From: Jonathan Cameron
Date: Sun, Jul 21, 2019 at 18:16:56
> On Fri, 19 Jul 2019 15:30:55 +0200
> Vitor Soares wrote:
>
> > For today the st_lsm6dsx driver support LSM6DSO and LSM6DSR sensor only in
> > spi and i2c mode.
> >
> > The LSM6DSO and LSM6DSR are also i3c capable so let
On Tue, 24 Sep 2019 at 01:17, Kees Cook wrote:
>
> On Fri, Sep 06, 2019 at 10:34:47AM -0700, Ard Biesheuvel wrote:
> > On Fri, 6 Sep 2019 at 03:44, Will Deacon wrote:
> > >
> > > On Wed, Sep 04, 2019 at 01:38:04PM -0700, Kees Cook wrote:
> > > > On Wed, Sep 04, 2019 at 11:38:03AM +0100, Will Deac
On 9/25/19 7:01 AM, James Dingwall wrote:
> On Mon, Sep 23, 2019 at 08:41:05PM -0400, Boris Ostrovsky wrote:
>> On 9/23/19 6:59 PM, Kees Cook wrote:
>>> On Mon, Sep 23, 2019 at 03:42:27PM +, James Dingwall wrote:
On Thu, Sep 19, 2019 at 12:37:40PM -0400, Boris Ostrovsky wrote:
> On 9/1
On Wed, Sep 25, 2019 at 05:27:32PM +0200, Jiri Kosina wrote:
> On Sat, 21 Sep 2019, Kurt Garloff wrote:
> > [12916.740274] mmc0: sdhci:
> > [12916.740337] mmc0: error -5 whilst initialising MMC card
>
> Do you have BAR memory allocation failures in dmes
In onenand_scan if scan_bbt fails the allocated buffers should be
released.
Signed-off-by: Navid Emamdoost
---
drivers/mtd/nand/onenand/onenand_base.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/onenand/onenand_base.c
b/drivers/mtd/nand/onenand/onena
On 9/22/19 11:01 PM, Milan P. Gandhi wrote:
+ off += scnprintf(logbuf + off, logbuf_len - off,
+"cmd-age=%lus", cmd_age);
Have you considered to change cmd-age into cmd_age? I'm afraid otherwise
someone might interpret the hyphen as a subtraction sign...
Thanks,
In i40e_setup_macvlans if i40e_setup_channel fails the allocated memory
for ch should be released.
Signed-off-by: Navid Emamdoost
---
drivers/net/ethernet/intel/i40e/i40e_main.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c
b/drivers/net/etherne
- On Sep 25, 2019, at 4:07 AM, Peter Zijlstra pet...@infradead.org wrote:
> On Mon, Sep 23, 2019 at 10:55:32AM -0400, Mathieu Desnoyers wrote:
>> - On Sep 23, 2019, at 5:06 AM, Peter Zijlstra pet...@infradead.org wrote:
>>
>> > On Thu, Sep 19, 2019 at 01:36:58PM -0400, Mathieu Desnoyers w
Hi Adam,
On 19-09-24 09:23, Adam Thomson wrote:
> On 17 September 2019 13:43, Marco Felsch wrote:
>
> > Add the documentation which describe the voltage selection gpio support.
> > This property can be applied to each subnode within the 'regulators'
> > node so each regulator can be configured di
Driver for Cadence HPNFC NAND flash controller.
HW DMA interface
Page write and page read operations are executed in Command DMA mode.
Commands are defined by DMA descriptors.
In CDMA mode controller own DMA engine is used (Master DMA mode).
Other operations defined by nand_op_instr are executed i
On Mon, 23 Sep 2019 at 18:41, Ard Biesheuvel wrote:
>
> On Fri, 20 Sep 2019 at 18:33, Vincenzo Frascino
> wrote:
> >
> > Hi Will,
> >
> > thank you for reporting this.
> >
> > On 20/09/2019 15:27, Will Deacon wrote:
> > > Hi Vincenzo,
> > >
> > > I've been running into a few issues with the COMPA
Hi Adam,
On 19-09-24 09:48, Adam Thomson wrote:
> On 17 September 2019 13:43, Marco Felsch wrote:
>
> > The DA9062/1 devices can switch their regulator voltages between
> > voltage-A (active) and voltage-B (suspend) settings. Switching the
> > voltages can be controlled by ther internal state-mac
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