This adds hooks for dev_up and dev_down to the phy_ops. They are
optional.
The idea is to inform the phy driver when the nfc chip is really going
to be used. When it is not used, the phy driver can suspend it's
interface to the nfc chip to save some power. The nfc chip is considered
not in use befo
This adds documentation about the uart phy to the pn532 binding doc. As
the filename "pn533-i2c.txt" is not appropriate any more, rename it to
the more general "pn532.txt".
This also documents the deprecation of the compatible strings ending
with "...-i2c".
Cc: Johan Hovold
Cc: Simon Horman
Sign
This adds the UART phy interface for the pn533 driver.
The pn533 driver can be used through UART interface this way.
It is implemented as a serdev device.
Cc: Johan Hovold
Cc: Claudiu Beznea
Cc: David Miller
Signed-off-by: Lars Poeschel
---
Changes in v8:
- Reverse christmas tree order for loc
This switches the pn532 UART phy driver from manually polling to the new
autopoll mechanism.
Cc: Johan Hovold
Signed-off-by: Lars Poeschel
---
Changes in v6:
- Rebased the patch series on v5.3-rc5
drivers/nfc/pn533/uart.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/driv
The way state->enabled is computed is rather convoluted and hard to
read - both branches of the if() actually do the exact same thing. So
remove the if(), and further simplify " ? true :
false" to "".
Signed-off-by: Rasmus Villemoes
---
I stumbled on this while trying to understand how the pwm su
pn532 devices support an autopoll command, that lets the chip
automatically poll for selected nfc technologies instead of manually
looping through every single nfc technology the user is interested in.
This is faster and less cpu and bus intensive than manually polling.
This adds this autopoll capa
Using kzalloc() to allocate memory in function con_init(), but not
checking the return value, there is a risk of null pointer references
oops.
Signed-off-by: Xiaoming Ni
---
drivers/tty/vt/vt.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/tty/vt/vt.c b/drivers/
Am 16.09.19 um 16:17 schrieb Lucas Stach:
> On Mi, 2019-09-11 at 16:49 +0200, Philipp Puschmann wrote:
>> BD_DONE flag marks ownership of the buffer. When 1 SDMA owns the buffer,
>> when 0 ARM owns it. When processing the buffers in
>> sdma_update_channel_loop the ownership of the currently process
From: Heiher
Take the case where we have:
t0
| (ew)
e0
| (et)
e1
| (lt)
s0
t0: thread 0
e0: epoll fd 0
e1: epoll fd 1
s0: socket fd 0
ew: epoll_wait
et: edge-trigger
lt: level-trigger
When s0 fires an event, e1 catches the event, and t
On 32-bit:
In file included from drivers/staging/octeon/octeon-ethernet.h:41,
from drivers/staging/octeon/ethernet-tx.c:25:
drivers/staging/octeon/octeon-stubs.h: In function ‘cvmx_phys_to_ptr’:
drivers/staging/octeon/octeon-stubs.h:1205:9: warning: cast to pointer
Add compatible for Samsung k3qf2f20db LPDDR3 memory bindings.
Suggested to based on at25.txt compatible section.
Introduce minor fixes in the old documentation.
Suggested-by: Krzysztof Kozlowski
Signed-off-by: Lukasz Luba
---
Documentation/devicetree/bindings/ddr/lpddr3.txt | 10 +++---
1 f
Hi all,
This is a follow up patch set for the Exynos5 Dynamic Memory Controller
driver v13 [1]. The patches are for Krzysztof's branch [2]
for-v5.4-5.5/memory-samsung-dmc
and/or linux-next where Dan Carpenter reported the issue (patch 1/2).
There are a few fixes captured during static analysis and
Fix issues captured by static checkers: used kfree() and missing 'static'
in the private function.
Fixes Smatch warning:
drivers/memory/samsung/exynos5422-dmc.c:272
exynos5_init_freq_table() warn: passing devm_ allocated variable to
kfree. 'dmc->opp'
Fixes Sparse warning:
drivers
On Thu, Sep 19, 2019 at 03:14:22PM +0800, Yunfeng Ye wrote:
>
>
> On 2019/9/19 12:47, Mike Rapoport wrote:
> > Hi,
> >
> > On Wed, Sep 18, 2019 at 12:22:29PM +0800, Yunfeng Ye wrote:
> >> Currently, when memblock_find_in_range_node() fail on the exact node, it
> >> will use %NUMA_NO_NODE to find
On Thu, Sep 19, 2019 at 05:18:15PM +0800, Xiaoming Ni wrote:
> Using kzalloc() to allocate memory in function con_init(), but not
> checking the return value, there is a risk of null pointer references
> oops.
>
> Signed-off-by: Xiaoming Ni
We keep having this be "reported" :(
> ---
> drivers/
Hi, Schrempf
> Hi Anson,
>
> I have a question, that is not directly related to this patch.
> I see that for the usdhc1 and usdhc3 nodes, there is an 'assigned-clock'
> and 'assigned-clock-rates' property but not for usdhc2. The same applies to
> the mx8mq and mx8mn dtsi file.
>
> Is there any r
Thanks! Looks good.
regards,
dan carpenter
CLK_SET_RATE_NO_REPARENT is wrongly set on the g12a cpu premux0 clocks
flags, and CLK_SET_RATE_PARENT is required for the g12a cpu premux0 clock
and the g12b cpub premux0 clock, otherwise CCF always selects the SYS_PLL
clock to feed the cpu cluster.
Fixes: ffae8475b90c ("clk: meson: g12a: add noti
This is the first serie of fixes for DVFS support on G12a:
- Patch 1 fixes a rebase issue where a CLK_SET_RATE_NO_REPARENT
appeared on the wrong clock and a SET_RATE_PARENT went missing
- Patch 2 helps CCF use the right clock tree for the sub 1GHz clock range
- Patch 3 fixes an issue when we ente
When setting the 100MHz, 500MHz, 666MHz and 1GHz rate for CPU clocks,
CCF will use the SYS_PLL to handle these frequencies, but:
- using FIXED_PLL derived FCLK_DIV2/DIV3 clocks is more precise
- the Amlogic G12A/G12B/SM1 Suspend handling in firmware doesn't
handle entering suspend using SYS_PLL f
Make sure we always enable a PLL on a set_rate() when the PLL is
flagged as critical.
This fixes the case when the Amlogic G12A SYS_PLL gets disabled by the
PSCI firmware when resuming from suspend-to-memory, in the case
where the CPU was not clocked by the SYS_PLL, but by the fixed PLL
fixed divi
On 10:59 Thu 19 Sep 2019, Greg KH wrote:
I'm announcing the release of the 5.2.16 kernel.
All users of the 5.2 kernel series must upgrade.
The updated 5.2.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
linux-5.2.y
and can be browsed at
On some of i.MX SoCs like i.MX8QXP, there is ONLY one IRQ for each
GPIO bank, so it is better to check the IRQ count before getting
second IRQ to avoid below error message during probe:
[1.070908] gpio-mxc 5d08.gpio: IRQ index 1 not found
[1.077420] gpio-mxc 5d09.gpio: IRQ index 1
Hi, Bartosz
> czw., 19 wrz 2019 o 08:10 Anson Huang napisał(a):
> >
> > On some of i.MX SoCs like i.MX8QXP, there is ONLY one IRQ for each
> > GPIO bank, so it is better to check the IRQ count before getting
> > second IRQ to avoid below error message during probe:
> >
> > [1.070908] gpio-mxc
Hi Paolo,
> -Original Message-
> From: Paolo Bonzini
> Sent: Wednesday, September 18, 2019 6:24 PM
> To: Jianyong Wu (Arm Technology China) ;
> net...@vger.kernel.org; yangbo...@nxp.com; john.stu...@linaro.org;
> t...@linutronix.de; sean.j.christopher...@intel.com; m...@kernel.org;
> rich
Enable i2c3 for i.MX8MM EVK board.
Signed-off-by: Anson Huang
---
arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
index f7a15f3..7758c1c 1
On 14/09/2019 04:49, Christian Hewitt wrote:
> From: Frank Hartung
>
> From: Frank Hartung
>
> Meson G12B SoCs (S922X and A311D) are a big-little design where not all CPUs
> are equal; the A53s cores are weaker than the A72s.
>
> Include capacity-dmips-mhz properties to tell the OS there is a
On Wed, Sep 18, 2019 at 09:58:16PM +0200, Arnd Bergmann wrote:
> This function has been made static, which now causes
> a compile-time warning:
>
> WARNING: "fuse_put_request" [vmlinux] is a static EXPORT_SYMBOL_GPL
>
> Remove the unneeded export.
>
> Fixes: 66abc3599c3c ("fuse: unexport request
Enable pca6416 on i.MX8MM EVK board's i2c3 bus.
Signed-off-by: Anson Huang
---
arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
index 7758c1c..c3189
David Howells wrote:
> > However, I was close to unpulling it again. It has a merge commit with
> > this merge message:
> >
> > Merge remote-tracking branch 'net/master' into afs-next
> >
> > and that simply is not acceptable.
>
> Apologies - I meant to rebase that away. There was a bug f
Geert Uytterhoeven writes:
> On 32-bit:
>
> drivers/net/wireless/zydas/zd1211rw/zd_usb.c: In function
> ‘check_read_regs’:
> drivers/net/wireless/zydas/zd1211rw/zd_def.h:18:25: warning: format ‘%ld’
> expects argument of type ‘long int’, but argument 6 has type ‘size_t’ {aka
> ‘unsigne
On 32-bit:
In file included from drivers/staging/octeon/octeon-ethernet.h:41,
from drivers/staging/octeon/ethernet-tx.c:25:
drivers/staging/octeon/octeon-stubs.h: In function ‘cvmx_phys_to_ptr’:
drivers/staging/octeon/octeon-stubs.h:1205:9: warning: cast to pointer
Hi Shuah,
On Wed, Sep 18, 2019 at 03:05:33PM -0600, Shuah wrote:
[..]
> They both look good to me. I will apply these patches once the merge
> window closes or when my first pull request to Linus clears.
>
> You will see a notification when I apply them to kselftest tree.
Many thanks for your
On Wed, Sep 18, 2019 at 05:28:51PM +0800, Sam Shih wrote:
> We can use fixed-clock to repair mt7628 pwm during configure from
> userspace. The SoC is legacy MIPS and has no complex clock tree.
> Due to we can get clock frequency for period calculation from DT
> fixed-clock, so we can remove has-clo
On Tue 2019-09-17 19:19:53, Guido Günther wrote:
> The driver currently returns success on init although probing fails and
> register setup uses flag values from other registers which is confusing
> when reading the driver. This series cleans this up.
1,3,4,5: Acked-by: Pavel Machek
--
(english
Hi,
I wonder why imx8mq.dtsi, imx8mm.dtsi and imx8mn.dtsi have
'assigned-clocks' and 'assigned-clock-rates' set for all usdhc nodes,
except for usdhc2.
Is this on purpose? Is it a flaw?
Thanks,
Frieder
Extract from imx8mm.dtsi:
usdhc1: mmc@30b4 {
[...]
assigned-clocks = <
The Avalon-MM DMA Interface for PCIe is a design found in hard IPs for
Intel Arria, Cyclone or Stratix FPGAs. It transfers data between on-chip
memory and system memory. This RFC is an attempt to provide a generic API:
typedef void (*avalon_dma_xfer_callback)(void *dma_async_param);
Basic support for Avalon-MM DMA Interface for PCIe found in
hard IPs for Intel Arria, Cyclone or Stratix FPGAs. This is
an alternative (though minimal functionality) implementation
of reference design driver from Intel.
Unlike the reference design, the introduced interface allows
submitting contig
On Thu, 19 Sep 2019 at 12:43, Geert Uytterhoeven wrote:
>
> Hi Ard,
>
Hello Geert,
> On Wed, Sep 18, 2019 at 9:59 PM Linux Kernel Mailing List
> wrote:
> > Commit: 724ecd3c0eb7040d423b22332a60d097e2666820
> > Parent: 20bb4ef038a97b8bb5c07d2a1125019a93f618b3
> > Refname:refs/heads/ma
This is sample implementation of a driver that uses "avalon-dma"
driver interface to perform data transfers between on-chip and
system memory in devices using Avalon-MM DMA Interface for PCIe
design.
Companion user-level tool could be found at
g...@github.com:a-gordeev/avalon-drv-tool.git
CC: Mic
Test whether a syscall can be performed after having been intercepted by
the seccomp notifier. The test uses dup() and kcmp() since it allows us to
nicely test whether the dup() syscall actually succeeded by comparing whether
the fds refer to the same underlying struct file.
Signed-off-by: Christi
This allows the seccomp notifier to continue a syscall. A positive
discussion about this feature was triggered by a post to the
ksummit-discuss mailing list (cf. [3]) and took place during KSummit
(cf. [1]) and again at the containers/checkpoint-restore
micro-conference at Linux Plumbers.
Recently
USER_NOTIF_MAGIC is assigned to int variables in this test so set it to INT_MAX
to avoid warnings:
seccomp_bpf.c: In function ‘user_notification_continue’:
seccomp_bpf.c:3088:26: warning: overflow in implicit constant conversion
[-Woverflow]
#define USER_NOTIF_MAGIC 116983961184613L
Hey everyone,
This is the patchset coming out of the KSummit session Kees and I gave
in Lisbon last week (cf. [3] which also contains slides with more
details on related things such as deep argument inspection).
The simple idea is to extend the seccomp notifier to allow for the
continuation of a s
Sorry, wrong list
Hi, Schrempf
> Hi,
>
> I wonder why imx8mq.dtsi, imx8mm.dtsi and imx8mn.dtsi have 'assigned-
> clocks' and 'assigned-clock-rates' set for all usdhc nodes, except for usdhc2.
>
> Is this on purpose? Is it a flaw?
I don't think it is on purpose, it should be a flaw, I will double check with
our
Hi,
On Tue, Sep 10, 2019 at 2:14 PM Christoph Hellwig wrote:
>
> On Thu, Sep 05, 2019 at 05:46:14AM -0700, Bin Meng wrote:
> > U-Boot expects this alias to be in place in order to fix up the mac
> > address of the ethernet node.
> >
> > Signed-off-by: Bin Meng
>
> Looks good:
>
> Reviewed-by: Ch
Hi,
On Tue, Sep 10, 2019 at 2:14 PM Christoph Hellwig wrote:
>
> On Thu, Sep 05, 2019 at 05:45:53AM -0700, Bin Meng wrote:
> > The "clock-frequency" property of cpu nodes isn't required. Drop it.
> >
> > Signed-off-by: Bin Meng
>
> Looks good:
>
> Reviewed-by: Christoph Hellwig
What's the stat
Factor out ttm vma setup to a new function.
Reduces code duplication a bit.
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/ttm/ttm_bo_vm.c | 46 +
1 file changed, 24 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/ttm/ttm_bo_vm.c b/drivers/gpu/drm/t
Wire up the new drm_gem_ttm_mmap() helper function,
use generic drm_gem_mmap for &fops.mmap and
delete dead drm_vram_mm_file_operations_mmap().
Signed-off-by: Gerd Hoffmann
Reviewed-by: Thomas Zimmermann
---
include/drm/drm_gem_vram_helper.h | 9 +--
drivers/gpu/drm/drm_gem_vram_helper
VM_IO is wrong here, shmem uses normal ram not io memory.
Signed-off-by: Gerd Hoffmann
---
drivers/gpu/drm/drm_gem_shmem_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_gem_shmem_helper.c
b/drivers/gpu/drm/drm_gem_shmem_helper.c
index 6efedab1501
Rename ttm_fbdev_mmap to ttm_bo_mmap_obj. Move the vm_pgoff sanity
check to amdgpu_bo_fbdev_mmap (only ttm_fbdev_mmap user in tree).
The ttm_bo_mmap_obj function can now be used to map any buffer object.
This allows to implement &drm_gem_object_funcs.mmap in gem ttm helpers.
Signed-off-by: Gerd
On Wed, Sep 18, 2019 at 04:57:16PM +0200, Kamel Bouhara wrote:
> Since commit 26202873bb51 ("avr32: remove support for AVR32
> architecture") there is no more user of platform_device_id and we
> should only use dt bindings
>
> Signed-off-by: Kamel Bouhara
Acked-by: Uwe Kleine-König
Thanks
Uwe
Hi Anson,
On 19.09.19 11:31, Anson Huang wrote:
> Hi, Schrempf
>
>> Hi Anson,
>>
>> I have a question, that is not directly related to this patch.
>> I see that for the usdhc1 and usdhc3 nodes, there is an 'assigned-clock'
>> and 'assigned-clock-rates' property but not for usdhc2. The same applie
If we stop and start the dsp while channel is open then there is a leak
in the driver as the refcount is not accounted for the open.
This patch checks if the channel is open while running cleanup code
and does an extra kref_put to account for open which would ensure
that channel does not leak.
Or
The Flow Control selftest is also available with ASYM Pause. Lets add
this check to the test and fix eventual false positive failures.
Fixes: 091810dbded9 ("net: stmmac: Introduce selftests support")
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc:
For some years and since many kernel versions there are reports that
RX UART DMA channel stops working at one point. So far the usual
workaround was to disable RX DMA. This patches fix the underlying
problem.
When a running sdma script does not find any usable destination buffer
to put its data in
BD_DONE flag marks ownership of the buffer. When 1 SDMA owns the
buffer, when 0 ARM owns it. When processing the buffers in
sdma_update_channel_loop the ownership of the currently processed
buffer was set to SDMA again before running the callback function of
the buffer and while the sdma script may
For some years and since many kernel versions there are reports that the
RX UART SDMA channel stops working at some point. The workaround was to
disable DMA for RX. This commit tries to fix the problem itself.
Due to its license i wasn't able to debug the sdma script itself but it
somehow leads to
In sdma_prep_dma_cyclic buf is redundant. Drop it.
Signed-off-by: Philipp Puschmann
Reviewed-by: Lucas Stach
---
Changelog v2:
- add Reviewed-by tag
drivers/dma/imx-sdma.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma
This introduces the clk_invalidate_rate() call used to recalculate the
rate and parent tree of a particular clock if it's known that the
underlying registers set has been altered by the firmware, like from
a suspend/resume handler running in trusted cpu mode.
The call refreshes the actual parent a
Add suspend and resume hooks used to refresh the CPU clock tree
when resuming from suspend, in the case where the PSCI firmware
alters the clock tree.
In the Amlogic G12A suspend/resume case, the PSCI firmware will
alter the Fixed PLL dyn tree when entering with the CPU clock from
this same tree,
This serie aime to support when the suspend/resume firmware alters the
clock tree, leading to an incorrect representation of the clock tree
after a resume from suspend-to-mem.
For the Amlogic G12A/G12B/SM1 case, the SCPI firmware handling suspend
alters the CPU clock tree in various ways.
Since w
On Fri, 2019-08-23 at 14:22:00 UTC, Qian Cai wrote:
> Booting a POWER9 PowerNV system generates a few messages below with
> "ptrval" due to the pointers printed without a specifier
> extension (i.e unadorned %p) are hashed to prevent leaking information
> about the kernel memory layout.
>
On Thu, 2019-09-05 at 18:20:28 UTC, "Naveen N. Rao" wrote:
> This ensures that we use the right address on architectures that use
> function descriptors.
>
> Signed-off-by: Naveen N. Rao
Series applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/a3db31ff6ce31f5a544a66b61613a098029
On Wed, 2019-09-11 at 15:52:18 UTC, Greg Kurz wrote:
> There's a bug in skiboot that causes the OPAL_XIVE_ALLOCATE_IRQ call
> to return the 32-bit value 0x when OPAL has run out of IRQs.
> Unfortunatelty, OPAL return values are signed 64-bit entities and
> errors are supposed to be negative
On Thu, 2019-09-12 at 07:40:37 UTC, Masahiro Yamada wrote:
> This slightly improves the prom_init_check rule.
>
> [1] Avoid needless check
>
> Currently, prom_init_check.sh is invoked every time you run 'make'
> even if you have changed nothing in prom_init.c. With this commit,
> the script is re
On Fri, 6 Sep 2019, Xiang Wang wrote:
> From 12300865d1103618c9d4c375f7d7fbe601b6618c Mon Sep 17 00:00:00 2001
> From: Xiang Wang
> Date: Fri, 6 Sep 2019 11:56:09 +0800
> Subject: [PATCH] arch/riscv: disable too many harts before pick main boot hart
>
> These harts with id greater than or equal
On Tue, 2019-09-10 at 13:15:13 UTC, Ravi Bangoria wrote:
> If watchpoint exception is generated by larx/stcx instructions, the
> reservation created by larx gets lost while handling exception, and
> thus stcx instruction always fails. Generally these instructions are
> used in a while(1) loop, for
Using only 4 DMA periods for UART RX is very few if we have a high
frequency of small transfers - like in our case using Bluetooth with
many small packets via UART - causing many dma transfers but in each
only filling a fraction of a single buffer. Such a case may lead to
the situation that DMA RX
Dexuan Cui writes:
> BTW, for vss, maybe the VM should not hibernate if there is a backup
> ongoing? -- if the file system is frozen by hv_vss_daemon, and the VM
> hibernates, then when the VM resumes back, it's almost always true that
> the VM won't receive the host's VSS_OP_THAW request, and
Hi Philipp,
On Do, 2019-09-19 at 12:23 +0200, Philipp Puschmann wrote:
> BD_DONE flag marks ownership of the buffer. When 1 SDMA owns the
> buffer, when 0 ARM owns it. When processing the buffers in
> sdma_update_channel_loop the ownership of the currently processed
> buffer was set to SDMA again
‐‐‐ Original Message ‐‐‐
On 2019年9月19日ThursdayPM6点25分, Paul Walmsley wrote:
> On Fri, 6 Sep 2019, Xiang Wang wrote:
>
> > From 12300865d1103618c9d4c375f7d7fbe601b6618c Mon Sep 17 00:00:00 2001
> > From: Xiang Wang me...@hardenedlinux.org
> > Date: Fri, 6 Sep 2019 11:56:09 +0800
> >
Hi,
I have been investigating a regression in our environment where pstore
(efi-pstore specifically but I suspect this would affect all
implementations) no longer works after upgrading from a 4.4 to 5.0
kernel when running under xen. (This is an Ubuntu kernel but I don't
think there are patch
Hi Philipp,
On Thu, Sep 19, 2019 at 7:23 AM Philipp Puschmann
wrote:
> Philipp Puschmann (3):
> dmaengine: imx-sdma: fix buffer ownership
> dmaengine: imx-sdma: fix dma freezes
These two fixes deserve a Fixes tag so that they could be backported
to the stable tree.
Thanks
On Fri, 13 Sep 2019 17:26:52 -0400
Tony Krowiak wrote:
> +static void vfio_ap_mdev_get_crycb_matrix(struct ap_matrix_mdev *matrix_mdev)
> +{
> + unsigned long apid, apqi;
> + unsigned long masksz = BITS_TO_LONGS(AP_DEVICES) *
> +sizeof(unsigned long);
> +
> +
On Fri, Aug 09, 2019 at 01:24:04PM -0700, syzbot wrote:
> syzbot has found a reproducer for the following crash on:
>
> HEAD commit:e96407b4 usb-fuzzer: main usb gadget fuzzer driver
> git tree: https://github.com/google/kasan.git usb-fuzzer
> console output: https://syzkaller.appspot.co
Hi Lucas,
Am 19.09.19 um 12:27 schrieb Lucas Stach:
> Hi Philipp,
>
> On Do, 2019-09-19 at 12:23 +0200, Philipp Puschmann wrote:
>> BD_DONE flag marks ownership of the buffer. When 1 SDMA owns the
>> buffer, when 0 ARM owns it. When processing the buffers in
>> sdma_update_channel_loop the owner
On Wed, Sep 18, 2019 at 10:33:09AM -0700, Kees Cook wrote:
> On Wed, Sep 18, 2019 at 11:15:12AM +0200, Tyler Hicks wrote:
> > On 2019-09-18 10:48:31, Christian Brauner wrote:
> > > Add tw missing ptrace ifdefines to avoid compilation errors on systems
> > > that do not provide PTRACE_EVENTMSG_SYSCA
For some years and since many kernel versions there are reports that the
RX UART SDMA channel stops working at some point. The workaround was to
disable DMA for RX. This commit tries to fix the problem itself.
Due to its license i wasn't able to debug the sdma script itself but it
somehow leads to
For some years and since many kernel versions there are reports that
RX UART DMA channel stops working at one point. So far the usual
workaround was to disable RX DMA. This patches fix the underlying
problem.
When a running sdma script does not find any usable destination buffer
to put its data in
BD_DONE flag marks ownership of the buffer. When 1 SDMA owns the
buffer, when 0 ARM owns it. When processing the buffers in
sdma_update_channel_loop the ownership of the currently processed
buffer was set to SDMA again before running the callback function of
the buffer and while the sdma script may
In sdma_prep_dma_cyclic buf is redundant. Drop it.
Signed-off-by: Philipp Puschmann
Reviewed-by: Lucas Stach
---
Changelog v3:
- no changes
Changelog v2:
- add Reviewed-by tag
drivers/dma/imx-sdma.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/dma/imx-
Ping! Anyone still reviewing this patch?
I have another change related to AMS.
I will group them as a set and re-send it.
Regards,
Kyle Tso
On Mon, Apr 15, 2019 at 6:03 PM Adam Thomson
wrote:
>
> On 13 April 2019 21:39, Hans de Goede wrote:
>
> > On 10-04-19 18:38, Hans de Goede wrote:
> > > On
On Thu, Sep 19, 2019 at 08:56:01AM +0200, Neil Armstrong wrote:
> Hi,
>
> Please Cc dri-de...@lists.freedesktop.org
>
> Thanks,
> Neil
OK, thanks.
Xin
>
> On 19/09/2019 08:51, Xin Ji wrote:
> > Hi all,
> >
> > The following series add initial support for the Slimport ANX7625
> > transmitter,
>> +++ b/drivers/mtd/devices/st_spi_fsm.c
>> @@ -2034,13 +2034,7 @@ static int stfsm_probe(struct platform_device *pdev)
>>
>> platform_set_drvdata(pdev, fsm);
>>
>> -res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> -if (!res) {
>> -dev_err(&pdev->dev, "Resource not
From: Jérôme Pouiller
Instantiate build infrastructure WFx driver. This driver provides support
for Wifi chipset Silicon Labs WF200 and further:
https://www.silabs.com/documents/public/data-sheets/wf200-datasheet.pdf
This chip support SPI and SDIO bus.
SDIO interface has two particularities
From: Jérôme Pouiller
Hello all,
This series add support for Silicon Labs WiFi chip WF200 and further:
https://www.silabs.com/documents/public/data-sheets/wf200-datasheet.pdf
This driver is an export from:
https://github.com/SiliconLabs/wfx-linux-driver/
I squashed all commits from
From: Jérôme Pouiller
Again, this task is more complex than it should since driver try to
handle itself power saving of stations.
Signed-off-by: Jérôme Pouiller
---
drivers/staging/wfx/Makefile | 1 +
drivers/staging/wfx/data_rx.c | 187 ++
drivers/staging/wf
From: Jérôme Pouiller
These tracepoints decode HIF headers and provide more human readable
results.
Signed-off-by: Jérôme Pouiller
---
drivers/staging/wfx/bh.c | 5 +
drivers/staging/wfx/traces.h | 211 +++
2 files changed, 216 insertions(+)
diff --git a/
From: Jérôme Pouiller
Add traces when debug events happen and allow to ask internal
information to chip.
These features work independently from mac80211.
Signed-off-by: Jérôme Pouiller
---
drivers/staging/wfx/debug.c | 122 +++
drivers/staging/wfx/hif_rx.c |
From: Jérôme Pouiller
hwio.c provides an abstraction to access different types of register of
the chip.
Note that only data register (aka FRAME_OUT) and control register are
used normal communication. Other registers are only used during chip
start up.
Signed-off-by: Jérôme Pouiller
---
drive
Hello,
syzbot has tested the proposed patch and the reproducer did not trigger
crash:
Reported-and-tested-by:
syzbot+0243cb250a51eeefb...@syzkaller.appspotmail.com
Tested on:
commit: f0df5c1b usb-fuzzer: main usb gadget fuzzer driver
git tree: https://github.com/google/kasa
From: Jérôme Pouiller
Chip has multiple input buffers and can handle multiple 802.11 frames
in parallel. However, other HIF command must be sent sequentially.
wsm_send_cmd() handles these requests.
This commit also add send_hif_cmd in debugfs. This file allows to send
arbitrary commands to chip.
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/staging/wfx/Makefile | 1 +
drivers/staging/wfx/bh.c | 2 +-
drivers/staging/wfx/hif_rx.c | 13 ++
drivers/staging/wfx/main.c | 5 +
drivers/staging/wfx/scan.c | 258 +++
drivers/stag
From: Jérôme Pouiller
A firmware is necessary to run the chip. wfx_init_device() is in charge
of loading firmware on chip and doing low level initialization.
Firmwares for WF200 are available here:
https://github.com/SiliconLabs/wfx-firmware/
Note that firmware are encrypted. Driver checks t
From: Jérôme Pouiller
Once firmware is loaded, it send a first indication to host. This
indication signalize that host can start to communicate with firmware.
In add, it contains information about chip and firmware (MAC addresses,
firmware version, etc...).
Signed-off-by: Jérôme Pouiller
---
d
From: Jérôme Pouiller
Signed-off-by: Jérôme Pouiller
---
drivers/staging/wfx/Makefile | 1 +
drivers/staging/wfx/key.c| 272 +++
drivers/staging/wfx/key.h| 22 +++
drivers/staging/wfx/main.c | 2 +
drivers/staging/wfx/sta.c| 4 +
drivers/stag
From: Jérôme Pouiller
Chip support encryption of the link between host and chip. This feature
is called "secure link". Driver code on github[1] support it. However,
it relies on mbedtls for cryptographic functions. So, I decided to not
import this feature in current patch. However, in order to ke
From: Jérôme Pouiller
Three things make this task more complex than it should:
- Chip necessitate to associate a link-id to each station. It is same
thing than association ID but, using 8 bits only.
- Rate policy is sent separately from Tx frames
- Driver try to handle itself power savi
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