On Fri, Sep 13, 2019 at 05:44:39PM -0400, Martin K. Petersen wrote:
> One pet peeve I have is that people are pretty bad at indicating the
> intended target tree. I often ask for it in private mail but the
> practice doesn't seem to stick. I spend a ton of time guessing whether a
> patch is a fix f
The socfpga sub-driver defines an `interface` field in the `socfpga_dwmac`
struct and parses it on init.
The shared `stmmac_probe_config_dt()` function also parses this from the
device-tree and makes it available on the returned `plat_data` (which is
the same data available via `netdev_priv()`).
From: Florian Fainelli
Date: Thu, 12 Sep 2019 20:28:39 -0700
> Add support for configuring the per-port egress flooding control for
> both Unicast and Multicast traffic.
>
> Signed-off-by: Florian Fainelli
Applied with comment typo fixed.
From: Colin King
Date: Fri, 13 Sep 2019 10:07:59 +0100
> From: Colin Ian King
>
> There is a spelling mistake in a DP_VERBOSE debug message. Fix it.
> (Using American English spelling as this is the most common way
> to spell this in the kernel).
>
> Signed-off-by: Colin Ian King
Applied to
On Thu, Sep 12, 2019 at 08:01:45AM -0700, Joe Perches wrote:
> On Thu, 2019-09-12 at 05:17 -0700, Christoph Hellwig wrote:
> > Instead of arguing what is better just stick to what the surrounding
> > code does.
>
> That's not always feasible nor readable.
>
> Especially for the logic inversion bl
The `cs_change_delay` backwards compatibility value could be moved outside
of the switch statement.
The only reason to do it, is to make the next patches easier to diff.
Signed-off-by: Alexandru Ardelean
---
drivers/spi/spi.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
dif
Discussion reference:
https://lore.kernel.org/lkml/20190913114550.956-1-alexandru.ardel...@analog.com/
This changeset introduces an `spi_delay` struct/data-type and makes the
IIO ADIS driver library the first user of this.
The patchset base is Jonathan's `iio/togreg` branch, but it also applie
Since the logic for `spi_delay` struct + `spi_delay_exec()` has been copied
from the `cs_change_delay` logic, it's natural to make this delay, the
first user.
The `cs_change_delay` logic requires that the default remain 10 uS, in case
it is unspecified/unconfigured. So, there is some special handl
On Fri, 2019-09-13 at 11:37 +0530, Nagarjuna Kristam wrote:
> Tegra XUSB device control driver needs to control vbus override
> during its operations, add API for the support.
>
> Signed-off-by: Nagarjuna Kristam
> Acked-by: Thierry Reding
> ---
> drivers/phy/tegra/xusb-tegra210.c | 57
> +
There are plenty of delays that have been introduced in SPI core. Most of
them are in micro-seconds, some need to be in nano-seconds, and some in
clock-cycles.
For some of these delays (related to transfers & CS timing) it may make
sense to have a `spi_delay` struct that abstracts these a bit.
Th
From: Jose Abreu
Date: Fri, 13 Sep 2019 11:50:32 +0200
> We need to hold rnl lock in suspend and resume callbacks because phylink
> requires it. Otherwise we will get a WARN() in suspend and resume.
>
> Also, move phylink start and stop callbacks to inside device's internal
> lock so that we pre
On Fri, 2019-09-13 at 11:37 +0530, Nagarjuna Kristam wrote:
> Enable XUSB device mode driver for USB0 slot on Jetson TX1.
>
> Signed-off-by: Nagarjuna Kristam
> Reviewed-by: JC Kuo
> ---
> arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 31
> +-
> 1 file changed, 30 in
From: Wanpeng Li
Reported by syzkaller:
WARNING: CPU: 0 PID: 6544 at
/home/kernel/data/kvm/arch/x86/kvm//vmx/vmx.c:4689 handle_desc+0x37/0x40
[kvm_intel]
CPU: 0 PID: 6544 Comm: a.out Tainted: G OE 5.3.0-rc4+ #4
RIP: 0010:handle_desc+0x37/0x40 [kvm_intel]
From: rain.1986.08...@gmail.com
Date: Fri, 13 Sep 2019 21:43:45 +0800
> From: Rain River
>
> Many FORCEDETH NICs are used in our hosts. Several bugs are fixed and
> some features are developed for FORCEDETH NICs. And I have been
> reviewing patches for FORCEDETH NIC for several months. Mark me a
On Fri, Sep 13, 2019 at 04:37:09PM +0200, Christoph Hellwig wrote:
> On Fri, Sep 13, 2019 at 01:16:08PM +0200, Robert Baldyga wrote:
> > Hello,
> >
> > This patchset adds two functions providing kernel to kernel API
> > for submiting NVMe admin commands. This is for use of NVMe-aware
> > block de
From: Mike Rapoport
arm64 calls memblock_free() for the initrd area in its implementation of
free_initrd_mem(), but this call has no actual effect that late in the boot
process. By the time initrd is freed, all the reserved memory is managed by
the page allocator and the memblock.reserved is unus
From: Alexandru Ardelean
Date: Mon, 16 Sep 2019 10:04:00 +0300
> The socfpga sub-driver defines an `interface` field in the `socfpga_dwmac`
> struct and parses it on init.
>
> The shared `stmmac_probe_config_dt()` function also parses this from the
> device-tree and makes it available on the ret
From: Ramuthevar Vadivel Murugan
On Intel Lightening Mountain(LGM) SoCs QSPI controller support
to QSPI-NAND flash. This introduces to device tree binding
documentation for Cadence-QSPI controller and spi-nand flash.
Signed-off-by: Ramuthevar Vadivel Murugan
---
.../devicetree/bindings/spi/ca
From: Ramuthevar Vadivel Murugan
On Intel Lightening Mountain(LGM) SoCs one of the IP is Cadence QSPI.
SPI flash(NAND) memories interface through QSPI controller.
This patch introduces to specific support for QSPI NAND flash.
Existing cadence drivers do not support SPI-NAND, it only supports to
patch 1: Add YAML for cadence-qspi devicetree cdocumentation.
patch 2: cadence-qspi controller driver to support QSPI-NAND flash
using existing spi-nand framework with legacy spi protocol.
Ramuthevar Vadivel Murugan (2):
dt-bindings: spi: Add support for cadence-qspi IP Intel LGM SoC
spi: cade
On Mon, Sep 16, 2019 at 07:16:52AM +, Baldyga, Robert wrote:
> On Fri, Sep 13, 2019 at 04:37:09PM +0200, Christoph Hellwig wrote:
> > On Fri, Sep 13, 2019 at 01:16:08PM +0200, Robert Baldyga wrote:
> > > Hello,
> > >
> > > This patchset adds two functions providing kernel to kernel API
> > >
Set the size of the tpm_buf correctly. Now it is set to the header
length by tpm_buf_init().
Reported-by: Mimi Zohar
Cc: sta...@vger.kernel.org
Fixes: 412eb585587a ("use tpm_buf in tpm_transmit_cmd() as the IO parameter")
Signed-off-by: Jarkko Sakkinen
---
drivers/char/tpm/tpm-interface.c | 2 +
This changeset proposes a new control for PHY tunable to control Energy
Detect Power Down.
The `phy_tunable_id` has been named `ETHTOOL_PHY_EDPD` since it looks like
this feature is common across other PHYs (like EEE), and defining
`ETHTOOL_PHY_ENERGY_DETECT_POWER_DOWN` seems too long.
The wa
The `phy_tunable_id` has been named `ETHTOOL_PHY_EDPD` since it looks like
this feature is common across other PHYs (like EEE), and defining
`ETHTOOL_PHY_ENERGY_DETECT_POWER_DOWN` seems too long.
The way EDPD works, is that the RX block is put to a lower power mode,
except for link-pulse detection
This driver becomes the first user of the kernel's `ETHTOOL_PHY_EDPD`
phy-tunable feature.
EDPD is also enabled by default on PHY config_init, but can be disabled via
the phy-tunable control.
When enabling EDPD, it's also a good idea (for the ADIN PHYs) to enable TX
periodic pulses, so that in cas
patch 1: Add YAML for cadence-qspi devicetree cdocumentation.
patch 2: cadence-qspi controller driver to support QSPI-NAND flash
using existing spi-nand framework with legacy spi protocol.
Ramuthevar Vadivel Murugan (2):
dt-bindings: spi: Add support for cadence-qspi IP Intel LGM SoC
spi: cade
From: Ramuthevar Vadivel Murugan
On Intel Lightening Mountain(LGM) SoCs QSPI controller support
to QSPI-NAND flash. This introduces to device tree binding
documentation for Cadence-QSPI controller and spi-nand flash.
Signed-off-by: Ramuthevar Vadivel Murugan
---
.../devicetree/bindings/spi/ca
From: Ramuthevar Vadivel Murugan
On Intel Lightening Mountain(LGM) SoCs one of the IP is Cadence QSPI.
SPI flash(NAND) memories interface through QSPI controller.
This patch introduces to specific support for QSPI NAND flash.
Existing cadence drivers do not support SPI-NAND, it only supports to
Hello Linus,
Here is the I3C PR for 5.4.
Regards,
Boris
The following changes since commit 5f9e832c137075045d15cd6899ab0505cfb2ca4b:
Linus 5.3-rc1 (2019-07-21 14:05:38 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux.git tags/i3c/for-
On 10.09.19 12:30, Oscar Salvador wrote:
> From: Naoya Horiguchi
>
> Another memory error injection interface debugfs:hwpoison/corrupt-pfn
> also takes bogus refcount for hwpoison_filter(). It's justified
> because this does a coarse filter, expecting that memory_failure()
> redoes the check for
From: Wanpeng Li
Reported by syzkaller:
kasan: GPF could be caused by NULL-ptr deref or user memory access
general protection fault: [#1] PREEMPT SMP KASAN
RIP: 0010:__apic_accept_irq+0x46/0x740 arch/x86/kvm/lapic.c:1029
Call Trace:
kvm_apic_set_irq+0
On 2019/9/13 15:31 robin wrote:>
> Hi Dmitry,
>
> On 2019-09-12 22:13, Dmitry Torokhov wrote:
> > Hi Robin,
> >
> > On Wed, Sep 04, 2019 at 06:23:29AM +, Robin van der Gracht wrote:
> >> The first generation i.MX6 processors does not send an interrupt when
> >> the power key is pressed. It s
On Mon, Sep 16, 2019 at 10:35:35AM +0300, Jarkko Sakkinen wrote:
> Set the size of the tpm_buf correctly. Now it is set to the header
> length by tpm_buf_init().
>
> Reported-by: Mimi Zohar
> Cc: sta...@vger.kernel.org
> Fixes: 412eb585587a ("use tpm_buf in tpm_transmit_cmd() as the IO parameter"
On Tue, Sep 10, 2019 at 07:01:30PM +0100, Eugene Syromiatnikov wrote:
> Hello.
>
> This patch set updates clone3 selftest in several aspects:
> - adding checks for exit_signal invalid values handling;
> - adding clone3 to selftests targets;
> - enabling clone3 tests on all architectures;
> - m
On Sat, Sep 14, 2019 at 5:26 PM Guenter Roeck wrote:
> On Mon, Jan 30, 2017 at 12:05:06PM +0100, Thierry Reding wrote:
> > From: Thierry Reding
> >
> > Hi everyone,
> >
> > This small series is preparatory work for a series that I'm working on
> > which attempts to establish a formal framework fo
On 16/09/19 06:02, Wanpeng Li wrote:
> Hi Paolo,
>
> Something like below? It still fluctuate when running complex guest os
> like linux. Removing timer_advance_adjust_done will hinder introduce
> patch v3 2/2 since there is no adjust done flag in each round
> evaluation.
That's not important, si
-Dobriyan/x86_64-new-and-improved-memset/20190916-140315
config: x86_64-fedora-25 (attached as .config)
compiler: gcc-7 (Debian 7.4.0-11) 7.4.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
If you fix the issue, kindly add following tag
Reported-by
Hi Benoit,
Thank you for the patch.
On Mon, Sep 9, 2019 at 5:26 PM Benoit Parrot wrote:
>
> Returning queued vb2 buffers back to user space is a common
> task best handled by a helper function.
>
> Signed-off-by: Benoit Parrot
> ---
> drivers/media/platform/am437x/am437x-vpfe.c | 54 ++
On 15/09/2019 23:44:03+0100, Nick Crews wrote:
> Hi Alexandre, thanks for the thoughts.
>
> On Thu, Sep 12, 2019 at 9:09 AM Alexandre Belloni
> wrote:
> >
> > Hi Nick,
> >
> > On 10/09/2019 16:19:29+0100, Nick Crews wrote:
> > > Check that the time received from the RTC HW is valid,
> > > otherwi
On 2019/9/11 Philipp Puschmann wrote:
> For some years and since many kernel versions there are reports that RX
> UART DMA channel stops working at one point. So far the usual workaround
> was to disable RX DMA. This patches try to fix the underlying problem.
>
> When a running sdma script does n
On Thu, 12 Sep 2019, Matthias Brugger wrote:
> Hi Gene Chen,
>
> Please use ./scripts/get_maintainer.pl to find out which are the maintainer(s)
> for a specific series/patch.
>
> I added Lee Jones, who is the maintainer of the MTD subsystem.
>
> Right now I have no time to review the patches, s
On Mon, 16 Sep 2019 at 15:49, Paolo Bonzini wrote:
>
> On 16/09/19 06:02, Wanpeng Li wrote:
> > Hi Paolo,
> >
> > Something like below? It still fluctuate when running complex guest os
> > like linux. Removing timer_advance_adjust_done will hinder introduce
> > patch v3 2/2 since there is no adjus
On Mon, Sep 16, 2019 at 09:49:34AM +0200, Christian Brauner wrote:
> On Tue, Sep 10, 2019 at 07:01:30PM +0100, Eugene Syromiatnikov wrote:
> > Hello.
> >
> > This patch set updates clone3 selftest in several aspects:
> > - adding checks for exit_signal invalid values handling;
> > - adding clone
On Mon, Sep 16, 2019 at 10:12:47AM +0200, Adrian Reber wrote:
> On Mon, Sep 16, 2019 at 09:49:34AM +0200, Christian Brauner wrote:
> > On Tue, Sep 10, 2019 at 07:01:30PM +0100, Eugene Syromiatnikov wrote:
> > > Hello.
> > >
> > > This patch set updates clone3 selftest in several aspects:
> > > -
On Wed, 11 Sep 2019, Tony W Wang-oc wrote:
> These functions are declared static and cannot be used in others
> .c source file. this commit removes the static attribute and adds
> the declaration to the header for these functions.
I'm not Cc'ed on any patches which use those functions. Please Cc
> > > Matthew pointed out that having a hook in NVS driver is better solution
> > > because it is nil functionality if the TPM driver is loaded. We need
> > > functions to:
> > >
> > > 1. Request a region from the NVS driver (when tpm_crb loads)
> > > 2. Release a region back to the NVS Driver (whe
On Mon, Sep 16, 2019 at 9:43 AM Geert Uytterhoeven wrote:
> JFYI, when comparing v5.3[1] to v5.3-rc8[3], the summaries are:
> - build errors: +0/-0
> - build warnings: +50/-50
Just the levelspread noise.
Anyone with an idea to get rid of it (and to prove they're all false-positives)?
> [1]
On Mon 16-09-19 10:53:08, Chao Yu wrote:
> On 2019/9/12 18:06, Jan Kara wrote:
> > On Wed 11-09-19 17:36:50, Chao Yu wrote:
> >> diff --git a/include/linux/quotaops.h b/include/linux/quotaops.h
> >> index dc905a4ff8d7..bd30acad3a7f 100644
> >> --- a/include/linux/quotaops.h
> >> +++ b/include/linux
On Fri, Sep 13, 2019 at 11:13:10AM -0700, Dmitry Torokhov wrote:
> On Fri, Sep 13, 2019 at 12:40:07PM +0300, Mika Westerberg wrote:
> > On Thu, Sep 12, 2019 at 08:22:38PM -0700, Dmitry Torokhov wrote:
> > > devm_fwnode_get_index_gpiod_from_child() is too long, besides the fwnode
> > > in question d
i.MX7S/D's GPT ipg clock should be from GPT clock root and
controlled by CCM's GPT CCGR, using correct clock source for
GPT ipg clock instead of IMX7D_CLK_DUMMY.
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx7s.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
On 9/15/2019 9:32 PM, Christophe JAILLET wrote:
'pih' is known to be non-NULL at this point, so the test can be removed.
Acked-by: Arend van Spriel
Signed-off-by: Christophe JAILLET
---
drivers/net/wireless/broadcom/brcm80211/brcmsmac/main.c | 3 +--
1 file changed, 1 insertion(+), 2 dele
On Fri, Sep 13, 2019 at 06:07:42PM -0600, Yu Zhao wrote:
> The function doesn't need to return any value, and the check can be
> done in one pass.
>
> There is a behavior change: before the patch, we stop at the first
> invalid free object; after the patch, we stop at the first invalid
> object, f
From: Wanpeng Li
Filter out drastic fluctuation and random fluctuation, remove
timer_advance_adjust_done altogether, the adjustment would be
continuous.
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/lapic.c | 26 --
arch/x86/kvm/lapic.h | 1 -
arch/x86/kvm/x86.c | 2 +
Hi Linus,
The following changes since commit 609488bc979f99f805f34e9a32c1e3b71179d10b:
Linux 5.3-rc2 (2019-07-28 12:47:02 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k.git
tags/m68k-for-v5.4-tag1
for you to fetch chan
Sorry for my mistake.
I misunderstood some functions in nvs.c. So I have fixed it and sent
my email again. My email is below.
> > > Matthew pointed out that having a hook in NVS driver is better solution
> > > because it is nil functionality if the TPM driver is loaded. We need
> > > functions to:
-Dobriyan/x86_64-new-and-improved-memset/20190916-140315
config: um-x86_64_defconfig (attached as .config)
compiler: gcc-7 (Debian 7.4.0-11) 7.4.0
reproduce:
# save the attached .config to linux build tree
make ARCH=um SUBARCH=x86_64
If you fix the issue, kindly add following tag
Reported
On Sun, Sep 15, 2019 at 3:48 PM John Ogness wrote:
>
> On 2019-09-13, Daniel Vetter wrote:
> >> 2. A kernel thread will be created for each registered console, each
> >> responsible for being the sole printers to their respective
> >> consoles. With this, console printing is _fully_ decoupled fro
When the handle_exception function addresses an exception, the interrupts
will be unconditionally enabled after finishing the context save. However,
It may erroneously enable the interrupts if the interrupts are disabled
before entering the handle_exception.
For example, one of the WARN_ON() condi
tpm_send() does not give anymore the result back to the caller. This
would require another memcpy(), which kind of tells that the whole
approach is somewhat broken. Instead, as Mimi suggested, this commit
just wraps the data to the tpm_buf, and thus the result will not go to
the garbage.
Obviously
On 09/16/2019 12:06 PM, Mike Rapoport wrote:
> On Mon, Sep 16, 2019 at 11:17:37AM +0530, Anshuman Khandual wrote:
>> In add_memory_resource() the memory range to be hot added first gets into
>> the memblock via memblock_add() before arch_add_memory() is called on it.
>> Reverse sequence should b
Dexuan Cui writes:
>> From: Vitaly Kuznetsov
>> Sent: Thursday, September 12, 2019 9:37 AM
>
>> > +static int util_suspend(struct hv_device *dev)
>> > +{
>> > + struct hv_util_service *srv = hv_get_drvdata(dev);
>> > +
>> > + if (srv->util_cancel_work)
>> > + srv->util_cancel_work();
Joe Perches wrote:
> > I would recommend splitting the patch in two and putting something like:
> >
> > keys: Add Jarkko Sakkinen as co-maintainer
> >
> > as the subject of the keyrings maintainership one.
>
> Why is there utility in micro splitting such a trivial patch?
Because the keyri
Hello Jean,
On 05/09/2019 14:57, Jean Delvare wrote:
> If this is of any value to you, I tried implementing it in i2c-i801 a
> few days ago. I can't really test it though as I don't have any device
> which triggers an alert on my system, but I am sharing it with you if
> you want to give it a try.
On Sat, Sep 14, 2019 at 7:37:54, Xiaowei Bao wrote:
>
>
> > -Original Message-
> > From: Gustavo Pimentel
> > Sent: 2019年9月12日 19:24
> > To: Andrew Murray ; Xiaowei Bao
> >
> > Cc: robh...@kernel.org; mark.rutl...@arm.com; shawn...@kernel.org; Leo
> > Li ; kis...@ti.com; lorenzo.piera
Wanpeng Li writes:
> From: Wanpeng Li
>
> Reported by syzkaller:
>
> kasan: GPF could be caused by NULL-ptr deref or user memory access
> general protection fault: [#1] PREEMPT SMP KASAN
> RIP: 0010:__apic_accept_irq+0x46/0x740 arch/x86/kvm/lapic.c:1029
> Call Trace:
[Added Steven to Cc]
On 15/08/2019 18:24, Valentin Schneider wrote:
> On 15/08/2019 15:53, Phil Auld wrote:
>> With WARN_DOUBLE_CLOCK enabled a false positive warning can occur in rt
>>
>> [] rq->clock_update_flags & RQCF_UPDATED
>> [] WARNING: CPU: 6 PID: 21426 at kernel/sched/cor
In case the F/W fails to initialize the thermal sensors, print an
appropriate error message to kernel log and fail the device
initialization.
Signed-off-by: Oded Gabbay
---
drivers/misc/habanalabs/goya/goya.c | 5 +
drivers/misc/habanalabs/include/hl_boot_if.h | 2 ++
2 files change
Hi
Here are 2 patches to add an option to 'perf record' to put a copy of kcore
into a directory with perf.data. Refer to patch 2 for an example.
Adrian Hunter (2):
perf tools: Support single perf.data file directory
perf record: Put a copy of kcore into the perf.data directory
too
Support directory output that contains a regular perf.data file. This is
preparation for adding support for putting a copy of /proc/kcore in that
directory.
Distinguish the multiple file case from the regular (single) perf.data file
case by adding data->is_multi_file.
Signed-off-by: Adrian Hunter
Add a new 'perf record' option '--kcore' which will put a copy of /proc/kcore,
kallsyms and modules into the perf.data directory.
Example:
$ sudo perf record --kcore uname
$ sudo tree perf.data
perf.data
├── kcore_dir
│ ├── kallsyms
│ ├── kcore
│ └── modules
└── perf.data
$ sudo perf scri
On 16.09.19 08:05, Alastair D'Silva wrote:
> From: Alastair D'Silva
>
> The call to check_hotplug_memory_addressable() validates that the memory
> is fully addressable.
>
> Without this call, it is possible that we may remap pages that is
> not physically addressable, resulting in bogus section
On Fri, Sep 13, 2019 at 10:14:15AM -0500, Steve Wahl wrote:
> On Thu, Sep 12, 2019 at 01:19:17PM +0300, Kirill A. Shutemov wrote:
> > On Wed, Sep 11, 2019 at 03:08:35PM -0500, Steve Wahl wrote:
> > > Thank you for your time looking into this with me!
> >
> > With all this explanation the original
Sorry for the delay in replying.
On 8/20/2019 4:35 PM, Vinod Koul wrote:
On 19-08-19, 16:56, Jon Hunter wrote:
On this, I am inclined to think that dma driver should not be involved.
The ADMAIF needs this configuration and we should take the path of
dma_router for this piece and add features li
On 2019-09-13 12:27:44 [-0400], Qian Cai wrote:
…
> Chain exists of:
> random_write_wait.lock --> &rq->lock --> batched_entropy_u32.lock
>
> Possible unsafe locking scenario:
>
>CPU0CPU1
>
> lock(batched_entropy_u32.lock);
>
On Sat, Sep 14, 2019 at 11:41:13AM +0100, Mike Rapoport wrote:
> On Thu, Sep 12, 2019 at 04:09:12PM +0200, Thomas Bogendoerfer wrote:
> > On Thu, Sep 12, 2019 at 03:55:39PM +0200, Thomas Bogendoerfer wrote:
> > > - reserved[0xd] [0x00035bff8000-0x00035bff],
> > > 0x8000 b
On Mon, Sep 16, 2019 at 02:29:01PM +0900, Seunghun Han wrote:
> >
> > On Fri, Sep 13, 2019 at 03:00:06PM +0100, Jarkko Sakkinen wrote:
> > > On Wed, Sep 11, 2019 at 02:17:48PM +0900, Seunghun Han wrote:
> > > > Vanya,
> > > > I also made a patch series to solve AMD's fTPM. My patch link is here,
>
Hi,
On Sun, Sep 15, 2019 at 08:41:55PM +, Jethro Beekman wrote:
> Could someone please review this?
>
> On 2019-09-04 03:15, Jethro Beekman wrote:
> > Some flash controllers don't have a software sequencer. Avoid
> > configuring the register addresses for it, and double check
> > everywhere t
On 2019-09-16 11:11, Mika Westerberg wrote:
> Hi,
>
> On Sun, Sep 15, 2019 at 08:41:55PM +, Jethro Beekman wrote:
>> Could someone please review this?
>>
>> On 2019-09-04 03:15, Jethro Beekman wrote:
>>> Some flash controllers don't have a software sequencer. Avoid
>>> configuring the register
From: Colin Ian King
There is a spelling mistake in a dev_err message. Fix it.
Signed-off-by: Colin Ian King
---
drivers/memory/samsung/exynos5422-dmc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/memory/samsung/exynos5422-dmc.c
b/drivers/memory/samsung/exynos5
On 13/09/2019 14:06, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.4.193 release.
> There are 9 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses sho
On Fri, Sep 13, 2019 at 11:39:50, Pankaj Dubey
wrote:
> From: Anvesh Salveru
>
> In some platforms, PCIe PHY may have issues which will prevent linkup
> to happen in GEN3 or higher speed. In case equalization fails, link will
> fallback to GEN1.
>
> DesignWare controller gives flexibility to
On Sat, Sep 14, 2019 at 12:32:39AM +0800, Jia He wrote:
> When we tested pmdk unit test [1] vmmalloc_fork TEST1 in arm64 guest, there
> will be a double page fault in __copy_from_user_inatomic of cow_user_page.
>
> Below call trace is from arm64 do_page_fault for debugging purpose
> [ 110.016195]
From: Colin Ian King
There is a spelling mistake in literal string. Fix it.
Signed-off-by: Colin Ian King
---
drivers/scsi/hisi_sas/hisi_sas_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/scsi/hisi_sas/hisi_sas_main.c
b/drivers/scsi/hisi_sas/hisi_sas_main.c
On 13/09/2019 14:06, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.9.193 release.
> There are 14 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses sh
On 13/09/2019 18.36, Borislav Petkov wrote:
> On Fri, Sep 13, 2019 at 12:42:32PM +0200, Borislav Petkov wrote:
>> Or should we talk to Intel hw folks about it...
>
> Or, I can do something like this, while waiting. Benchmark at the end.
>
> The numbers are from a KBL box:
>
> model : 1
On Mon, Sep 16, 2019 at 09:12:50AM +, Jethro Beekman wrote:
> On 2019-09-16 11:11, Mika Westerberg wrote:
> > Hi,
> >
> > On Sun, Sep 15, 2019 at 08:41:55PM +, Jethro Beekman wrote:
> >> Could someone please review this?
> >>
> >> On 2019-09-04 03:15, Jethro Beekman wrote:
> >>> Some flash
On Sat, Sep 14, 2019 at 12:32:38AM +0800, Jia He wrote:
> On arm64 without hardware Access Flag, copying fromuser will fail because
> the pte is old and cannot be marked young. So we always end up with zeroed
> page after fork() + CoW for pfn mappings. we don't always have a
> hardware-managed acce
On Thu, 12 Sep 2019, Andy Lutomirski wrote:
Thanks, for adding me and the others on Cc. I had to dig out the cover
letter from my LKML archive
> On 9/12/19 1:06 PM, Chang S. Bae wrote:
>
> > Updates from v7 [7]:
> > (1) Consider FSGSBASE when determining which Spectre SWAPGS mitigations are
From: Colin Ian King
There is a spelling mistake in a DBG_871X error message. Fix it.
Signed-off-by: Colin Ian King
---
drivers/staging/rtl8723bs/os_dep/ioctl_linux.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/rtl8723bs/os_dep/ioctl_linux.c
b/drivers/s
On 2019-09-16 11:19, Mika Westerberg wrote:
> On Mon, Sep 16, 2019 at 09:12:50AM +, Jethro Beekman wrote:
>> On 2019-09-16 11:11, Mika Westerberg wrote:
>>> Hi,
>>>
>>> On Sun, Sep 15, 2019 at 08:41:55PM +, Jethro Beekman wrote:
Could someone please review this?
On 2019-09-04
On 13/09/2019 14:07, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 5.2.15 release.
> There are 37 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses sho
On 13/09/2019 14:04, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.19.73 release.
> There are 190 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses s
On Wed, 11 Sep 2019 at 23:26, Doug Anderson wrote:
>
> Hi,
>
> On Thu, Jul 25, 2019 at 6:28 AM Ulf Hansson wrote:
> >
> > On Mon, 22 Jul 2019 at 21:41, Douglas Anderson
> > wrote:
> > >
> > > As talked about in the thread at:
> > >
> > > http://lkml.kernel.org/r/CAD=FV=X7P2F1k_zwHc0mbtfk55-rucT
Hi Jean,
On 05/09/2019 14:57, Jean Delvare wrote:
> If this is of any value to you, I tried implementing it in i2c-i801 a
> few days ago. I can't really test it though as I don't have any device
> which triggers an alert on my system, but I am sharing it with you if
> you want to give it a try. Yo
Hi Kirill
> -Original Message-
> From: Kirill A. Shutemov
> Sent: 2019年9月16日 17:16
> To: Justin He (Arm Technology China)
> Cc: Catalin Marinas ; Will Deacon
> ; Mark Rutland ; James Morse
> ; Marc Zyngier ; Matthew
> Wilcox ; Kirill A. Shutemov
> ; linux-arm-ker...@lists.infradead.org;
Jean Delvare wrote:
> I wrongly assumed it had been merged upstream meanwhile but I was
> wrong. David, any reason why this didn't happen?
There were last-minute objections.
The patches got redesigned somewhat by Matthew Garrett and are now pending
pulling once again:
https://lore.ker
On 13/09/2019 19:27, Russell King - ARM Linux admin wrote:
> On Fri, Sep 13, 2019 at 07:19:41PM +0100, Cristian Marussi wrote:
>> Tested as follows:
>>
>> - arm:
>> 1. boot
>
> So this basically means the code paths you're touching are untested on
> ARM... given that, and the variety of systems we
On 9/12/19 7:05 PM, Andrey Ryabinin wrote:
>
> Or another alternative option (and actually easier one to implement), leave
> PAGE_OWNER as is (no "select"s in Kconfigs)
> Make PAGE_OWNER_FREE_STACK like this:
>
> +config PAGE_OWNER_FREE_STACK
> + def_bool KASAN || DEBUG_PAGEALLOC
> + dep
On Mon, Sep 16, 2019 at 09:22:04AM +, Jethro Beekman wrote:
> On 2019-09-16 11:19, Mika Westerberg wrote:
> > On Mon, Sep 16, 2019 at 09:12:50AM +, Jethro Beekman wrote:
> >> On 2019-09-16 11:11, Mika Westerberg wrote:
> >>> Hi,
> >>>
> >>> On Sun, Sep 15, 2019 at 08:41:55PM +, Jethro B
> Eessentially what you want to do is to detach and backup the original
> NVS resources and put them back to the list with insert_resource() when
> tpm_crb is removed. At least I think this is what should be done but you
> should CC your patch also to the ACPI list for feedback.
>
> /Jarkko
Yes, y
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