Merged into cifs-2.6.git for-next
Ronnie,
You ok with merging this as a distinct patch?
On Wed, Aug 28, 2019 at 7:02 PM Colin King wrote:
>
> From: Colin Ian King
>
> A previous fix added a jump to after_open which now leaves variable
> rc in a uninitialized state. A couple of the cases in the
Hi all,
On Thu, 29 Aug 2019 13:51:50 +1000 Stephen Rothwell
wrote:
>
> After merging the block tree, today's linux-next build (x86_64
> allmodconfig) produced this warning:
>
> In file included from include/trace/events/iocost.h:8,
> from :
> include/trace/events/iocost.h:12:57
On Thu, Aug 29, 2019 at 2:00 PM Steve French wrote:
>
> Merged into cifs-2.6.git for-next
>
> Ronnie,
> You ok with merging this as a distinct patch?
Sure thing.
Thanks for the fix Colin.
>
> On Wed, Aug 28, 2019 at 7:02 PM Colin King wrote:
> >
> > From: Colin Ian King
> >
> > A previous fix
Add linux-next specific files for 20190828 (2019-08-28 19:59:14 +1000)
are available in the Git repository at:
https://github.com/deepa-hub/vfs limits
for you to fetch changes up to f0f216afa4c7e4dee9121fde52ccf57f76119188:
isofs: Initialize filesystem timestamp ranges (2019-08-28 19:1
The spi-nor controller defaults to BSPI mode, hence switch back
to its default mode after MSPI operations (write or erase)
are completed.
Changes from V1:
- Address code review comment from Mark Brown.
Signed-off-by: Rayagonda Kokatanur
Reviewed-by: Mark Brown
Reviewed-by: Kamal Dasu
---
dri
Hi,
I'm pleased to announce the release of Squashfs tools 4.4.
This is the first release in over 5 years, and there are
substantial improvements: reproducible builds, new compressors,
CVE fixes, security hardening and new options for
Mksquashfs/Unsquashfs.
The new release can be downloaded here:
This is a userspace tool to drive the testing. Currently it supports
introducing user specified delay in the host to guest communication
path on a per-channel basis.
Signed-off-by: Branden Bonaby
---
Changes in v4:
- Based on Harrys comments, made the tool more
user friendly and added more erro
This patchset introduces a testing framework for Hyper-V drivers.
This framework allows us to introduce delays in the packet receive
path on a per-device basis. While the current code only supports
introducing arbitrary delays in the host/guest communication path,
we intend to expand this to suppor
Introduce user specified latency in the packet reception path
By exposing the test parameters as part of the debugfs channel
attributes. We will control the testing state via these attributes.
Signed-off-by: Branden Bonaby
---
changes in v4:
- Combined v3 patch 2 into this patch, and changed the
On 8/28/19 6:53 PM, Chris Packham wrote:
The orion watchdog can either reset the CPU or generate an interrupt.
The interrupt would be useful for debugging as it provides panic()
output about the watchdog expiry, however if the interrupt is used the
watchdog can't reset the CPU in the event of bei
Some systems have multiple watchdog devices where the first device
registered is assigned to the /dev/watchdog device file. In order
to test other watchdog devices, add an optional file argument for
selecting non-default watchdog devices for testing.
Signed-off-by: George G. Davis
---
tools/test
This patch series adds the following fixes to the iProc GPIO driver
- Fix Warning message given for shared irqchip data structure
- Fix pinconfig of pull-up/down and drive strength for AON/CRMU GPIOs
This patch set is based on Linux-5.2-rc4.
Changes from v1:
- Add Fixes tags in both patches
From: Rayagonda Kokatanur
When multiple instance of iproc-gpio chips are present, a fix up
message[1] is printed during the probe of second and later instances.
This issue is because driver sharing same irq_chip data structure
among multiple instances of driver.
Fix this by allocating irq_chip
From: Li Jin
Fix drive strength for AON/CRMU controller; fix pull-up/down setting
for CCM/CDRU controller.
Fixes: 616043d58a89 ("pinctrl: Rename gpio driver from cygnus to iproc")
Signed-off-by: Li Jin
---
drivers/pinctrl/bcm/pinctrl-iproc-gpio.c | 96 +---
1 file c
Le 24/08/2019 à 21:08, Kees Cook a écrit :
Euh ... only received this mail yesterday. Same for the other answer.
On Fri, Aug 23, 2019 at 04:26:59PM +0200, Christophe Leroy wrote:
Le 23/08/2019 à 00:56, Andrew Morton a écrit :
On Tue, 20 Aug 2019 09:47:55 -0700 Kees Cook wrote:
Reply-T
Hello,
Looking at commit "cifs: create a helper to find a writeable handle
by path name":
->open_file_lock scope is atomic context, while build_path_from_dentry()
can schedule - kmalloc(GFP_KERNEL)
spin_lock(&tcon->open_file_lock);
list_for_each(tmp, &tcon->openFileList) {
On Wed, 2019-08-28 at 21:45 -0700, Guenter Roeck wrote:
> On 8/28/19 6:53 PM, Chris Packham wrote:
> > The orion watchdog can either reset the CPU or generate an interrupt.
> > The interrupt would be useful for debugging as it provides panic()
> > output about the watchdog expiry, however if the in
Hi all,
Today's linux-next merge of the keys tree got a conflict in:
include/linux/security.h
between commit:
9e47d31d6a57 ("security: Add a "locked down" LSM hook")
from the security tree and commit:
25d2a1e61245 ("security: Add hooks to rule on setting a watch")
from the keys tree.
Hi Martin,
On 28/08/19 2:08 AM, Martin Blumenstingl wrote:
> Hello,
>
> On Tue, Aug 27, 2019 at 5:09 AM Chuan Hua, Lei
> wrote:
>>
>> Hi Martin,
>>
>> Thanks for your feedback. Please check the comments below.
>>
>> On 8/27/2019 5:15 AM, Martin Blumenstingl wrote:
>>> Hello,
>>>
>>> On Mon, Aug
Gustavo,
On 27/08/19 6:55 PM, Andrew Murray wrote:
> On Sat, Aug 24, 2019 at 12:08:40AM +, Xiaowei Bao wrote:
>>
>>
>>> -Original Message-
>>> From: Andrew Murray
>>> Sent: 2019年8月23日 21:58
>>> To: Xiaowei Bao
>>> Cc: bhelg...@google.com; robh...@kernel.org; mark.rutl...@arm.com;
>>>
Hi, Weiyi:
On Wed, 2019-08-28 at 17:11 +0800, Weiyi Lu wrote:
> Add power controller node and smi-common node for MT8183
> In scpsys node, it contains clocks and regmapping of
> infracfg and smi-common for bus protection.
>
> Signed-off-by: Weiyi Lu
> ---
> arch/arm64/boot/dts/mediatek/mt8183.d
On Thu, 29 Aug 2019 01:09:37 +0200,
David Miller wrote:
>
> From: Takashi Iwai
> Date: Wed, 28 Aug 2019 08:31:19 +0200
>
> > A similar workaround for the suspend/resume problem is needed for yet
> > another ASUS machines, P6X models. Like the previous fix, the BIOS
> > doesn't provide the stand
On 28/08/19 10:37 PM, Michal Suchánek wrote:
> On Tue, 27 Aug 2019 17:57:31 +0530
> Hari Bathini wrote:
>
[...]
>> Also, get rid of the error message when fadump is
>> not supported as it is already taken care of in fadump_reserve_mem()
>> function.
>
> That should not be called in that ca
Hi Greg,
On 2019-08-28 22:41, Greg Kroah-Hartman wrote:
> On Mon, Aug 26, 2019 at 10:55:33AM +0200, Marek Szyprowski wrote:
>> Hi Greg
>>
>> On 2019-08-08 11:41, Marek Szyprowski wrote:
>>> Some PHYs (for example Exynos5 USB3.0 DRD PHY) require calibration to be
>>> done after every USB HCD reset.
On 28/08/19 10:57 PM, Michal Suchanek wrote:
> Currently it is not possible to distinguish the case when fadump is
> supported by firmware and disabled in kernel and completely unsupported
> using the kernel sysfs interface. User can investigate the devicetree
> but it is more reasonable to prov
Calls to USB2 generic PHY calibrate() method has been moved to HCD core,
which now successfully handles generic PHYs and their calibration after
every HCD reset. This fixes all the timing issues related to PHY
calibration done directly from DWC3 driver: incorrect operation after
system suspend/resu
Dear All,
Commit d8c80bb3b55b ("phy: exynos5-usbdrd: Calibrate LOS levels for
exynos5420/5800") added support for Exynos5 USB3.0 DRD PHY calibration,
what enabled proper Super-Speed enumeration of USB3.0 devices connected
to various Exynos5 SoCs. After some time it turned out that the mentioned
pa
Some PHYs (for example Exynos5 USB3.0 DRD PHY) require calibration to be
done after every USB HCD reset. Generic PHY framework has been already
extended with phy_calibrate() function in commit 36914111e682 ("drivers:
phy: add calibrate method"). This patch adds support for it to generic
PHY handlin
Hi all,
After merging the keys tree, today's linux-next build (arm
multi_v7_defconfig) failed like this:
Caused by commit
ef9cc255c953 ("usb: Add USB subsystem notifications")
# CONFIG_USB_NOTIFICATIONS is not set
I have used the keys tree from next-20190828 for today.
--
During microcode development, its often required to test different versions
of microcode. Intel microcode loader enforces loading only if the revision is
greater than what is currently loaded on the cpu. Overriding this behavior
allows us to reuse the same revision during development cycles.
This f
Hi Matthias,
On Fri, 2019-08-23 at 17:35 +0200, Matthias Brugger wrote:
>
> On 23/08/2019 05:45, Hsin-Hsiung Wang wrote:
> > From: Ran Bi
> >
> > Alarm registers high byte was reserved for other functions.
> > This add mask in alarm registers operation functions.
> > This also fix error conditi
Inside function adfs_dir_find_entry(), obj.file_id could be uninitialized
if __adfs_dir_get() returns error code. However, the return check cannot
promise the initialization of obj.file_id, which is used in the if
statement. This is potentially unsafe.
Signed-off-by: Yizhuo
---
fs/adfs/dir_f.c |
Intel new hardware introduces some Precise Event-Based Sampling (PEBS)
extensions that output the PEBS record to Intel PT stream instead of
DS area. The PEBS record will be packaged in a specific format when
outputing to Intel PT.
This patch set will enable PEBS functionality in KVM Guest by PEBS
Hi Boris,
sorry i added the wrong message id in the commit log.
https://lore.kernel.org/r/20190824085300.gb16...@zn.tnic/
On Wed, Aug 28, 2019 at 10:33:22PM -0700, Ashok Raj wrote:
> During microcode development, its often required to test different versions
> of microcode. Intel microcode load
PEBS output Inte PT introduces some new MSRs (MSR_RELOAD_FIXED_CTRx)
for fixed function counters that use for autoload the preset value
after writing out a PEBS event.
Introduce base MSRs address parameter to make this function can get
performance monitor counter structure by MSR_RELOAD_FIXED_CTRx
PDCM (Perfmon and Debug Capability) indicates the processor
supports the performance and debug feature indication
MSR IA32_PERF_CAPABILITIES.
PEBS enabling in KVM guest depend on PEBS via PT, and
PEBS via PT is detected by IA32_PERF_CAPABILITIES[Bit16].
Signed-off-by: Luwei Kang
---
arch/x86/in
The performance counter used by guest perspective may different
with the counter allocated from real hardware (e.g. Guest driver
get counter 0 for PEBS but the host PMU driver may alloc other
counters for this event).
Introduce a new parameter for the mapping of PEBS enable status from
guest to re
PEBS can be enabled in KVM guest by direct PEBS record into the Intel
Processor Trace output buffer. This patch adds a new flag to detect
if PEBS can be supported in KVM guest. It not only need HW support PEBS
output Intel PT (IA32_PERF_CAPABILITIES.PEBS_OUTPUT_PT_AVAIL[16]=1)
but also depends on:
This patch implements the MSR_IA32_PEBS_ENABLE register
read/write emulation for KVM guest. MSR_IA32_PEBS_ENABLE
register can be accessed only when PEBS is supported in KVM.
VMM need to reprogram the counter when the value of this MSR
changed because some of the counters will be created or destroy
This patch implements the counter reload register
MSR_RELOAD_PMCx/FIXED_CTRx read/write emulation. These registers
can be accessed only when PEBS is supported in KVM.
VMM need to reprogram the counters to make the host PMU framework
load the value to real hardware after configuration has been chan
Expose PEBS feature to guest by IA32_MISC_ENABLE[bit12].
IA32_MISC_ENABLE[bit12] is Processor Event Based Sampling (PEBS)
Unavailable (RO) flag:
1 = PEBS is not supported; 0 = PEBS is supported.
Signed-off-by: Luwei Kang
---
arch/x86/include/asm/kvm_host.h | 1 +
arch/x86/kvm/svm.c
This patch add a new parameter "pebs" that to make the host
PMU framework allocate performance counter for guest PEBS event.
Signed-off-by: Luwei Kang
---
arch/x86/kvm/pmu.c | 23 +++
arch/x86/kvm/pmu.h | 5 +++--
arch/x86/kvm/pmu_amd.c | 2 +-
arc
Expose some bits of definition which relate with enable
PEBS to KVM guest especially PEBS via PT feature.
Signed-off-by: Luwei Kang
---
arch/x86/include/asm/kvm_host.h | 1 +
arch/x86/include/asm/msr-index.h | 3 +++
arch/x86/kvm/vmx/vmx.c | 14 ++
3 files changed, 18 in
Changes since v6:
1. Due to we can use fixed-clock in DT
We removed has_clks and fixed-clock properties
Changes since v5:
- Follow reviewer's comments:
1. the license stuff is a separate change
2. split fix mt7628 pwm into a single patch
3. to ensure to not use mtk_pwm_clk_name[10]
From: Ryder Lee
This adds a property "num-pwms" to avoid having an endless
list of compatibles with no differences for the same driver.
Signed-off-by: Ryder Lee
Signed-off-by: Sam Shih
Reviewed-by: Uwe Kleine-König
---
Changes since v6:
Add a Reviewed-by tag
Changes since v5:
Check num-pwms
在 2019/8/29 上午1:23, Alex Williamson 写道:
On Wed, 28 Aug 2019 18:08:02 +0800
Ben Luo wrote:
在 2019/8/28 上午4:33, Alex Williamson 写道:
On Thu, 22 Aug 2019 23:34:43 +0800
Ben Luo wrote:
When userspace (e.g. qemu) triggers a switch between KVM
irqfd and userspace eventfd, only dev_id of irq a
This patch drop the check for of_device_get_match_data.
Due to the only way call driver probe is compatible match.
The .data pointer which point to the SoC specify data is
directly set by driver, and it should not be NULL in our case.
We can safety remove the check for of_device_get_match_data.
Si
We can use fixed-clock to repair mt7628 pwm during configure from
userspace. The SoC is legacy MIPS and has no complex clock tree.
Due to we can get clock frequency for period calculation from DT
fixed-clock, so we can remove has-clock property, and directly
use devm_clk_get and clk_get_rate.
Sign
Instead of using fixed size of arrays, allocate the memory for them
based on the information we get from the DT.
Also remove the check for num_pwms, due to dynamically allocate pwm
should not cause array index out of bound.
Signed-off-by: Ryder Lee
Signed-off-by: Sam Shih
Reviewed-by: Uwe Klein
Use pwm_mediatek as common prefix to match the filename.
No functional change intended.
Signed-off-by: Ryder Lee
Signed-off-by: Sam Shih
Acked-by: Uwe Kleine-König
---
Changes since v6:
Add an Acked-by tag
Changes since v5:
- Follow reviewers's comments
The license stuff is a separate change
Add SPDX identifiers to pwm-mediatek.c
Update license to GNU General Public License v2.0
Signed-off-by: Ryder Lee
Signed-off-by: Sam Shih
Reviewed-by: Uwe Kleine-König
---
Changes since v6:
Add a Reviewed-by tag
Changes since v5:
- Follow reviewers's comments
The license stuff is a separate ch
From: Ryder Lee
This adds a property "num-pwms" in example so that we could
specify the number of PWM channels via device tree.
Signed-off-by: Ryder Lee
Signed-off-by: Sam Shih
Reviewed-by: Matthias Brugger
Acked-by: Uwe Kleine-König
---
Changes since v6:
Follow reviewers's comments:
- The s
From: Ryder Lee
This adds a property "num-pwms" for PWM controller.
Signed-off-by: Ryder Lee
Signed-off-by: Sam Shih
---
arch/arm64/boot/dts/mediatek/mt7622.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
b/arch/arm64/boot/dts/mediatek/mt7622
From: Ryder Lee
This updates bindings for MT7629 pwm controller.
Signed-off-by: Ryder Lee
Signed-off-by: Sam Shih
Reviewed-by: Matthias Brugger
---
Changes since v1:
- add a Reviewed-by tag
---
Documentation/devicetree/bindings/pwm/pwm-mediatek.txt | 1 +
1 file changed, 1 insertion(+)
dif
From: Ryder Lee
This adds a property "num-pwms" for PWM controller.
Signed-off-by: Ryder Lee
Signed-off-by: Sam Shih
---
arch/arm/boot/dts/mt7623.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index a79f0b6c3429..208e0d19
This adds pwm support for MT7629.
Signed-off-by: Sam Shih
---
arch/arm/boot/dts/mt7629.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/mt7629.dtsi b/arch/arm/boot/dts/mt7629.dtsi
index 9608bc2ccb3f..493be9a9453b 100644
--- a/arch/arm/boot/dts/mt7629.d
Hi,
The allocated size for each binder_thread is 512 bytes by kzalloc.
Because the size of binder_thread is fixed and it's only 304 bytes.
It will save 208 bytes per binder_thread when use create a kmem_cache
for the binder_thread.
Signed-off-by: Peikan Tsai
---
drivers/android/binder.c | 16 ++
The st_lsm6dsx_sensor_settings struct's fs_avl[] array is expected to
be of size 4. We can't define it to be of size 3 and try to access
the 4th element below.
Commit c8d4066c7246 ("iio: imu: st_lsm6dsx: remove invalid gain value
for LSM9DS1") which is a "cleanup" change, results in an Ooops here
Hi, Stephen
> Subject: RE: [PATCH 2/2] clk: imx: disable i.mx7ulp composite clock during
> initialization
>
> Hi, Stephen
> I think we should resume this thread, without this patch, mainline
> kernel boot up will cause mmc timeout all the time. If it is NOT good to
> disabling those periphe
> -Original Message-
> From: Stephen Boyd
> Sent: 2019年8月23日 9:27
> To: Mark Rutland ; Michael Turquette
> ; Rob Herring ; Wen He
> ; devicet...@vger.kernel.org; linux-...@vger.kernel.org;
> linux-de...@linux.nxdi.nxp.com; linux-kernel@vger.kernel.org
> Cc: Leo Li ; liviu.du...@arm.com;
On Tue, Aug 27, 2019 at 07:01:41PM +, Saeed Mahameed wrote:
> On Mon, 2019-08-26 at 17:47 +0800, Dongxu Liu wrote:
>
> > Maybe "if (!dev->ethtool_ops)" is more accurate for this bug.
> >
>
> Also i am not sure about this, could be a bug in the device driver your
> enslaving.
>
> alloc_netde
Hi Mark,
On Wed, 2019-08-28 at 11:45 +0100, Mark Brown wrote:
> On Fri, Aug 23, 2019 at 11:45:28AM +0800, Hsin-Hsiung Wang wrote:
> > The MT6358 is a regulator found on boards based on MediaTek MT8183 and
> > probably other SoCs. It is a so called pmic and connects as a slave to
> > SoC using SPI,
On Wed, Aug 28, 2019 at 10:33:22PM -0700, Ashok Raj wrote:
> During microcode development, its often required to test different versions
> of microcode. Intel microcode loader enforces loading only if the revision is
> greater than what is currently loaded on the cpu. Overriding this behavior
> all
>>>For some high performance IO devices, interrupt may come very frequently,
>>>meantime IO request completion may take a bit time. Especially on some
>>>devices(SCSI or NVMe), IO requests can be submitted concurrently from
>>>multiple CPU cores, however IO completion is only done on one of these
>
Hi all,
After merging the tip tree, today's linux-next build (x86_64 allmodconfig)
failed like this:
In file included from sound/soc/intel/boards/sof_rt5682.c:23:
sound/soc/intel/boards/../common/soc-intel-quirks.h: In function
'soc_intel_is_cml':
sound/soc/intel/boards/../common/soc-intel-quirk
On Wed, Aug 28, 2019 at 03:40:54PM -0600, Logan Gunthorpe wrote:
> Implement sparsemem support for Risc-v which helps pave the
> way for memory hotplug and eventually P2P support.
>
> Introduce Kconfig options for virtual and physical address bits which
> are used to calculate the size of the vmem
On Wed, Aug 28, 2019 at 06:15:40PM +0200, Michal Suchánek wrote:
> On Wed, 28 Aug 2019 08:15:52 -0700
> Christoph Hellwig wrote:
>
> > On Tue, Aug 27, 2019 at 10:21:06PM +0200, Michal Suchanek wrote:
> > > 64bit !COMPAT does not build because the llseek syscall is in the tables.
> > >
> >
> >
Can we please just review the damn thing and get it into the proper
tree? That whole concept of staging file systems just has been one
fricking disaster, including Greg just moving not fully reviewed ones
over like erofs just because he feels like it. I'm getting sick and
tired of this scheme.
Hi Frank/Matthias,
On Fri, 2019-08-23 at 19:16 +0200, Frank Wunderlich wrote:
> > Gesendet: Freitag, 23. August 2019 um 17:42 Uhr
> > Von: "Matthias Brugger"
>
> > I suppose that's because 3/10 has code that should be in 2/10 and for some
> > reason 3/10 was not pushed for linux-next inclusion.
On 2019/8/28 13:47, Christophe Leroy wrote:
Le 28/08/2019 à 06:54, Scott Wood a écrit :
On Fri, Aug 09, 2019 at 06:07:54PM +0800, Jason Yan wrote:
This patch add support to boot kernel from places other than KERNELBASE.
Since CONFIG_RELOCATABLE has already supported, what we need to do is
Currently, multi_v7_defconfig + CONFIG_FUNCTION_TRACER fails to build
with clang:
arm-linux-gnueabi-ld: kernel/softirq.o: in function `_local_bh_enable':
softirq.c:(.text+0x504): undefined reference to `mcount'
arm-linux-gnueabi-ld: kernel/softirq.o: in function `__local_bh_enable_ip':
softirq.c:(
Christophe Leroy writes:
> Most 8xx registers have specific names, so just include
> reg_8xx.h all the time in reg.h in order to have them defined
> even when CONFIG_PPC_8xx is not selected. This will avoid
> the need for #ifdefs in C code.
>
> Guard SPRN_ICTRL in an #ifdef CONFIG_PPC_8xx as this
On Wed, Aug 28, 2019 at 11:23:40PM -0700, Christoph Hellwig wrote:
> Can we please just review the damn thing and get it into the proper
> tree? That whole concept of staging file systems just has been one
> fricking disaster, including Greg just moving not fully reviewed ones
> over like erofs ju
kvm ptp targets to provide high precision time sync between guest
and host in virtualization environment. This patch enable kvm ptp
for arm64.
This patch set base on [1][2][3]
[1]https://git.kernel.org/pub/scm/linux/kernel/git/will/linux.git/
commit/?h=kvm/hvc&id=125ea89e4a21e2fc5235410f966a996a1
Currently in arm64 virtualization environment, there is no mechanism to
keep time sync between guest and host. Time in guest will drift compared
with host after boot up as they may both use third party time sources
to correct their time respectively. The time deviation will be in order
of milliseco
Currently, ptp_kvm modules implementation is only for x86 which includs
large part of arch-specific code. This patch move all of those code
into related arch directory.
Signed-off-by: Jianyong Wu
---
arch/x86/kvm/arch_ptp_kvm.c | 92
drivers/ptp/Makefile
If arm_smccc_1_1_invoke used in modules, psci_ops.conduit should
be export.
Signed-off-by: Jianyong Wu
---
drivers/firmware/psci/psci.c | 6 ++
include/linux/arm-smccc.h| 2 +-
include/linux/psci.h | 1 +
3 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/firmw
The following commit has been merged into the timers/core branch of tip:
Commit-ID: 8f2edb4a78f7f5fa35c025849152b1d2dfaee4eb
Gitweb:
https://git.kernel.org/tip/8f2edb4a78f7f5fa35c025849152b1d2dfaee4eb
Author:Thomas Gleixner
AuthorDate:Thu, 29 Aug 2019 08:19:40 +02:00
Commi
On Thu, Aug 29, 2019 at 01:49:53PM +0800, Peikan Tsai wrote:
> Hi,
No need for that in a changelog text :)
> The allocated size for each binder_thread is 512 bytes by kzalloc.
> Because the size of binder_thread is fixed and it's only 304 bytes.
> It will save 208 bytes per binder_thread when use
On 8/29/19 5:14 AM, Biwen Li wrote:
Issue:
- # hwclock -w
hwclock: RTC_SET_TIME: Invalid argument
Why:
- Relative commit: 8b9f9d4dc511309918c4f6793bae7387c0c638af, this patch
will always check for unwritable registers, it will compare reg
with max_register in regma
On Wed, Aug 28, 2019 at 06:43:50PM +0200, Michal Suchanek wrote:
> +ifdef CONFIG_COMPAT
> +obj-y+= sys_ppc32.o ptrace32.o signal_32.o
> +endif
This should be:
obj-$(CONFIG_COMPAT)+= sys_ppc32.o ptrace32.o signal_32.o
> /* This value is used to mark ex
Update the entire comment block to be C++ style so it looks consistent.
Signed-off-by: Jisheng Zhang
---
drivers/regulator/sy8824x.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/regulator/sy8824x.c b/drivers/regulator/sy8824x.c
index 1a7fa4865491..d80
Add prefixes to BUCK_EN and MODE macros to namespace them.
Signed-off-by: Jisheng Zhang
---
drivers/regulator/sy8824x.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/regulator/sy8824x.c b/drivers/regulator/sy8824x.c
index d806fa7020d4..92adb4f3ee19 10
This patch add support for perf callchain sampling on riscv platform.
The return address of leaf function is retrieved from pt_regs as
it is not saved in the outmost frame.
Signed-off-by: Mao Han
Cc: Paul Walmsley
Cc: Greentime Hu
Cc: Palmer Dabbelt
Cc: linux-riscv
Cc: Christoph Hellwig
Cc:
This patch set add perf callchain(FP/DWARF) support for RISC-V.
It comes from the csky version callchain support with some
slight modifications. The patchset base on Linux 5.3-rc6.
Changes since v5:
- use walk_stackframe from stacktrace.c to handle
kernel callchain unwinding(fix invalid mem
This patch add support for DWARF register mappings and libdw registers
initialization, which is used by perf callchain analyzing when
--call-graph=dwarf is given.
Signed-off-by: Mao Han
Cc: Paul Walmsley
Cc: Greentime Hu
Cc: Palmer Dabbelt
Cc: linux-riscv
Cc: Christoph Hellwig
Cc: Guo Ren
-
This patch implements the perf registers sampling and validation API
for riscv arch. The valid registers and their register ID are defined in
perf_regs.h. Perf tool can backtrace in userspace with unwind library
and the registers/user stack dump support.
Signed-off-by: Mao Han
Cc: Paul Walmsley
I'm sorry, I can't apply this, it produces loads of:
include/linux/error-injection.h:7:10: fatal error: asm/error-injection.h: No
such file or directory
Since your patch 1 has been merged by the ARM64 people, I can't take
it until next cycle.
On Mon, Aug 19, 2019 at 05:18:08PM +0800, Leo Yan wr
On Tue 27-08-19 18:07:54, Edward Chron wrote:
> On Tue, Aug 27, 2019 at 12:15 AM Michal Hocko wrote:
> >
> > On Mon 26-08-19 12:36:28, Edward Chron wrote:
> > [...]
> > > Extensibility using OOM debug options
> > > -
> > > What is needed is an extensible system
Hi,
A forthcoming Intel network processor SoC uses a new Clock Generation Unit(CGU)
IP for clock controller. This series adds the clock driver for CGU.
Patch 1 adds common clock framework based clock driver for CGU.
Patch 2 adds bindings document & include file for CGU.
These patches are baselin
Clock generation unit(CGU) is a clock controller IP of Intel's Lightning
Mountain(LGM) SoC. Add DT bindings include file and document for CGU clock
controller driver of LGM.
Signed-off-by: Rahul Tanwar
---
.../devicetree/bindings/clock/intel,cgu-lgm.yaml | 61 +
include/dt-bindings/cl
On Wed, 28 Aug 2019 08:27:05 +0800
Jiaxun Yang wrote:
> On 2019/8/28 上午12:45, Marc Zyngier wrote:
> > On 27/08/2019 09:52, Jiaxun Yang wrote:
> >> This controller appeared on Loongson-3 family of chips as the primary
> >> package interrupt source.
> >>
> >> Signed-off-by: Jiaxun Yang
> >> ---
From: rtanwar
Clock Generation Unit(CGU) is a new clock controller IP of a forthcoming
Intel network processor SoC. It provides programming interfaces to control
& configure all CPU & peripheral clocks. Add common clock framework based
clock controller driver for CGU.
Signed-off-by: Rahul Tanwar
Hello,
On Tue, 27 Aug 2019 18:30:17 -0500
Bjorn Helgaas wrote:
> [+cc Thomas]
>
> On Mon, Aug 26, 2019 at 05:14:36PM +0200, Krzysztof Wilczynski wrote:
> > Move the static keyword to the front of declarations of
> > pci_regs_behavior and pcie_cap_regs_behavior, and resolve
> > compiler warning
On Tue 27-08-19 19:47:22, Edward Chron wrote:
> On Tue, Aug 27, 2019 at 6:32 PM Qian Cai wrote:
> >
> >
> >
> > > On Aug 27, 2019, at 9:13 PM, Edward Chron wrote:
> > >
> > > On Tue, Aug 27, 2019 at 5:50 PM Qian Cai wrote:
> > >>
> > >>
> > >>
> > >>> On Aug 27, 2019, at 8:23 PM, Edward Chron w
> From: Zhang, Tina
> Sent: Wednesday, August 28, 2019 2:59 PM
>
> > -Original Message-
> > From: Tian, Kevin
> > Sent: Wednesday, August 28, 2019 9:50 AM
> > To: Zhenyu Wang ; Zhang, Tina
> >
> > Cc: k...@vger.kernel.org; linux-kernel@vger.kernel.org; Yuan, Hang
> > ; alex.william...@red
s@fox@fix@
On Wed 28-08-19 10:38:49, Yi Wang wrote:
> Commit ac311a14c682 ("oom: decouple mems_allowed from oom_unkillable_task")
> changed the function has_intersects_mems_allowed() to
> oom_cpuset_eligible(), but didn't change the comment meanwhile.
>
> Let's fix this.
>
> Signed-off-by: Yi Wa
On Tue 2019-08-27 09:50:14, Greg Kroah-Hartman wrote:
> [ Upstream commit dea1bb35c5f35e0577cfc61f79261d80b8715221 ]
>
> People are reporing seeing fscache errors being reported concerning
> duplicate cookies even in cases where they are not setting up fscache
> at all. The rule needs to be that i
On 2019-08-27, Petr Mladek wrote:
> The API is complicated because of the callbacks. It depends on a logic
> that is implemented externally. It makes it abstract to some extent.
>
> My view is that the API would be much cleaner and easier to review
> when the ID handling is "hardcoded" (helper fun
On Wed, 28 Aug 2019, Sasha Levin wrote:
> On Tue, Aug 27, 2019 at 12:00:14PM +0100, Mark Brown wrote:
> > On Sun, Aug 25, 2019 at 09:35:15PM -0400, Sasha Levin wrote:
> > > On Wed, Aug 14, 2019 at 10:22:13AM +0100, Mark Brown wrote:
> >
> > > > > If the DAI format setup fails, there is no valid
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