> On Aug 26, 2019, at 8:56 AM, Steven Rostedt wrote:
>
> On Mon, 26 Aug 2019 15:41:24 +
> Nadav Amit wrote:
>
>>> Anyway, I believe Nadav has some patches that converts ftrace to use
>>> the shadow page modification trick somewhere.
>>
>> For the record - here is my previous patch:
>> ht
From: Sudokamikaze
This patch adds quirk VID/PID IDs for Hiby R3 portable DSD player DSD support
Signed-off-by: Sudokamikaze
---
sound/usb/quirks.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c
index 78858918cbc1..f90418149e4e 100644
--- a/so
On Mon, 26 Aug 2019 18:05:05 +0200,
Sudo Kamikaze wrote:
>
> From: Sudokamikaze
>
> This patch adds quirk VID/PID IDs for Hiby R3 portable DSD player DSD support
>
> Signed-off-by: Sudokamikaze
> ---
> sound/usb/quirks.c | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/sound/us
Am 26.08.19 um 16:42 schrieb Mika Westerberg:
> According to PCI FW 3.2 the OS is responsible for those delays if the
> platform firmware does not provide that _DSM. So simpler way would be
> always do the delays if the _DSM is not there.
Well, that is
* unless we trip over delays that make other
Em Mon, Aug 26, 2019 at 01:06:28PM -0300, Arnaldo Carvalho de Melo escreveu:
> Em Sun, Aug 25, 2019 at 08:17:40PM +0200, Jiri Olsa escreveu:
> > hi,
> > as a preparation for sampling libperf interface, moving event
> > definitions into the library header. Moving just the kernel
> > non-AUX events
On Wed, May 29, 2019 at 08:36:37PM +, Vineeth Remanan Pillai wrote:
> From: Peter Zijlstra
>
> Make sure the entire for loop has stop_cpus_in_progress set.
It is not clear how this commit comment matches the change. Please explain
how adding 2 barrier's makes sure stop_cpus_in_progress is se
* Masahiro Yamada [190822 19:59]:
> is only generated and included by
> arch/arm/mach-omap2/, so it does not need to reside in the globally
> visible include/generated/.
>
> I renamed it to arch/arm/mach-omap2/pm-asm-offsets.h since the prefix
> 'ti-' is just redundant in mach-omap2/.
>
> My ma
On Wed, May 29, 2019 at 08:36:38PM +, Vineeth Remanan Pillai wrote:
> From: Peter Zijlstra
NULL commit comment.
--mark
>
> Signed-off-by: Peter Zijlstra (Intel)
> ---
> kernel/sched/core.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/kernel/sched/core.c b/ker
* Markus Elfring [190826 06:31]:
> From: Markus Elfring
> Date: Mon, 26 Aug 2019 15:05:31 +0200
>
> A null pointer would be passed to a call of the function "kfree" directly
> after a call of the function "kzalloc" failed at one place.
> Remove this superfluous function call.
>
> This issue was
> On Aug 23, 2019, at 3:41 PM, Nadav Amit wrote:
>
> Currently, on_each_cpu() and similar functions do not exploit the
> potential of concurrency: the function is first executed remotely and
> only then it is executed locally. Functions such as TLB flush can take
> considerable time, so this prov
On Mon, Aug 26, 2019 at 05:25:23PM +0200, Sebastian Andrzej Siewior wrote:
> On 2019-08-23 23:10:14 [-0400], Joel Fernandes wrote:
> > On Fri, Aug 23, 2019 at 02:28:46PM -0500, Scott Wood wrote:
> > > On Fri, 2019-08-23 at 18:20 +0200, Sebastian Andrzej Siewior wrote:
> > > >
> > > > this looks li
tree: https://kernel.googlesource.com/pub/scm/linux/kernel/git/tip/tip.git
x86/urgent
head: cfa16294b1c5b320c0a0e1cac37c784b92366c87
commit: cfa16294b1c5b320c0a0e1cac37c784b92366c87 [3/3] x86/apic: Include the
LDR when clearing out APIC registers
config: i386-defconfig (attached as .config)
c
On Wed, Aug 21, 2019 at 09:09:15PM +0200, Thomas Gleixner wrote:
> /**
> - * task_cputimers_expired - Compare two task_cputime entities.
> + * task_cputimers_expired - Check whether posix CPU timers are expired
> *
> * @samples: Array of current samples for the CPUCLOCK clocks
> - * @expiries:
> On Aug 26, 2019, at 12:51 AM, Juergen Gross wrote:
>
> On 24.08.19 00:52, Nadav Amit wrote:
>> __flush_tlb_one_user() currently flushes a single entry, and flushes it
>> both in the kernel and user page-tables, when PTI is enabled.
>> Change __flush_tlb_one_user() and related interfaces into
>>
On Mon, Aug 26, 2019 at 7:57 AM Tycho Andersen wrote:
>
> Hi,
>
> On Fri, Aug 23, 2019 at 05:30:53PM -0700, Paul Walmsley wrote:
> > On Thu, 22 Aug 2019, David Abdurachmanov wrote:
> >
> > > There is one failing kernel selftest: global.user_notification_signal
> >
> > Also - could you follow up wi
Allow accessing the parent clock names required for the driver
operation by using the device tree node.
This permits extending the driver to other platforms without having to
modify its source code.
For backwards compatibility leave previous values as default.
Co-developed-by: Niklas Cassel
Sig
Make the output of the high frequency pll a clock provider.
On the QCS404 this PLL controls cpu frequency scaling.
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
Acked-by: Stephen Boyd
---
drivers/clk/qcom/hfpll.c |
Allow accessing the parent clock name required for the driver
operation using the device tree node.
This permits extending the driver to other platforms without having to
modify its source code.
For backwards compatibility leave the previous value as default.
Co-developed-by: Niklas Cassel
Sign
When COMMON_CLK_DISABLED_UNUSED is set, in an effort to save power and
to keep the software model of the clock in line with reality, the
framework transverses the clock tree and disables those clocks that
were enabled by the firmware but have not been enabled by any device
driver.
If CPUFREQ is en
Limit the GPLL0_AO_OUT_MAIN operating frequency as per its hardware
specifications.
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
Acked-by: Stephen Boyd
---
drivers/clk/qcom/clk-alpha-pll.c | 8
drivers/cl
Use the correct macro when registering the platform device.
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
---
drivers/mailbox/qcom-apcs-ipc-mailbox.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --g
There is clock controller functionality in the APCS hardware block of
qcs404 devices similar to msm8916.
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
---
drivers/mailbox/qcom-apcs-ipc-mailbox.c | 8 +---
1 file
On Mon, Aug 26, 2019 at 12:41:38PM -0300, Arnaldo Carvalho de Melo wrote:
> Em Sun, Aug 25, 2019 at 08:17:40PM +0200, Jiri Olsa escreveu:
> > hi,
> > as a preparation for sampling libperf interface, moving event
> > definitions into the library header. Moving just the kernel
> > non-AUX events now
When the APCS clock is registered (platform dependent), it retrieves
its parent names from hardcoded values in the driver.
The following commit allows the DT node to provide such clock names to
the platform data based clock driver therefore avoiding having to
explicitly embed those names in the cl
Specify the clocks that feed the APCS mux/divider instead of using
default hardcoded values in the source code.
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 3 +++
1 file
Specify the clocks that feed the APCS mux/divider instead of using
default hardcoded values in the source code.
The driver still supports the previous bindings; however with this
update it we allow the msm8916 to access the parent clock names
required by the driver operation using the device tree
The high frequency pll functionality is required to enable CPU
frequency scaling operation.
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 9 +
1 file changed, 9 ins
Support dynamic voltage and frequency scaling on qcs404.
CPUFreq will soon be superseded by Core Power Reduction (CPR, a form
of Adaptive Voltage Scaling found on some Qualcomm SoCs like the
qcs404).
Due to the CPR upstreaming already being in progress - and some
commits already merged - the fol
The high frequency pll is required on compatible Qualcomm SoCs to
support the CPU frequency scaling feature.
Co-developed-by: Niklas Cassel
Signed-off-by: Niklas Cassel
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 in
Hello Pablo, Florian,
I implemented a V2 of this patch with the changes you proposed.
Could you please give your feedback on that patch?
https://lkml.org/lkml/2019/8/21/527
Thanks!
On Wed, 2019-08-21 at 11:58 +0200, Pablo Neira Ayuso wrote:
> On Tue, Aug 20, 2019 at 01:15:58PM -0300, Leonardo Br
On Wed, Aug 21, 2019 at 10:19:27AM +1000, Alastair D'Silva wrote:
> From: Alastair D'Silva
>
> The upstream commit:
> 22e9c88d486a ("powerpc/64: reuse PPC32 static inline flush_dcache_range()")
> has a similar effect, but since it is a rewrite of the assembler to C, is
> too invasive for stable.
On 8/26/19 08:54, Jorge Ramirez wrote:
> On 7/31/19 22:29, Jorge Ramirez-Ortiz wrote:
>> The following patchset enables CPU frequency scaling support on the
>> QCS404 (with dynamic voltage scaling).
>>
>> It is important to notice that this functionality will be superseded
>> by Core Power Reductio
On Wed, May 29, 2019 at 08:36:43PM +, Vineeth Remanan Pillai wrote:
> From: Peter Zijlstra
>
> Currently the pick_next_task() loop is convoluted and ugly because of
> how it can drop the rq->lock and needs to restart the picking.
>
> For the RT/Deadline classes, it is put_prev_task() where w
On Mon, Aug 26, 2019 at 01:18:49PM -0300, Arnaldo Carvalho de Melo wrote:
SNIP
> [perfbuilder@490c2c7bdaab ~]$ grep 'printf("lost'
> /tmp/build/perf/builtin-sched.i
> printf("lost %" "l" "ll""u" " events on cpu %d\n", event->lost.lost,
> sample->cpu);
> [perfbuilder@490c2c7bdaab ~]$
>
> And i
On Mon, Aug 26, 2019 at 09:19:31AM -0700, mark gross wrote:
> On Wed, May 29, 2019 at 08:36:37PM +, Vineeth Remanan Pillai wrote:
> > From: Peter Zijlstra
> >
> > Make sure the entire for loop has stop_cpus_in_progress set.
> It is not clear how this commit comment matches the change. Please
On Wed, May 29, 2019 at 08:36:44PM +, Vineeth Remanan Pillai wrote:
> From: Peter Zijlstra
>
> Avoid the RETRY_TASK case in the pick_next_task() slow path.
>
> By doing the put_prev_task() early, we get the rt/deadline pull done,
> and by testing rq->nr_running we know if we need newidle_bal
On Sat, Aug 24, 2019 at 5:48 AM Miguel Ojeda
wrote:
>
> On Sat, Aug 24, 2019 at 1:25 PM Will Deacon wrote:
> >
> > Which bit are you pinging about? This patch (12/16) has been in -next for a
> > while and is queued in the arm64 tree for 5.4. The Oops/boot issue is
> > addressed in patch 14 which
On Tue, Aug 27, 2019 at 12:00:07AM +0900, Suwan Kim wrote:
> There are bugs on vhci with usb 3.0 storage device. In USB, each SG
> list entry buffer should be divisible by the bulk max packet size.
> But with native SG support, this problem doesn't matter because the
> SG buffer is treated as conti
On Mon, Aug 26, 2019 at 12:55 PM Michal Hocko wrote:
>
> On Fri 23-08-19 00:17:22, Pankaj Suryawanshi wrote:
> > On Thu, Aug 22, 2019 at 6:32 PM Michal Hocko wrote:
> > >
> > > On Wed 21-08-19 22:58:03, Pankaj Suryawanshi wrote:
> > > > Hello,
> > > >
> > > > Hard time to understand cma allocatio
On Mon, 26 Aug 2019 17:41:40 +0200,
Scott Branden wrote:
>
> HI Takashi,
>
> On 2019-08-26 8:20 a.m., Takashi Iwai wrote:
> > On Fri, 23 Aug 2019 21:44:42 +0200,
> > Scott Branden wrote:
> >> Hi Takashi,
> >>
> >> Thanks for review. comments below.
> >>
> >> On 2019-08-23 3:05 a.m., Takashi Iwai
Hello,
syzbot found the following crash on:
HEAD commit:9733a7c6 Add linux-next specific files for 20190823
git tree: linux-next
console output: https://syzkaller.appspot.com/x/log.txt?x=143ec11e60
kernel config: https://syzkaller.appspot.com/x/.config?x=f6c78a1438582bd1
dashboard
On Wed, May 29, 2019 at 08:36:45PM +, Vineeth Remanan Pillai wrote:
> From: Peter Zijlstra
>
> Because sched_class::pick_next_task() also implies
> sched_class::set_next_task() (and possibly put_prev_task() and
> newidle_balance) it is not state invariant. This makes it unsuitable
> for remot
+ /* ESS Sabre based USB DACs */
+ case USB_ID(0xc502, 0x0051): /* Hiby R3 */
+ if (fp->altsetting == 4)
+ return SNDRV_PCM_FMTBIT_DSD_U32_BE;
+ break;
Do you know who's vendor id is this? ESS Sabre is a DAC chip with I2S
input, I'm
Hi Takashi,
On 2019-08-26 10:12 a.m., Takashi Iwai wrote:
On Mon, 26 Aug 2019 17:41:40 +0200,
Scott Branden wrote:
HI Takashi,
On 2019-08-26 8:20 a.m., Takashi Iwai wrote:
On Fri, 23 Aug 2019 21:44:42 +0200,
Scott Branden wrote:
Hi Takashi,
Thanks for review. comments below.
On 2019-08-23
Tested-by: Yabin Cui
On 8/26/19 8:11 AM, Vlastimil Babka wrote:
On 7/20/19 1:32 AM, Ralph Campbell wrote:
When CONFIG_MIGRATE_VMA_HELPER is enabled, migrate_vma() calls
migrate_vma_collect() which initializes a struct mm_walk but
didn't initialize mm_walk.pud_entry. (Found by code inspection)
Use a C structure ini
On Sat, Aug 24, 2019 at 7:12 AM Paul Burton wrote:
>
> Hi Nick,
>
> On Fri, Aug 23, 2019 at 10:16:04AM -0700, Nick Desaulniers wrote:
> > On Tue, Aug 20, 2019 at 10:15 AM Nick Desaulniers
> > wrote:
> > > Hi Paul,
> > > Bumping this thread; we'd really like to be able to boot test another
> > > I
With clock parent data scheme we must specify the parent clocks for the
rpmhcc nodes. So describe the parent clock for rpmhcc in the bindings.
Signed-off-by: Vinod Koul
Reviewed-by: Bjorn Andersson
---
Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt | 3 +++
1 file changed, 3 insertio
Document the SM8150 rpmh-clock compatible for rpmh clock controller
found on SM8150 platforms.
Signed-off-by: Vinod Koul
Reviewed-by: Bjorn Andersson
---
Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentatio
Add support for rpm clock controller found in SM8150 and while at it update
the driver to support parent data clock scheme as suggested by Stephen.
Changes since v4:
- Fix the .fw_name as xo instead of xo_board (v4 erroneously did for
.name)
Changes since v3:
- Make clock parent name as xo i
Convert the rpmh clock driver to use the new parent data scheme by
specifying the parent data for board clock.
Signed-off-by: Vinod Koul
---
drivers/clk/qcom/clk-rpmh.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/c
Add support for rpmh clocks found in SM8150
Signed-off-by: Vinod Koul
Reviewed-by: Bjorn Andersson
---
drivers/clk/qcom/clk-rpmh.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
index 35d55aee6a01..4969
Valentin Schneider writes:
> On 23/08/2019 21:00, bseg...@google.com wrote:
> [...]
>> Could you mention in the message that this a throttled cfs_rq can have
>> account_cfs_rq_runtime called on it because it is throttled before
>> idle_balance, and the idle_balance calls update_rq_clock to add ti
On Tue, Aug 20, 2019 at 06:37:22PM +0200, Piergiorgio Sartor wrote:
> On Tue, Aug 20, 2019 at 09:23:26AM +0200, Christoph Hellwig wrote:
> > On Mon, Aug 19, 2019 at 10:14:25AM -0400, Alan Stern wrote:
> > > Let's bring this to the attention of some more people.
> > >
> > > It looks like the bug th
In order to keep PCI info simple and neat, this patch series have
introduced a 3 hierarchy of struct. First layer will be the
intel_mgbe_common_data struct which keeps all Intel common configuration.
Second layer will be xxx_common_data which keeps all the different Intel
microarchitecture, e.g tgl
Added EHL SGMII 1Gbps PCI ID. Different MII and speed will have
different PCI ID.
Signed-off-by: Voon Weifeng
Signed-off-by: Ong Boon Leong
---
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 107 +++
1 file changed, 107 insertions(+)
diff --git a/drivers/net/ethernet/st
EHL DW EQOS is running on a 200MHz clock. Setting up stmmac-clk,
ptp clock and ptp_max_adj to 200MHz.
Signed-off-by: Voon Weifeng
Signed-off-by: Ong Boon Leong
---
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 21 +
drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c | 3
Added TGL SGMII 1Gbps PCI ID. Different MII and speed will have
different PCI ID.
Signed-off-by: Voon Weifeng
Signed-off-by: Ong Boon Leong
---
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 29
1 file changed, 29 insertions(+)
diff --git a/drivers/net/ethernet/stm
Added EHL RGMII 1Gbps PCI ID. Different MII and speed will have
different PCI ID.
Signed-off-by: Voon Weifeng
Signed-off-by: Ong Boon Leong
---
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmm
On 22-08-19, 22:35, Vinod Koul wrote:
> Since rphmcc expects the parent clock name as 'xo_board', update the
> parent clock name.
>
> Signed-off-by: Vinod Koul
> ---
> arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/d
On Mon, Aug 26, 2019 at 1:18 AM Seunghun Han wrote:
> To support AMD's fTPM, I removed the busy bit from the ACPI NVS area like
> the reserved area so that AMD's fTPM regions could be assigned in it.
drivers/acpi/nvs.c saves and restores the contents of NVS regions, and
if other drivers use these
RPM clock controller has parent as xo, so specify that in DT node for
rpmhcc
Signed-off-by: Vinod Koul
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 9be6acb0650e..f
From: "Chuah, Kim Tatt"
DW EQoS v5.xx controllers added capability for interrupt generation
when MDIO interface is done (GMII Busy bit is cleared).
This patch adds support for this interrupt on supported HW to avoid
polling on GMII Busy bit.
stmmac_mdio_read() & stmmac_mdio_write() will sleep un
On Mon, 2019-08-26 at 09:29 -0700, Paul E. McKenney wrote:
> On Mon, Aug 26, 2019 at 05:25:23PM +0200, Sebastian Andrzej Siewior wrote:
> > On 2019-08-23 23:10:14 [-0400], Joel Fernandes wrote:
> > > On Fri, Aug 23, 2019 at 02:28:46PM -0500, Scott Wood wrote:
> > > > On Fri, 2019-08-23 at 18:20 +02
From: Ong Boon Leong
Make mdiobus_scan() to try harder to look for any PHY that only talks C45.
Signed-off-by: Ong Boon Leong
Signed-off-by: Voon Weifeng
diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c
index bd04fe762056..30dbc48b4c7e 100644
--- a/drivers/net/phy/mdio_bus
>
> >
> > All those are already merged, after long reviewing phases and lots of
> > testing, right?
>
> Right. These changes now constitute parts of the Linux kernel source tree.
Might be better to focus on future areas that haven't been merged yet.
-Andi
On Sat, Aug 24, 2019 at 12:12 PM Shawn Guo wrote:
>
> On Mon, Aug 19, 2019 at 08:19:52PM -0700, Andrey Smirnov wrote:
> > Drop redundant I2C properties that are already specified in
> > vf610-zii-dev.dtsi
> >
> > Signed-off-by: Andrey Smirnov
> > Cc: Shawn Guo
> > Cc: Chris Healy
> > Cc: Fabio
On Sat, Aug 24, 2019 at 12:09 PM Shawn Guo wrote:
>
> On Mon, Aug 19, 2019 at 08:13:01PM -0700, Andrey Smirnov wrote:
> > LPUART driver does not support specifying "rs485-rts-delay"
> > property. Drop it.
>
> If so, we need to fix bindings/serial/fsl-lpuart.txt in the meantime?
>
Yeah, good point
> On Aug 21, 2019, at 1:30 AM, David Hildenbrand wrote:
>
> On 20.08.19 18:01, Nadav Amit wrote:
>> The compaction code already marks pages as offline when it enqueues
>> pages in the ballooned page list, and removes the mapping when the pages
>> are removed from the list. VMware balloon also upd
From: Marcus Cooper
Hi All,
here is a patch series to add some improvements to the sun4i-i2s driver
which is enough to get HDMI audio working on the A83T, A64, H3 and
H5 platforms.
I've dropped a lot of the functionality that was presented earlier in favour
of getting initial HDMI audio deliver
From: Marcus Cooper
The regmap configuration is set up for the legacy block on the
A83T whereas it uses the new block with a larger register map.
Fixes: 21faaea1343f ("ASoC: sun4i-i2s: Add support for A83T")
Signed-off-by: Marcus Cooper
---
sound/soc/sunxi/sun4i-i2s.c | 2 +-
1 file changed, 1
From: Marcus Cooper
Some codecs such as i2s based HDMI audio and the Pine64 DAC require
a different amount of bit clocks per frame than what is calculated
by the sample width. Use the values obtained by the tdm slot bindings
to adjust the LRCLK width accordingly.
Signed-off-by: Marcus Cooper
--
From: Marcus Cooper
On the newer SoCs such as the H3 and A64 this is set by default
to transfer a 0 after each sample in each slot. However the A10
and A20 SoCs that this driver was developed on had a default
setting where it padded the audio gain with zeros.
This isn't a problem whilst we have
On Sat, Aug 24, 2019 at 11:31 AM Shawn Guo wrote:
>
> On Thu, Aug 22, 2019 at 05:33:13PM +, Leonard Crestez wrote:
> > On 31.07.2019 21:01, Andrey Smirnov wrote:
> > > With commit b5bbe2235361 ("usb: phy: mxs: Disable external charger
> > > detect in mxs_phy_hw_init()") in tree all of the nece
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: bae3a8d3308ee69a7dbdf145911b18dfda8ade0d
Gitweb:
https://git.kernel.org/tip/bae3a8d3308ee69a7dbdf145911b18dfda8ade0d
Author:Bandan Das
AuthorDate:Mon, 26 Aug 2019 06:15:12 -04:00
Committer:
The following commit has been merged into the x86/urgent branch of tip:
Commit-ID: 558682b5291937a70748d36fd9ba757fb25b99ae
Gitweb:
https://git.kernel.org/tip/558682b5291937a70748d36fd9ba757fb25b99ae
Author:Bandan Das
AuthorDate:Mon, 26 Aug 2019 06:15:13 -04:00
Committer:
On Mon, Aug 26, 2019 at 12:49:22PM -0500, Scott Wood wrote:
> On Mon, 2019-08-26 at 09:29 -0700, Paul E. McKenney wrote:
> > On Mon, Aug 26, 2019 at 05:25:23PM +0200, Sebastian Andrzej Siewior wrote:
> > > On 2019-08-23 23:10:14 [-0400], Joel Fernandes wrote:
> > > > On Fri, Aug 23, 2019 at 02:28:4
Den man. 26. aug. 2019 kl. 15.20 skrev Guenter Roeck :
>
> On 8/26/19 1:12 AM, Yuehaibing wrote:
> >
> >
> > On 2019/8/23 22:05, Alexandre Belloni wrote:
> >> On 23/08/2019 20:45:53+0800, YueHaibing wrote:
> >>> If WATCHDOG_CORE is not set, build fails:
> >>>
> >>> drivers/rtc/rtc-pcf2127.o: In fun
On Mon, 26 Aug 2019, Frederic Weisbecker wrote:
> On Wed, Aug 21, 2019 at 09:09:15PM +0200, Thomas Gleixner wrote:
> > /**
> > - * task_cputimers_expired - Compare two task_cputime entities.
> > + * task_cputimers_expired - Check whether posix CPU timers are expired
> > *
> > * @samples:
Len Brown has not been active in this part since around 2010 and
confirmed that he is not maintaining this part of the kernel sources
anymore and the git log suggests that nobody is actively maintaining it.
The referenced git tree does not exist. Instead, I found an sfi branch
in Len's kernel git
Now that the abused struct task_cputime is gone, it's more natural to
bundle the expiry cache and the list head of each clock into a struct and
have an array of those structs.
Follow the hrtimer naming convention of 'bases' and rename the expiry cache
to 'nextevt' and adapt all usage sites.
Gener
Hi Stephen,
Thank you for the notification.
On 8/25/19 11:19 PM, Stephen Rothwell wrote:
> Hi all,
>
> In commit
>
> 3f5381c2ba60 ("leds: lm3532: Fixes for the driver for stability")
>
> Fixes tag
>
> Fixes: e37a7f8d77e1 ("leds: lm3532: Introduce the lm3532 LED driver")
>
> has these pro
On 8/26/19 6:52 PM, Voon Weifeng wrote:
> From: Ong Boon Leong
>
> Make mdiobus_scan() to try harder to look for any PHY that only talks C45.
If you are not using Device Tree or ACPI, and you are letting the MDIO
bus be scanned, it sounds like there should be a way for you to provide
a hint as to
Hi Jernej,
On Thu, 22 Aug 2019 21:44:57 +0200
Jernej Skrabec wrote:
> When codec supports multiple slices in one frame, VPU has to know when
> first slice of each frame is being processed, presumably to correctly
> clear/set data in auxiliary buffers.
>
> Add first_slice field to cedrus_run str
On Thu, 22 Aug 2019 21:44:54 +0200
Jernej Skrabec wrote:
> From: Hans Verkuil
>
> Add this new V4L2_DEC_CMD_FLUSH decoder command and document it.
>
> Signed-off-by: Hans Verkuil
> Signed-off-by: Jernej Skrabec
Reviewed-by: Boris Brezillon
> ---
> Documentation/media/uapi/v4l/vidioc-deco
On Thu, 22 Aug 2019 21:44:59 +0200
Jernej Skrabec wrote:
> When frame contains multiple slices and driver works in slice mode, it's
> more efficient to hold capture buffer in queue until all slices of a
> same frame are decoded.
>
> Add support for that to Cedrus driver by exposing and implement
On Fri, Aug 23, 2019 at 12:58:09PM -0700, Florian Fainelli wrote:
> On 8/16/19 3:39 PM, Doug Anderson wrote:
> > Hi,
> >
> > On Fri, Aug 16, 2019 at 3:12 PM Florian Fainelli
> > wrote:
> >>
> >> On 8/16/19 2:27 PM, Matthias Kaehlcke wrote:
> >>> On Fri, Aug 16, 2019 at 10:13:42PM +0200, Pavel Ma
On Mon, Aug 26, 2019 at 08:13:35PM +0200, Bruno Thomsen wrote:
> Den man. 26. aug. 2019 kl. 15.20 skrev Guenter Roeck :
> >
> > On 8/26/19 1:12 AM, Yuehaibing wrote:
> > >
> > >
> > > On 2019/8/23 22:05, Alexandre Belloni wrote:
> > >> On 23/08/2019 20:45:53+0800, YueHaibing wrote:
> > >>> If WATCH
On Tue, Aug 27, 2019 at 09:45:20AM +0800, Voon Weifeng wrote:
> From: "Chuah, Kim Tatt"
>
> DW EQoS v5.xx controllers added capability for interrupt generation
> when MDIO interface is done (GMII Busy bit is cleared).
> This patch adds support for this interrupt on supported HW to avoid
> polling
Dne ponedeljek, 26. avgust 2019 ob 20:28:31 CEST je Boris Brezillon
napisal(a):
> Hi Jernej,
>
> On Thu, 22 Aug 2019 21:44:57 +0200
>
> Jernej Skrabec wrote:
> > When codec supports multiple slices in one frame, VPU has to know when
> > first slice of each frame is being processed, presumably t
> Can I add your Tested-by ?
Yes. I just sent a tested-by reply, but not sure if it works. I am not very
familar
with linux kernel review system.
On Mon, Aug 26, 2019 at 11:27:53AM -0700, Florian Fainelli wrote:
> On 8/26/19 6:52 PM, Voon Weifeng wrote:
> > From: Ong Boon Leong
> >
> > Make mdiobus_scan() to try harder to look for any PHY that only talks C45.
> If you are not using Device Tree or ACPI, and you are letting the MDIO
> bus be
+title: SoundWire Controller Generic Binding
+
+maintainers:
+ - Srinivas Kandagatla
+
+description: |
+ SoundWire busses can be described with a node for the SoundWire
controller
+ device and a set of child nodes for each SoundWire slave on the
bus.
+
+properties:
+ $nodename:
+ pat
On Thu, 22 Aug 2019 21:45:00 +0200
Jernej Skrabec wrote:
> This command is useful for explicitly flushing last decoded frame.
>
> Signed-off-by: Jernej Skrabec
Reviewed-by: Boris Brezillon
> ---
> .../staging/media/sunxi/cedrus/cedrus_video.c | 34 +++
> 1 file changed, 34 i
Alex,
On 8/19/2019 4:49 AM, Alexander Graf wrote:
>
>
> On 15.08.19 18:25, Suthikulpanit, Suravee wrote:
>> Currently, after a VM boots with APICv enabled, it could go into
>> the following states:
>> * activated = VM is running w/ APICv
>> * deactivated = VM deactivate APICv (temporary)
The l1tf_vmx_mitigation is only set to VMENTER_L1D_FLUSH_NOT_REQUIRED
when the ARCH_CAPABILITIES MSR indicates that L1D flush is not required.
However, if the CPU is not affected by L1TF, l1tf_vmx_mitigation will
still be set to VMENTER_L1D_FLUSH_AUTO. This is certainly not the best
option for a !X
Hi Christoph
thanks for the review.
On 8/26/19 4:34 PM, Christoph Hellwig wrote:
On Fri, Aug 23, 2019 at 12:57:13PM +0100, Cristian Marussi wrote:
An architecture willing to rely on this SMP common logic has to define its
own helpers and set CONFIG_ARCH_USE_COMMON_SMP_STOP=y.
The series wire t
Dan,
On 8/26/19 4:53 PM, Dan Murphy wrote:
> Jacek
>
> On 8/24/19 10:18 AM, Jacek Anaszewski wrote:
>> Hi Dan,
>>
>> Thank you for the patch.
>>
>> On 8/23/19 9:55 PM, Dan Murphy wrote:
>>> Fix the coccinelle issues found in the TI LMU common code
>>>
>>> drivers/leds/leds-ti-lmu-common.c:97:20-2
This patch series provides code that works as a debug option through
debugfs to provide additional controls to limit how much information
gets printed when an OOM event occurs and or optionally print additional
information about slab usage, vmalloc allocations, user process memory
usage, the number
OOM Debug code to control/limit information and to provide additional
information that is printed when an OOM event occurs.
Code is provided to provide some additional information as well as to
selectively limit the amount of information produced by an OOM event.
Additional information printed at
601 - 700 of 971 matches
Mail list logo
