Re: [PATCH v4 2/7] x86: kvm: svm: propagate errors from skip_emulated_instruction()

Sean Christopherson writes: > On Wed, Aug 14, 2019 at 11:34:52AM +0200, Vitaly Kuznetsov wrote: >> Sean Christopherson writes: >> >> > x86_emulate_instruction() doesn't set vcpu->run->exit_reason when emulation >> > fails with EMULTYPE_SKIP, i.e. this will exit to userspace with garbage in >> >

[PATCH -next] ASoC: cs42l56: remove unused variable 'adc_swap_enum'

sound/soc/codecs/cs42l56.c:206:30: warning: adc_swap_enum defined but not used [-Wunused-const-variable=] It is never used, so can be removed. Reported-by: Hulk Robot Signed-off-by: YueHaibing --- sound/soc/codecs/cs42l56.c | 8 1 file changed, 8 deletions(-) diff --git a/sound/soc/

[tip:perf/core] tools build: Add capability-related feature detection

Commit-ID: 74d5f3d06f707eb5f7e1908ad88954bde02000ce Gitweb: https://git.kernel.org/tip/74d5f3d06f707eb5f7e1908ad88954bde02000ce Author: Igor Lubashev AuthorDate: Wed, 7 Aug 2019 10:44:14 -0400 Committer: Arnaldo Carvalho de Melo CommitDate: Mon, 12 Aug 2019 17:14:14 -0300 tools build:

Re: [PATCH] virtio-net: lower min ring num_free for efficiency

On 2019/8/15 下午4:36, 冉 jiang wrote: On 2019/8/15 11:17, Jason Wang wrote: On 2019/8/15 上午11:11, 冉 jiang wrote: On 2019/8/15 11:01, Jason Wang wrote: On 2019/8/14 上午10:06, ? jiang wrote: This change lowers ring buffer reclaim threshold from 1/2*queue to budget for better performance. Accordi

[tip:perf/core] perf tools: Add helpers to use capabilities if present

Commit-ID: c22e150e3afa6f8db2300bd510e4ac26bbee1bf3 Gitweb: https://git.kernel.org/tip/c22e150e3afa6f8db2300bd510e4ac26bbee1bf3 Author: Igor Lubashev AuthorDate: Wed, 7 Aug 2019 10:44:14 -0400 Committer: Arnaldo Carvalho de Melo CommitDate: Wed, 14 Aug 2019 10:48:39 -0300 perf tools: A

Re: [PATCH 7/8] parisc: don't set ARCH_NO_COHERENT_DMA_MMAP

On Thu, 2019-08-08 at 19:00 +0300, Christoph Hellwig wrote: > parisc is the only architecture that sets ARCH_NO_COHERENT_DMA_MMAP > when an MMU is enabled. AFAIK this is because parisc CPUs use VIVT > caches, We're actually VIPT but the same principle applies. > which means exporting normally c

[tip:perf/core] perf tools: Add NO_LIBCAP=1 to the minimal build test

Commit-ID: 97993bd6eb89bf08649c01d4d57453feca4314f8 Gitweb: https://git.kernel.org/tip/97993bd6eb89bf08649c01d4d57453feca4314f8 Author: Arnaldo Carvalho de Melo AuthorDate: Mon, 12 Aug 2019 16:43:08 -0300 Committer: Arnaldo Carvalho de Melo CommitDate: Wed, 14 Aug 2019 10:59:59 -0300 p

[PATCH -next] ASoC: 88pm860x: remove unused variables 'pcm_switch_controls' and 'aif1_mux'

sound/soc/codecs/88pm860x-codec.c:533:38: warning: pcm_switch_controls defined but not used [-Wunused-const-variable=] sound/soc/codecs/88pm860x-codec.c:560:38: warning: aif1_mux defined but not used [-Wunused-const-variable=] They are never used, so can be removed. Reported-by: Hulk Robot Sig

[tip:perf/core] perf tools: Add CAP_SYSLOG define for older systems

Commit-ID: 083c1359b0e03867a8c7effd21d4c0be3639f336 Gitweb: https://git.kernel.org/tip/083c1359b0e03867a8c7effd21d4c0be3639f336 Author: Arnaldo Carvalho de Melo AuthorDate: Tue, 13 Aug 2019 11:38:19 -0300 Committer: Arnaldo Carvalho de Melo CommitDate: Wed, 14 Aug 2019 10:59:59 -0300 p

[tip:perf/core] perf record: Add an option to take an AUX snapshot on exit

Commit-ID: ce7b0e426ef359ee1d4a6126314ee3547a8eed87 Gitweb: https://git.kernel.org/tip/ce7b0e426ef359ee1d4a6126314ee3547a8eed87 Author: Alexander Shishkin AuthorDate: Tue, 6 Aug 2019 17:41:01 +0300 Committer: Arnaldo Carvalho de Melo CommitDate: Wed, 14 Aug 2019 10:59:59 -0300 perf rec

[tip:perf/core] perf ftrace: Use CAP_SYS_ADMIN instead of euid==0

Commit-ID: c766f3df635de14295e410c6dd5410bc416c24a0 Gitweb: https://git.kernel.org/tip/c766f3df635de14295e410c6dd5410bc416c24a0 Author: Igor Lubashev AuthorDate: Wed, 7 Aug 2019 10:44:17 -0400 Committer: Arnaldo Carvalho de Melo CommitDate: Wed, 14 Aug 2019 10:59:59 -0300 perf ftrace:

[tip:perf/core] perf tools: Add aux_output attribute flag

Commit-ID: 5a4b58e5d64ac7ebca175ffd8d74ca1b5cb0a01f Gitweb: https://git.kernel.org/tip/5a4b58e5d64ac7ebca175ffd8d74ca1b5cb0a01f Author: Adrian Hunter AuthorDate: Tue, 6 Aug 2019 11:46:02 +0300 Committer: Arnaldo Carvalho de Melo CommitDate: Wed, 14 Aug 2019 10:59:59 -0300 perf tools: A

[tip:perf/core] perf ftrace: Improve error message about capability to use ftrace

Commit-ID: 73e5de70dca00344cb48e018131a4cadec0fabf0 Gitweb: https://git.kernel.org/tip/73e5de70dca00344cb48e018131a4cadec0fabf0 Author: Arnaldo Carvalho de Melo AuthorDate: Mon, 12 Aug 2019 17:27:11 -0300 Committer: Arnaldo Carvalho de Melo CommitDate: Wed, 14 Aug 2019 10:59:59 -0300 p

[tip:perf/core] perf intel-pt: Process options for PEBS event synthesis

Commit-ID: 9e64cefe4335b0f2799956d3f3cca8bb652d950f Gitweb: https://git.kernel.org/tip/9e64cefe4335b0f2799956d3f3cca8bb652d950f Author: Adrian Hunter AuthorDate: Tue, 6 Aug 2019 11:46:04 +0300 Committer: Arnaldo Carvalho de Melo CommitDate: Wed, 14 Aug 2019 10:59:59 -0300 perf intel-pt

Re: [PATCH v4 2/2] RISC-V: Implement sparsemem

Hi Logan, On Thu, Aug 15, 2019 at 6:21 AM Logan Gunthorpe wrote: > > Hey, > > On 2019-08-14 7:35 a.m., Greentime Hu wrote: > > How about this fix? Not sure if it is good for everyone. > > I applied your fix to the patch and it seems ok. But it doesn't seem to > work on a recent version of the ker

[tip:perf/core] perf tools: Add itrace option 'o' to synthesize aux-output events

Commit-ID: 181ebb5e23a5e480f6d6aa2816a9c4aaa65afa59 Gitweb: https://git.kernel.org/tip/181ebb5e23a5e480f6d6aa2816a9c4aaa65afa59 Author: Adrian Hunter AuthorDate: Tue, 6 Aug 2019 11:46:03 +0300 Committer: Arnaldo Carvalho de Melo CommitDate: Wed, 14 Aug 2019 10:59:59 -0300 perf tools: A

[tip:perf/core] perf tools: Add aux-output config term

Commit-ID: 1b9921546a9641aefc4a52c1c635b96b67142993 Gitweb: https://git.kernel.org/tip/1b9921546a9641aefc4a52c1c635b96b67142993 Author: Adrian Hunter AuthorDate: Tue, 6 Aug 2019 11:46:05 +0300 Committer: Arnaldo Carvalho de Melo CommitDate: Wed, 14 Aug 2019 10:59:59 -0300 perf tools: A

Re: [PATCH v2] pciehp: fix a race between pciehp and removing operations by sysfs

On 2019/8/11 16:07, Lukas Wunner wrote: > On Mon, Aug 05, 2019 at 08:32:58PM +0800, Xiongfeng Wang wrote: >> When we remove a slot by sysfs. >> 'pci_stop_and_remove_bus_device_locked()' will be called. This function >> will get the global mutex lock 'pci_rescan_remove_lock', and remove the >> sl

[tip:perf/core] perf intel-pt: Add brief documentation for PEBS via Intel PT

Commit-ID: 243384dd25c8ea721c5c82a229eaf33cbd1bfd52 Gitweb: https://git.kernel.org/tip/243384dd25c8ea721c5c82a229eaf33cbd1bfd52 Author: Adrian Hunter AuthorDate: Tue, 6 Aug 2019 11:46:06 +0300 Committer: Arnaldo Carvalho de Melo CommitDate: Wed, 14 Aug 2019 10:59:59 -0300 perf intel-pt

Re: [PATCH v3 2/2] pwm: sprd: Add Spreadtrum PWM support

On Thu, 15 Aug 2019 at 16:54, Uwe Kleine-König wrote: > > Hello Baolin, > > On Thu, Aug 15, 2019 at 04:16:32PM +0800, Baolin Wang wrote: > > On Thu, 15 Aug 2019 at 14:15, Uwe Kleine-König > > wrote: > > > On Thu, Aug 15, 2019 at 11:34:27AM +0800, Baolin Wang wrote: > > > > On Wed, 14 Aug 2019 at

[tip:perf/core] perf evsel: Provide meaningful warning when trying to use 'aux_output' on older kernels

Commit-ID: acb9f2d4755a70e31343f99791aa43b05401b996 Gitweb: https://git.kernel.org/tip/acb9f2d4755a70e31343f99791aa43b05401b996 Author: Arnaldo Carvalho de Melo AuthorDate: Tue, 13 Aug 2019 11:06:38 -0300 Committer: Arnaldo Carvalho de Melo CommitDate: Wed, 14 Aug 2019 10:59:59 -0300 p

[tip:perf/core] perf.data documentation: Clarify HEADER_SAMPLE_TOPOLOGY format

Commit-ID: 3143906c2770778d89b730e0342b745d1b4a8303 Gitweb: https://git.kernel.org/tip/3143906c2770778d89b730e0342b745d1b4a8303 Author: Vince Weaver AuthorDate: Thu, 1 Aug 2019 14:30:43 -0400 Committer: Arnaldo Carvalho de Melo CommitDate: Wed, 14 Aug 2019 10:59:59 -0300 perf.data docu

[tip:perf/core] tools: Keep list of tools in alphabetical order

Commit-ID: 38fe26b46f55538c2cb8b96500caed6ae9d59d46 Gitweb: https://git.kernel.org/tip/38fe26b46f55538c2cb8b96500caed6ae9d59d46 Author: Andy Shevchenko AuthorDate: Fri, 28 Jun 2019 20:22:09 +0300 Committer: Arnaldo Carvalho de Melo CommitDate: Wed, 14 Aug 2019 10:59:59 -0300 tools: Kee

[tip:perf/core] perf ui: No need to set ui_browser to 1 twice

Commit-ID: 1cd8fa288eb83c1fe0dfa492b09d228a8d802fbf Gitweb: https://git.kernel.org/tip/1cd8fa288eb83c1fe0dfa492b09d228a8d802fbf Author: Arnaldo Carvalho de Melo AuthorDate: Tue, 13 Aug 2019 12:07:14 -0300 Committer: Arnaldo Carvalho de Melo CommitDate: Wed, 14 Aug 2019 11:00:00 -0300 p

[tip:perf/core] perf record: Support aarch64 random socket_id assignment

Commit-ID: 0a4d8fb229dd78f9e0752817339e19e903b37a60 Gitweb: https://git.kernel.org/tip/0a4d8fb229dd78f9e0752817339e19e903b37a60 Author: Tan Xiaojun AuthorDate: Fri, 2 Aug 2019 11:48:57 +0800 Committer: Arnaldo Carvalho de Melo CommitDate: Wed, 14 Aug 2019 11:00:00 -0300 perf record: Su

Re: [PATCH 08/16] mips: prefer __section from compiler_attributes.h

Hi Nick, On Mon, Aug 12, 2019 at 02:50:41PM -0700, Nick Desaulniers wrote: > Reported-by: Sedat Dilek > Suggested-by: Josh Poimboeuf > Signed-off-by: Nick Desaulniers It would be good to add a commit message, even if it's just a line repeating the subject & preferably describing the motivation

[PATCH 0/3] x86: cpu: Add new Airmont CPU model

Intel Atom CPU based Lightning Mountain(LGM) network processor SoC has recently taped out. Although the Atom CPU used in LGM is based upon Airmont uArch but it has a few differences. Its a new variant of Atom Airmont cpu model. This series of patches adds support for this new CPU model. Patches a

[PATCH 1/3] x86: cpu: Use constant definitions for CPU type

This patch replaces direct values usage with constant definitions usage when access CPU models. Signed-off-by: Rahul Tanwar Suggested-by: Andy Shevchenko --- arch/x86/kernel/cpu/intel.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/cpu/intel.c b/arch/

[PATCH 3/3] x86: arch: Add arch support for new Intel Atom CPU

This patch adds basic arch support for a new variant of Intel Atom CPU model used in a network processor SoC named Lightning Mountain. Signed-off-by: Rahul Tanwar --- arch/x86/kernel/cpu/common.c | 1 + arch/x86/kernel/cpu/intel.c | 1 + arch/x86/kernel/tsc_msr.c| 5 + 3 files changed,

[PATCH 2/3] x86: cpu: Add new Intel Atom CPU type

This patch adds a new variant of Intel Atom Airmont CPU model used in a network processor SoC named Lightning Mountain. Signed-off-by: Rahul Tanwar --- arch/x86/include/asm/intel-family.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/

Hi dear,

Hi dear, I'm Jessica Vail, from the United States,please i wish to have a communication with you. I am waiting for your answer, Jessica Vail,

Re: [PATCH v2] virtio-net: lower min ring num_free for efficiency

On 2019/8/15 下午5:42, ? jiang wrote: This change lowers ring buffer reclaim threshold from 1/2*queue to budget for better performance. According to our test with qemu + dpdk, packet dropping happens when the guest is not able to provide free buffer in avail ring timely with default 1/2*queue. Th

[PATCH v3] lsilogic mpt fusion: mptctl: Fixed race condition around mptctl_id variable using mutexes

Certain functions in the driver, such as mptctl_do_fw_download() and mptctl_do_mpt_command(), rely on the instance of mptctl_id, which does the id-ing. There is race condition possible when these functions operate in concurrency. Via, mutexes, the functions are mutually signalled to cooperate. Cha

[PATCH v2 1/3] perf map: use zalloc for map_groups

In the next commit we will add new fields to map_groups and we need these to be null if no value is assigned. The simplest way to achieve this is to request zeroed memory from the allocator. Signed-off-by: John Keeping --- Unchanged in v2 --- tools/perf/util/map.c | 2 +- 1 file changed, 1 inse

[PATCH v2 2/3] perf unwind: fix libunwind when tid != pid

Commit e5adfc3e7e77 ("perf map: Synthesize maps only for thread group leader") changed the recording side so that we no longer get mmap events for threads other than the thread group leader (when synthesising these events for threads which exist before perf is started). When a file recorded after

Re: [PATCH -next] mm/kmemleak: record the current memory pool size

On Wed, Aug 14, 2019 at 03:07:11PM -0400, Qian Cai wrote: > The only way to obtain the current memory pool size for a running kernel > is to check back the kernel config file which is inconvenient. Record it > in the kernel messages. > > Signed-off-by: Qian Cai > --- > mm/kmemleak.c | 3 ++- > 1

[PATCH v2 3/3] perf unwind: remove unnecessary test

If dwarf_callchain_users is false, then unwind__prepare_access() will not set unwind_libunwind_ops so the remaining test here is sufficient. Signed-off-by: John Keeping --- v2: new patch split out from patch 2 --- tools/perf/util/unwind-libunwind.c | 6 -- 1 file changed, 6 deletions(-) dif

Re: [PATCH -next] ASoC: wm8737: Fix copy-paste error in wm8737_snd_controls

On Thu, Aug 15, 2019 at 05:19:20PM +0800, YueHaibing wrote: > sound/soc/codecs/wm8737.c:112:29: warning: > high_3d defined but not used [-Wunused-const-variable=] > > 'high_3d' should be used for 3D High Cut-off. > > Reported-by: Hulk Robot > Fixes: 2a9ae13a2641 ("ASoC: Add initial WM8737 drive

linux-next: Fixes tag needs some work in the arm-soc tree

Hi all, In commit dbc3c6295195 ("ARM: ux500: add missing of_node_put()") Fixes tag Fixes: commit 18a992787896 ("ARM: ux500: move soc_id driver to drivers/soc") has these problem(s): - leading word 'commit' unexpected -- Cheers, Stephen Rothwell pgpaJVOoNoBOC.pgp Description: OpenPGP

Re: [PATCH v3 2/2] pwm: sprd: Add Spreadtrum PWM support

Hello, On Thu, Aug 15, 2019 at 05:34:02PM +0800, Baolin Wang wrote: > On Thu, 15 Aug 2019 at 16:54, Uwe Kleine-König > wrote: > > On Thu, Aug 15, 2019 at 04:16:32PM +0800, Baolin Wang wrote: > > > On Thu, 15 Aug 2019 at 14:15, Uwe Kleine-König > > > wrote: > > > > On Thu, Aug 15, 2019 at 11:34:2

Re: [PATCH v12 5/6] khugepaged: enable collapse pmd for pte-mapped THP

Hi Song, sorry, I forgot to reply to this email, On 08/13, Song Liu wrote: > > Do you have further comments for the version below? If not, could you > please reply with your Acked-by or Reviewed-by? I see nothing wrong in the last series, no objections from me. I don't think I can't ack the cha

static analysis bug report in drivers/staging/iio/dac/ad5380.c

Hi, Static analysis with Coverity Scan has detected a potential assignment bug in ad5380.c: 217case IIO_CHAN_INFO_CALIBBIAS: 218ret = regmap_read(st->regmap, AD5380_REG_OFFSET(chan->address), 219val); 220if (ret) 221

[v2 2/3] clk: ls1028a: Add clock driver for Display output interface

Add clock driver for QorIQ LS1028A Display output interfaces(LCD, DPHY), as implemented in TSMC CLN28HPM PLL, this PLL supports the programmable integer division and range of the display output pixel clock's 27-594MHz. Signed-off-by: Wen He --- change in v2: - replace OF archticure regist

[v2 3/3] arm64: dts: ls1028a: Add properties node for Display output pixel clock

The LS1028A has a clock domain PXLCLK0 used for the Display output interface in the display core, independent of the system bus frequency, for flexible clock design. This display core has its own pixel clock. This patch enable the pixel clock provider on the LS1028A. Signed-off-by: Wen He --- a

[v2 1/3] dt/bindings: clk: Add YAML schemas for LS1028A Display Clock bindings

LS1028A has a clock domain PXLCLK0 used for provide pixel clocks to Display output interface. Add a YAML schema for this. Signed-off-by: Wen He --- change in v2: - Convert bindings to YAML format .../devicetree/bindings/clock/fsl,plldig.yaml | 43 +++ 1 file changed, 43

Re: [PATCH v5 01/18] xfs: compat_ioctl: use compat_ptr()

On Thu, Aug 15, 2019 at 01:02:11AM -0700, Christoph Hellwig wrote: > In many ways I'd actually much rather have a table driven approach. > Let me try something.. Ok, it seems like we don't even need a table containing native and compat as we can just fall back. The tables still seem nicer to read

linux-next: Fixes tag needs some work in the scsi-mkp tree

Hi all, In commit cff1191553d9 ("scsi: qla2xxx: cleanup trace buffer initialization") Fixes tag Fixes: ad0a0b01f088 ("scsi: qla2xxx: Fix Firmware dump size for Extended has these problem(s): - Subject has leading but no trailing parentheses - Subject has leading but no trailing quotes

Re: [PATCH 1/3] x86: cpu: Use constant definitions for CPU type

Rahul, On Thu, 15 Aug 2019, Rahul Tanwar wrote: Please use the proper prefix for your patches. x86 uses x86/subsystem: not x86: subsystem: > This patch replaces direct values usage with constant definitions usage > when access CPU models. Please do not use 'This patch'. We already know that th

[PATCH v3] arm64: dts: ls1088a: fix gpio node

From: Song Hui Update the nodes to include little-endian property to be consistent with the hardware and add ls1088a gpio specify compatible. Signed-off-by: Song Hui --- Changes in v3: - delete the attribute of little-endian. Changes in v2: - update the subject. arch/a

Re: [PATCH v2] regulator: twl: voltage lists for vdd1/2 on twl4030

On Wed, Aug 14, 2019 at 5:18 PM Andreas Kemnade wrote: > > _opp_supported_by_regulators() wrongly ignored errors from > regulator_is_supported_voltage(), so it considered errors as > success. Since > commit 498209445124 ("regulator: core: simplify return value on > suported_voltage") > regulator_

Re: [PATCH] PCI: pci-hyperv: fix build errors on non-SYSFS config

On Fri, Jul 12, 2019 at 08:53:19AM -0700, Randy Dunlap wrote: > From: Randy Dunlap > > Fix build errors when building almost-allmodconfig but with SYSFS > not set (not enabled). Fixes these build errors: > > ERROR: "pci_destroy_slot" [drivers/pci/controller/pci-hyperv.ko] undefined! > ERROR: "p

[PATCH] staging: comedi: usbduxsigma: remove redundant assignment to variable fx2delay

From: Colin Ian King Variable fx2delay is being initialized with a value that is never read and fx2delay is being re-assigned a little later on. The assignment is redundant and hence can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King --- drivers/staging/comedi/d

INFO: task hung in tls_sw_release_resources_tx

Hello, syzbot found the following crash on: HEAD commit:6d5afe20 sctp: fix memleak in sctp_send_reset_streams git tree: net console output: https://syzkaller.appspot.com/x/log.txt?x=16e5536a60 kernel config: https://syzkaller.appspot.com/x/.config?x=a4c9e9f08e9e8960 dashboard link

Re: [PATCH 1/2] dt-bindings: arm: fsl: Add PHYTEC i.MX6 UL/ULL devicetree bindings

Hi Rob, On 13.08.19 18:04, Rob Herring wrote: On Wed, Jul 24, 2019 at 09:49:32AM +0200, Stefan Riedmueller wrote: Add devicetree bindings for i.MX6 UL/ULL based phyCORE-i.MX6 UL/ULL and phyBOARD-Segin. Signed-off-by: Stefan Riedmueller --- Documentation/devicetree/bindings/arm/fsl.yaml | 8

Re: [PATCH RESEND v8] PCI: imx6: limit DBI register length

On Fri, Jul 26, 2019 at 04:40:07PM +0200, Stefan Agner wrote: > Define the length of the DBI registers and limit config space to its > length. This makes sure that the kernel does not access registers > beyond that point, avoiding the following abort on a i.MX 6Quad: > # cat /sys/devices/soc0/soc

Re: [PATCH v4 08/21] ARM: dts: imx7-colibri: Add touch controllers

On Mon, Aug 12, 2019 at 5:23 PM Philippe Schenker wrote: > > Add touch controller that is connected over an I2C bus. > > Signed-off-by: Philippe Schenker > Acked-by: Marcel Ziswiler Reviewed-by: Oleksandr Suvorov > > --- > > Changes in v4: > - Add Marcel Ziswiler's Ack > > Changes in v3: > -

Re: [PATCH v4 13/21] ARM: dts: imx6-colibri: Add missing pinmuxing to Toradex eval board

On Mon, Aug 12, 2019 at 5:23 PM Philippe Schenker wrote: > > This patch adds some missing pinmuxing that is in the colibri > standard to the dts. > > Signed-off-by: Philippe Schenker > Acked-by: Marcel Ziswiler Reviewed-by: Oleksandr Suvorov > > --- > > Changes in v4: > - Add Marcel Ziswiler'

Re: [PATCH v4 19/21] ARM: dts: imx6ull-colibri: Add touchscreen used with Eval Board

On Mon, Aug 12, 2019 at 5:23 PM Philippe Schenker wrote: > > This adds the common touchscreen that is used with Toradex's > Eval Boards. > > Signed-off-by: Philippe Schenker Reviewed-by: Oleksandr Suvorov > > --- > > Changes in v4: None > Changes in v3: None > Changes in v2: > - Removed f0710a

Re: [PATCH v5 01/18] xfs: compat_ioctl: use compat_ptr()

On Thu, Aug 15, 2019 at 12:26 PM Christoph Hellwig wrote: > > On Thu, Aug 15, 2019 at 01:02:11AM -0700, Christoph Hellwig wrote: > > In many ways I'd actually much rather have a table driven approach. > > Let me try something.. > > Ok, it seems like we don't even need a table containing native and

Re: [PATCH v4 12/21] ARM: dts: imx6-apalis: Add touchscreens used on Toradex eval boards

On Mon, Aug 12, 2019 at 5:23 PM Philippe Schenker wrote: > > This commit adds the touchscreens from Toradex so one can enable it. > > Signed-off-by: Philippe Schenker > Acked-by: Marcel Ziswiler Reviewed-by: Oleksandr Suvorov > > --- > > Changes in v4: > - Add Marcel Ziswiler's Ack > > Change

Re: [PATCH v3 2/2] pwm: sprd: Add Spreadtrum PWM support

On Thu, 15 Aug 2019 at 18:11, Uwe Kleine-König wrote: > > Hello, > > On Thu, Aug 15, 2019 at 05:34:02PM +0800, Baolin Wang wrote: > > On Thu, 15 Aug 2019 at 16:54, Uwe Kleine-König > > wrote: > > > On Thu, Aug 15, 2019 at 04:16:32PM +0800, Baolin Wang wrote: > > > > On Thu, 15 Aug 2019 at 14:15,

Re: [PATCH V6 2/3] mmc: sdhci: Modify get CD status function

On 9/08/19 8:38 PM, Shirley Her (SC) wrote: > Modify get CD status function Please change the subject to: mmc: sdhci-pci-o2micro: Move functions in preparation to fix DLL lock phase shift issue Please change the commit message accordingly. Also this patch should not make any changes except mov

Re: [PATCH V6 1/3] mmc: sdhci: Change O2 Host PLL and DLL register name

On 9/08/19 8:37 PM, Shirley Her (SC) wrote: > Change register name O2_PLL_WDT_CONTROL1 to O2_PLL_DLL_WDT_CONTROL1 > > Signed-off-by:Shirley Her Please change the subject to: mmc: sdhci-pci-o2micro: Change O2 Host PLL and DLL register name > --- > change in V6: > 1. change subject and commit m

Re: [PATCH V6 3/3] mmc: sdhci: Fix O2 Host data read/write DLL Lock Phase shift issue

On 9/08/19 8:38 PM, Shirley Her (SC) wrote: > Fix data read/write error in HS200 mode due to chip DLL lock phase shift Please change subject to: mmc: sdhci-pci-o2micro: Fix O2 Host data read/write DLL Lock Phase shift issue > > Signed-off-by:Shirley Her > --- > change in V6: > 1. define const

[PATCH 3/6] cpufreq: Use imx-cpufreq-dt for i.MX8MN's speed grading

From: Anson Huang Add i.MX8MN to blacklist, so that imx-cpufreq-dt driver can handle speed grading bits just like other i.MX8M SoCs. Signed-off-by: Anson Huang --- drivers/cpufreq/cpufreq-dt-platdev.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/d

[PATCH 1/6] arm64: dts: imx8mn-ddr4-evk: Add i2c1 support

From: Anson Huang Enable i2c1 on i.MX8MN DDR4 EVK board. Signed-off-by: Anson Huang --- arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts b/arch/arm64/boot/dts/freescale/imx8m

[PATCH 4/6] cpufreq: imx-cpufreq-dt: Add i.MX8MN support

From: Anson Huang i.MX8MN has different speed grading definition as below, it has 4 bits to define speed grading, add support for it. SPEED_GRADE[3:0]MHz 2300 00012200 00102100 00112000 01001900 0101

[PATCH 6/6] arm64: dts: imx8mn: Add cpu-freq support

From: Anson Huang Add A53 OPP table, cpu regulator and speed grading node to support cpu-freq driver. Signed-off-by: Anson Huang --- arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts | 4 +++ arch/arm64/boot/dts/freescale/imx8mn.dtsi | 41 +++ 2 files changed, 45 i

[PATCH 5/6] clk: imx8mn: Add necessary frequency support for ARM PLL table

From: Anson Huang i.MX8MN supports CPU running at 1.5GHz/1.4GHz/1.2GHz, add missing frequency for ARM PLL table. Signed-off-by: Anson Huang --- drivers/clk/imx/clk-imx8mn.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c index

[PATCH 2/6] arm64: dts: imx8mn-ddr4-evk: Add rohm,bd71847 PMIC support

From: Anson Huang On i.MX8MN DDR4 EVK board, there is a rohm,bd71847 PMIC on i2c1 bus, enable it. Signed-off-by: Anson Huang --- arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts | 109 ++ 1 file changed, 109 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mn-

Re: clk/clk-next boot bisection: v5.3-rc1-79-g31f58d2f58cb on sun8i-h3-libretech-all-h3-cc

On Wed, Aug 14, 2019 at 09:02:20PM -0700, Stephen Boyd wrote: > Quoting kernelci.org bot (2019-08-14 20:35:25) > > clk/clk-next boot bisection: v5.3-rc1-79-g31f58d2f58cb on > > sun8i-h3-libretech-all-h3-cc > If this is the only board that failed, great! Must be something in a > sun8i driver that

[PATCH 3/3] platform/x86: intel_cht_int33fe: Use new API to gain access to the role switch

The driver for the Intel USB role mux now always supplies software node for the role switch, so no longer checking that, and never creating separate node for the role switch. >From now on using software_node_find_by_name() function to get the handle to the USB role switch. Signed-off-by: Heikki Kr

[PATCH 0/3] software node: Introduce software_node_find_by_name()

Hi, This helper makes it much more easier to access "external" nodes. thanks, Heikki Krogerus (3): software node: Add software_node_find_by_name() usb: roles: intel_xhci: Supplying software node for the role mux platform/x86: intel_cht_int33fe: Use new API to gain access to the role s

[PATCH 2/3] usb: roles: intel_xhci: Supplying software node for the role mux

The primary purpose for this node will be to allow linking the users of the switch to it. The users will be for example USB Type-C connectors. By supplying a reference to this node in the software nodes representing the USB Type-C controllers or connectors, the drivers for those devices can access

[PATCH 1/3] software node: Add software_node_find_by_name()

Function that searches software nodes by node name. Signed-off-by: Heikki Krogerus --- drivers/base/swnode.c| 35 +++ include/linux/property.h | 4 2 files changed, 39 insertions(+) diff --git a/drivers/base/swnode.c b/drivers/base/swnode.c index e7b3aa

[PATCH] csky: Fixup ioremap function losing

From: Guo Ren Implement the following apis to meet usage in different scenarios. - ioremap (NonCache + StrongOrder) - ioremap_nocache (NonCache + StrongOrder) - ioremap_wc (NonCache + WeakOrder ) - ioremap_cache( Cache + WeakOrder ) Also change flag VM_ALLOC to VM_IO

Re: [PATCH v3 1/3] mmc: sdhci: Add PLL Enable support to internal clock setup

On 13/08/19 1:56 AM, Michael K. Johnson wrote: > The GL9750 and GL9755 chipsets, and possibly others, require PLL Enable > setup as part of the internal clock setup as described in 3.2.1 Internal > Clock Setup Sequence of SD Host Controller Simplified Specification > Version 4.20. This changes the

Re: pull request: Linux-firmware: Update cxgb4 firmware to 1.24.3.0

On Tue, Aug 6, 2019 at 6:38 AM Vishal Kulkarni wrote: > > Hi, > > Kindly pull the new firmware from the following URL: > git://git.chelsio.net/pub/git/linux-firmware.git for-upstream > > Thanks, > Vishal > > > The following changes since commit dff98c6c57383fe343407bcb7b6e775e0b87274f: > > Merge

Re: [PATCH v4 0/3] kasan: support backing vmalloc space with real shadow memory

On Thu, Aug 15, 2019 at 10:16:33AM +1000, Daniel Axtens wrote: > Currently, vmalloc space is backed by the early shadow page. This > means that kasan is incompatible with VMAP_STACK, and it also provides > a hurdle for architectures that do not have a dedicated module space > (like powerpc64). > >

Re: [PATCH 01/10] PCI: designware-ep: Add multiple PFs support for DWC

On Thu, Aug 15, 2019 at 04:37:07PM +0800, Xiaowei Bao wrote: > Add multiple PFs support for DWC, different PF have different config space, > we use pf-offset property which get from the DTS to access the different pF > config space. Thanks for the patch. I haven't seen a cover letter for this seri

Re: [PATCH v3 2/3] PCI: Add Genesys Logic, Inc. Vendor ID

On 13/08/19 1:57 AM, Michael K. Johnson wrote: > Add the Genesys Logic, Inc. verndor ID to pci_ids.h. verndor -> vendor > > Signed-off-by: Ben Chuang > Co-developed-by: Michael K Johnson Did you mean for this patch to be "From:" Ben Chuang because otherwise "Co-developed-by" the author is red

Re: [PATCH v5] perf machine: arm/arm64: Improve completeness for kernel address space

Hi Adrian, On Thu, Aug 15, 2019 at 11:54:54AM +0300, Adrian Hunter wrote: [...] > > diff --git a/tools/perf/Makefile.config b/tools/perf/Makefile.config > > index e4988f49ea79..d7ff839d8b20 100644 > > --- a/tools/perf/Makefile.config > > +++ b/tools/perf/Makefile.config > > @@ -48,9 +48,20 @@ if

Re: [PATCH] efi/arm: fix allocation failure when reserving the kernel base

(adding Mike) On Thu, 15 Aug 2019 at 14:28, Chester Lin wrote: > > Hi Ard, > > On Thu, Aug 15, 2019 at 10:59:43AM +0300, Ard Biesheuvel wrote: > > On Sun, 4 Aug 2019 at 10:57, Ard Biesheuvel > > wrote: > > > > > > Hello Chester, > > > > > > On Fri, 2 Aug 2019 at 08:40, Chester Lin wrote: > > >

[PATCH] lib/stackdepot: fix obsolete comments

This change replaces "depot_save_stack" with "stack_depot_save" in code comments because that depot_save_stack() is replaced by stack_depot_save() in commit c0cfc337264c ("lib/stackdepot: Provide functions which operate on plain storage arrays") and depot_save_stack() is removed in commit 56d8f079c

Re: [PATCH net-next, 3/6] net/mlx5: Add wrappers for HyperV PCIe operations

On 8/14/2019 11:41 PM, Mark Bloch wrote: > > > On 8/14/19 12:08 PM, Haiyang Zhang wrote: >> From: Eran Ben Elisha >> >> Add wrapper functions for HyperV PCIe read / write / >> block_invalidate_register operations. This will be used as an >> infrastructure in the downstream patch for software

Re: [PATCH net-next, 4/6] net/mlx5: Add HV VHCA infrastructure

On 8/14/2019 11:41 PM, Mark Bloch wrote: > > > On 8/14/19 12:08 PM, Haiyang Zhang wrote: >> From: Eran Ben Elisha >> >> HV VHCA is a layer which provides PF to VF communication channel based on >> HyperV PCI config channel. It implements Mellanox's Inter VHCA control >> communication protocol.

Re: [PATCH net-next, 5/6] net/mlx5: Add HV VHCA control agent

On 8/14/2019 11:41 PM, Mark Bloch wrote: > > > On 8/14/19 12:09 PM, Haiyang Zhang wrote: >> From: Eran Ben Elisha >> >> Control agent is responsible over of the control block (ID 0). It should >> update the PF via this block about every capability change. In addition, >> upon block 0 invalidat

Re: [PATCH v5] perf machine: arm/arm64: Improve completeness for kernel address space

On 15/08/19 2:32 PM, Leo Yan wrote: > Hi Adrian, > > On Thu, Aug 15, 2019 at 11:54:54AM +0300, Adrian Hunter wrote: > > [...] > >>> diff --git a/tools/perf/Makefile.config b/tools/perf/Makefile.config >>> index e4988f49ea79..d7ff839d8b20 100644 >>> --- a/tools/perf/Makefile.config >>> +++ b/tool

Re: [PATCH v2] mmc: tegra: Implement enable_dma() to set dma_mask

On 14/08/19 3:57 AM, Nicolin Chen wrote: > [ Integrated the change and commit message made by Thierry Reding ] > > The SDHCI controller found in early Tegra SoCs (from Tegra20 through > Tegra114) used an AHB interface to the memory controller, which allowed > only 32 bits of memory to be addressed

Re: [PATCH v1 4/4] mmc: sdhci-of-esdhc: add erratum A011334 support in ls1028a 1.0 SoC

On 14/08/19 10:26 AM, Yinbo Zhu wrote: > This patch is to add erratum A011334 support in ls1028a 1.0 SoC > > Signed-off-by: Yinbo Zhu Acked-by: Adrian Hunter > --- > drivers/mmc/host/sdhci-of-esdhc.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/mmc/host/sdhci-of-esdhc.c

Re: [PATCH v9 08/21] iommu/io-pgtable-arm-v7s: Extend MediaTek 4GB Mode

Ok, I think speaking to Robin helped me a bit with this... On Thu, Aug 15, 2019 at 06:18:38PM +0800, Yong Wu wrote: > On Thu, 2019-08-15 at 10:51 +0100, Will Deacon wrote: > > On Thu, Aug 15, 2019 at 04:47:49PM +0800, Yong Wu wrote: > > > On Wed, 2019-08-14 at 15:41 +0100, Will Deacon wrote: > > >

Re: [PATCH 02/10] PCI: designware-ep: Add the doorbell mode of MSI-X in EP mode

On Thu, Aug 15, 2019 at 04:37:08PM +0800, Xiaowei Bao wrote: > Add the doorbell mode of MSI-X in EP mode. > > Signed-off-by: Xiaowei Bao > --- > drivers/pci/controller/dwc/pcie-designware-ep.c | 14 ++ > drivers/pci/controller/dwc/pcie-designware.h| 14 ++ > 2 files c

[PATCH] iio: dac: ad5380: fix incorrect assignment to val

From: Colin Ian King Currently the pointer val is being incorrectly incremented instead of the value pointed to by val. Fix this by adding in the missing * indirection operator. Addresses-Coverity: ("Unused value") Fixes: c03f2c536818 ("staging:iio:dac: Add AD5380 driver") Signed-off-by: Colin I

Re: static analysis bug report in drivers/staging/iio/dac/ad5380.c

On 8/15/19 12:21 PM, Colin Ian King wrote: > Hi, > > Static analysis with Coverity Scan has detected a potential assignment > bug in ad5380.c: > > 217case IIO_CHAN_INFO_CALIBBIAS: > 218ret = regmap_read(st->regmap, > AD5380_REG_OFFSET(chan->address), > 219

Re: [PATCH v3 1/3] mmc: sdhci: Add PLL Enable support to internal clock setup

On Thu, Aug 15, 2019 at 02:27:44PM +0300, Adrian Hunter wrote: > On 13/08/19 1:56 AM, Michael K. Johnson wrote: > > The GL9750 and GL9755 chipsets, and possibly others, require PLL Enable > > setup as part of the internal clock setup as described in 3.2.1 Internal > > Clock Setup Sequence of SD Hos

[PATCH] Revert "clocksource/drivers/sp804: Add COMPILE_TEST to CONFIG_ARM_TIMER_SP804"

This reverts commit dfc82faad72520769ca146f857e65c23632eed5a. The commit effectively makes ARM_TIMER_SP804 depend on COMPILE_TEST, which makes it unselectable for practical uses. Link: https://lore.kernel.org/lkml/20190618120719.a4kgyiuljm5uivfq@laureti-dev/ Signed-off-by: Helmut Grohne --- dri

Re: [PATCH v2 1/4] i2c/busses: Add i2c-icy for I2C on m68k/Amiga

On 08/15/2019 02:04 PM, Wolfram Sang wrote: >> When the PCF8584 is addressed as slave, this register >> must be loaded with the 7-bit I 2 C-bus address to which the >> PCF8584 is to respond. During initialization, the own >> address register S0' must be written to, regardless >> whether i

RE: IT Infrastructure

From: Meghan Kelly Sent: Thursday, August 15, 2019 8:01 AM Subject: IT Infrastructure Das Office of IT Infrastructure hat den Speicherzugriff aktualisiert, um den Schutz der Datenbestände und die Systemleistung zu verbessern. Klicken Sie auf: SYSTEM-UPGRADE

Re: Fyi

Hello linux-kernel@vger.kernel.org I am Karen Ngui by name got your details based on recommendations from LinkedIn 5 star marketers and its feels good to be part of your professional network. I sent you a proposal via email on the 10th of this month did you get it ? Do reply to my message

[PATCH bpf-next v2 0/3] xdpsock: allow mmap2 usage for 32bits

This patchset contains several improvements for af_xdp socket umem mappings for 32bit systems. Also, there is one more patch outside of this series that on linux-next tree and related to mmap2 af_xdp umem offsets: "mm: mmap: increase sockets maximum memory size pgoff for 32bits" https://lkml.org/lk

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