This series adds a generic binding to configure PHY LEDs through
the device tree, and phylib support for reading the information
from the DT. PHY drivers that support the generic binding should
implement the new hook .config_led.
Enable DT configuration of the RTL8211E LEDs by implementing the
.co
Some RTL8211x PHYs have extension pages, which can be accessed
after selecting a page through a custom method. Add a function to
modify bits in a register of an extension page and a helper for
selecting an ext page. Use rtl8211x_modify_ext_paged() in
rtl8211e_config_init() instead of doing things '
Add a .config_led hook which is called by the PHY core when
configuration data for a PHY LED is available. Each LED can be
configured to be solid 'off, solid 'on' for certain (or all)
link speeds or to blink on RX/TX activity.
Signed-off-by: Matthias Kaehlcke
---
Changes in v5:
- use 'config_leds
The LED behavior of some Ethernet PHYs is configurable. Add an
optional 'leds' subnode with a child node for each LED to be
configured. The binding aims to be compatible with the common
LED binding (see devicetree/bindings/leds/common.txt).
A LED can be configured to be:
- 'on' when a link is act
For PHYs with a device tree node look for LED trigger configuration
using the generic binding, if it exists try to apply it via the new
driver hook .config_led.
Signed-off-by: Matthias Kaehlcke
---
Changes in v5:
- add callback to configure a LED to the PHY driver, instead of
having the driver
On Wed, Aug 07, 2019 at 03:18:59PM +, David Laight wrote:
> From: Sudeep Holla
> > Sent: 07 August 2019 14:01
> >
> > Instead of type-casting the {tx,rx}.buf all over the place while
> > accessing them to read/write __le32 from/to the firmware, let's use
> > the nice existing {get,put}_unaligne
Hi Steve,
On Wed, Aug 07, 2019 at 12:34:01PM -0400, Steven Rostedt wrote:
> As arm64 saves the link register after a function's local variables are
> stored, it causes the max stack tracer to be off by one in its output
> of which function has the bloated stack frame.
For reference, it's a bit mo
On 8/7/19 1:58 AM, Dario Faggioli wrote:
> So, here comes my question: I've done a benchmarking campaign (yes,
> I'll post numbers soon) using this branch:
>
> https://github.com/digitalocean/linux-coresched.git
> vpillai/coresched-v3-v5.1.5-test
> https://github.com/digitalocean/linux-coresche
On Wed, 7 Aug 2019 18:08:14 +0100
Mark Rutland wrote:
> Hi Steve,
>
> On Wed, Aug 07, 2019 at 12:34:01PM -0400, Steven Rostedt wrote:
> > As arm64 saves the link register after a function's local variables are
> > stored, it causes the max stack tracer to be off by one in its output
> > of which
Hi Jens,
this is a hopefully complete version of the fix proposed by Guenter [1].
Thanks,
Paolo
[1] https://lkml.org/lkml/2019/7/22/824
Paolo Valente (1):
block, bfq: handle NULL return value by bfq_init_rq()
block/bfq-iosched.c | 14 +++---
1 file changed, 11 insertions(+), 3 deleti
As arm64 saves the link register after a function's local variables are
stored, it causes the max stack tracer to be off by one in its output
of which function has the bloated stack frame.
The first patch fixes this by creating a ARCH_RET_ADDR_BEFORE_LOCAL_VARS
define that an achitecture (arm64) m
From: "Steven Rostedt (VMware)"
Most archs (well at least x86) store the function call return address on the
stack before storing the local variables for the function. The max stack
tracer depends on this in its algorithm to display the stack size of each
function it finds in the back trace.
Som
From: "Steven Rostedt (VMware)"
As the max stack tracer algorithm is not that easy to understand from the
code, add comments that explain the algorithm and mentions how
ARCH_RET_ADDR_AFTER_LOCAL_VARS affects it.
Link: http://lkml.kernel.org/r/20190806123455.487ac...@gandalf.local.home
Suggested
On Tue, 2019-08-06 at 18:26 -0700, Paul Walmsley wrote:
> On Wed, 7 Aug 2019, Atish Patra wrote:
>
> > On Tue, 2019-08-06 at 16:27 -0700, Paul Walmsley wrote:
> >
> > > Seems like the "su" should be dropped from mandatory_ext. What
> > > do you
> > > think?
> > >
> >
> > Yup. As DT binding on
Lgtm except one small comment below.
On 8/6/19, 5:22 PM, "openbmc on behalf of Tao Ren"
wrote:
Currently BMC's MAC address is calculated by adding 1 to NCSI NIC's base
MAC address when CONFIG_NCSI_OEM_CMD_GET_MAC option is enabled. The logic
doesn't work for platforms with differen
Instead of type-casting the {tx,rx}.buf all over the place while
accessing them to read/write __le{32,64} from/to the firmware, let's
use the existing {get,put}_unaligned_le{32,64} accessors to hide all
the type cast ugliness.
Suggested-by: Philipp Zabel
Signed-off-by: Sudeep Holla
---
drivers/
We should really only be looking for CFS tasks, since that's all
detach_one_task() can ever pull.
Replace the rq.nr_running check with a rq.cfs.h_nr_running one to do
just that.
Signed-off-by: Valentin Schneider
---
kernel/sched/fair.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
The logic to trigger an active balance is already quite lengthy, and
as I'm about to add yet another unlock condition it's probably better
to give it its own corner.
The only annoying requirement is that we need to branch to
out_one_pinned when the active balance is cancelled due to the running
ta
Vincent's load balance rework [1] got me thinking about how and where we
use rq.nr_running vs rq.cfs.h_nr_running checks, and this lead me to
stare intently at the active load balancer.
I haven't seen it happen (yet), but from reading the code it really looks
like we can have some scenarios where
Hi Rob,
On Tue, Aug 06, 2019 at 06:02:06PM +0100, Sudeep Holla wrote:
> SCMIv2.0 adds a new Reset Management Protocol to manage various reset
> states a given device or domain can enter. Extend the existing SCMI
> bindings to add reset protocol support by re-using the reset bindings
> for bothe re
The CFS load balancer can cause the cpu_stopper to run a function to
try and steal a rq's currently running task. However, it so happens
that while only CFS tasks will ever be migrated by that function, we
can end up preempting higher sched class tasks, since it is executed
by the cpu_stopper.
I d
On Wed, 07 Aug 2019 10:31:51 PDT (-0700), Atish Patra wrote:
On Tue, 2019-08-06 at 18:26 -0700, Paul Walmsley wrote:
On Wed, 7 Aug 2019, Atish Patra wrote:
> On Tue, 2019-08-06 at 16:27 -0700, Paul Walmsley wrote:
>
> > Seems like the "su" should be dropped from mandatory_ext. What
> > do you
On Wed, Aug 07, 2019 at 02:02:05PM +0300, Dan Carpenter wrote:
> On Tue, Aug 06, 2019 at 11:40:05AM -0700, Hridya Valsaraju wrote:
> > @@ -467,6 +466,9 @@ static int binderfs_fill_super(struct super_block *sb,
> > void *data, int silent)
> > int ret;
> > struct binderfs_info *info;
> >
On Wed, Aug 07, 2019 at 05:45:04AM -0400, Joel Fernandes wrote:
> On Tue, Aug 06, 2019 at 04:56:31PM -0700, Paul E. McKenney wrote:
> > On Tue, Aug 06, 2019 at 05:20:40PM -0400, Joel Fernandes (Google) wrote:
[ . . . ]
> > > + for (; head; head = next) {
> > > + next = head->next;
> > > +
On Tue, Aug 06, 2019 at 09:15:50PM +0200, Adrian Reber wrote:
> The main motivation to add set_tid to clone3() is CRIU.
>
> To restore a process with the same PID/TID CRIU currently uses
> /proc/sys/kernel/ns_last_pid. It writes the desired (PID - 1) to
> ns_last_pid and then (quickly) does a clon
On Wed, Aug 07, 2019 at 10:09:27AM -0500, Pierre-Louis Bossart wrote:
> Vinod, Mark, any feedback?
> There will be a set of SoundWire codec drivers provided upstream soonish and
> we'll get a number of kbuild errors without this patch.
I think I'm missing context here, I've basically been zoning
On 8/7/19 12:37 PM, Sakari Ailus wrote:
> On Tue, Jul 30, 2019 at 03:42:42PM -0300, Helen Koike wrote:
>> Hello,
>>
>> I'm re-sending a new version of ISP(Camera) v4l2 driver for rockchip
>> rk3399 SoC.
>>
>> I didn't change much from the last version, just applying the
>> suggestions made in th
On Wed, Aug 07, 2019 at 04:26:10PM +0200, Oleg Nesterov wrote:
> On 08/06, Adrian Reber wrote:
> >
> > +struct pid *alloc_pid(struct pid_namespace *ns, int set_tid)
> > {
> > struct pid *pid;
> > enum pid_type type;
> > @@ -186,12 +186,35 @@ struct pid *alloc_pid(struct pid_namespace *ns)
On Wed, Aug 07, 2019 at 06:22:13AM -0400, Joel Fernandes wrote:
> On Tue, Aug 06, 2019 at 05:29:15PM -0700, Paul E. McKenney wrote:
> > On Tue, Aug 06, 2019 at 05:20:41PM -0400, Joel Fernandes (Google) wrote:
> > > This test runs kfree_rcu in a loop to measure performance of the new
> > > kfree_rcu
On Wed, 2019-08-07 at 06:17 +0300, Leon Romanovsky wrote:
> On Tue, Aug 06, 2019 at 08:40:11PM +, Saeed Mahameed wrote:
> > On Tue, 2019-08-06 at 09:59 +0800, Chuhong Yuan wrote:
> > > Reference counters are preferred to use refcount_t instead of
> > > atomic_t.
> > > This is because the implem
On Aug 3, 2019, at 2:24 PM, Arnd Bergmann wrote:
>
> On Sat, Aug 3, 2019 at 6:03 PM Theodore Y. Ts'o wrote:
>>
>> On Sat, Aug 03, 2019 at 11:30:22AM +0200, Arnd Bergmann wrote:
>>>
>>> I see in the ext4 code that we always try to expand i_extra_size
>>> to s_want_extra_isize in ext4_mark_inode
On Wed, Aug 07, 2019 at 06:08:56PM +0200, Oleg Nesterov wrote:
> On 08/06, Adrian Reber wrote:
> >
> > @@ -2573,6 +2575,14 @@ noinline static int copy_clone_args_from_user(struct
> > kernel_clone_args *kargs,
> > .tls= args.tls,
> > };
> >
> > + if (size == sizeof(s
On 22/07/2019 17:37, Lorenzo Pieralisi wrote:
> Current PSCI code handles idle state entry through the
> psci_cpu_suspend_enter() API, that takes an idle state index as a
> parameter and convert the index into a previously initialized
> power_state parameter before calling the PSCI.CPU_SUSPEND() wi
On 07/08/2019 10:46, Geert Uytterhoeven wrote:
> Fix various issues in the error path of ostm_init():
> 1. Drop error message printing on of_iomap() failure, as the memory
> allocation core already takes of that,
> 2. Handle irq_of_parse_and_map() failures correctly: it returns
> unsi
Add driver support for Global Clock controller for SC7180 and also update
device tree bindings for the various clocks supported in the clock controller.
Taniya Das (2):
clk: qcom: Add DT bindings for SC7180 gcc clock controller
clk: qcom: Add Global Clock controller (GCC) driver for SC7180
Add support for the global clock controller found on SC7180
based devices. This should allow most non-multimedia device
drivers to probe and control their clocks.
Signed-off-by: Taniya Das
---
drivers/clk/qcom/Kconfig |9 +
drivers/clk/qcom/Makefile |1 +
drivers/clk/qcom/gcc-sc
Add compatible string and the include file for gcc clock
controller for SC7180.
Signed-off-by: Taniya Das
---
.../devicetree/bindings/clock/qcom,gcc.txt| 1 +
include/dt-bindings/clock/qcom,gcc-sc7180.h | 155 ++
2 files changed, 156 insertions(+)
create mode 100644 incl
> + for_each_child_of_node(np, child) {
> + u32 led;
> +
> + if (of_property_read_u32(child, "reg", &led))
> + goto skip_config;
> +
> + skip_config:
> + of_node_put(child);
There is no need for this put. So long as you don't break
Hi Steven,
On 8/2/19 2:25 PM, Steven Rostedt wrote:
On Fri, 2 Aug 2019 14:12:54 -0700
Divya Indi wrote:
Hi Steve,
The first patch would be like a temporary fix in case we need more
changes to the patches that add the new function - trace_array_set_clr()
and unexport ftrace_set_clr_event() an
I like the idea ... and it sure gets rid of a lot of code.
> A git tree is also available at:
>
>git://git.infradead.org/users/hch/misc.git ia64-remove-machvecs
I grabbed this tree and ran though my build scripts. I found that
vmlinux.gz doesn't get built. Which is odd, because I don't see
Hi Mark,
Vinod, Mark, any feedback?
There will be a set of SoundWire codec drivers provided upstream soonish and
we'll get a number of kbuild errors without this patch.
I think I'm missing context here, I've basically been zoning out all the
soundwire stuff - the patch series are huge and
> +static void of_phy_config_leds(struct phy_device *phydev)
> +{
> + struct device_node *np, *child;
> + struct phy_led_config cfg;
> + const char *trigger;
> + int ret;
> +
> + if (!IS_ENABLED(CONFIG_OF_MDIO) || !phydev->drv->config_led)
> + return;
> +
> + np
On Wed, Aug 07, 2019 at 05:48:29PM +0200, Oleg Nesterov wrote:
> On 08/06, Adrian Reber wrote:
> >
> > @@ -2530,12 +2530,14 @@ noinline static int
> > copy_clone_args_from_user(struct kernel_clone_args *kargs,
> > struct clone_args __user *uargs,
> >
Currently, kernel prints a info warning if any of the extensions
from "mafdcsu" is missing in device tree. Here are few issues with
this approach.
1. It is not entirely correct as Linux can boot with "f or d"
extensions if kernel is configured accordingly.
2. It will continue to print the info str
> +static int rtl8211e_config_led(struct phy_device *phydev, int led,
> +struct phy_led_config *cfg)
> +{
> + u16 lacr_bits = 0, lcr_bits = 0;
> + int oldpage, ret;
> +
> + switch (cfg->trigger.t) {
> + case PHY_LED_TRIGGER_LINK:
> + lcr_bits
On Tue, 6 Aug 2019 17:21:18 -0700, Tao Ren wrote:
> Currently BMC's MAC address is calculated by adding 1 to NCSI NIC's base
> MAC address when CONFIG_NCSI_OEM_CMD_GET_MAC option is enabled. The logic
> doesn't work for platforms with different BMC MAC offset: for example,
> Facebook Yamp BMC's MAC
From: Kan Liang
When counting system-wide events and cgroup events simultaneously, the
system-wide events are always scheduled during cgroup switch, which is
wrong and brings extra overhead.
Both system-wide and cgroup are per-cpu. They share the same cpuctx
groups, cpuctx->flexible_groups/pinne
On Tue, Aug 06, 2019 at 03:24:12PM +0200, Marc Koderer wrote:
> Instead of using its own logic for k-/vmalloc rely on
> kvmalloc which is actually doing quite the same.
>
> Signed-off-by: Marc Koderer
Applied to cgroup/for-5.4.
Thanks.
--
tejun
On Wed, Aug 07, 2019 at 11:25:18AM -0700, Jakub Kicinski wrote:
> On Tue, 6 Aug 2019 17:21:18 -0700, Tao Ren wrote:
> > Currently BMC's MAC address is calculated by adding 1 to NCSI NIC's base
> > MAC address when CONFIG_NCSI_OEM_CMD_GET_MAC option is enabled. The logic
> > doesn't work for platfor
Add dynamic power coefficients for the Silver and Gold CPU cores of
the Qualcomm SDM845.
Signed-off-by: Matthias Kaehlcke
Reviewed-by: Douglas Anderson
Reviewed-by: Amit Kucheria
---
just noticed that this patch fell through the cracks, resending
a rebased version.
Changes in v2:
- added Revie
Hello,
On Wed, Aug 07, 2019 at 06:29:28AM -0700, Tony Lindgren wrote:
> Hi,
>
> * Tejun Heo [691231 23:00]:
> > From: Andrea Arcangeli
> >
> > If getdents64 is killed or hits on segfault, it'll leave cgroups
> > directories in sysfs pinned leaking memory because the kernfs node
> > won't be fr
On Wed, 2019-08-07 at 12:28 +, Anup Patel wrote:
> This patch adds riscv_isa bitmap which represents Host ISA features
> common across all Host CPUs. The riscv_isa is not same as elf_hwcap
> because elf_hwcap will only have ISA features relevant for user-space
> apps whereas riscv_isa will have
Hi Daniel,
On Wed, Aug 7, 2019 at 8:13 PM Daniel Lezcano wrote:
> On 07/08/2019 10:46, Geert Uytterhoeven wrote:
> > Fix various issues in the error path of ostm_init():
> > 1. Drop error message printing on of_iomap() failure, as the memory
> > allocation core already takes of that,
> >
The qca_data structure is allocated with kzalloc() and hence
zero-initialized. Remove a bunch of unnecessary explicit
initializations of struct members to zero.
Signed-off-by: Matthias Kaehlcke
Reviewed-by: Balakrishna Godavarthi
---
just noticed that this patch fell through the cracks, resendin
Hi Borislav,
On 8/7/2019 2:18 AM, Borislav Petkov wrote:
> On Tue, Jul 30, 2019 at 10:29:42AM -0700, Reinette Chatre wrote:
>> Currently cache pseudo-locked regions only consider one cache level but
>> cache pseudo-locked regions may span multiple cache levels.
>>
>> In preparation for support of
On Wed, Aug 07, 2019 at 01:17:20PM -0500, Pierre-Louis Bossart wrote:
> I don't have the knowledge or means to test what I suggested initially for
> the other buses, and the optimization was minimal anyways, so this patch
> takes the path of least resistance and aligns with others.
> if there are
On 06.08.2019 23:42, Tao Ren wrote:
> Hi Andrew / Heiner / Vladimir,
>
> On 8/6/19 2:09 PM, Tao Ren wrote:
>> The BCM54616S PHY cannot work properly in RGMII->1000Base-KX mode (for
>> example, on Facebook CMM BMC platform), mainly because genphy functions
>> are designed for copper links, and 1000
On 8/7/19 12:39 AM, Bjorn Andersson wrote:
> A region in IMEM is used to communicate load addresses of remoteproc to
> post mortem debug tools. Implement a driver that can be used to store
> this information in order to enable these tools to process collected
> ramdumps.
>
> Signed-off-by: Bjorn A
Hi Borislav,
On 8/7/2019 8:25 AM, Borislav Petkov wrote:
> On Tue, Jul 30, 2019 at 10:29:43AM -0700, Reinette Chatre wrote:
>> A cache pseudo-locked region may span more than one level of cache. A
>> part of the pseudo-locked region that falls on one cache level is
>> referred to as a pseudo-lock
After commit "linux/bits.h: Add compile time sanity check of GENMASK
inputs" [1], arm64 defconfig builds started failing:
In file included from ../include/linux/bits.h:22,
from ../include/linux/bitops.h:5,
from ../include/linux/kernel.h:12,
from .
On Tue, Aug 6, 2019 at 9:32 AM Micah Morton wrote:
>
> Unfortunately I didn't have the mental model quite right of what
> happens during the pull request. I was thinking along the lines of my
> commits being cherry picked onto your tree, rather than how it
> actually happens with git merge where m
On 05/08/19 1:59 PM, Bartosz Golaszewski wrote:
> pon., 22 lip 2019 o 15:17 Bartosz Golaszewski napisał(a):
>>
>> From: Bartosz Golaszewski
>>
>> Sekhar,
>>
>> the following patches switch DaVinci to using the new clocksource driver
>> which
>> is now upstream. They are rebased on top of v5.3-rc
Hello,
syzbot found the following crash on:
HEAD commit:e96407b4 usb-fuzzer: main usb gadget fuzzer driver
git tree: https://github.com/google/kasan.git usb-fuzzer
console output: https://syzkaller.appspot.com/x/log.txt?x=151b292660
kernel config: https://syzkaller.appspot.com/x/.
[ I should have added Mark as Cc ]
Dear ARM64 folks,
Are you OK with this patch set?
If so, please ACK.
Should it be marked for stable?
Hmm, I'm starting to think not.
-- Steve
On Wed, 07 Aug 2019 13:28:27 -0400
Steven Rostedt wrote:
> From: "Steven Rostedt (VMware)"
>
> Most archs (w
On Tue, Aug 06, 2019 at 06:31:07PM -0600, Logan Gunthorpe wrote:
> On 2019-08-06 5:44 p.m., Bjorn Helgaas wrote:
> > I tentatively applied these to pci/p2pdma with minor typographical
> > updates (below), but I'll update the branch if necessary.
>
> Great, thanks! The typographical changes look g
On 8/7/19 12:39 AM, Bjorn Andersson wrote:
> Introduce a "panic" function in the remoteproc ops table, to allow
> remoteproc instances to perform operations needed in order to aid in
> post mortem system debugging, such as flushing caches etc, when the
> kernel panics.
>
> Signed-off-by: Bjorn And
The TI PWMSS driver is a simple bus driver for providing power
power management for the PWM peripherals on TI AM33xx SoCs, namely
eCAP, eHRPWM and eQEP. The eQEP is a counter rather than a PWM, so
it does not make sense to have the bus driver in the PWM subsystem
since the PWMSS is not exclusive to
This enables the Enhanced Quadrature Encoder Pulse (eQEP) module for
connectors E1, E2 and E3 on BeagleBone Blue.
Signed-off-by: David Lechner
---
v2 changes:
- none
arch/arm/boot/dts/am335x-boneblue.dts | 54 +++
1 file changed, 54 insertions(+)
diff --git a/arch/arm/
This adds a new counter driver for the Texas Instruments Enhanced
Quadrature Encoder Pulse (eQEP) module.
Only very basic functionality is currently implemented - only enough to
be able to read the position. The actual device has many more features
which can be added to the driver on an as-needed
This documents device tree binding for the Texas Instruments Enhanced
Quadrature Encoder Pulse (eQEP) Module found in various TI SoCs.
Signed-off-by: David Lechner
---
v2 changes:
- convert to .yaml format
- rename clock to "sysclkout"
.../devicetree/bindings/counter/ti-eqep.yaml | 50 +++
This series adds device tree bindings and a new counter driver for the Texas
Instruments Enhanced Quadrature Encoder Pulse (eQEP).
As mentioned in one of the commit messages, to start with, the driver only
supports reading the current counter value and setting the min/max values.
Other features ca
This adds new nodes for the Texas Instruments Enhanced Quadrature
Encoder Pulse (eQEP) module in the PWM subsystem on AM33XX.
Signed-off-by: David Lechner
---
v2 changes:
- clocks renamed to "sysclkout"
arch/arm/boot/dts/am33xx-l4.dtsi | 27 +++
1 file changed, 27 inser
On 8/7/19 4:41 AM, David Laight wrote:
> From: john.hubb...@gmail.com
>> Sent: 31 July 2019 06:46
...
>> if (boot_params->sentinel) {
>> -/* fields in boot_params are left uninitialized, clear them */
>> -boot_params->acpi_rsdp_addr = 0;
>> -memset(&boot_par
On 8/7/19 2:40 PM, David Lechner wrote:
diff --git a/drivers/counter/Kconfig b/drivers/counter/Kconfig
index 2967d0a9ff91..7eeb310f0cda 100644
--- a/drivers/counter/Kconfig
+++ b/drivers/counter/Kconfig
@@ -49,6 +49,18 @@ config STM32_LPTIMER_CNT
To compile this driver as a module, choo
On Wed, 2019-08-07 at 11:22 +0800, YueHaibing wrote:
> Since commit a07fc0bb483e ("RDMA/hns: Fix build error")
> these kconfig comment is obsolete, so just remove it.
>
> Signed-off-by: YueHaibing
Thanks, applied to for-next.
--
Doug Ledford
GPG KeyID: B826A3330E572FDD
Fingerprint = A
On Wed, Aug 07, 2019 at 12:28:06PM -0700, syzbot wrote:
> usercopy: Kernel memory exposure attempt detected from wrapped address
> (offset 0, size 0)!
> [ cut here ]
> kernel BUG at mm/usercopy.c:98!
This report is confusing because the arguments to usercopy_abort() are wro
On Mon, 5 Aug 2019 12:06:46 +0200
Juri Lelli wrote:
> This only happens if isolcpus are configured at boot.
>
> AFAIU, RT is reworking workqueues and 5.x-rt shouldn't suffer from this.
> As a matter of fact, I could verify that backporting the workqueue
> rework all-in change from 5.0-rt [1] fix
On Wed, Aug 07, 2019 at 09:52:33AM -0700, Guenter Roeck wrote:
> On 8/7/19 7:55 AM, Masahiro Yamada wrote:
> > On Wed, Aug 7, 2019 at 11:27 PM Guenter Roeck wrote:
> > >
> > > On Fri, Aug 02, 2019 at 01:03:58AM +0200, Rikard Falkeborn wrote:
> > > > GENMASK() and GENMASK_ULL() are supposed to be
On 07/08/19 14:27, Anup Patel wrote:
> This series adds initial KVM RISC-V support. Currently, we are able to boot
> RISC-V 64bit Linux Guests with multiple VCPUs.
Looks good to me! Still need an Acked-by from arch/riscv folks if I
have to merge it, otherwise they can take care of the initial mer
This makes use of the am335x-osd335x-common.dtsi file that contains the
common device tree components for Octavo Systems AM335x System-in-
Package that is used on the BeagleBone Blue.
This has two minor side-effects:
1. pinmux_i2c0_pins is renamed to pinmux-i2c0-pins
2. the 1000MHz cpufreq operati
On Wed, 7 Aug 2019 16:59:14 + Song Liu wrote:
> Hi Randy,
>
> > On Aug 7, 2019, at 8:11 AM, Randy Dunlap wrote:
> >
> > On 8/7/19 1:36 AM, Stephen Rothwell wrote:
> >> Hi all,
> >>
> >> Changes since 20190806:
> >>
> >
> > on i386:
> >
> > when CONFIG_SHMEM is not set/enabled:
> >
> >
The current irq spreading algorithm spreads vectors amongst cpus evenly
per node. If a node has more cpus than another node, the extra vectors
being spread may not be reported back to the caller.
This is most apparent with the NVMe driver and nr_cpus < vectors, where
the underreporting results in
tree:
https://kernel.googlesource.com/pub/scm/linux/kernel/git/paulmck/linux-rcu.git
dev.2019.07.31a
head: 71cf692f482ff45802352cf85a8880035fca9e52
commit: ca9c8c15d1dbfadb846a267e0bb88f1e2aee882a [56/123] idle: Prevent
late-arriving interrupts from disrupting offline
config: x86_64-randconf
On Wed, 7 Aug 2019 13:58:21 +0100 Steven Price wrote:
> > ./arch/x86/include/asm/pgtable_64_types.h:56:22: error: initializer element
> > is not constant
> > #define PTRS_PER_PGD 512
> > ^
>
> This is very unhelpful of GCC - it's actually PTRS_PER_P4D which isn't
> consta
With due respect,
Good day and compliments, I know this letter will definitely come to
you as a surprise, I am (Mr.Ubani Vincent) the Head of file Department
in African development bank. In my department we discovered an
abandoned sum of 15 million USA dollars. In an account that belongs to
one of
> Even if I explicitly run:
>
> $ make compressed
>
> It still doesn't build it. Weird.
Ugh! The rule to do the compression was in arch/ia64/hp/sim/boot/Makefile
which went away as part of the deletion of hpsim.
-Tony
On Tue, Aug 6, 2019 at 5:00 AM Hillf Danton wrote:
>
>
> On Tue, 06 Aug 2019 01:58:05 -0700
> > Hello,
> >
> > syzbot found the following crash on:
> >
...
> > BUG: memory leak
> > unreferenced object 0x8881228ca500 (size 128):
> >comm "syz-executor032", pid 7015, jiffies 4294944622 (age
Em Wed, Jul 24, 2019 at 04:44:57PM -0700, Numfor Mbiziwo-Tiapo escreveu:
> These patches are all warnings that the MSAN (Memory Sanitizer) build
> of perf has caught.
>
> To build perf with MSAN enabled run:
> make -C tools/perf CLANG=1 CC=clang EXTRA_CFLAGS="-fsanitize=memory\
> -fsanitize-memor
On Wed, Aug 7, 2019 at 5:34 PM Douglas RAILLARD
wrote:
>
> Fast switching path only emits an event for the CPU of interest, whereas the
> regular path emits an event for all the CPUs that had their frequency changed,
> i.e. all the CPUs sharing the same policy.
>
> With the current behavior, looki
On Wed, Aug 7, 2019 at 5:53 AM Georgi Djakov wrote:
>
> Hi Saravana,
>
> On 7/27/19 02:15, Saravana Kannan wrote:
> > Not all devices quantify their performance points in terms of frequency.
> > Devices like interconnects quantify their performance points in terms of
> > bandwidth. We need a way t
On Wed, Aug 07, 2019 at 09:59:27AM +0200, Michal Hocko wrote:
> On Tue 06-08-19 18:01:50, Johannes Weiner wrote:
> > On Tue, Aug 06, 2019 at 09:27:05AM -0700, Suren Baghdasaryan wrote:
> [...]
> > > > > I'm not sure 10s is the perfect value here, but I do think the kernel
> > > > > should try to ge
On Wed, 7 Aug 2019, Austin Kim wrote:
Again:
A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?
A: Top-posting.
Q: What is the most annoying thing in e-mail?
A: No.
Q: Should I include quotations after my reply?
http://daringfire
On Tue, Aug 06, 2019 at 02:15:54PM -0700, Joe Perches wrote:
> On Tue, 2019-08-06 at 21:27 +0200, Rikard Falkeborn wrote:
> > On Wed, Aug 07, 2019 at 12:19:36AM +0900, Masahiro Yamada wrote:
> > > How about this?
> > > #define GENMASK_INPUT_CHECK(high, low) \
> > >BUILD_BUG_ON_ZERO(__builti
Hi Andrew,
> On Aug 7, 2019, at 1:10 PM, Andrew Morton wrote:
>
> On Wed, 7 Aug 2019 16:59:14 + Song Liu wrote:
>
>> Hi Randy,
>>
>>> On Aug 7, 2019, at 8:11 AM, Randy Dunlap wrote:
>>>
>>> On 8/7/19 1:36 AM, Stephen Rothwell wrote:
Hi all,
Changes since 20190806:
On Wed, 7 Aug 2019 16:51:38 -0400 Johannes Weiner wrote:
> However, eb414681d5a0 ("psi: pressure stall information for CPU,
> memory, and IO") introduced a memory pressure metric that quantifies
> the share of wallclock time in which userspace waits on reclaim,
> refaults, swapins. By using absol
Am Mittwoch, 7. August 2019, 21:23:05 CEST schrieb Nathan Chancellor:
> After commit "linux/bits.h: Add compile time sanity check of GENMASK
> inputs" [1], arm64 defconfig builds started failing:
>
> In file included from ../include/linux/bits.h:22,
> from ../include/linux/bitops.
Fix data read/write error in HS200 mode due to chip DLL lock phase shift
Signed-off-by:Shirley Her
---
change in V5:
1. split 2 patches into 3 patches
2. make dll_adjust_count start from 0
3. fix ret overwritten issue
4. use break instead of goto
change in V4:
1. add a bug fix for V3
chang
Fix data read/write error in HS200 mode due to chip DLL lock phase shift
Signed-off-by:Shirley Her
---
change in V5:
1. split 2 patches into 3 patches
2. make dll_adjust_count start from 0
3. fix ret overwritten issue
4. use break instead of goto
change in V4:
1. add a bug fix for V3
chang
Fix data read/write error in HS200 mode due to chip DLL lock phase shift
Signed-off-by:Shirley Her
---
change in V5:
1. split 2 patches into 3 patches
2. make dll_adjust_count start from 0
3. fix ret overwritten issue
4. use break instead of goto
change in V4:
1. add a bug fix for V3
chang
On Wed, Jul 24, 2019 at 03:37:43PM -0700, Ian Rogers wrote:
> @@ -2597,6 +2612,30 @@ static int __perf_install_in_context(void *info)
> struct perf_cgroup *cgrp = perf_cgroup_from_task(current, ctx);
> reprogram = cgroup_is_descendant(cgrp->css.cgroup,
>
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