Since we will return enum ata_completion_errors from qc_prep in the next
patch, let's define AC_ERR_OK to mark the OK status.
Signed-off-by: Jiri Slaby
Cc: Jens Axboe
Cc: linux-...@vger.kernel.org
---
include/linux/libata.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/libat
In case a driver wants to return an error from qc_prep, return enum
ata_completion_errors. sata_mv is one of those drivers -- see the next
patch. Other drivers return the newly defined AC_ERR_OK.
[v2] use enum ata_completion_errors and AC_ERR_OK.
Signed-off-by: Jiri Slaby
Cc: Jens Axboe
Cc: lin
On Tue, Aug 06, 2019 at 11:47:44PM +, Kuehling, Felix wrote:
> On 2019-08-06 19:15, Jason Gunthorpe wrote:
> > From: Jason Gunthorpe
> >
> > The sequence of mmu_notifier_unregister_no_release(),
> > mmu_notifier_call_srcu() is identical to mmu_notifier_put() with the
> > free_notifier callback
There are several reports that the BUG_ON on unsupported command in
mv_qc_prep can be triggered under some circumstances:
https://bugzilla.suse.com/show_bug.cgi?id=1110252
https://serverfault.com/questions/97/raid-problems-after-power-outage
https://bugs.launchpad.net/ubuntu/+source/linux/+bug/
ata_qc_prep no longer exists, there are ata_bmdma_qc_prep and
ata_bmdma_dumb_qc_prep instead. And most drivers do not use them, so
reword the paragraph.
ata_qc_issue_prot was renamed to ata_sff_qc_issue. ->tf_load is now
->sff_tf_load. Fix them.
And fix spelling supercede -> supersede.
Signed-of
From: Frieder Schrempf
The imx I2C controller is used in some ARM64 SoCs such as i.MX8M.
To make use of it, append ARM64 to the list of dependencies.
Signed-off-by: Frieder Schrempf
---
drivers/i2c/busses/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/b
On 07.08.2019 6:35, Igor Lubashev wrote:
> The kernel is using CAP_SYS_ADMIN instead of euid==0 to override
> perf_event_paranoid check. Make perf do the same.
>
> Signed-off-by: Igor Lubashev
> ---
> tools/perf/arch/arm/util/cs-etm.c| 3 ++-
> tools/perf/arch/arm64/util/arm-spe.c | 4 ++--
From: Frieder Schrempf
The FEC ethernet controller is used in some ARM64 SoCs such as i.MX8.
To make use of it, append ARM64 to the list of dependencies.
Signed-off-by: Frieder Schrempf
---
drivers/net/ethernet/freescale/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Tue, Aug 06, 2019 at 11:35:55PM -0400, Igor Lubashev wrote:
> The kernel is using CAP_SYS_ADMIN instead of euid==0 to override
> perf_event_paranoid check. Make perf do the same.
>
> Signed-off-by: Igor Lubashev
> ---
> tools/perf/arch/arm/util/cs-etm.c| 3 ++-
> tools/perf/arch/arm64/uti
The core count read back from the each domain's look up table serves
as an indicator for the onset of the turbo frequency and not accurate
representation of number of cores in a paticular domain. Update turbo
detection logic accordingly to add support for SM8150 SoCs.
Signed-off-by: Sibi Sankar
-
Hi Peter,
On Tue, Aug 06, 2019 at 07:34:36PM -0700, Peter Collingbourne wrote:
> On Tue, Aug 6, 2019 at 4:50 PM Stephen Rothwell wrote:
> > After merging the arm64 tree, today's linux-next build (powerpc
> > ppc64_defconfig) was just spinning in make - it executing some scripts,
> > but it was ha
On 2019-07-19 09:53:52 [-0400], Sasha Levin wrote:
> Hi folks,
Hi,
> We're seeing a rare panic on boot in wq_worker_sleeping() on boot in
> 4.19 kernels. I wasn't able to reproduce this with 5.2, but I'm not sure
> whether it's because the issue is fixed, or I was just unlucky.
>
> The panic look
On Wed, Aug 07, 2019 at 06:57:24AM +, Koenig, Christian wrote:
> Am 06.08.19 um 22:03 schrieb Jason Gunthorpe:
> > On Tue, Aug 06, 2019 at 02:58:58PM -0400, Alex Deucher wrote:
> >> On Tue, Aug 6, 2019 at 1:51 PM Kuehling, Felix
> >> wrote:
> >>> On 2019-08-06 13:44, Jason Gunthorpe wrote:
>
> On Aug 7, 2019, at 6:56 AM, Will Deacon wrote:
>
> On Tue, Aug 06, 2019 at 03:34:34PM -0400, Qian Cai wrote:
>> diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
>> index 876055e37352..a0c495a3f4fd 100644
>> --- a/arch/arm64/kernel/cpuinfo.c
>> +++ b/arch/arm64/kernel/cp
On 06/08/2019 22:36, Stephen Boyd wrote:
> Quoting Sasha Levin (2019-08-06 13:47:52)
>> On Tue, Aug 06, 2019 at 10:59:40AM -0700, Stephen Boyd wrote:
>>> This reverts commit 25511676362d8f7d4b8805730a3d29484ceab1ec in the 4.19
>>> stable trees. From what I can tell this commit doesn't do anything t
On Wed, Aug 07, 2019 at 07:50:43AM -0400, Qian Cai wrote:
>
>
> > On Aug 7, 2019, at 6:56 AM, Will Deacon wrote:
> >
> > On Tue, Aug 06, 2019 at 03:34:34PM -0400, Qian Cai wrote:
> >> diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c
> >> index 876055e37352..a0c495a3f4fd 10
Hi,
On Tue, Aug 06, 2019 at 09:22:12AM -0600, Rob Herring wrote:
> +Maxime
>
> On Tue, Aug 6, 2019 at 6:50 AM Neil Armstrong wrote:
> >
> > The Amlogic Meson DWMAC glue bindings needs a second reg cells for the
> > glue registers, thus update the reg minItems/maxItems to allow more
> > than a sin
On Wed, Aug 07, 2019 at 03:06:15AM -0400, Jason Wang wrote:
> We used to use RCU to synchronize MMU notifier with worker. This leads
> calling synchronize_rcu() in invalidate_range_start(). But on a busy
> system, there would be many factors that may slow down the
> synchronize_rcu() which makes it
On Wednesday, August 7, 2019, 1:44:06 PM CEST Schrempf Frieder wrote:
> From: Frieder Schrempf
>
> The imx I2C controller is used in some ARM64 SoCs such as i.MX8M.
> To make use of it, append ARM64 to the list of dependencies.
>
> Signed-off-by: Frieder Schrempf
> ---
> drivers/i2c/busses/Kco
From: Colin Ian King
A previous commit introduced a regression where variable ret was
originally being set from the return from a call to function
dlm_create_debugfs_subroot and this set was removed. Currently
ret is now uninitialized if no alloction errors are found which
may end up with a bogus
Hi Frieder,
On Wed, Aug 7, 2019 at 9:04 AM Schrempf Frieder
wrote:
>
> From: Frieder Schrempf
>
> The FEC ethernet controller is used in some ARM64 SoCs such as i.MX8.
> To make use of it, append ARM64 to the list of dependencies.
ARCH_MXC is also used by i.MX8, so there is no need for such cha
I wonder what kinds of workqueue is used in case of this panic.
If system workqueue(system_wq) is used for this case, it would be a
help to replace it with high priority workqueue(system_highpri_wq). If
panic disappers with high priority workqueue(system_highpri_wq), we
would think about another s
On 26/07/19 5:07 AM, Michael K. Johnson wrote:
> Add support for the GL9750 and GL9755 chipsets.
>
> Signed-off-by: Ben Chuang
> Co-developed-by: Michael K Johnson
> Signed-off-by: Michael K Johnson
>
> diff --git a/drivers/mmc/host/sdhci-gli.h b/drivers/mmc/host/sdhci-gli.h
I suggest creatin
This patch extends asm/csr.h by adding RISC-V hypervisor extension
related defines.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/csr.h | 58
1 file changed, 58 insertions(+)
diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
ind
We will be using ONE_REG interface accessing VCPU registers from
user-space hence we add KVM_REG_RISCV for RISC-V VCPU registers.
Signed-off-by: Anup Patel
---
include/uapi/linux/kvm.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
index 5
From: Atish Patra
Export few symbols used by kvm module. Without this, kvm cannot
be compiled as a module.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
---
arch/riscv/kernel/smp.c | 2 +-
arch/riscv/kernel/time.c | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/ar
This patch adds riscv_isa bitmap which represents Host ISA features
common across all Host CPUs. The riscv_isa is not same as elf_hwcap
because elf_hwcap will only have ISA features relevant for user-space
apps whereas riscv_isa will have ISA features relevant to both kernel
and user-space apps.
O
This series adds initial KVM RISC-V support. Currently, we are able to boot
RISC-V 64bit Linux Guests with multiple VCPUs.
Few key aspects of KVM RISC-V added by this series are:
1. Minimal possible KVM world-switch which touches only GPRs and few CSRs.
2. Full Guest/VM switch is done via vcpu_get
For KVM RISC-V, we use KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls to access
VCPU config and registers from user-space.
We have three types of VCPU registers:
1. CONFIG - these are VCPU config and capabilities
2. CORE - these are VCPU general purpose registers
3. CSR- these are VCPU control and s
This patch implements VCPU create, init and destroy functions
required by generic KVM module. We don't have much dynamic
resources in struct kvm_vcpu_arch so thest functions are quite
simple for KVM RISC-V.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/kvm_host.h | 68
This patch implements VCPU interrupts and requests which are both
asynchronous events.
The VCPU interrupts can be set/unset using KVM_INTERRUPT ioctl from
user-space. In future, the in-kernel IRQCHIP emulation will use
kvm_riscv_vcpu_set_interrupt() and kvm_riscv_vcpu_unset_interrupt()
functions t
This patch adds initial skeletal KVM RISC-V support which has:
1. A simple implementation of arch specific VM functions
except kvm_vm_ioctl_get_dirty_log() which will implemeted
in-future as part of stage2 page loging.
2. Stubs of required arch specific VCPU functions except
kvm_arch_vcpu_
This patch implements the VCPU world-switch for KVM RISC-V.
The KVM RISC-V world-switch (i.e. __kvm_riscv_switch_to()) mostly
switches general purpose registers, SSTATUS, STVEC, SSCRATCH and
HSTATUS CSRs. Other CSRs are switched via vcpu_load() and vcpu_put()
interface in kvm_arch_vcpu_load() and
We get illegal instruction trap whenever Guest/VM executes WFI
instruction.
This patch handles WFI trap by blocking the trapped VCPU using
kvm_vcpu_block() API. The blocked VCPU will be automatically
resumed whenever a VCPU interrupt is injected from user-space
or from in-kernel IRQCHIP emulation.
On Wed, Aug 7, 2019 at 10:30 AM Paul Walmsley wrote:
>
>
> The baseline ISA support requirement for the RISC-V Linux kernel
> mandates compressed instructions, so it doesn't make sense for
> compressed instruction support to be configurable.
>
> Signed-off-by: Paul Walmsley
> Cc: Atish Patra
>
>
We will get stage2 page faults whenever Guest/VM access SW emulated
MMIO device or unmapped Guest RAM.
This patch implements MMIO read/write emulation by extracting MMIO
details from the trapped load/store instruction and forwarding the
MMIO read/write to user-space. The actual MMIO emulation will
From: Atish Patra
This patch adds floating point (F and D extension) context save/restore
for guest VCPUs. The FP context is saved and restored lazily only when
kernel enter/exits the in-kernel run loop and not during the KVM world
switch. This way FP save/restore has minimal impact on KVM perfor
We implement a simple VMID allocator for Guests/VMs which:
1. Detects number of VMID bits at boot-time
2. Uses atomic number to track VMID version and increments
VMID version whenever we run-out of VMIDs
3. Flushes Guest TLBs on all host CPUs whenever we run-out
of VMIDs
4. Force updates HW S
This patch implements MMU notifiers for KVM RISC-V so that Guest
physical address space is in-sync with Host physical address space.
This will allow swapping, page migration, etc to work transparently
with KVM RISC-V.
Signed-off-by: Anup Patel
---
arch/riscv/include/asm/kvm_host.h | 7 ++
arc
This patch implements all required functions for programming
the stage2 page table for each Guest/VM.
At high-level, the flow of stage2 related functions is similar
from KVM ARM/ARM64 implementation but the stage2 page table
format is quite different for KVM RISC-V.
Signed-off-by: Anup Patel
---
From: Atish Patra
The RISC-V hypervisor specification doesn't have any virtual timer
feature.
Due to this, the guest VCPU timer will be programmed via SBI calls.
The host will use a separate hrtimer event for each guest VCPU to
provide timer functionality. We inject a virtual timer interrupt to
This patch enables more VIRTIO drivers (such as console, rpmsg, 9p,
rng, etc.) which are usable on KVM RISC-V Guest and Xvisor RISC-V
Guest.
Signed-off-by: Anup Patel
---
arch/riscv/configs/defconfig | 13 +
arch/riscv/configs/rv32_defconfig | 13 +
2 files changed,
From: Atish Patra
The KVM host kernel running in HS-mode needs to handle SBI calls coming
from guest kernel running in VS-mode.
This patch adds SBI v0.1 support in KVM RISC-V. All the SBI calls are
implemented correctly except remote tlb flushes. For remote TLB flushes,
we are doing full TLB flu
From: Atish Patra
Add a KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctl interface for floating
point registers such as F0-F31 and FCSR. This support is added for
both 'F' and 'D' extensions.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
---
arch/riscv/include/uapi/asm/kvm.h | 10 +++
arch/riscv
Add myself as maintainer for KVM RISC-V as Atish as designated reviewer.
For time being, we use my GitHub repo as KVM RISC-V gitrepo. We will
update this once we have common KVM RISC-V gitrepo under kernel.org.
Signed-off-by: Atish Patra
Signed-off-by: Anup Patel
---
MAINTAINERS | 10 +
On Wed, Aug 7, 2019 at 8:36 AM Jinpu Wang wrote:
>
> On Wed, Aug 7, 2019 at 1:40 AM NeilBrown wrote:
> >
> > On Tue, Aug 06 2019, Jinpu Wang wrote:
> >
> > > On Tue, Aug 6, 2019 at 9:54 AM Jinpu Wang
> > > wrote:
> > >>
> > >> On Tue, Aug 6, 2019 at 1:46 AM NeilBrown wrote:
> > >> >
> > >> > O
On 19/8/7 20:19, Colin King wrote:
> From: Colin Ian King
>
> A previous commit introduced a regression where variable ret was
> originally being set from the return from a call to function
> dlm_create_debugfs_subroot and this set was removed. Currently
> ret is now uninitialized if no alloct
On Wed, Aug 7, 2019 at 4:22 AM Hui Song wrote:
> From: Song Hui
>
> Update the NXP GPIO node dt-binding file for QorIQ and
> Layerscape platforms, and add one more example with
> ls1028a GPIO node.
>
> Signed-off-by: Song Hui
Patch applied!
Thanks,
Linus Walleij
On Tue, Aug 6, 2019 at 4:57 PM Marc Zyngier wrote:
> Do not expose the base VA (it appears in debugfs). Instead,
> record the PA, which at least can be used to precisely identify
> the associated irqchip and domain.
>
> Signed-off-by: Marc Zyngier
Reviewed-by: Linus Walleij
Please apply this
add compatible string for usdhc3
---
This Patch is on top of 10/15 of this series:
https://patchwork.kernel.org/patch/11046343/
[v2,10/15] arm64: dts: imx8qm: add conn ss support
---
arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/a
On Wed, Aug 07, 2019 at 07:59:58AM +0200, Christoph Hellwig wrote:
> no-mmu sounds stange, as we use that for linux ports without paging
> hardware. I think an "io" got lost somewhere..
I had already changed the subject to
PCI/P2PDMA: Allow IOMMU for host bridge whitelist
but certainly open t
On 07/08/2019 13:35, Joseph Qi wrote:
>
>
> On 19/8/7 20:19, Colin King wrote:
>> From: Colin Ian King
>>
>> A previous commit introduced a regression where variable ret was
>> originally being set from the return from a call to function
>> dlm_create_debugfs_subroot and this set was removed. Cu
On Tue, Aug 6, 2019 at 8:05 AM Rajendra Nayak wrote:
> From: Jitendra Sharma
>
> Add the binding for the TLMM pinctrl block found in the SC7180 platform
>
> Signed-off-by: Jitendra Sharma
> Signed-off-by: Vivek Gautam
> [rnayak: Fix some copy-paste issues, sort and fix functions]
> Signed-off-
On Tue, Aug 6, 2019 at 8:05 AM Rajendra Nayak wrote:
> From: Jitendra Sharma
>
> Add initial pinctrl driver to support pin configuration with
> pinctrl framework for SC7180
>
> Signed-off-by: Jitendra Sharma
> Signed-off-by: Vivek Gautam
> [rnayak: modify to use upstream tile support
>
If reset controllers are assigned to the ti-sysc target-module, only
ti-sysc is going to be able to control these. Thus, remove all the
disable_on_idle flag usage, and assert/de-assert the reset always
in the idle path. Otherwise the reset signal will always just be
de-asserted.
Signed-off-by: Ter
Parenting clockdomain for the IP should be enabled during the reset
handling logic, otherwise the reset may not finish properly. Re-order
the clockdomain control logic to avoid this.
Signed-off-by: Tero Kristo
---
drivers/bus/ti-sysc.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(
Some devices need to share their reset signals, like DSP MMUs, thus drop
the exclusive notation from reset request. Also, balance the init time
reset count, otherwise the resets will never be applied post boot.
Signed-off-by: Tero Kristo
---
drivers/bus/ti-sysc.c | 12 +---
1 file change
Hi,
Here are a few patches to fix reset handling for ti-sysc bus driver.
Without these, the iommu won't be working properly at least.
-Tero
--
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
Hi Saravana,
On 7/27/19 02:15, Saravana Kannan wrote:
> Not all devices quantify their performance points in terms of frequency.
> Devices like interconnects quantify their performance points in terms of
> bandwidth. We need a way to represent these bandwidth levels in OPP. So,
> add support for p
On Wed, 7 Aug 2019, Austin Kim wrote:
A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?
A: Top-posting.
Q: What is the most annoying thing in e-mail?
A: No.
Q: Should I include quotations after my reply?
http://daringfireb
Hello
My name is Eddy William I am a lawyer by profession. I wish to offer you
the next of kin to my client. You will inherit the sum of ($8.5 Million)
dollars my client left in the bank before his death.
My client is a citizen of your country who died in auto crash with his wife
and only son. I
On 07/08/2019 00:58, Andrew Morton wrote:
> On Wed, 31 Jul 2019 16:46:01 +0100 Steven Price wrote:
>
>> Make use of the new functionality in walk_page_range to remove the
>> arch page walking code and use the generic code to walk the page tables.
>>
>> The effective permissions are passed down th
Instead of type-casting the {tx,rx}.buf all over the place while
accessing them to read/write __le32 from/to the firmware, let's use
the nice existing {get,put}_unaligned_le32 accessors to hide all the
type cast ugliness.
Suggested-by: Philipp Zabel
Signed-off-by: Sudeep Holla
---
drivers/firmw
On 06/08/2019 15:57, Marc Zyngier wrote:
> To allocate its fwnode that is then used to allocate an irqdomain,
> the driver uses irq_domain_alloc_fwnode(), passing it a VA as an
> identifier. This is a rather bad idea, as this address ends up
> published in debugfs (and we want to move away from VAs
Jason Yan writes:
> These two variables are both defined in init_32.c and init_64.c. Move
> them to init-common.c.
>
> Signed-off-by: Jason Yan
> Cc: Diana Craciun
> Cc: Michael Ellerman
> Cc: Christophe Leroy
> Cc: Benjamin Herrenschmidt
> Cc: Paul Mackerras
> Cc: Nicholas Piggin
> Cc: Kee
Jason Yan writes:
> Now the kernel base is a fixed value - KERNELBASE. To support KASLR, we
> need a variable to store the kernel base.
>
> Signed-off-by: Jason Yan
> Cc: Diana Craciun
> Cc: Michael Ellerman
> Cc: Christophe Leroy
> Cc: Benjamin Herrenschmidt
> Cc: Paul Mackerras
> Cc: Nicho
These days CONFIG_DEBUG_PAGEALLOC just compiles in the code that has to be
enabled on boot time, or with an extra config option, and only then are the
large page based direct mappings disabled.
Therefore remove the config dependency, allowing 1GB direct mappings with
debug_pagealloc compiled in bu
Jason Yan writes:
> When kaslr is enabled, the kernel offset is different for every boot.
> This brings some difficult to debug the kernel. Dump out the kernel
> offset when panic so that we can easily debug the kernel.
Some of this is taken from the arm64 version right? Please say so when
you co
Jason Yan writes:
> After we have the basic support of relocate the kernel in some
> appropriate place, we can start to randomize the offset now.
>
> Entropy is derived from the banner and timer, which will change every
> build and boot. This not so much safe so additionally the bootloader may
> p
Em Wed, Aug 07, 2019 at 10:40:39AM +0300, Adrian Hunter escreveu:
> On 6/08/19 5:41 PM, Alexander Shishkin wrote:
> > It is sometimes useful to generate a snapshot when perf record exits;
> > I've been using a wrapper script around the workload that would do a
> > killall -USR2 perf when the worklo
Jason Yan writes:
> diff --git a/arch/powerpc/kernel/kaslr_booke.c
> b/arch/powerpc/kernel/kaslr_booke.c
> index c6b326424b54..436f9a03f385 100644
> --- a/arch/powerpc/kernel/kaslr_booke.c
> +++ b/arch/powerpc/kernel/kaslr_booke.c
> @@ -361,6 +361,18 @@ static unsigned long __init kaslr_choose_lo
Jason Yan writes:
> This patch add support to boot kernel from places other than KERNELBASE.
> Since CONFIG_RELOCATABLE has already supported, what we need to do is
> map or copy kernel to a proper place and relocate. Freescale Book-E
> parts expect lowmem to be mapped by fixed TLB entries(TLB1).
Hi Helen,
Thanks for the patchset.
On Tue, Jul 30, 2019 at 03:42:46PM -0300, Helen Koike wrote:
> From: Jacob Chen
>
> This commit adds a subdev driver for Rockchip MIPI Synopsys DPHY driver
>
> Signed-off-by: Jacob Chen
> Signed-off-by: Shunqian Zheng
> Signed-off-by: Tomasz Figa
> [migrat
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/net/dsa/sja1105/sja1105_main.c: In function sja1105_fdb_dump:
drivers/net/dsa/sja1105/sja1105_main.c:1226:14: warning:
variable tx_vid set but not used [-Wunused-but-set-variable]
drivers/net/dsa/sja1105/sja1105_main.c:1226:6: warning:
varia
Hi Helen,
On Tue, Jul 30, 2019 at 03:42:44PM -0300, Helen Koike wrote:
> From: Jacob Chen
>
> This commit add document for rkisp1 meta buffer format
>
> Signed-off-by: Jacob Chen
> Acked-by: Hans Verkuil
> [update for upstream]
> Signed-off-by: Helen Koike
>
> ---
>
> Changes in v8:
> - Ad
Fixes gcc '-Wunused-but-set-variable' warning:
net/sched/sch_fq_codel.c: In function fq_codel_dequeue:
net/sched/sch_fq_codel.c:288:23: warning: variable prev_ecn_mark set but not
used [-Wunused-but-set-variable]
net/sched/sch_fq_codel.c:288:6: warning: variable prev_drop_count set but not
used
On Wed, Aug 7, 2019 at 5:40 AM Sowjanya Komatineni
wrote:
> On 8/6/19 2:51 PM, Sowjanya Komatineni wrote:
> >
> > On 8/5/19 2:20 AM, Linus Walleij wrote:
> >> On Wed, Jul 31, 2019 at 11:11 PM Sowjanya Komatineni
> >> wrote:
> >>
> >>> This patch adds support for Tegra pinctrl driver suspend and r
Hi Jason,
Jason Yan writes:
> This series implements KASLR for powerpc/fsl_booke/32, as a security
> feature that deters exploit attempts relying on knowledge of the location
> of kernel internals.
Thanks for doing this work.
Sorry I didn't get a chance to look at this until v5, I sent a few
co
On Mon, Jul 29, 2019 at 1:56 AM Gustavo A. R. Silva
wrote:
> Mark switch cases where we are expecting to fall through.
>
> This patch fixes the following warnings:
>
> drivers/mfd/db8500-prcmu.c: In function 'dsiclk_rate':
> drivers/mfd/db8500-prcmu.c:1592:7: warning: this statement may fall thro
Jason Yan writes:
> M_IF_NEEDED is defined too many times. Move it to a common place.
The name is not great, can you call it MAS2_M_IF_NEEDED, which at least
gives a clue what it's for?
cheers
> Signed-off-by: Jason Yan
> Cc: Diana Craciun
> Cc: Michael Ellerman
> Cc: Christophe Leroy
> Cc:
Commit-ID: 4ab9ab656a6cea5257bfa31f00c922d68f7a5c2f
Gitweb: https://git.kernel.org/tip/4ab9ab656a6cea5257bfa31f00c922d68f7a5c2f
Author: Gustavo A. R. Silva
AuthorDate: Mon, 5 Aug 2019 14:56:54 -0500
Committer: Thomas Gleixner
CommitDate: Wed, 7 Aug 2019 15:12:01 +0200
x86/ptrace: Mark
On Tue 06-08-19 09:15:25, Dan Williams wrote:
> On Mon, Aug 5, 2019 at 11:47 PM Michal Hocko wrote:
> >
> > On Mon 05-08-19 20:27:03, Dan Williams wrote:
> > > On Sun, Aug 4, 2019 at 10:31 PM Toshiki Fukasawa
> > > wrote:
> > > >
> > > > On 2019/07/26 16:06, Michal Hocko wrote:
> > > > > On Fri 2
On Wed, Aug 07, 2019 at 05:21:34PM +0800, Rahul Tanwar wrote:
> There is a new Intel Atom based Lightning Mountain(LGM) network processor SoC
> which
> reuses Lantiq ASC serial controller IP. This patch adds new compatible string
> and its expected property value in order to support the driver for
Commit-ID: 7468a4eae541ce5aff65595aa502aa0a4def6615
Gitweb: https://git.kernel.org/tip/7468a4eae541ce5aff65595aa502aa0a4def6615
Author: Gustavo A. R. Silva
AuthorDate: Mon, 5 Aug 2019 15:17:12 -0500
Committer: Thomas Gleixner
CommitDate: Wed, 7 Aug 2019 15:12:01 +0200
x86: mtrr: cyrix:
On Fri, 26 Jul 2019, Thomas Gleixner wrote:
Ping...
> On Thu, 25 Jul 2019, Nick Desaulniers wrote:
>
> > KBUILD_CFLAGS is very carefully built up in the top level Makefile,
> > particularly when cross compiling or using different build tools.
> > Resetting KBUILD_CFLAGS via := assignment is an a
Commit-ID: 610666f0581557944c3abec93a7c125b8303442c
Gitweb: https://git.kernel.org/tip/610666f0581557944c3abec93a7c125b8303442c
Author: John Hubbard
AuthorDate: Tue, 30 Jul 2019 22:46:27 -0700
Committer: Thomas Gleixner
CommitDate: Wed, 7 Aug 2019 15:16:04 +0200
x86/boot: Save fields e
[ 27.232781] hns3 :bd:00.3 eth7: net open
[ 27.237303] 8021q: adding VLAN 0 to HW filter on device eth7
[ 27.242972] IPv6: ADDRCONF(NETDEV_CHANGE): eth7: link becomes ready
[ 27.29] hns3 :bd:00.3: invalid speed (-1)
[ 27.253904] hns3 :bd:00.3 eth7: failed to adjust link.
[
On Tue, 6 Aug 2019, Marc Zyngier wrote:
> I recently noticed that all irq_domain_alloc_fwnode were passing a VA
> to it, which is unfortunate as this is designed to appear in debugfs
> (and we don't like to leak VAs). Disaster was avoided thanks to our
> ptrval friend, but it remains that
On Wed, Aug 07, 2019 at 05:21:31PM +0800, Rahul Tanwar wrote:
> The existing driver can only support single core SoC. But new multicore
> platforms which reuse the same driver/IP need SMP support. This patch adds
> multicore support in the driver.
Reviewed-by: Andy Shevchenko
>
> Signed-off-by:
On Wed, 7 Aug 2019 at 16:09, YueHaibing wrote:
>
> Fixes gcc '-Wunused-but-set-variable' warning:
>
> drivers/net/dsa/sja1105/sja1105_main.c: In function sja1105_fdb_dump:
> drivers/net/dsa/sja1105/sja1105_main.c:1226:14: warning:
> variable tx_vid set but not used [-Wunused-but-set-variable]
> d
> Is it ok if we defer the solution for this drivers/patchset?
Yes, not a problem if phy-mode means phy-mode.
Andrew
On Wed, 7 Aug 2019 at 16:19, Vladimir Oltean wrote:
>
> On Wed, 7 Aug 2019 at 16:09, YueHaibing wrote:
> >
> > Fixes gcc '-Wunused-but-set-variable' warning:
> >
> > drivers/net/dsa/sja1105/sja1105_main.c: In function sja1105_fdb_dump:
> > drivers/net/dsa/sja1105/sja1105_main.c:1226:14: warning:
On Wed, Aug 07, 2019 at 05:21:32PM +0800, Rahul Tanwar wrote:
> The patch adds change to use explicit string instead of a macro for
> DT compatible string.
For consistency you may need to convert OF_EARLYCON_DECLARE() as well.
Perhaps commit message should explain the rationale, i.e. the followin
On 05/08/2019 17:40, Christophe de Dinechin wrote:
>
> Steven Price writes:
>
>> Introduce a paravirtualization interface for KVM/arm64 based on the
>> "Arm Paravirtualized Time for Arm-Base Systems" specification DEN 0057A.
>>
>> This only adds the details about "Stolen Time" as the details of "
Diverged from what the code does with commit 530210c7814e ("of/irq: Replace
of_irq with of_phandle_args").
Signed-off-by: Lubomir Rintel
---
drivers/pci/of.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/of.c b/drivers/pci/of.c
index bc7b27a28795d..36891e7deee34
Diverged from what the code does with commit 530210c7814e ("of/irq: Replace
of_irq with of_phandle_args").
Signed-off-by: Lubomir Rintel
---
drivers/of/irq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/of/irq.c b/drivers/of/irq.c
index 7f84bb4903caa..a296eaf52a5b2
On 07.08.19 14:20, Fabio Estevam wrote:
> Hi Frieder,
>
> On Wed, Aug 7, 2019 at 9:04 AM Schrempf Frieder
> wrote:
>>
>> From: Frieder Schrempf
>>
>> The FEC ethernet controller is used in some ARM64 SoCs such as i.MX8.
>> To make use of it, append ARM64 to the list of dependencies.
>
> ARCH_MX
On 07.08.19 14:09, Alexander Stein wrote:
> On Wednesday, August 7, 2019, 1:44:06 PM CEST Schrempf Frieder wrote:
>> From: Frieder Schrempf
>>
>> The imx I2C controller is used in some ARM64 SoCs such as i.MX8M.
>> To make use of it, append ARM64 to the list of dependencies.
>>
>> Signed-off-by: F
Commit-ID: a156cadef2fe445ac423670eace517b39a01ccd0
Gitweb: https://git.kernel.org/tip/a156cadef2fe445ac423670eace517b39a01ccd0
Author: John Hubbard
AuthorDate: Tue, 30 Jul 2019 22:46:27 -0700
Committer: Thomas Gleixner
CommitDate: Wed, 7 Aug 2019 15:22:53 +0200
x86/boot: Save fields e
Commit-ID: 6444b40eeda4f78f57b255dd7ecb8d3e5936eea2
Gitweb: https://git.kernel.org/tip/6444b40eeda4f78f57b255dd7ecb8d3e5936eea2
Author: Sean Christopherson
AuthorDate: Mon, 5 Aug 2019 14:21:34 -0700
Committer: Thomas Gleixner
CommitDate: Wed, 7 Aug 2019 15:24:21 +0200
x86/apic: Annotat
201 - 300 of 880 matches
Mail list logo
