Adamski, Krzysztof (Nokia - PL/Wroclaw)
於 2019年8月7日週三 下午2:51寫道：
>
> On Mon, Aug 05, 2019 at 08:31:34PM +0800, Fuqian Huang wrote:
> >i2c_pxa_handler -> i2c_pxa_irq_txempty ->
> >i2c_pxa_reset -> i2c_pxa_set_slave -> i2c_pxa_wait_slave
> >
> >As i2c_pxa_handler is an interrupt handler, it will fina
On 8/7/19 7:42 AM, Christoph Hellwig wrote:
On Tue, Aug 06, 2019 at 05:02:03PM -0700, Paul Walmsley wrote:
The rationale is to encourage others to start laying the groundwork for
future Sv48 support. The immediate trigger for it was Alex's mmap
randomization support patch series, which needs to
On 2019/8/7 下午2:54, Jason Wang wrote:
From: "Michael S. Tsirkin"
This seems to cause guest and host memory corruption.
Disable for now until we get a better handle on that.
Signed-off-by: Michael S. Tsirkin
---
drivers/vhost/vhost.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
We need make sure there's no reference on the map before trying to
mark set dirty pages.
Reported-by: Michael S. Tsirkin
Fixes: 7f466032dc9e ("vhost: access vq metadata through kernel virtual address")
Signed-off-by: Jason Wang
---
drivers/vhost/vhost.c | 5 ++---
1 file changed, 2 insertions(+
Hi all:
This series try to fix several issues introduced by meta data
accelreation series. Please review.
Changes from V3:
- remove the unnecessary patch
Changes from V2:
- use seqlck helper to synchronize MMU notifier with vhost worker
Changes from V1:
- try not use RCU to syncrhonize MMU noti
There's no need for RCU synchronization in vhost_uninit_vq_maps()
since we've already serialized with readers (memory accessors). This
also avoid the possible userspace DOS through ioctl() because of the
possible high latency caused by synchronize_rcu().
Reported-by: Michael S. Tsirkin
Fixes: 7f4
Intel pstate driver exposes min_perf_pct and max_perf_pct sysfs files,
which can be used to force a limit on the min/max P state of the driver.
Though these files eventually control the min/max frequencies that the
CPUs will run at, they don't make a change to policy->min/max values.
When the valu
We should not setup uaddr for the invalid address, otherwise we may
try to pin or prefetch mapping of wrong pages.
Fixes: 7f466032dc9e ("vhost: access vq metadata through kernel virtual address")
Signed-off-by: Jason Wang
---
drivers/vhost/vhost.c | 3 ++-
1 file changed, 2 insertions(+), 1 dele
To avoid reducing the frequency of a CPU prematurely, we skip reducing
the frequency if the CPU had been busy recently.
This should not be done when the limits of the policy are changed, for
example due to thermal throttling. We should always get the frequency
within the new limits as soon as poss
We don't mark dirty pages if the map was teared down outside MMU
notifier. This will lead untracked dirty pages. Fixing by marking
dirty pages during map uninit.
Reported-by: Michael S. Tsirkin
Fixes: 7f466032dc9e ("vhost: access vq metadata through kernel virtual address")
Signed-off-by: Jason W
The return value of mmu_notifier_register() is not checked in
vhost_vring_set_num_addr(). This will cause an out of sync between mm
and MMU notifier thus a double free. To solve this, introduce a
boolean flag to track whether MMU notifier is registered and only do
unregistering when it was true.
R
The vhost_set_vring_num_addr() could be called in the middle of
invalidate_range_start() and invalidate_range_end(). If we don't reset
invalidate_count after the un-registering of MMU notifier, the
invalidate_cont will run out of sync (e.g never reach zero). This will
in fact disable the fast acces
We used to use RCU to synchronize MMU notifier with worker. This leads
calling synchronize_rcu() in invalidate_range_start(). But on a busy
system, there would be many factors that may slow down the
synchronize_rcu() which makes it unsuitable to be called in MMU
notifier.
So this patch switches us
Instead of returning -EAGAIN unconditionally, we'd better do that only
we're sure the range is overlapped with the metadata area.
Reported-by: Jason Gunthorpe
Fixes: 7f466032dc9e ("vhost: access vq metadata through kernel virtual address")
Signed-off-by: Jason Wang
---
drivers/vhost/vhost.c | 3
We don't free map during vhost_map_unprefetch(). This means it could
be leaked. Fixing by free the map.
Reported-by: Michael S. Tsirkin
Fixes: 7f466032dc9e ("vhost: access vq metadata through kernel virtual address")
Signed-off-by: Jason Wang
---
drivers/vhost/vhost.c | 4 +---
1 file changed,
Hi Wolfram,
>Hi Krzysztof,
>
>> +if (fifo_status & SLV_FIFO_DV1) {
>> +if (fifo_status & SLV_FIFO_STRC) {
>> +dev_dbg(dev, "First data byte sent\n");
>
>I think, however, these debug messages could go. They were surely
>helpful during development but assuming th
This patch series adds SCM, APSS shared mailbox and QMP AOSS PD/clock
support on SM8150 and SC7180 SoCs.
v2:
* re-arrange the compatible lists in sort order
Sibi Sankar (7):
soc: qcom: smem: Update max processor count
dt-bindings: firmware: scm: re-order compatible list
dt-bindings: firmwa
re-order compatible list to maintain sort order.
Signed-off-by: Sibi Sankar
---
Documentation/devicetree/bindings/firmware/qcom,scm.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt
b/Documentation/devicetree/bindings
Add AOSS QMP support for SM8150 and SC7180 SoCs.
Signed-off-by: Sibi Sankar
---
drivers/soc/qcom/qcom_aoss.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/soc/qcom/qcom_aoss.c b/drivers/soc/qcom/qcom_aoss.c
index 5f885196f4d0f..6ae813837b74b 100644
--- a/drivers/soc/qcom/qcom_aos
Add compatible for SM8150 and SC7180 SoCs.
Signed-off-by: Sibi Sankar
---
Documentation/devicetree/bindings/firmware/qcom,scm.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt
b/Documentation/devicetree/bindings/firmware/qcom,scm.t
Update max processor count to reflect the number of
co-processors on SC7180 SoCs.
Signed-off-by: Sibi Sankar
---
drivers/soc/qcom/smem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/qcom/smem.c b/drivers/soc/qcom/smem.c
index f27c00d82ae49..bef8502625f96 100644
Add the corresponding APSS shared offset for SM8150 and SC7180 SoCs.
Signed-off-by: Sibi Sankar
---
drivers/mailbox/qcom-apcs-ipc-mailbox.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c
b/drivers/mailbox/qcom-apcs-ipc-mailbox.c
index 705e17a5479cc
Add SM8150 and SC7180 AOSS QMP to the list of possible bindings.
Signed-off-by: Sibi Sankar
---
Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
b/Doc
Add SM8150 and SC7180 APSS shared to the list of possible bindings.
Signed-off-by: Sibi Sankar
---
.../devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt
b/Documen
In hiface_pcm_init(), 'rt' is firstly allocated through kzalloc(). Later
on, hiface_pcm_init_urb() is invoked to initialize 'rt->out_urbs[i]'. In
hiface_pcm_init_urb(), 'rt->out_urbs[i].buffer' is allocated through
kzalloc(). However, if hiface_pcm_init_urb() fails, both 'rt' and
'rt->out_urbs[i].
i2c_pxa_handler -> i2c_pxa_irq_txempty ->
i2c_pxa_reset -> i2c_pxa_set_slave -> i2c_pxa_wait_slave
As i2c_pxa_handler is an interrupt handler, it will finally
calls i2c_pxa_wait_slave which calls msleep.
Add in_interrupt check before msleep to avoid sleep
in IRQ context.
When in interrupt context
On Wed, 07 Aug 2019 09:09:59 +0200,
Wenwen Wang wrote:
>
> In hiface_pcm_init(), 'rt' is firstly allocated through kzalloc(). Later
> on, hiface_pcm_init_urb() is invoked to initialize 'rt->out_urbs[i]'. In
> hiface_pcm_init_urb(), 'rt->out_urbs[i].buffer' is allocated through
> kzalloc(). Howeve
On 8/6/2019 18:53, mario.limoncie...@dell.com wrote:
-Original Message-
From: Paul Menzel
Sent: Tuesday, August 6, 2019 10:36 AM
To: Jeff Kirsher
Cc: intel-wired-...@lists.osuosl.org; Linux Kernel Mailing List; Limonciello,
Mario
Subject: MDI errors during resume from ACPI S3 (suspend t
On Wed, Aug 7, 2019 at 3:18 AM Takashi Iwai wrote:
>
> On Wed, 07 Aug 2019 09:09:59 +0200,
> Wenwen Wang wrote:
> >
> > In hiface_pcm_init(), 'rt' is firstly allocated through kzalloc(). Later
> > on, hiface_pcm_init_urb() is invoked to initialize 'rt->out_urbs[i]'. In
> > hiface_pcm_init_urb(), '
Hi all,
After merging the akpm-current tree, today's linux-next build (arm
multi_v7_defconfig) failed like this:
In file included from include/linux/kernel.h:11,
from kernel/events/uprobes.c:12:
kernel/events/uprobes.c: In function 'uprobe_write_opcode':
include/linux/compiler.h:
On Wed, Aug 7, 2019 at 1:29 AM Qian Cai wrote:
>
> A compiler throws a warning on an arm64 system since the
> commit 9849a5697d3d ("arch, mm: convert all architectures to use
> 5level-fixup.h"),
>
> mm/kasan/init.c: In function 'kasan_free_p4d':
> mm/kasan/init.c:344:9: warning: variable 'p4d' set
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* This automated bisection report was sent to you on the basis *
* that you may be involved with the breaking commit it has *
* found. No manual investigation has been done to verify it, *
* and the root cause of the problem
On 6/08/19 5:41 PM, Alexander Shishkin wrote:
> It is sometimes useful to generate a snapshot when perf record exits;
> I've been using a wrapper script around the workload that would do a
> killall -USR2 perf when the workload exits.
>
> This patch makes it easier and also works when perf record
As spin_unlock_irq will enable interrupts.
Function tsi108_stat_carry is called from interrupt handler tsi108_irq.
Interrupts are enabled in interrupt handler.
Use spin_lock_irqsave/spin_unlock_irqrestore instead of spin_(un)lock_irq
in IRQ context to avoid this.
Signed-off-by: Fuqian Huang
---
On Wed, Aug 7, 2019 at 2:25 AM Stephen Rothwell wrote:
>
> Hi all,
>
> Today's linux-next merge of the mips tree got a conflict in:
>
> arch/mips/include/asm/vdso/vdso.h
> ( arch/mips/vdso/vdso.h in Linus' tree)
>
> between commit:
>
> ee38d94a0ad8 ("page flags: prioritize kasan bits over last
KASAN is an important runtime memory debugging feature
in linux kernel which can detect use-after-free and out-of-
bounds problems.
There are two patches in this letter:
1. Porting the memmove string operation.
2. Porting the feature KASAN.
Nick Hu (2):
riscv: Add memmove string operation.
ri
There are some features which need this string operation for compilation,
like KASAN. So the purpose of this porting is for the features like KASAN
which cannot be compiled without it.
KASAN's string operations would replace the original string operations and
call for the architecture defined stri
This patch ports the feature Kernel Address SANitizer (KASAN).
Note: The start address of shadow memory is at the beginning of kernel
space, which is 2^64 - (2^39 / 2) in SV39. The size of the kernel space
is 2^38 bytes so the size of shadow memory should be 2^38 / 8. Thus, the
shadow memory would
On Wed 07-08-19 08:31:09, Wei Yang wrote:
> On Tue, Aug 06, 2019 at 11:29:52AM +0200, Vlastimil Babka wrote:
> >On 8/6/19 10:11 AM, Wei Yang wrote:
> >> When addr is out of the range of the whole rb_tree, pprev will points to
> >> the biggest node. find_vma_prev gets is by going through the right m
The size of a submission queue element should always be 6 (64 bytes)
by spec.
However some controllers such as Apple's are not properly implementing
the standard and require a different size.
This provides the ground work for the subsequent quirks for these
controllers.
Signed-off-by: Benjamin H
Based on reverse engineering and original patch by
Paul Pawlowski
This adds support for Apple weird implementation of NVME in their
2018 or later machines. It accounts for the twice-as-big SQ entries
for the IO queues, and the fact that only interrupt vector 0 appears
to function properly.
Sign
Another issue with the Apple T2 based 2018 controllers seem to be
that they blow up (and shut the machine down) if there's a tag
collision between the IO queue and the Admin queue.
My suspicion is that they use our tags for their internal tracking
and don't mix them with the queue id. They also se
On Tue, 2019-08-06 at 17:46 +0200, Andrew Lunn wrote:
> [External]
>
> On Tue, Aug 06, 2019 at 07:11:57AM +, Ardelean, Alexandru wrote:
> > On Mon, 2019-08-05 at 17:28 +0200, Andrew Lunn wrote:
> > > [External]
> > >
> > > > +struct adin_hw_stat {
> > > > + const char *string;
> > > > +
On Wed, Aug 07, 2019 at 11:00:41AM +0800, Dave Young wrote:
> Add Tony and Xunlei in cc.
> On 08/05/19 at 04:58pm, Pingfan Liu wrote:
> > This series include two related groups:
> > [1-3/4]: protect nr_cpus from rebooting by broadcast mce
> > [4/4]: improve "kexec -l" robustness against broadcast m
This will make it easier to handle variable queue entry sizes
later. No functional change.
Signed-off-by: Benjamin Herrenschmidt
Reviewed-by: Christoph Hellwig
Reviewed-by: Minwoo Im
---
drivers/nvme/host/pci.c | 30 +++---
1 file changed, 15 insertions(+), 15 deletions
This series combines the original series and an updated version of the
shared tags patch, and is rebased on nvme-5.4.
This adds support for the controller found in recent Apple machines
which is basically a SW emulated NVME controller in the T2 chip.
The original reverse engineering work was done
On Wed, Aug 07, 2019 at 11:33:40AM +0900, Masahiro Yamada wrote:
> On Tue, Aug 6, 2019 at 7:56 PM Vasily Gorbik wrote:
> >
> > Currently empty .bss checks performed do not pay attention to "common
> > objects" in object files which end up in .bss section eventually.
> >
> > The "size" tool is a pa
I think the description is not correct. Consider using something like below.
In Xen environment, due to memory fragmentation ixgbe may allocate a
'DMA' buffer with pages that are not physically contiguous.
A NIC doesn't support directly write such buffer. So xen-swiotlb would
use the pages,
On 7/24/2019 1:17 PM, Xing Zhengjun wrote:
On 7/12/2019 2:42 PM, Xing Zhengjun wrote:
Hi Trond,
I attached perf-profile part big changes, hope it is useful for
analyzing the issue.
Ping...
ping...
In testcase: fsmark
on test machine: 40 threads Intel(R) Xeon(R) CPU E5-2690
On Tue 06-08-19 18:01:50, Johannes Weiner wrote:
> On Tue, Aug 06, 2019 at 09:27:05AM -0700, Suren Baghdasaryan wrote:
[...]
> > > > I'm not sure 10s is the perfect value here, but I do think the kernel
> > > > should try to get out of such a state, where interacting with the
> > > > system is impo
Hi all,
After merging the akpm-current tree, today's linux-next build (x86_64
allmodconfig) failed like this:
In file included from include/linux/bits.h:22,
from arch/x86/include/asm/msr-index.h:5,
from arch/x86/boot/cpucheck.c:28:
include/linux/build_bug.h:49: w
On Tue, 2019-08-06 at 17:39 +0200, Andrew Lunn wrote:
> [External]
>
> On Tue, Aug 06, 2019 at 06:47:08AM +, Ardelean, Alexandru wrote:
> > On Mon, 2019-08-05 at 16:51 +0200, Andrew Lunn wrote:
> > > [External]
> > >
> > > On Mon, Aug 05, 2019 at 07:54:43PM +0300, Alexandru Ardelean wrote:
>
On Wed, Aug 7, 2019 at 4:20 AM Andrey Smirnov wrote:
> On Mon, Aug 5, 2019 at 11:48 PM Andy Shevchenko
> wrote:
> > On Mon, Aug 5, 2019 at 10:36 PM Andrey Smirnov
> > wrote:
> > > The vast majority of the serial drivers check for
> > >
> > > uart_tx_stopped(&p->port) || uart_circ_empty(xmi
On Wed, Aug 07, 2019 at 11:32:04AM +0900, Masahiro Yamada wrote:
> Hi.
>
> On Tue, Aug 6, 2019 at 7:56 PM Vasily Gorbik wrote:
> >
> > Define and export OBJSIZE variable for "size" tool from binutils to be
> > used in architecture specific Makefiles (naming the variable just "SIZE"
> > would be t
Implement the RSS functionality and add the corresponding callbacks in
XGMAC core.
Changes from v1:
- Do not use magic constants (Jakub)
- Use ethtool_rxfh_indir_default() (Jakub)
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "Da
XGMAC cores also support the Flexible RX Parser feature. Add the support
for it in the XGMAC core.
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Cc: net...@vger.kernel.org
Cc: linux-st...@st-md-mailman.stor
Implement the MMC counters feature in XGMAC core.
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Cc: net...@vger.kernel.org
Cc: linux-st...@st-md-mailman.stormreply.com
Cc: linux-arm-ker...@lists.infradead.o
XGMAC also supports Safety Features. This patch implements the
configuration and handling of this feature in XGMAC core.
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Cc: net...@vger.kernel.org
Cc: linux-st
Implement the VLAN Hash Filtering feature in XGMAC core.
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Cc: net...@vger.kernel.org
Cc: linux-st...@st-md-mailman.stormreply.com
Cc: linux-arm-ker...@lists.infr
Implement the TX Queue Weight callback. In order for this to be active
we also need to set ETS algorithm when configuring Queue.
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Cc: net...@vger.kernel.org
Cc:
Add a selftest for the Flexible RX Parser feature.
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Cc: net...@vger.kernel.org
Cc: linux-st...@st-md-mailman.stormreply.com
Cc: linux-arm-ker...@lists.infradead.
Implement the TX Queue Priority callback in XGMAC core.
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Cc: net...@vger.kernel.org
Cc: linux-st...@st-md-mailman.stormreply.com
Cc: linux-arm-ker...@lists.infra
[ This is just a rebase of v2 into latest -next in order to avoid a merge
conflict ]
Couple of improvements for -next tree. More info in commit logs.
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Cc: net...@vger.kernel.org
Cc: linux-
On 06/08/2019 23:37, Paul Walmsley wrote:
> On Fri, 2 Aug 2019, Atish Patra wrote:
>
>> There is only one clocksource in RISC-V. The boot cpu initializes
>> that clocksource. No need to keep a percpu data structure.
>>
>> Signed-off-by: Atish Patra
>
> Thanks, queued for v5.3-rc4.
Please, in th
Add a test for RSS in the stmmac selftests.
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Cc: net...@vger.kernel.org
Cc: linux-st...@st-md-mailman.stormreply.com
Cc: linux-arm-ker...@lists.infradead.org
Cc:
Add a selftest for VLAN and Double VLAN Filtering in stmmac.
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Cc: net...@vger.kernel.org
Cc: linux-st...@st-md-mailman.stormreply.com
Cc: linux-arm-ker...@lists.
On Tue, 2019-08-06 at 18:02 +0100, Sudeep Holla wrote:
> On some ARM based systems, a separate Cortex-M based System Control
> Processor(SCP) provides the overall power, clock, reset and system
> control. System Control and Management Interface(SCMI) Message Protocol
> is defined for the communicat
I now also have a new mail, at my new domain OdenixDev.eu. Which we´ll
see if maybe some more things get installed on the server there.
Particulary something less macho than text-only mailing list.. ;)
I see Thunderbird team is asking for donations aswell on their page.
This is all solved wit
On Tue, 2019-08-06 at 18:02 +0100, Sudeep Holla wrote:
> SCMIv2.0 adds a new Reset Management Protocol to manage various reset
> states a given device or domain can enter. Device(s) that can be
> collectively reset through a common reset signal constitute a reset
> domain for the firmware.
>
> A r
arm64 devices dragonboard 410c (QC410E) and hi6220-hikey running Linux
next-20190806 loading modules causing floods of kernel messages.
We have enabled few extra kernel configs for testing.
CONFIG_DRM_I2C_ADV7511=m
CONFIG_DRM_I2C_ADV7511_CEC=y
...
Please find below boot log and config file link.
On 22/07/2019 17:37, Lorenzo Pieralisi wrote:
> The generic ARM CPUidle driver includes by mistake.
>
> Remove the topology header include.
>
> Signed-off-by: Lorenzo Pieralisi
> Cc: Ulf Hansson
> Cc: Sudeep Holla
> Cc: Daniel Lezcano
> Cc: "Rafael J. Wysocki"
Acked-by: Daniel Lezcano
On 22/07/2019 17:37, Lorenzo Pieralisi wrote:
> CPUidle back-end operations are not implemented in some platforms
> but this should not be considered an error serious enough to be
> logged. Check the arm_cpuidle_init() return value to detect whether
> the failure must be reported or not in the kern
Hi Jaafar,
On 8/5/19 15:27, Jaafar Ali wrote:
> Dear All,
> Kernel 5.3-rc1
> OS: ubuntu 18.04
> Hardware: Odroid-XU4
> The sound of Odroid-XU4 after suspend/resume cycle is choppy and slow.
> I have found a workaround, the I2SMOD register value should be set to
> zero after resume to force usin
As spin_unlock_irq will enable interrupts.
mxc_rtc_irq_enable is called from interrupt handler mxc_rtc_interrupt.
Interrupts are enabled in interrupt handler.
Use spin_lock_irqsave/spin_unlock_irqrestore instead of spin_(un)lock_irq
in IRQ context to avoid this.
Signed-off-by: Fuqian Huang
---
d
From: Marcel Ziswiler
Prevent regulators from being switched off.
Signed-off-by: Marcel Ziswiler
Signed-off-by: Philippe Schenker
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/imx7-colibri.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx7-coli
From: Oleksandr Suvorov
- add recovery mode for applicable i2c buses for
Colibri iMX7 module.
Signed-off-by: Oleksandr Suvorov
Signed-off-by: Philippe Schenker
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/imx7-colibri.dtsi | 25 +++--
1 file changed, 2
From: Stefan Agner
Add wakeup GPIO key which is able to wake the system from sleep
modes (e.g. Suspend-to-Memory).
Signed-off-by: Stefan Agner
Signed-off-by: Philippe Schenker
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 14 ++
arch/a
This patchset holds some common changes that were never upstreamed.
With latest downstream kernel upgrade, I took the aproach to select
mainline devicetrees and atomically add missing stuff for downstream.
These patches I send here are separated out with changes that also
have a benfit for mainli
Do not change the clock as the power for this phy is switched
with that clock.
Signed-off-by: Philippe Schenker
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/imx6ull-colibri.dtsi | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boo
This patch adds some missing pinmuxing that is in the colibri
standard to the dts.
Signed-off-by: Philippe Schenker
---
Changes in v3: None
Changes in v2:
- Commit title
arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/
From: Stefan Agner
Force HS200 by masking bit 63 of the SDHCI capability register.
The i.MX ESDHC driver uses SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400. With
that the stack checks bit 63 to descide whether HS400 is available.
Using sdhci-caps-mask allows to mask bit 63. The stack then selects
HS200 as op
Add the phy-node and mdio bus to the fec-node, represented as is on
hardware.
This commit includes micrel,led-mode that is set to the default
value, prepared for someone who wants to change this.
Signed-off-by: Philippe Schenker
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/imx
This commit adds UHS capability to Toradex Eval Boards
Signed-off-by: Philippe Schenker
---
Changes in v3:
- New patch to make use of ARM: dts: imx7-colibri: fix 1.8V/UHS support
Changes in v2: None
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 11 +--
1 file changed, 9 insertions(+)
From: Max Krummenacher
Add the pinmuxing and a inactive node for flexcan1 on SODIMM 55/63
and move the inactive flexcan nodes to imx6ull-colibri-eval-v3.dtsi
where they belong.
Note that this commit does not enable flexcan functionality, but rather
eases the effort needed to do so.
Signed-off-b
This adds the common touchscreen that is used with Toradex's
Eval Boards.
Signed-off-by: Philippe Schenker
---
Changes in v3: None
Changes in v2:
- Removed f0710a, that is downstream only
- Changed to generic node name
- Better comment
.../arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 24 ++
From: Max Krummenacher
Reduce the current drawn from VCC_BATT when the main power on the 3V3
pins to the module are switched off.
This switches off SoC internal pull resistors which are provided on the
module for TAMPER7 and TAMPER9 SoC pin and switches on a pull down
instead of a pullup for the
This patch adds the watchdog to the imx6ull-colibri devicetree
Signed-off-by: Philippe Schenker
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/imx6ull-colibri.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi
b/arch/ar
This adds the possibility to wake the module with an external signal
as defined in the Colibri standard
Signed-off-by: Philippe Schenker
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git
On Tue, 2019-08-06 at 18:02 +0100, Sudeep Holla wrote:
> SCMIv2.0 adds a new Reset Management Protocol to manage various reset
> states a given device or domain can enter. Extend the existing SCMI
> bindings to add reset protocol support by re-using the reset bindings
> for bothe reset providers an
Add touch controller that is connected over an I2C bus.
Signed-off-by: Philippe Schenker
---
Changes in v3:
- Fix commit message
Changes in v2:
- Deleted touchrevolution downstream stuff
- Use generic node name
- Better comment
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi | 24 +++
This adds the muxing for the optional pins usb-oc (overcurrent) and
usb-id.
Signed-off-by: Philippe Schenker
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.
This patch prepares the devicetree for the new Ixora V1.2 where we are
able to turn off the supply of the can transceiver. This implies to use
a sleep state on transmission pins in order to prevent backfeeding.
Signed-off-by: Philippe Schenker
---
Changes in v3: None
Changes in v2:
- Changed co
This commit adds the touchscreens from Toradex so one can enable it.
Signed-off-by: Philippe Schenker
---
Changes in v3:
- Fix commit title to "...imx6-apalis:..."
Changes in v2:
- Deleted touchrevolution downstream stuff
- Use generic node name
- Put a better comment in there
arch/arm/boot/
In order for the otg ports, that these modules support, it is needed
that dr_mode is on otg. Switch to use that feature.
Signed-off-by: Philippe Schenker
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/imx6qdl-colibri.dtsi | 2 +-
arch/arm/boot/dts/imx7-colibri.dtsi| 2 +-
2
From: Stefan Agner
Add pinmuxing and do not specify voltage restrictions for the usdhc
instance available on the modules edge connector. This allows to use
SD-cards with higher transfer modes if supported by the carrier board.
Signed-off-by: Stefan Agner
Signed-off-by: Philippe Schenker
---
Prepare FlexCAN use on SODIMM 55/63 178/188. Those SODIMM pins are
compatible for CAN bus use with several modules from the Colibri
family.
Add Better drivestrength and also add flexcan2.
Signed-off-by: Philippe Schenker
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/imx7-colibr
Add sleep pinmux to the fec so it can properly sleep.
Signed-off-by: Philippe Schenker
---
Changes in v3: None
Changes in v2: None
arch/arm/boot/dts/imx7-colibri.dtsi | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi
b/
Hi, Lukas
On 2019/8/6 15:24, Lukas Wunner wrote:
> On Thu, Jul 04, 2019 at 03:50:38PM +0800, Xiongfeng Wang wrote:
>> When I use the following command to power on a slot which has been
>> powered off already.
>> echo 1 > /sys/bus/pci/slots/22/power
>> It prints the following error:
>> -bash: echo:
From: kbuild test robot
drivers/target/iscsi/cxgbit/cxgbit_target.c:1451:47-48: Unneeded semicolon
Remove unneeded semicolon.
Generated by: scripts/coccinelle/misc/semicolon.cocci
Fixes: d7840976e391 ("net: Use skb accessors in network drivers")
CC: Matthew Wilcox (Oracle)
Signed-off-by: kb
Hi Shiva,
shiva.linuxwo...@gmail.com wrote on Mon, 22 Jul 2019 07:56:14 +0200:
> From: Shivamurthy Shastri
>
> These functions will be used by both raw NAND and SPI NAND, which
> supports ONFI like standards.
This is not exactly what you do. Why not:
mtd: nand: export ONFI related functions t
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