On Thu, Jul 25, 2019 at 06:14:32AM +0800, Jin Yao wrote:
SNIP
> +}
> +
> double avg_stats(struct stats *stats)
> {
> return stats->mean;
> diff --git a/tools/perf/util/stat.h b/tools/perf/util/stat.h
> index 95b4de7a9d51..3448d319a220 100644
> --- a/tools/perf/util/stat.h
> +++ b/tools/pe
Hi Tomasz,
On 06/08/2019 05:15, Tomasz Figa wrote:
> On Wed, Mar 13, 2019 at 11:38 AM Tomasz Figa wrote:
>>
>> On Wed, Mar 13, 2019 at 10:25 AM Laurent Pinchart
>> wrote:
>>>
>>> Hi Tomasz,
>>>
>>> On Fri, Nov 23, 2018 at 11:46:43PM +0900, Tomasz Figa wrote:
On Fri, Nov 2, 2018 at 12:03 AM
On Thu, Jul 25, 2019 at 06:14:32AM +0800, Jin Yao wrote:
> This patch prints the stddev and hist for the cycles diff of
> program block. It can help us to understand if the cycles diff
> is noisy or not.
>
> This patch is inspired by Andi Kleen's patch
> https://lwn.net/Articles/600471/
>
> We cr
On Thu, Jul 25, 2019 at 06:14:32AM +0800, Jin Yao wrote:
SNIP
> static int cycles_printf(struct hist_entry *he, struct hist_entry *pair,
> - struct perf_hpp *hpp, int width)
> + struct perf_hpp *hpp, int width __maybe_unused)
> {
> struct block_hi
On Mon 05-08-19 20:05:27, Sai Praneeth Prakhya wrote:
> When a user process exits, the kernel cleans up the mm_struct of the user
> process and during cleanup, check_mm() checks the page tables of the user
> process for corruption (E.g: unexpected page flags set/cleared). For
> corrupted page table
On 8/6/19 4:36 AM, Kefeng Wang wrote:
> 1) task_nodes = cpuset_mems_allowed(current);
>-> cpuset_mems_allowed() guaranteed to return some non-empty
> subset of node_states[N_MEMORY].
Right, there's an explicit guarantee.
> 2) nodes_and(*new, *new, task_nodes);
>-> after nodes_and(),
On Wed 31 Jul 2019 at 10:40, Neil Armstrong wrote:
>
> Neil Armstrong (4):
> clk: core: introduce clk_hw_set_parent()
> clk: meson: add g12a cpu dynamic divider driver
> clk: meson: g12a: add notifiers to handle cpu clock change
> clk: meson: g12a: expose CPUB clock ID for G12B
>
> driver
Alexander Shishkin writes:
> --- a/include/linux/perf_event.h
> +++ b/include/linux/perf_event.h
> @@ -246,6 +246,7 @@ struct perf_event;
> #define PERF_PMU_CAP_ITRACE 0x20
> #define PERF_PMU_CAP_HETEROGENEOUS_CPUS 0x40
> #define PERF_PMU_CAP_NO_EXCLUDE
From: Adrian Hunter
Add itrace option 'o' to synthesize events recorded in the AUX area due to
the use of perf record's aux-output config term.
Signed-off-by: Adrian Hunter
Signed-off-by: Alexander Shishkin
---
tools/perf/Documentation/itrace.txt | 2 ++
tools/perf/util/auxtrace.c |
Hi Peter,
Seventh attempt at the PEBS-via-PT feature. The previous ones were [1], [2],
[3], [4], [5], [6]. This one finalizes the 'aux_output' naming in the code.
The PEBS feature: output to Intel PT stream instead of the DS area. It's
theoretically useful in virtualized environments, where DS ar
From: Adrian Hunter
Expose the aux_output attribute flag to the user to configure, by adding a
config term 'aux-output'. For events that support it, selection of
'aux-output' causes the generation of AUX records instead of event records.
This requires that an AUX area event is also provided.
Sig
In some cases, ordinary (non-AUX) events can generate data for AUX events.
For example, PEBS events can come out as records in the Intel PT stream
instead of their usual DS records, if configured to do so.
One requirement for such events is to consistently schedule together, to
ensure that the dat
From: Adrian Hunter
Add aux_output attribute flag to match the kernel's perf_event.h file.
Signed-off-by: Adrian Hunter
Signed-off-by: Alexander Shishkin
---
tools/include/uapi/linux/perf_event.h | 3 ++-
tools/perf/util/evsel.c | 1 +
2 files changed, 3 insertions(+), 1 deletio
From: Adrian Hunter
Process synth_opts.other_events and attr.aux_output to set up for
synthesizing PEBs via Intel PT events.
Signed-off-by: Adrian Hunter
Signed-off-by: Alexander Shishkin
---
tools/perf/arch/x86/util/intel-pt.c | 23 +++
tools/perf/util/intel-pt.c
If PEBS declares ability to output its data to Intel PT stream, use the
aux_output attribute bit to enable PEBS data output to PT. This requires
a PT event to be present and scheduled in the same context. Unlike the
DS area, the kernel does not extract PEBS records from the PT stream to
generate co
From: Adrian Hunter
Document how to select PEBS via Intel PT and how to display synthesized
PEBS samples.
Signed-off-by: Adrian Hunter
Signed-off-by: Alexander Shishkin
---
tools/perf/Documentation/intel-pt.txt | 15 +++
1 file changed, 15 insertions(+)
diff --git a/tools/perf/Do
On 06-08-19, 10:01, Rafael J. Wysocki wrote:
> Yes, it does, thanks!
>
> [No need to resend, I'll take it from this message.]
Forgot to write CPU in caps in print messages, updated now.
--
viresh
-8<-
>From 5761009323fde6bbbef90f9ecdd3bf7c191672c
On Wed 31 Jul 2019 at 12:35, Stephen Boyd wrote:
> A future patch is going to change semantics of clk_register() so that
> clk_hw::init is guaranteed to be NULL after a clk is registered. Avoid
> referencing this member here so that we don't run into NULL pointer
> exceptions.
Hi Stephen,
What
Hi
On 8/6/19 10:50 AM, Gustavo A. R. Silva wrote:
Fix the following warning:
drivers/i2c/busses/i2c-designware-master.c: In function
‘i2c_dw_init_recovery_info’:
drivers/i2c/busses/i2c-designware-master.c:658:6: warning: unused variable ‘r’
[-Wunused-variable]
int r;
^
Fixes: 33eb0
Ls1028a platform, the i2c input clock is actually platform pll CLK / 4
(this is the hardware connection), other clock divider can not get the
correct i2c clock, resulting in the output of SCL pin clock is not
accurate.
Signed-off-by: Chuanhua Han
---
arch/arm64/boot/dts/freescale/fsl-ls1028a.dts
Ls1012a platform, the i2c input clock is actually platform pll CLK / 4
(this is the hardware connection), other clock divider can not get the
correct i2c clock, resulting in the output of SCL pin clock is not
accurate.
Signed-off-by: Chuanhua Han
---
arch/arm64/boot/dts/freescale/fsl-ls1012a.dts
Ls1088a platform, the i2c input clock is actually platform pll CLK / 8
(this is the hardware connection), other clock divider can not get the
correct i2c clock, resulting in the output of SCL pin clock is not
accurate.
Signed-off-by: Chuanhua Han
---
arch/arm64/boot/dts/freescale/fsl-ls1088a.dts
Lx2160a platform, the i2c input clock is actually platform pll CLK / 16
(this is the hardware connection), other clock divider can not get the
correct i2c clock, resulting in the output of SCL pin clock is not
accurate.
Signed-off-by: Chuanhua Han
---
arch/arm64/boot/dts/freescale/fsl-lx2160a.dt
The hardware manual should be revised, but the initial value of
VBCTRL.OCCLREN is set to 1 actually. If the bit is set, the hardware
clears VBCTRL.VBOUT and ADPCTRL.DRVVBUS registers automatically
when the hardware detects over-current signal from a USB power switch.
However, since the hardware doe
A call to 'kfree_skb()' is missing in the error handling path of
'init_one()'.
This is already present in 'remove_one()' but is missing here.
Signed-off-by: Christophe JAILLET
---
drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --gi
On Mon 05-08-19 13:04:47, Joel Fernandes (Google) wrote:
> The page_idle tracking feature currently requires looking up the pagemap
> for a process followed by interacting with /sys/kernel/mm/page_idle.
> Looking up PFN from pagemap in Android devices is not supported by
> unprivileged process and
> On Mon, Aug 5, 2019 at 12:31 PM Johannes Weiner wrote:
>>
>> On Mon, Aug 05, 2019 at 02:13:16PM +0200, Vlastimil Babka wrote:
>> > On 8/4/19 11:23 AM, Artem S. Tashkinov wrote:
>> > > Hello,
>> > >
>> > > There's this bug which has been bugging many people for many years
>> > > already and which
Hello,
syzbot found the following crash on:
HEAD commit:1e78030e Merge tag 'mmc-v5.3-rc1' of git://git.kernel.org/..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=148d3d1a60
kernel config: https://syzkaller.appspot.com/x/.config?x=30cef20daf3e9977
da
On Tue, Aug 6, 2019 at 6:38 AM Masahiro Yamada
wrote:
>
> I was playing with sed yesterday, but the resulted code might be unreadable.
>
> Sed scripts tend to be somewhat unreadable.
> I just wondered which language is appropriate for this?
> Maybe perl, or what else? I am not good at perl, though
Let's validate the memory block size early, when initializing the
memory device infrastructure. Fail hard in case the value is not
suitable.
As nobody checks the return value of memory_dev_init(), turn it into a
void function and fail with a panic in all scenarios instead. Otherwise,
we'll crash l
On Tue, 2019-08-06 at 14:46 +0800, anson.hu...@nxp.com wrote:
> From: Anson Huang
>
> When of_clk_add_provider failed, all clks should be unregistered.
>
> Signed-off-by: Anson Huang
Reviewed-by: Daniel Baluta
Thanks Anson for the patch!
On Wed, Jul 10, 2019 at 05:46:56PM +0200, Andrea Righi wrote:
> On Wed, Jul 10, 2019 at 11:11:37PM +0800, Coly Li wrote:
> > On 2019/7/10 5:31 下午, Andrea Righi wrote:
> > > bcache_allocator() can call the following:
> > >
> > > bch_allocator_thread()
> > > -> bch_prio_write()
> > > -> bch_
On Tue, 2019-08-06 at 14:46 +0800, anson.hu...@nxp.com wrote:
> From: Anson Huang
>
> When of_clk_add_provider failed, all clks should be unregistered.
>
> Signed-off-by: Anson Huang
Reviewed-by: Daniel Baluta
> ---
> drivers/clk/imx/clk-imx8mq.c | 10 +-
> 1 file changed, 9 inserti
bcache_allocator() can call the following:
bch_allocator_thread()
-> bch_prio_write()
-> bch_bucket_alloc()
-> wait on &ca->set->bucket_wait
But the wake up event on bucket_wait is supposed to come from
bch_allocator_thread() itself => deadlock:
[ 1158.490744] INFO: task bcache_a
Dear Mika, dear Rafael,
Commit c2bf1fc2 (PCI: Add missing link delays required by the PCIe spec) [1]
increases the resume time from ACPI S3 on a desktop system Dell OptiPlex 5040
by one second. It looks like this is expected from the commit message, but
breaks existing systems with boot time req
On Tue, Aug 06, 2019 at 09:10:57AM +0200, Kinky Nekoboi wrote:
> Addional info:
>
> this only occurs if kernel is compiled with:
>
> CONFIG_XFS_DEBUG=y
>
> running 4.19.64 without xfs debugging works fine
I'm guessing 4.19 doesn't have commit c08768977b9a ("xfs: finobt AG
reserves don't conside
On 7/12/19 6:15 PM, KyleMahlkuch wrote:
> Power and x86 have different page sizes so rather than allocate the
> buffer based on number of pages we should allocate space by using
> max_sectors. There is also code in lpfc_scsi.c to be sure we don't
> write past the end of this buffer.
>
> Signed-off
On 06.08.19 11:01, David Hildenbrand wrote:
"s/driver/drivers/" in subject.
I think long term, we should move the whole memory block size
configuration (set_memory_block_size_order() and
memory_block_size_bytes()) into drivers/base/memory.c.
> Let's validate the memory block size early, when ini
On Mon 05-08-19 14:55:42, Johannes Weiner wrote:
> On Mon, Aug 05, 2019 at 03:31:19PM +0200, Michal Hocko wrote:
> > On Mon 05-08-19 14:13:16, Vlastimil Babka wrote:
> > > On 8/4/19 11:23 AM, Artem S. Tashkinov wrote:
> > > > Hello,
> > > >
> > > > There's this bug which has been bugging many peop
On 8/6/19 10:11 AM, Wei Yang wrote:
> When addr is out of the range of the whole rb_tree, pprev will points to
> the biggest node. find_vma_prev gets is by going through the right most
s/biggest/last/ ? or right-most?
> node of the tree.
>
> Since only the last node is the one it is looking for,
It is easy to miss already defined region types. Let's re-arrange
the definitions a bit and add more comments to make it hopefully
a bit clearer.
No functional change.
Signed-off-by: Cornelia Huck
---
v1 -> v2:
- moved all pci subtypes together
- tweaked comments a bit more
---
include/uapi
Hi Arnd,
On Tue, Aug 6, 2019 at 6:00 PM Arnd Bergmann wrote:
>
> On Tue, Aug 6, 2019 at 6:38 AM Masahiro Yamada
> wrote:
> >
> > I was playing with sed yesterday, but the resulted code might be unreadable.
> >
> > Sed scripts tend to be somewhat unreadable.
> > I just wondered which language is
+Nicholas and Matthias
On Tue, Aug 06, 2019 at 11:20:37AM +0200, Paul Menzel wrote:
> Dear Mika, dear Rafael,
>
>
> Commit c2bf1fc2 (PCI: Add missing link delays required by the PCIe spec) [1]
> increases the resume time from ACPI S3 on a desktop system Dell OptiPlex 5040
> by one second. It lo
On 8/6/19 3:08 AM, Suren Baghdasaryan wrote:
>> @@ -1280,3 +1285,50 @@ static int __init psi_proc_init(void)
>> return 0;
>> }
>> module_init(psi_proc_init);
>> +
>> +#define OOM_PRESSURE_LEVEL 80
>> +#define OOM_PRESSURE_PERIOD(10 * NSEC_PER_SEC)
>
> 80% of the last 10 seconds s
In Xen environment, if Xen-swiotlb is enabled, ixgbe driver
could possibly allocate a page, DMA memory buffer, for the first
fragment which is not suitable for Xen-swiotlb to do DMA operations.
Xen-swiotlb will internally allocate another page for doing DMA
operations. It requires syncing between t
From: He Zhe
reply_cache_stats uses wrong parameter as seq file private structure and
thus causes the following kernel crash when users read
/proc/fs/nfsd/reply_cache_stats
m=a2ec03f7 v=f5777155
BUG: kernel NULL pointer dereference, address: 01f9
PGD 0 P4D 0
Oops: 000
On 11/07/2019 03:37, anson.hu...@nxp.com wrote:
From: Anson Huang
Add compatible for i.MX8MN and add i.MX8MM/i.MX8MN to the description.
Signed-off-by: Anson Huang
Applied both the patches.
Thanks,
srini
---
Documentation/devicetree/bindings/nvmem/imx-ocotp.txt | 3 ++-
1 file chan
From: He Zhe
reply_cache_stats uses wrong parameter as seq file private structure and
thus causes the following kernel crash when users read
/proc/fs/nfsd/reply_cache_stats
BUG: kernel NULL pointer dereference, address: 01f9
PGD 0 P4D 0
Oops: [#3] SMP PTI
CPU: 6 PID: 1502 Comm:
Please ignore this one. Resent.
Thanks,
Zhe
On 8/6/19 5:38 PM, zhe...@windriver.com wrote:
> From: He Zhe
>
> reply_cache_stats uses wrong parameter as seq file private structure and
> thus causes the following kernel crash when users read
> /proc/fs/nfsd/reply_cache_stats
>
> m=a2ec03f7
Add the compatible for MT8516 in order to take advantage of the
MediaTek CPUFreq driver for Mediatek's MT8516 SoC.
Signed-off-by: Fabien Parent
---
drivers/cpufreq/mediatek-cpufreq.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/cpufreq/mediatek-cpufreq.c
b/drivers/cpufreq/mediate
commit 32646db8cc28 ("Bluetooth: btqca: inject command complete event
during fw download") added qca_inject_cmd_complete_event() for certain
qualcomm chips. However, qca_download_firmware() will return without
calling release_firmware() in this case.
This leads to a memory leak like the following
Dear Mika,
Thank you for your quick reply.
On 06.08.19 11:36, Mika Westerberg wrote:
> +Nicholas and Matthias
>
> On Tue, Aug 06, 2019 at 11:20:37AM +0200, Paul Menzel wrote:
>> Commit c2bf1fc2 (PCI: Add missing link delays required by the PCIe spec) [1]
>> increases the resume time from ACP
This small patch set is to add support for function error injection;
this can be used to eanble more advanced debugging feature, e.g.
CONFIG_BPF_KPROBE_OVERRIDE.
The patch 01/03 is to consolidate the function definition which can be
suared cross architectures, patches 02,03/03 are used for enablin
The function override_function_with_return() is defined separately for
each architecture and every architecture's definition is almost same
with each other. E.g. x86 and powerpc both define function in its own
asm/error-injection.h header and override_function_with_return() has
the same definition
Inspired by the commit 7cd01b08d35f ("powerpc: Add support for function
error injection"), this patch supports function error injection for
Arm64.
This patch mainly support two functions: one is regs_set_return_value()
which is used to overwrite the return value; the another function is
override_f
Apparently, having ~1000 wired interrupts is not enough, and some
people need more. Fear not! The GIC Achitecture Department hereby
grants you another 1024 SPIs, together with 64 PPIs, provided that you
implement GICv3.1 (see [1] for the details)
This series implements the required support, which
Expand the pre-existing PPI support to be able to deal with the
Extended PPI range (EPPI). This includes obtaining the number of PPIs
from each individual redistributor, and compute the minimum set
(just in case someone builds something really clever...).
Signed-off-by: Marc Zyngier
---
drivers/
Again, PPIs are becoming a variable set. Let's hack the PPI partition
code to make the top-level array dynamically allocated.
Signed-off-by: Marc Zyngier
---
drivers/irqchip/irq-gic-v3.c | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v
GICv3.1 allows up to 80 PPIs (16 legaci PPIs and 64 Extended PPIs),
meaning we can't just leave the old 16 hardcoded everywhere.
We also need to add the infrastructure to discover the number of PPIs
on a per redistributor basis, although we still pretend there is only
16 of them for now.
No funct
As is it usual for the GIC, it isn't disallowed to put together a system
that is majorly inconsistent, with a distributor supporting the
extended ranges while some of the CPUs don't.
Kindly tell the user that things are sailing isn't going to be smooth.
Signed-off-by: Marc Zyngier
---
drivers/i
gic_configure_irq is currently passed the (re)distributor address,
to which it applies an a fixed offset to get to the configuration
registers. This offset is constant across all GICs, or rather it was
until to v3.1...
An easy way out is for the individual drivers to pass the base
address of the c
This patch implements arm specific functions regs_set_return_value() and
override_function_with_return() to support function error injection.
In the exception flow, it updates pt_regs::ARM_pc with pt_regs::ARM_lr
so can override the probed function return.
Signed-off-by: Leo Yan
---
arch/arm/Kc
Update the GICv3 binding to allow interrupts in the EPPI range.
Signed-off-by: Marc Zyngier
---
.../devicetree/bindings/interrupt-controller/arm,gic-v3.yaml | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git
a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3
When evaluating potential quirks matched by reads of the IIDR
register, skip the quirk entries that use a "compatible"
property attached to them, as these are DT based.
Signed-off-by: Marc Zyngier
---
drivers/irqchip/irq-gic-common.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/
It looks like the HIP06/07 SoCs have extra bits in their GICD_TYPER
registers, which confuse the GICv3.1 code (these systems appear to
expose ESPIs while they actually don't).
Detect these systems as early as possible and wipe the fields that
should be RES0 in the register.
Signed-off-by: Marc Zy
As we're about to have a variable number of PPIs, let's make the
allocation of the NMI refcounts dynamic. Also apply some minor
cleanups (moving things around).
Signed-off-by: Marc Zyngier
---
drivers/irqchip/irq-gic-v3.c | 47 ++--
1 file changed, 34 insertions(+
In the beginning, life was simple. The GIC driver mostly cared about
PPIs, SPIs and LPIs, all with nicely layed out ranges.
We're about to change all that, with new ranges such as EPPI and ESPI
interleaved in the middle of the no-irq-land between the "special IDs"
and the LPI range. Boo.
In order
Add the required support for the ESPI range, which behave exactly like
the SPIs of old, only with new funky INTIDs.
Signed-off-by: Marc Zyngier
---
drivers/irqchip/irq-gic-v3.c | 85 --
include/linux/irqchip/arm-gic-v3.h | 17 +-
2 files changed, 85 insertio
GICv3.1 introduces support for new interrupt ranges, one of them being
the Extended SPI range (ESPI). The DT binding is extended to deal with
it as a new interrupt class.
Reviewed-by: Lokesh Vutla
Signed-off-by: Marc Zyngier
---
.../devicetree/bindings/interrupt-controller/arm,gic-v3.yaml | 5 +
On 7/29/19 13:12, Sudeep Holla wrote:
> On Sun, Jul 28, 2019 at 10:51:35PM +0300, Ronen Krupnik wrote:
>> This patch adds the initial support for the Amazon Annapurna Labs Alpine v3
>> Soc and Evaluation Platform (EVP).
> [...]
>
>> +
>> +pmu {
>> +compatible = "ar
On 08/02, Song Liu wrote:
>
> +void collapse_pte_mapped_thp(struct mm_struct *mm, unsigned long addr)
> +{
> + unsigned long haddr = addr & HPAGE_PMD_MASK;
> + struct vm_area_struct *vma = find_vma(mm, haddr);
> + pmd_t *pmd = mm_find_pmd(mm, haddr);
> + struct page *hpage = NULL;
>
On 04/07/2019 15:20, fugang.d...@nxp.com wrote:
From: Fugang Duan
i.MX8QM efuse table has some difference with i.MX8QXP platform,
so add i.MX8QM platform support.
Signed-off-by: Fugang Duan
---
drivers/nvmem/imx-ocotp-scu.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/driv
The current implementation of need-builtin is false-positive,
for example, in the following Makefile:
obj-m := foo/
obj-y := foo/bar/
..., where foo/built-in.a is not required.
Fixes: f7adc3124da0 ("kbuild: create built-in.o automatically if parent
directory wants it")
Signed-off-by: Masahi
Since commit ff9b45c55b26 ("kbuild: modpost: read modules.order instead
of $(MODVERDIR)/*.mod"), a module is no longer built in the following
pattern:
[Makefile]
subdir-y := some-module
[some-module/Makefile]
obj-m := some-module.o
You cannot write Makefile this way in upstream because m
On 31/07/2019 08:14, Stefan Mavrodiev wrote:
Like in H3, A64 SID controller doesn't return correct data
when using direct access. It appears that on A64, SID needs
8 bytes of word_size.
Workaround is to enable read by registers.
Signed-off-by: Stefan Mavrodiev
Applied Thanks,
srini
On 27/07/2019 20:34, Martin Blumenstingl wrote:
Some Amlogic boards store the Ethernet MAC address inside the eFuse. The
Ethernet MAC address uses 6 bytes. The existing logic in
meson_mx_efuse_read() would write beyond the end of the data buffer when
trying to read data with a size that is not
The modules.order files in directories visited by the chain of obj-y
or obj-m are merged to the upper-level ones, and become parts of the
top-level modules.order. On the other hand, there is no need to
generate modules.order in directories visited by subdir-y or subdir-m.
They would become orphan a
In case off error, all entries should be freed from the sched list
before deleting it. For simplicity use rcu way.
Fixes: 5a781ccbd19e46 ("tc: Add support for configuring the taprio scheduler")
Signed-off-by: Ivan Khoronzhuk
---
Based on net/master
net/sched/sch_taprio.c | 3 ++-
1 file change
On 8/5/19 5:34 PM, Pankaj Suryawanshi wrote:
> On Mon, Aug 5, 2019 at 5:35 PM Michal Hocko wrote:
>>
>> On Mon 05-08-19 13:56:20, Vlastimil Babka wrote:
>> > On 8/5/19 1:24 PM, Michal Hocko wrote:
>> > >> [ 727.954355] CPU: 0 PID: 56 Comm: kworker/u8:2 Tainted: P O
>> > >> 4.14.65 #60
On 23/07/2019 16:32, Jose Diaz de Grenu wrote:
Currently the imx-ocotp driver does only allow reading complete OTP words
correcty aligned.
Usually OTP memory is limited, so the fields are stored using as few bits as
possible. This means that a given value rarely uses 32 bits and happens to be
Fix data transfer width settings based on DT field 'spi-rx-bus-width'
to configure BSPI in single, dual or quad mode by using data width
and not the command width.
Fixes: 5f195ee7d830c ("spi: bcm-qspi: Implement the spi_mem interface")
Signed-off-by: Rayagonda Kokatanur
---
drivers/spi/spi-bcm-
On Thu, Aug 01, 2019 at 04:53:39PM -0500, Bjorn Helgaas wrote:
> [+cc FPGA folks, just FYI; I'm pretty sure PCI could do a much better
> job supporting FPGAs, so any input is welcome!]
>
> On Wed, Jul 03, 2019 at 06:03:41PM +0300, Mika Westerberg wrote:
> > On Wed, Jul 03, 2019 at 08:39:53AM -0500
On Tue, Aug 06, 2019 at 02:26:38AM -0400, Gabriel Krisman Bertazi wrote:
> Peter Zijlstra writes:
>
> >
> >> +static int futex_wait_multiple(u32 __user *uaddr, unsigned int flags,
> >> + u32 count, ktime_t *abs_time)
> >> +{
> >> + struct futex_wait_block *wb;
> >> + str
Hi Marc,
On 8/6/19 11:01 AM, Marc Zyngier wrote:
> As is it usual for the GIC, it isn't disallowed to put together a system
> that is majorly inconsistent, with a distributor supporting the
> extended ranges while some of the CPUs don't.
>
> Kindly tell the user that things are sailing isn't goin
Switch back to BSPI mode after MSPI operations (write and erase)
are completed. This change will keep qpsi in BSPI mode by default.
Signed-off-by: Rayagonda Kokatanur
---
drivers/spi/spi-bcm-qspi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/spi/spi-bcm-qspi.c b/drivers/spi/spi-b
On Tue, 2019-08-06 at 06:59 +, Brendan Jackman wrote:
> The arguments of sizeof are not evaluated so arguments are safe to
> re-use in that context. Excludeing sizeof sub-expressions means
> macros like ARRAY_SIZE can pass checkpatch.
Seems sensible, thanks.
> Signed-off-by: Brendan Jackman
On 2019/08/05 23:26, Michal Hocko wrote:
> On Mon 05-08-19 23:00:12, Tetsuo Handa wrote:
>> On 2019/08/05 20:44, Michal Hocko wrote:
Allowing forced charge due to being unable to invoke memcg OOM killer
will lead to global OOM situation, and just returning -ENOMEM will not
solve memc
On 06/08/2019 03:55, Anson Huang wrote:
> Gentle ping...
Coming back from vacation. It is in the pipe ... :)
>> From: Anson Huang
>>
>> The system counter block guide states that the base clock is internally
>> divided
>> by 3 before use, that means the clock input of system counter defined in
Hi,
Kindly pull the new firmware from the following URL:
git://git.chelsio.net/pub/git/linux-firmware.git for-upstream
Thanks,
Vishal
The following changes since commit dff98c6c57383fe343407bcb7b6e775e0b87274f:
Merge branch 'master' of git://github.com/skeggsb/linux-firmware (2019-07-26
07:
On Tue, Jul 23, 2019 at 10:21:54PM +0300, Andy Shevchenko wrote:
> Use use device_property_count_uXX() directly, that makes code neater.
>
> Signed-off-by: Andy Shevchenko
Applied, thanks!
> ---
> drivers/thunderbolt/eeprom.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --
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Both patches applied, thanks.
--
Jiri Kosina
SUSE Labs
On Mon, Aug 5, 2019 at 7:13 PM Anup Patel wrote:
>
> We implement a simple VMID allocator for Guests/VMs which:
> 1. Detects number of VMID bits at boot-time
> 2. Uses atomic number to track VMID version and increments
>VMID version whenever we run-out of VMIDs
> 3. Flushes Guest TLBs on all h
On Fri, Aug 02, 2019 at 03:41:22PM -0400, Qian Cai wrote:
> GCC throws a warning on an arm64 system since the commit 9849a5697d3d
> ("arch, mm: convert all architectures to use 5level-fixup.h"),
>
> mm/kasan/init.c: In function 'kasan_free_p4d':
> mm/kasan/init.c:344:9: warning: variable 'p4d' set
On Tue, 06 Aug 2019 09:00:27 +0200,
Wenwen Wang wrote:
>
> In snd_usb_get_audioformat_uac3(), a structure for channel maps 'chmap' is
> allocated through kzalloc() before the execution goto 'found_clock'.
> However, this structure is not deallocated if the memory allocation for
> 'pd' fails, leadi
Signed-off-by: Chen Minqiang
---
net/ipv4/ipip.c | 1 +
net/ipv6/sit.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/net/ipv4/ipip.c b/net/ipv4/ipip.c
index 43adfc1641ba..ba2b5fc8910f 100644
--- a/net/ipv4/ipip.c
+++ b/net/ipv4/ipip.c
@@ -242,6 +242,7 @@ static int ipip_tunnel_rcv(struct
On Tue 06-08-19 19:26:12, Tetsuo Handa wrote:
> On 2019/08/05 23:26, Michal Hocko wrote:
> > On Mon 05-08-19 23:00:12, Tetsuo Handa wrote:
> >> On 2019/08/05 20:44, Michal Hocko wrote:
> Allowing forced charge due to being unable to invoke memcg OOM killer
> will lead to global OOM situat
On Tue, Aug 06, 2019 at 11:47:49AM +0530, Naresh Kamboju wrote:
> On Mon, 5 Aug 2019 at 18:50, Greg Kroah-Hartman
> wrote:
> >
> > This is the start of the stable review cycle for the 5.2.7 release.
> > There are 131 patches in this series, all will be posted as a response
> > to this one. If any
On Wed, Jul 31, 2019 at 09:21:01AM +0200, Michal Hocko wrote:
> On Wed 31-07-19 14:44:47, Minchan Kim wrote:
> > On Tue, Jul 30, 2019 at 02:57:51PM +0200, Michal Hocko wrote:
> > > [Cc Nick - the email thread starts
> > > http://lkml.kernel.org/r/20190729071037.241581-1-minc...@kernel.org
> > > A
Currently empty .bss checks performed do not pay attention to "common
objects" in object files which end up in .bss section eventually.
The "size" tool is a part of binutils and since version 2.18 provides
"--common" command line option, which allows to account "common objects"
sizes in .bss secti
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