Daniel,
On Thu, 27 Jun 2019, Daniel Drake wrote:
> Picking up this issue again after a break!
>
> We made some progress last time on reducing PIT usage in the TSC
> calibration code, but we still have the bigger issue to resolve:
> IO-APIC code panicing when the PIT isn't ticking.
Yeah. I was bu
Dear Friend,
An oil business man made a fixed deposit of €15 million Euros in my
bank branch where I am a director and he died with his entire family
in a plane crash leaving behind no next of kin. I Propose to present
you as next of kin /Business associate to claim the funds, if
interested contac
On Wed, Jun 26, 2019 at 6:44 PM Andrew Jeffery wrote:
>
>
>
> On Wed, 26 Jun 2019, at 23:17, Rob Herring wrote:
> > On Wed, Jun 26, 2019 at 1:21 AM Andrew Jeffery wrote:
> > >
> > > Convert ASPEED pinctrl bindings to DT schema format using json-schema
> >
> > BTW, ASPEED is one of the remaining p
Not every arch has ARM_GIC, it is strange
to see ARM_GIC_MAX_NR in the .config file
of the x86 and IA-64 architecture. so fix
build by adding necessary dependency.
Signed-off-by: Jiangfeng Xiao
---
drivers/irqchip/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/irqchip/Kconfi
On 6/27/2019 1:51 PM, Cornelia Huck wrote:
> On Thu, 27 Jun 2019 00:33:59 +0530
> Kirti Wankhede wrote:
>
>> On 6/26/2019 11:35 PM, Alex Williamson wrote:
>>> On Wed, 26 Jun 2019 23:23:00 +0530
>>> Kirti Wankhede wrote:
>>>
On 6/26/2019 7:57 PM, Alex Williamson wrote:
> This all
On Thu, 27 Jun 2019 16:53:55 +0530
"Naveen N. Rao" wrote:
> With KPROBES_ON_FTRACE, kprobe is allowed to be inserted on instructions
> that branch to _mcount (referred to as ftrace location). With
> -mprofile-kernel, we now include the preceding 'mflr r0' as being part
> of the ftrace location.
>
On Wed, Jun 26, 2019 at 11:35 PM Stephen Rothwell wrote:
>
> Hi Dave,
>
> On Wed, 26 Jun 2019 21:22:12 +1000 Stephen Rothwell
> wrote:
> >
> > Hi Alex,
> >
> > After merging the amdgpu tree, today's linux-next build (powerpc
> > allyesconfig) failed like this:
> >
> > In file included from drive
Hello, Waiman.
On Wed, Jun 26, 2019 at 12:56:14PM -0400, Waiman Long wrote:
> With memory cgroup v1, there is a kmem.slabinfo file that can be
> used to view what slabs are allocated to the memory cgroup. There
> is currently no such equivalent in memory cgroup v2. This file can
> be useful for de
On 27/06/2019 15:11, Jiangfeng Xiao wrote:
> Not every arch has ARM_GIC, it is strange
> to see ARM_GIC_MAX_NR in the .config file
> of the x86 and IA-64 architecture. so fix
> build by adding necessary dependency.
>
> Signed-off-by: Jiangfeng Xiao
> ---
> drivers/irqchip/Kconfig | 1 +
> 1 file
On Mon, Jun 17, 2019 at 01:43:36PM +0100, Lorenzo Pieralisi wrote:
> On Fri, Jun 14, 2019 at 12:10:59PM +0200, Remi Pommarel wrote:
> > PCI_EXP_RTCTL is used to activate PME interrupt only, so writing into it
> > should not modify other interrupts' mask. The ISR mask polarity was also
> > inverted,
On Wed, Jun 26, 2019 at 09:25:58AM -0700, Paul E. McKenney wrote:
> On Wed, Jun 26, 2019 at 03:54:47PM +0200, Sebastian Andrzej Siewior wrote:
> > one of my boxes boots with "threadirqs" and since commit 05f415715ce45
> > ("rcu: Speed up expedited GPs when interrupting RCU reader") I run
> > reliab
Rong, Fengguang,
On Wed, 26 Jun 2019, Rong Chen wrote:
> On 6/25/19 7:32 PM, Thomas Gleixner wrote:
> > > I have tested commit e0b179bc1a ("x86/apic/x2apic: Add conditional IPI
> > > shorthands support"), the problem is still exist.
> > the head of that branch is:
> >
> >4f3f6d6a7f8e ("x8
On Thu, Jun 27, 2019 at 4:02 PM Jeffrey Hugo wrote:
>
> On Sun, Jun 23, 2019 at 12:20 AM Dmitry Torokhov
> wrote:
> >
> > On Fri, Jun 21, 2019 at 07:50:42AM -0700, Jeffrey Hugo wrote:
> > > Elan_i2c and hid-quirks work in conjunction to decide which devices each
> > > driver will handle. Elan_i2
From: Enrico Weigelt
Explicitly return constants instead of variable (and rely on
it to be explicitly initialized), if the value is supposed
to be fixed anyways. Align it with the rest of the driver,
which does it the same way.
Signed-off-by: Enrico Weigelt
---
drivers/net/wireless/rsi/rsi_91x
On 2019/6/27 22:20, Marc Zyngier wrote:
> On 27/06/2019 15:11, Jiangfeng Xiao wrote:
>> Not every arch has ARM_GIC, it is strange
>> to see ARM_GIC_MAX_NR in the .config file
>> of the x86 and IA-64 architecture. so fix
>> build by adding necessary dependency.
>>
>> Signed-off-by: Jiangfeng Xiao
On Wed, 19 Jun 2019 10:41:14 +0800
kernel test robot wrote:
> Greetings,
>
> 0day kernel testing robot got the below dmesg and the first bad commit is
>
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
>
> commit fcc784be837714a9173b372ff9fb9b514590dad9
> Author:
On Wed, Jun 26, 2019 at 9:55 PM Andrew Jeffery wrote:
>
>
>
> On Wed, 26 Jun 2019, at 23:17, Rob Herring wrote:
> > On Wed, Jun 26, 2019 at 1:21 AM Andrew Jeffery wrote:
> > > + The pin controller node should be the child of a syscon node with the
> > > + required property:
> > > +
> > > + - c
On 16:39-20190627, Keerthy wrote:
> Enable GPIO_DAVINCI and related configs for TI K3 AM6 platforms.
>
> Signed-off-by: Keerthy
> ---
>
> Changes in v2:
>
> * Enabling configs in Kconfig.platforms file instead of defconfig.
> * Removed GPIO_DEBUG config.
>
&
On Thu, 27 Jun 2019 10:24:36 -0400
Joel Fernandes wrote:
> > What am I missing here?
>
> This issue I think is
>
> (in normal process context)
> spin_lock_irqsave(rq_lock); // which disables both preemption and interrupt
> // but this was done in normal process contex
On 6/26/19 8:57 PM, Andy Lutomirski wrote:
On Jun 26, 2019, at 1:22 PM, James Morris wrote:
[Adding the LSM mailing list: missed this patchset initially]
On Thu, 20 Jun 2019, Andy Lutomirski wrote:
This patch exemplifies why I don't like this approach:
@@ -97,6 +97,7 @@ enum lockdown_re
On Thu, 27 Jun 2019 16:53:51 +0530
"Naveen N. Rao" wrote:
> While over-riding ftrace_replace_code(), we still want to reuse the
> existing __ftrace_replace_code() function. Rename the function and
> make it available for other kernel code.
>
> Signed-off-by: Naveen N. Rao
> ---
> include/linux
On 6/27/19 7:02 AM, Michal Hocko wrote:
>> Is the LRU behavior part of the interface or the implementation?
>>
>> I ask because we've got something in between tossing something down the
>> LRU and swapping it: page migration. Specifically, on a system with
>> slower memory media (like persistent m
On Thu, Jun 27, 2019 at 12:59:07PM +0100, Vincenzo Frascino wrote:
> On 6/27/19 12:27 PM, Dave Martin wrote:
> > On Thu, Jun 27, 2019 at 11:57:36AM +0100, Vincenzo Frascino wrote:
[...]
> >> Disassembly of section .text:
> >> show_it:
> >>0: e8 03 1f aa mov x8, x
Octavio,
On Mon, 24 Jun 2019, Octavio Alvarez wrote:
> On 6/23/19 7:54 AM, Thomas Gleixner wrote:
> > Load the driver on Linus master with the following module parameter:
> >
> > disable_msi=1
> >
> > That switches to INTx usage. Does the machine resume proper with that?
>
> I did two tes
On Mon, Jun 24, 2019 at 02:44:54PM +0530, Vidya Sagar wrote:
> Add #defines only for the Data Link Feature and Physical Layer 16.0 GT/s
> features.
>
> Signed-off-by: Vidya Sagar
> Reviewed-by: Thierry Reding
> ---
> Changes since [v10]:
> * None
>
> Changes since [v9]:
> * None
>
> Changes si
On Thu, 2019-06-27 at 14:51 +0100, Luis Henriques wrote:
> Having granularity set to 1us results in having inode timestamps with a
> accurancy different from the fuse client (i.e. atime, ctime and mtime will
> always end with '000'). This patch normalizes this behaviour and sets the
> granularity
On 27/06/2019 15:30, Jiangfeng Xiao wrote:
>
>
> On 2019/6/27 22:20, Marc Zyngier wrote:
>> On 27/06/2019 15:11, Jiangfeng Xiao wrote:
>>> Not every arch has ARM_GIC, it is strange
>>> to see ARM_GIC_MAX_NR in the .config file
>>> of the x86 and IA-64 architecture. so fix
>>> build by adding nece
On Thu, Jun 27, 2019 at 03:21:37PM +0200, Corentin Labbe wrote:
> Hello
>
> I own an USB dongle which is a "Davicom DM96xx USB 10/100 Ethernet".
> According to the CHIP_ID, it is a DM9620.
>
> Since I needed for bringing network to uboot for a board, I have started to
> create its uboot's driver
Add support for SAM9X60's slow clock.
Signed-off-by: Claudiu Beznea
Acked-by: Alexandre Belloni
---
drivers/clk/at91/sckc.c | 74 +
1 file changed, 74 insertions(+)
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index ab18b1da269f
Different IPs uses different bit offsets in registers for the same
functionality, thus adapt the driver to support this.
Signed-off-by: Claudiu Beznea
Acked-by: Alexandre Belloni
---
drivers/clk/at91/sckc.c | 93 -
1 file changed, 61 insertions(+)
Add bindings for SAM9X60's slow clock controller.
Signed-off-by: Claudiu Beznea
Reviewed-by: Alexandre Belloni
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/clock/at91-clock.txt | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree
Hi,
This series add slow clock support for SAM9X60. Apart from previous IPs, this
one uses different offsets in control register for different functionalities.
The series adapt current driver to work for all IPs using per IP
configurations initialized at probe.
Stephen,
I send a new version of t
The slow clock of SAMA5D4 has no bypass support thus remove it.
Signed-off-by: Claudiu Beznea
Acked-by: Alexandre Belloni
---
drivers/clk/at91/sckc.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index e76b1d64e905..6c55a7a86f79 10064
Steven Rostedt wrote:
On Thu, 27 Jun 2019 16:53:50 +0530
"Naveen N. Rao" wrote:
In commit a0572f687fb3c ("ftrace: Allow ftrace_replace_code() to be
schedulable), the generic ftrace_replace_code() function was modified to
accept a flags argument in place of a single 'enable' flag. However, the
Hi Shivamurthy,
"Shivamurthy Shastri (sshivamurthy)" wrote on
Mon, 3 Jun 2019 12:43:20 +:
> Current support to ONFI parameter page is only for raw NAND, this patch
> series turn ONFI support into generic. So that, other NAND devices like
> SPI NAND can use this.
>
> There are five parts in
Hi Stephen,
Stephen Rothwell wrote on Tue, 4 Jun 2019
10:54:18 +1000:
> Hi all,
>
> Today's linux-next merge of the nand tree got a conflict in:
>
> Documentation/devicetree/bindings/mtd/brcm,brcmnand.txt
>
> between commit:
>
> a5f2246fb913 ("dt: bindings: mtd: replace references to nan
Naveen N. Rao wrote:
With -mprofile-kernel, gcc emits 'mflr r0', followed by 'bl _mcount' to
enable function tracing and profiling. So far, with dynamic ftrace, we
used to only patch out the branch to _mcount(). However, mflr is
executed by the branch unit that can only execute one per cycle on
P
Hi,
On Thu, Jun 27, 2019 at 02:58:24PM +0100, Srinivas Kandagatla wrote:
> On 27/06/2019 14:55, Rob Herring wrote:
> > But you didn't update the license to (GPL-2.0 OR BSD-2-Clause). See below.
>
> I did forward what Maxime has sent me.
>
> Maxime, are you okay if I do that changes to this patch a
On Thu 27-06-19 07:36:50, Dave Hansen wrote:
[...]
> For MADV_COLD, if we defined it like this, I think we could use it for
> both purposes (demotion and LRU movement):
>
> Pages in the specified regions will be treated as less-recently-
> accessed compared to pages in the system with
Hi Richard,
Richard Weinberger wrote on Tue, 11 Jun
2019 22:16:36 +0200:
> On Tue, Jun 11, 2019 at 10:03 PM Kamal Dasu wrote:
> >
> > Richard,
> >
> > You have any other review comments/concerns with this patch, if not
> > can you please sign off on it.
>
> I'm fine with that approach.
> I h
Hi Kamal,
Kamal Dasu wrote on Tue, 4 Jun 2019 10:36:29
-0400:
> Refactored NAND ECC and CMD address configuration code to use helper
> functions.
>
I'll take this series and edit myself the commit title but for next time
please change the subject to "mtd: rawnand:" ;)
Thanks,
Miquèl
Quoting Claudiu Beznea (2019-06-27 07:47:17)
> Hi,
>
> This series add slow clock support for SAM9X60. Apart from previous IPs, this
> one uses different offsets in control register for different functionalities.
> The series adapt current driver to work for all IPs using per IP
> configurations i
On Thu, Jun 27, 2019 at 9:20 AM Stephen Rothwell wrote:
> After merging the gpio tree, today's linux-next build (x86_64
> allmodconfig) produced this warning:
>
> drivers/gpio/gpio-amd-fch.c: In function 'amd_fch_gpio_probe':
> drivers/gpio/gpio-amd-fch.c:171:49: warning: passing argument 2 of
>
On Mon, Jun 24, 2019 at 02:44:56PM +0530, Vidya Sagar wrote:
> Remove multiple write enable and disable sequences of dbi registers as
> Tegra194 implements writes to BAR-0 register (offset: 0x10) controlled by
> DBI write-lock enable bit thereby not allowing any further writes to BAR-0
> register i
This is a little helper script for mailing patches out of a git
branch to the corresponding maintainers.
Essentially, it scans the touched files, asks get_maintainer.pl
for their maintainers and calls git-send-email for mailing out
the patches.
Syntax:
./scripts/git-send-patch []
Examples:
Quoting claudiu.bez...@microchip.com (2019-06-13 08:37:06)
> From: Claudiu Beznea
>
> Hi,
>
> This series tries to improve error path for slow clock registrations
> by adding functions to free resources and using them on failures.
If possible, resend this patch series in plain text. Thanks.
Hi Bjorn,
On Thu, Apr 18, 2019 at 1:46 AM Bjorn Helgaas wrote:
>
> On Mon, Nov 19, 2018 at 06:44:32PM +0530, sundeep.l...@gmail.com wrote:
> > From: Subbaraya Sundeep
> >
> > As per the spec, bridges with EA capability work
> > with fixed secondary and subordinate bus numbers.
> > Hence assign b
Support the recently introduced gpio lookup tables for
attaching to gpio lines. So, harcoded gpio numbers aren't
needed anymore.
Cc: Dmitry Torokhov
Cc: linux-in...@vger.kernel.org
Signed-off-by: Enrico Weigelt, metux IT consult
---
drivers/input/keyboard/gpio_keys_polled.c | 167 ++
Instead of hardcoding the input name to the driver name
('gpio-keys-polled'), allow the passing a name via platform data
('name' field was already present), but default to old behaviour
in case of NULL.
Cc: Dmitry Torokhov
Cc: linux-in...@vger.kernel.org
Signed-off-by: Enrico Weigelt, metux IT co
On Thu, 27 Jun 2019 16:53:52 +0530
"Naveen N. Rao" wrote:
> With -mprofile-kernel, gcc emits 'mflr r0', followed by 'bl _mcount' to
> enable function tracing and profiling. So far, with dynamic ftrace, we
> used to only patch out the branch to _mcount(). However, mflr is
> executed by the branch
.
>
> I added a forward declaration for struct key_acl into
> security/integrity/integrity.h as you can see here:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-fs.git/diff/security/integrity/integrity.h?h=keys-acl&id=75ce113a1d56880e5abd37fa664ea9af399d2bcd
>
> which might not have made it into linux-next before you used it.
No problem in linux-next 20190627.
Thanks.
--
~Randy
On Mon, 2019-06-24 at 19:03 -0300, Thiago Jung Bauermann wrote:
> Hello Prakhar,
>
> Prakhar Srivastava writes:
>
> > diff --git a/security/integrity/ima/ima_template.c
> > b/security/integrity/ima/ima_template.c
> > index 00dd5a434689..a01a17e5c581 100644
> > --- a/security/integrity/ima/ima_t
The index value should be passed to the of_parse_phandle()
function to ensure the correct property is read.
Signed-off-by: Roy Pledge
---
drivers/soc/fsl/qbman/dpaa_sys.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/fsl/qbman/dpaa_sys.c b/drivers/soc/fsl/qbman/
Commit-ID: d97ee99bf225d35a50ed8812c3d037b2ba7ad2ea
Gitweb: https://git.kernel.org/tip/d97ee99bf225d35a50ed8812c3d037b2ba7ad2ea
Author: Zhenzhong Duan
AuthorDate: Wed, 26 Jun 2019 16:54:49 +0800
Committer: Thomas Gleixner
CommitDate: Thu, 27 Jun 2019 16:59:19 +0200
x86/jailhouse: Mark
On Wed, Jun 26, 2019 at 09:16:44PM -0700, Kees Cook wrote:
> Right -- any they're almost all logged surrounded by ' or " which means
> those would need to be escaped as well. The prism2 is leaking newlines
> too, as well as the thunderbolt sysfs printing.
>
> So... seems like we should fix this. :
On 6/27/19 7:11 AM, Tony Lindgren wrote:
> Hi,
>
> * Suman Anna [190625 23:33]:
>> The clocks are not yet parsed and prepared until after a successful
>> sysc_get_clocks(), so there is no need to unprepare the clocks upon
>> any failure of any of the prior functions in sysc_probe(). The current
>
On Thu, Jun 27, 2019 at 03:33:23PM +0800, YueHaibing wrote:
> Remove duplicated include.
>
> Signed-off-by: YueHaibing
NAK, Eric Sandeen already sent this to the list.
--D
> ---
> fs/xfs/xfs_extfree_item.c | 1 -
> fs/xfs/xfs_filestream.c | 1 -
> fs/xfs/xfs_pnfs.c | 1 -
> 3 files
Hi Steven,
Thanks for the review!
Steven Rostedt wrote:
On Thu, 27 Jun 2019 16:53:52 +0530
"Naveen N. Rao" wrote:
With -mprofile-kernel, gcc emits 'mflr r0', followed by 'bl _mcount' to
enable function tracing and profiling. So far, with dynamic ftrace, we
used to only patch out the branch to
On Thu, Jun 27, 2019 at 10:34:55AM -0400, Steven Rostedt wrote:
> On Thu, 27 Jun 2019 10:24:36 -0400
> Joel Fernandes wrote:
>
> > > What am I missing here?
> >
> > This issue I think is
> >
> > (in normal process context)
> > spin_lock_irqsave(rq_lock); // which disables both preemption and
On Wed, Jun 26, 2019 at 6:49 PM Daniel Axtens wrote:
>
> Matthew Garrett writes:
> > + if (kp->flags & KERNEL_PARAM_FL_HWPARAM &&
> > + security_locked_down(LOCKDOWN_MODULE_PARAMETERS))
> > + return false;
> > + return true;
> > }
>
> Should this test occur before tai
On 27 Jun 2019, at 8:48, Anshuman Khandual wrote:
> pmd_present() and pmd_trans_huge() are expected to behave in the following
> manner during various phases of a given PMD. It is derived from a previous
> detailed discussion on this topic [1] and present THP documentation [2].
>
> pmd_present(pmd
On Thu, Jun 27, 2019 at 4:09 AM Sudeep Holla wrote:
>
> On Wed, Jun 26, 2019 at 01:27:41PM -0500, Jassi Brar wrote:
> > On Wed, Jun 26, 2019 at 11:44 AM Florian Fainelli
> > wrote:
> > >
> > > On 6/26/19 6:31 AM, Peng Fan wrote:
> > > >>> The firmware driver might not have func-id, such as SCMI/
On 6/27/2019 8:28 PM, Lorenzo Pieralisi wrote:
On Mon, Jun 24, 2019 at 02:44:56PM +0530, Vidya Sagar wrote:
Remove multiple write enable and disable sequences of dbi registers as
Tegra194 implements writes to BAR-0 register (offset: 0x10) controlled by
DBI write-lock enable bit thereby not allow
Hi Dave,
On 6/27/19 3:38 PM, Dave Martin wrote:
> On Thu, Jun 27, 2019 at 12:59:07PM +0100, Vincenzo Frascino wrote:
>> On 6/27/19 12:27 PM, Dave Martin wrote:
>>> On Thu, Jun 27, 2019 at 11:57:36AM +0100, Vincenzo Frascino wrote:
>
> [...]
>
Disassembly of section .text:
0
On 25.06.19 10:25, Juergen Gross wrote:
Gentle ping.
I'd really like to have that in 5.2 in order to avoid the regression
introduced with 5.2-rc1.
Adding some maintainers directly...
Juergen
Juergen
On 20.06.19 18:08, Juergen Gross wrote:
Commit 0e56acae4b4dd4a9 ("mm: initialize MAX_OR
Add error codes and messages for all the error paths leading to sort
specification parsing errors.
Signed-off-by: Tom Zanussi
---
kernel/trace/trace_events_hist.c | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/kernel/trace/trace_events_hist.c b/kernel/
Hi,
These patches add some improvements for histogram sorting, addressing
some shortcomings pointed out by Masami.
In order to address the specific problem pointed out by Masami, as
well as add additional related error messages, the first patch
does some simplification of assignment parsing.
The
Add a testcase ensuring that the tracing error_log correctly displays
hist trigger parsing errors.
Signed-off-by: Tom Zanussi
---
.../test.d/trigger/trigger-hist-syntax-errors.tc | 32 ++
1 file changed, 32 insertions(+)
create mode 100644
tools/testing/selftests/ftrace/t
In the process of adding better error messages for sorting, I realized
that strsep was being used incorrectly and some of the error paths I
was expecting to be hit weren't and just fell through to the common
invalid key error case.
It also became obvious that for keyword assignments, it wasn't
nec
Hi,
Missatge de Doug Anderson del dia dc., 26 de
juny 2019 a les 23:06:
>
> Hi,
>
> On Mon, Jun 24, 2019 at 3:53 PM Gwendal Grignou wrote:
> >
> > -static int read_ec_accel_data(struct cros_ec_accel_legacy_state *st,
> > - unsigned long scan_mask, s16 *data)
> > +int
The 'hist:' prefix gets stripped from the command text during command
processing, but should be added back when displaying the command
during error processing.
Not only because it's what should be displayed but also because not
having it means the test cases fail because the caret is miscalculated
On Thu, Jun 27, 2019 at 11:30 AM Joel Fernandes wrote:
>
> On Thu, Jun 27, 2019 at 10:34:55AM -0400, Steven Rostedt wrote:
> > On Thu, 27 Jun 2019 10:24:36 -0400
> > Joel Fernandes wrote:
> >
> > > > What am I missing here?
> > >
> > > This issue I think is
> > >
> > > (in normal process context)
On 2019-06-27 11:37:10 [-0400], Joel Fernandes wrote:
> Sebastian it would be nice if possible to trace where the
> t->rcu_read_unlock_special is set for this scenario of calling
> rcu_read_unlock_special, to give a clear idea about whether it was
> really because of an IPI. I guess we could also a
On Thu, Jun 27, 2019 at 11:40 AM Sebastian Andrzej Siewior
wrote:
>
> On 2019-06-27 11:37:10 [-0400], Joel Fernandes wrote:
> > Sebastian it would be nice if possible to trace where the
> > t->rcu_read_unlock_special is set for this scenario of calling
> > rcu_read_unlock_special, to give a clear
The target lun sysfs entry contains the contents of an 8 byte LUN id
formatted as hex. Because a field width is not specified for each byte,
the resulting string is variable length and impossible for userspace to
unambiguously parse. Fix this by using a field width of 2 for each byte
so that the st
On Thu, 2019-06-27 at 16:59 +0200, Enrico Weigelt, metux IT consult
wrote:
> This is a little helper script for mailing patches out of a git
> branch to the corresponding maintainers.
>
> Essentially, it scans the touched files, asks get_maintainer.pl
> for their maintainers and calls git-send-ema
On Thu, 27 Jun 2019, Jeff Layton wrote:
> On Thu, 2019-06-27 at 14:51 +0100, Luis Henriques wrote:
> > Having granularity set to 1us results in having inode timestamps with a
> > accurancy different from the fuse client (i.e. atime, ctime and mtime will
> > always end with '000'). This patch norma
Hi Fabien,
On 27/6/19 16:04, Fabien Lahoudere wrote:
> Version 3 of the EC protocol provides min and max frequencies for EC sensors.
> Default frequencies are provided for earlier protocol.
>
This patch should really go together with a respin of your previous patchset to
'Expose cros_ec_sensors
On 06/27, kernel test robot wrote:
> FYI, we noticed the following commit (built with gcc-7):
>
> commit: cd17d77705780e2270937fb3cbd2b985adab3edc ("bpf/tools: sync bpf.h")
> https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git master
>
> in testcase: kernel_selftests
> with following
On Thu, Jun 27, 2019 at 09:03:08PM +0530, Vidya Sagar wrote:
> On 6/27/2019 8:28 PM, Lorenzo Pieralisi wrote:
> > On Mon, Jun 24, 2019 at 02:44:56PM +0530, Vidya Sagar wrote:
> > > Remove multiple write enable and disable sequences of dbi registers as
> > > Tegra194 implements writes to BAR-0 regis
On Thu, Jun 27, 2019 at 09:47:05AM +0200, Sebastian Andrzej Siewior wrote:
> On 2019-06-26 09:25:58 [-0700], Paul E. McKenney wrote:
> > On Wed, Jun 26, 2019 at 03:54:47PM +0200, Sebastian Andrzej Siewior wrote:
> > > one of my boxes boots with "threadirqs" and since commit 05f415715ce45
> > > ("rc
On Wed, Jun 26, 2019 at 09:47:30PM -0700, Andy Lutomirski wrote:
> If we end up without a PGD or PUD entry backing the gate area, don't
> BUG -- just fail gracefully.
>
> It's not entirely implausible that this could happen some day on
> x86. It doesn't right now even with an execute-only emulate
Add support to free slow clock oscillator resources.
Signed-off-by: Claudiu Beznea
Reviewed-by: Alexandre Belloni
---
drivers/clk/at91/sckc.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index 492b139a7c15..2a677c56f901 100644
---
Remove unnecessary line.
Signed-off-by: Claudiu Beznea
Reviewed-by: Alexandre Belloni
---
drivers/clk/at91/sckc.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index a2b905c91085..c61b6c9ddb94 100644
--- a/drivers/clk/at91/sckc.c
+++ b/driv
Add support to free slow oscillator resources.
Signed-off-by: Claudiu Beznea
Reviewed-by: Alexandre Belloni
---
drivers/clk/at91/sckc.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index 2c410f41b413..c1d7edd33416 100644
--- a/dri
Add support to free slow rc oscillator resources.
Signed-off-by: Claudiu Beznea
Reviewed-by: Alexandre Belloni
---
drivers/clk/at91/sckc.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index c1d7edd33416..492b139a7c15 100644
--- a/
Hi,
This series tries to improve error path for slow clock registrations
by adding functions to free resources and using them on failures.
It is created on top of patch series at [1].
Thank you,
Claudiu Beznea
[1]
https://lore.kernel.org/lkml/1558433454-27971-1-git-send-email-claudiu.bez...@mi
Improve error path for sama5d4 sck registration.
Signed-off-by: Claudiu Beznea
Reviewed-by: Alexandre Belloni
---
drivers/clk/at91/sckc.c | 43 ---
1 file changed, 28 insertions(+), 15 deletions(-)
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/
Use at91 specific functions to free all resources in case of error.
Signed-off-by: Claudiu Beznea
Reviewed-by: Alexandre Belloni
---
drivers/clk/at91/sckc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/at91/sckc.c b/drivers/clk/at91/sckc.c
index f7ad3e9414
Improve error path for sam9x5 slow clock registration.
Signed-off-by: Claudiu Beznea
Reviewed-by: Alexandre Belloni
---
drivers/clk/at91/sckc.c | 50 +++--
1 file changed, 32 insertions(+), 18 deletions(-)
diff --git a/drivers/clk/at91/sckc.c b/drive
On 27.06.2019 18:03, Stephen Boyd wrote:
> External E-Mail
>
>
> Quoting claudiu.bez...@microchip.com (2019-06-13 08:37:06)
>> From: Claudiu Beznea
>>
>> Hi,
>>
>> This series tries to improve error path for slow clock registrations
>> by adding functions to free resources and using them on fa
On Thu, Jun 27, 2019 at 11:30:31AM -0400, Joel Fernandes wrote:
> On Thu, Jun 27, 2019 at 10:34:55AM -0400, Steven Rostedt wrote:
> > On Thu, 27 Jun 2019 10:24:36 -0400
> > Joel Fernandes wrote:
> >
> > > > What am I missing here?
> > >
> > > This issue I think is
> > >
> > > (in normal proce
On Thu, Jun 27, 2019 at 09:02:08AM +0100, Catalin Marinas wrote:
> On Wed, Jun 26, 2019 at 01:51:15PM -0700, Kees Cook wrote:
> > This moves arm64 jump_label_init() from smp_prepare_boot_cpu() to
> > setup_arch(), as done already on x86, in preparation from early param
> > usage in the init_on_allo
Hi,
cc'ing Doug, Gwendal and Enrico that might be interested to give a review.
This patch can be picked alone without 2/2, an is needed to have cros-ec-sensors
legacy support on ARM (see [1] and [2])
Jonathan, as [1] and [2] will go through the chrome-platform tree if you don't
mind I'd also lik
On Thu, Jun 27, 2019 at 1:40 AM Daniel Baluta wrote:
>
>
>
> > > > > + mboxes:
> > > > > +description:
> > > > > + List of phandle of 2 MU channels for TXDB, 2 MU channels for
> > > > > RXDB
> > > > > + (see mailbox/fsl,mu.txt)
> > > > > +maxItems: 1
> > > >
> > > > Should be
On Thu, Jun 27, 2019 at 5:34 AM Matthew Wilcox wrote:
>
> On Wed, Jun 26, 2019 at 05:15:45PM -0700, Dan Williams wrote:
> > Ever since the conversion of DAX to the Xarray a RocksDB benchmark has
> > been encountering intermittent lockups. The backtraces always include
> > the filesystem-DAX PMD pa
On Thu, Jun 27, 2019 at 11:44:45AM +0200, Marco Elver wrote:
> ksize() has been unconditionally unpoisoning the whole shadow memory region
> associated with an allocation. This can lead to various undetected bugs,
> for example, double-kzfree().
>
> Specifically, kzfree() uses ksize() to determine
On Wed, Jun 26, 2019 at 1:55 PM Enric Balletbo i Serra
wrote:
>
> Hi Evan,
>
> Two few comments and I think I'm fine with it.
>
> On 25/6/19 15:05, Lee Jones wrote:
> > On Mon, 17 Jun 2019, Evan Green wrote:
> >
> >> For ECs that support it, the EC returns the number of slp_s0
> >> transitions and
On Thu, 2019-06-27 at 15:44 +, Sage Weil wrote:
> On Thu, 27 Jun 2019, Jeff Layton wrote:
> > On Thu, 2019-06-27 at 14:51 +0100, Luis Henriques wrote:
> > > Having granularity set to 1us results in having inode timestamps with a
> > > accurancy different from the fuse client (i.e. atime, ctime
On Thu, 27 Jun 2019 20:58:20 +0530
"Naveen N. Rao" wrote:
>
> > But interesting, I don't see a synchronize_rcu_tasks() call
> > there.
>
> We felt we don't need it in this case. We patch the branch to ftrace
> with a nop first. Other cpus should see that first. But, now that I
> think about
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