On Mon, Jun 24, 2019 at 03:55:15PM +0800, Huang, Ying wrote:
> From: Huang Ying
>
> 0-Day test system reported some OOM regressions for several
> THP (Transparent Huge Page) swap test cases. These regressions are
> bisected to 6861428921b5 ("block: always define BIO_MAX_PAGES as
> 256"). In the
Hi Miquel,
> > > > > > > > > How to make all #CS keep high for NAND to enter
> > > > > > > > > low-power standby mode if driver don't use
> > "legacy.select_chip()"
> > > > > ?
> > > > > > > >
> > > > > > > > See commit 02b4a52604a4 ("mtd: rawnand: Make
->select_chip()
> > > > > optiona
pon., 24 cze 2019 o 11:04 Dan Carpenter napisał(a):
>
> On Mon, Jun 24, 2019 at 10:28:10AM +0200, Bartosz Golaszewski wrote:
> > pon., 17 cze 2019 o 13:31 Colin King napisał(a):
> > >
> > > From: Colin Ian King
> > >
> > > Currently when the call to request_irq falls there is a memory leak of
>
Hi Rafael,
On 24/06/2019 11:00, Rafael J. Wysocki wrote:
> On Mon, Jun 24, 2019 at 10:53 AM Daniel Lezcano
> wrote:
>>
>>
>> Hi Viresh,
>>
>> On 21/06/2019 15:22, Daniel Lezcano wrote:
>>> The functions stub already exist for the condition the IS_ENABLED
>>> is trying to avoid.
>>>
>>> Remove t
On 24/06/2019 10:03, Dan Carpenter wrote:
> On Mon, Jun 24, 2019 at 10:28:10AM +0200, Bartosz Golaszewski wrote:
>> pon., 17 cze 2019 o 13:31 Colin King napisał(a):
>>>
>>> From: Colin Ian King
>>>
>>> Currently when the call to request_irq falls there is a memory leak of
>>> clockevent on the er
On 24-06-19, 10:53, Daniel Lezcano wrote:
>
> Hi Viresh,
>
> On 21/06/2019 15:22, Daniel Lezcano wrote:
> > The functions stub already exist for the condition the IS_ENABLED
> > is trying to avoid.
> >
> > Remove the IS_ENABLED macros as they are pointless.
> >
> > Signed-off-by: Daniel Lezcano
Add myself as co-maintainer of DRM Bridge Drivers then add Jonas Karlman
and Jernej Škrabec as Reviewers of DRM Bridge Drivers.
Cc: Laurent Pinchart
Cc: Jonas Karlman
Cc: Andrzej Hajda
Cc: Jernej Škrabec
Cc: Daniel Vetter
Signed-off-by: Neil Armstrong
---
MAINTAINERS | 3 +++
1 file changed
Hi Jeffrey,
We’ve encountered another issue, which causes multiple CRC errors and
renders ethernet completely useless, here’s the network stats:
/sys/class/net/eno1/statistics$ grep . *
collisions:0
multicast:95
rx_bytes:1499851
rx_compressed:0
rx_crc_errors:1165
rx_dropped:0
rx_errors:2330
r
Am Donnerstag, den 20.06.2019, 07:10 -0700 schrieb Tejun Heo:
> Hello,
>
> On Tue, Jun 18, 2019 at 11:59:39AM -0400, Alan Stern wrote:
> > > > Even if you disagree, perhaps we should have a global workqueue with a
> > > > permanently set noio flag. It could be shared among multiple drivers
> > >
Dne ponedeljek, 24. junij 2019 ob 11:08:51 CEST je Neil Armstrong napisal(a):
> Add myself as co-maintainer of DRM Bridge Drivers then add Jonas Karlman
> and Jernej Škrabec as Reviewers of DRM Bridge Drivers.
>
> Cc: Laurent Pinchart
> Cc: Jonas Karlman
> Cc: Andrzej Hajda
> Cc: Jernej Škrabec
Add #defines only for the Data Link Feature and Physical Layer 16.0 GT/s
features.
Signed-off-by: Vidya Sagar
Reviewed-by: Thierry Reding
---
Changes since [v10]:
* None
Changes since [v9]:
* None
Changes since [v8]:
* None
Changes since [v7]:
* None
Changes since [v6]:
* None
Changes since
Tegra194 has six PCIe controllers based on Synopsys DesignWare core.
There are two Universal PHY (UPHY) blocks with each supporting 12(HSIO:
Hisg Speed IO) and 8(NVHS: NVIDIA High Speed) lanes respectively.
Controllers:0~4 use UPHY lanes from HSIO brick whereas Controller:5 uses
UPHY lanes from NVH
Tegra PCIe rootports don't generate MSI interrupts for PME and AER events.
Since PCIe spec (Ref: r4.0 sec 7.7.1.2 and 7.7.2.2) doesn't support using
a mix of INTx and MSI/MSI-X, MSI needs to be disabled to avoid root ports
service drivers registering their respective ISRs with MSI interrupt and
to
Remove multiple write enable and disable sequences of dbi registers as
Tegra194 implements writes to BAR-0 register (offset: 0x10) controlled by
DBI write-lock enable bit thereby not allowing any further writes to BAR-0
register in config space to take place. Hence enabling write permission at
the
Somewhere in all the patchsets before, this cleanup got lost.
Signed-off-by: Jason A. Donenfeld
Cc: Arnd Bergmann
Cc: Thomas Gleixner
---
Documentation/core-api/timekeeping.rst | 2 +-
include/linux/timekeeping.h| 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a
Add extended configuration space capability search API using struct dw_pcie *
pointer
Signed-off-by: Vidya Sagar
Acked-by: Gustavo Pimentel
Acked-by: Thierry Reding
---
Changes since [v10]:
* None
Changes since [v9]:
* None
Changes since [v8]:
* Added Acked-by from Thierry
Changes since [v7]
Hi Thomas,
On 23/06/2019 12:18, Thomas Gleixner wrote:
> The alternative solution for this is what Vincenzo has in his unified VDSO
> patch series:
>
> https://lkml.kernel.org/r/20190621095252.32307-1-vincenzo.frasc...@arm.com
>
> It leaves the data struct unmodified and has a separate array f
Add support for Tegra194 P2U (PIPE to UPHY) module block which is a glue
module instantiated one for each PCIe lane between Synopsys DesignWare core
based PCIe IP and Universal PHY block.
Signed-off-by: Vidya Sagar
Reviewed-by: Rob Herring
Acked-by: Thierry Reding
Acked-by: Kishon Vijay Abraham
Move PCIe config space capability search API to common DesignWare file
as this can be used by both host and ep mode codes.
Signed-off-by: Vidya Sagar
Acked-by: Gustavo Pimentel
Reviewed-by: Thierry Reding
---
Changes since [v10]:
* None
Changes since [v9]:
* None
Changes since [v8]:
* None
C
Some host controllers need to know the existence of clkreq signal routing to
downstream devices to be able to advertise low power features like ASPM L1
substates. Without clkreq signal routing being present, enabling ASPM L1 sub
states might lead to downstream devices falling off the bus. Hence a n
Add support to enable CDM (Configuration Dependent Module) register check
for any data corruption based on the device-tree flag 'snps,enable-cdm-check'.
Signed-off-by: Vidya Sagar
Acked-by: Gustavo Pimentel
Reviewed-by: Thierry Reding
---
Changes since [v10]:
* None
Changes since [v9]:
* None
Add support for Tegra194 PCIe controllers. These controllers are based
on Synopsys DesignWare core IP.
Signed-off-by: Vidya Sagar
Reviewed-by: Rob Herring
Acked-by: Thierry Reding
---
Changes since [v10]:
* None
Changes since [v9]:
* None
Changes since [v8]:
* Added Acked-by from Thierry
Cha
Add support to enable CDM (Configuration Dependent Module) registers check
for any data corruption. CDM registers include standard PCIe configuration
space registers, Port Logic registers and iATU and DMA registers.
Refer Section S.4 of Synopsys DesignWare Cores PCI Express Controller Databook
Vers
Synopsys DesignWare core based PCIe controllers in Tegra 194 SoC interface
with Universal PHY (UPHY) module through a PIPE2UPHY (P2U) module.
For each PCIe lane of a controller, there is a P2U unit instantiated at
hardware level. This driver provides support for the programming required
for each P2
Add support for Synopsys DesignWare core IP based PCIe host controller
present in Tegra194 SoC.
Signed-off-by: Vidya Sagar
Acked-by: Thierry Reding
---
Changes since [v10]:
* None
Changes since [v9]:
* Used _relaxed() versions of readl() & writel()
Changes since [v8]:
* Made it dependent on AR
On 22/06/2019 11:12, Rafael J. Wysocki wrote:
> On Fri, Jun 21, 2019 at 3:23 PM Daniel Lezcano
> wrote:
>>
>> The functions stub already exist for the condition the IS_ENABLED
>> is trying to avoid.
>>
>> Remove the IS_ENABLED macros as they are pointless.
>
> AFAICS, the IS_ENABLED checks are an
Now that notifiers got unbroken; use the proper interface to handle
notifier errors and propagate them.
There were already MODULE_STATE_COMING notifiers that failed; notably:
- jump_label_module_notifier()
- tracepoint_module_notify()
- bpf_event_notify()
By propagating this error, we fix tho
Hi all,
These patches came from the desire to propagate MODULE_STATE_COMING errors.
While looking at that I spotted fail with a number of module notifiers
themselves and with the whole notification business.
Please consider.
The current notifiers have the following error handling pattern all
over the place:
int nr;
ret = __foo_notifier_call_chain(&chain, val_up, v, -1, &nr);
if (err & NOTIFIER_STOP_MASK)
__foo_notifier_call_chain(&chain, val_down, v, nr-1, NULL)
And aside from
While auditing all module notifiers I noticed a whole bunch of fail
wrt the return value. Notifiers have a 'special' return semantics.
Cc: Robert Richter
Cc: Steven Rostedt
Cc: Ingo Molnar
Cc: Alexei Starovoitov
Cc: Daniel Borkmann
Cc: Martin KaFai Lau
Cc: Song Liu
Cc: Yonghong Song
Cc: Ma
Hi Petr,
> this is another piece in the puzzle that helps to maintain more
> livepatches.
>
> Especially pre/post (un)patch callbacks might change a system state.
> Any newly installed livepatch has to somehow deal with system state
> modifications done be already installed livepatches.
>
> This p
On Tue, Jun 18, 2019 at 4:03 PM Al Viro wrote:
>
> On Tue, Jun 18, 2019 at 03:47:10AM -0700, syzbot wrote:
> > Hello,
> >
> > syzbot found the following crash on:
> >
> > HEAD commit:9e0babf2 Linux 5.2-rc5
> > git tree: upstream
> > console output: https://syzkaller.appspot.com/x/log.txt
On 6/24/2019 1:56 PM, Suzuki K Poulose wrote:
Sai,
Thanks for getting this done.
On 24/06/2019 04:36, Sai Prakash Ranjan wrote:
Coresight platform support assumes that a missing "cpu" phandle
defaults to CPU0. This could be problematic and unnecessarily binds
components to CPU0, where they may
On Monday, June 24, 2019 11:22:19 AM CEST Daniel Lezcano wrote:
> On 22/06/2019 11:12, Rafael J. Wysocki wrote:
> > On Fri, Jun 21, 2019 at 3:23 PM Daniel Lezcano
> > wrote:
> >>
> >> The functions stub already exist for the condition the IS_ENABLED
> >> is trying to avoid.
> >>
> >> Remove the IS
On 22.06.19 10:19, Pavel Machek wrote:
Hi!
Is full preemption supposed to work on x86-32 machines?
Because it does not work for me. It crashes early in boot, no messages
make it to console. Similar configuration for x86-64 boots ok.
Maybe you can also tell which version(s) you tried, and in
Petr Mladek writes:
> ---
> include/linux/livepatch.h | 15 +
> kernel/livepatch/Makefile | 2 +-
> kernel/livepatch/state.c | 83
> +++
> 3 files changed, 99 insertions(+), 1 deletion(-)
> create mode 100644 kernel/livepatch/state.c
>
> di
Hi Daniel,
On Fri, Jun 21, 2019 at 05:27:00PM +0200, Daniel Vetter wrote:
> On Fri, Jun 21, 2019 at 12:21 PM Raymond Smith wrote:
> >
> > Add the DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED modifier to
> > denote the 16x16 block u-interleaved format used in Arm Utgard and
> > Midgard GPUs.
> >
>
On Mon, 24 Jun 2019, syzbot wrote:
> Hello,
>
> syzbot found the following crash on:
>
> HEAD commit:fd6b99fa Merge branch 'akpm' (patches from Andrew)
> git tree: upstream
> console output: https://syzkaller.appspot.com/x/log.txt?x=144de256a0
> kernel config: https://syzkaller.ap
Hi,
On 21/06/19 3:58 PM, Sagar Kadam wrote:
> Hello Vignesh,
>
> On Fri, Jun 21, 2019 at 11:33 AM Vignesh Raghavendra wrote:
>>
>> Hi,
>>
>> On 17/06/19 8:48 PM, Sagar Kadam wrote:
>>> Hello Vignesh,
>>>
>>> Thanks for your review comments.
>>>
>>> On Sun, Jun 16, 2019 at 6:14 PM Vignesh Raghave
On Tuesday, June 18, 2019 2:50:50 PM CEST Mika Westerberg wrote:
> We try to keep PCIe hotplug ports runtime suspended when entering system
> suspend. Due to the fact that the PCIe portdrv sets NEVER_SKIP driver PM
> flag the PM core always calls system suspend/resume hooks even if the
> device is
On Mon, Jun 24, 2019 at 06:35:44AM +, Parshuram Raju Thombare wrote:
>
> >> + if (change_interface) {
> >> + if (bp->phy_interface == PHY_INTERFACE_MODE_SGMII) {
> >> + gem_writel(bp, NCFGR, ~GEM_BIT(SGMIIEN) &
> >> + ~GEM_BIT(PCSSEL) &
>
Hi Qian Cai,
On Sun, Jun 16, 2019 at 09:41:09PM -0400, Qian Cai wrote:
> > On Jun 16, 2019, at 9:32 PM, Anshuman Khandual
> > wrote:
> > On 06/14/2019 05:45 PM, Qian Cai wrote:
> >> On Fri, 2019-06-14 at 11:20 +0100, Will Deacon wrote:
> >>> On Thu, Jun 13, 2019 at 05:34:01PM -0400, Qian Cai wro
On 24/06/2019 11:30, Rafael J. Wysocki wrote:
> On Monday, June 24, 2019 11:22:19 AM CEST Daniel Lezcano wrote:
>> On 22/06/2019 11:12, Rafael J. Wysocki wrote:
>>> On Fri, Jun 21, 2019 at 3:23 PM Daniel Lezcano
>>> wrote:
The functions stub already exist for the condition the IS_ENABLED
On 24-06-19, 09:45, Daniel Lezcano wrote:
> Actually I'm asking your opinion :)
>
> The structure in drivers/thermal/imx_thermal.c
>
> struct imx_thermal_data {
> struct cpufreq_policy *policy; in the thermal data ?!
> [ ... ]
> };
>
> And then:
>
> #ifdef CONFIG_CPU_FREQ
> /
Alexander,
On Mon, 24 Jun 2019, Sverdlin, Alexander (Nokia - DE/Ulm) wrote:
> On 23/06/2019 12:18, Thomas Gleixner wrote:
> > The alternative solution for this is what Vincenzo has in his unified VDSO
> > patch series:
> >
> > https://lkml.kernel.org/r/20190621095252.32307-1-vincenzo.frasc...@a
Em Sun, 23 Jun 2019 18:27:22 -0300
André Almeida escreveu:
> On 6/23/19 1:40 PM, André Almeida wrote:
> > - * Calls s_stream to enable stream in all entities of the pipeline.
> > + * Calls ``vimc_streamer_s_stream`` to enable stream in all entities of
> ``vimc_streamer_s_stream`` could also be
On 24/06/2019 at 08:16, Palmer Dabbelt wrote:
> External E-Mail
>
>
> The patch to add support for the FU540-C000 added a dependency on
> COMMON_CLK, but didn't express that via Kconfig. This fixes the build
> failure by adding CONFIG_MACB_FU540, which depends on COMMON_CLK and
> conditionally e
Hello, Hou.
It has already been fixed. Please have a look at:
https://ozlabs.org/~akpm/mmotm/broken-out/mm-vmalloc-avoid-bogus-wmaybe-uninitialized-warning.patch
https://ozlabs.org/~akpm/mmotm/broken-out/mm-vmalloc-avoid-bogus-wmaybe-uninitialized-warning-fix.patch
--
Vlad Rezki
On Mon, Jun 24,
On Mon, Jun 24, 2019 at 06:47:48AM +, Parshuram Raju Thombare wrote:
> >Which Clause 45 PHY are you using?
>
> I am using emulated PHY in our CSP environment.
Concentrated Solar Power? Chartered Society of Physiotherapy? Center
for Space Physics?
Sorry, I don't know what a "CSP environment
On 21-06-19, 17:34, Saravana Kannan wrote:
> The devfreq passive governor scales the frequency of a "child" device
> based on the current frequency of a "parent" device (not parent/child in
> the sense of device hierarchy). As of today, the passive governor
> requires one of the following to work c
24.06.2019 6:02, Sowjanya Komatineni пишет:
> This patch adds support for Tegra pinctrl driver suspend and resume.
>
> During suspend, context of all pinctrl registers are stored and
> on resume they are all restored to have all the pinmux and pad
> configuration for normal operation.
>
> Signed-
As per the last correspondence with Greg, he pointed out that the whole
driver rtl8192u should be merged some day into drivers/net/ and thus
implement different standards regarding multiline comments.
Because of that, we did the exact opposite of what we did the last time,
and changed comments such
As stated in coding-styles.rst multiline comments should be structured in a way,
that the actual comment starts on the second line of the commented portion. E.g:
/*
* Multiline comments
* should look like
* this.
*/
However, there is an exception to files in drivers/net/ and net/, where
multi
The coding-styles.rst states, that multiline comments should
allways contain a leading "*" in each line.
For multiline comments in general they
/*
* should look
* like this.
*/
For multiline comments in either net/ or drivers/net/ however,
they should
/* omit
* the first
* empty line.
*/
On 24/06/2019 at 08:16, Palmer Dabbelt wrote:
> External E-Mail
>
>
> When touching the Kconfig for this driver I noticed that both the
> Kconfig help text and a comment referred to this being an Atmel driver.
> As far as I know, this is a Cadence driver. The fix is just
Indeed: was written and
On Sun, Jun 23, 2019 at 02:27:17PM +0300, Dmitry V. Levin wrote:
> Userspace needs a cheap and reliable way to tell whether CLONE_PIDFD
> is supported by the kernel or not.
>
> While older kernels without CLONE_PIDFD support just leave unchanged
> the value pointed by parent_tidptr, current implem
On Sun, Jun 23, 2019 at 02:28:00PM +0300, Dmitry V. Levin wrote:
> Initialize pidfd to an invalid descriptor, to fail gracefully on
> those kernels that do not implement CLONE_PIDFD and leave pidfd
> unchanged.
>
> Signed-off-by: Dmitry V. Levin
Reviewed-by: Christian Brauner
Thank you Dmitry,
From: Bartosz Golaszewski
Extend the davinci-timer driver to also register a clock source.
Signed-off-by: Bartosz Golaszewski
---
drivers/clocksource/timer-davinci.c | 85 +
1 file changed, 85 insertions(+)
diff --git a/drivers/clocksource/timer-davinci.c
b/driver
From: Bartosz Golaszewski
Now that we have an agreement on the driver and only minor issues are left
to fix, I'm dropping the RFC tag and continuing the numbering from before
RFCs.
This is the davinci clocksource driver but it with a sparse warning fixed
and with a small tweak to kzalloc() call.
From: Bartosz Golaszewski
Currently the clocksource and clockevent support for davinci platforms
lives in mach-davinci. It hard-codes many things, uses global variables,
implements functionalities unused by any platform and has code fragments
scattered across many (often unrelated) files.
Implem
On Thu, Jun 20, 2019 at 08:46:58AM +0100, Will Deacon wrote:
> On Wed, Jun 19, 2019 at 05:32:42PM -0700, Nick Desaulniers wrote:
> > Generated via:
> > $ ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make defconfig
> > $ ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make menuconfig
> >
> > $ ARCH=arm6
On Sun, Jun 23, 2019 at 02:32:30PM +0300, Dmitry V. Levin wrote:
> On Sat, Jun 22, 2019 at 12:13:39AM +0200, Christian Brauner wrote:
> [...]
> > Out of curiosity: what makes the new flag different than say
> > CLONE_NEWCGROUP or any new clone flag that got introduced?
> > CLONE_NEWCGROUP too would
As of now, objtool only supports the x86_64 architecture but the
groundwork has already been done in order to add support for other
architectures without too much effort.
This series of patches adds support for the arm64 architecture
based on the Armv8.5 Architecture Reference Manual.
Objtool wil
The jump destination and relocation offset used previously are only
reliable on x86_64 architecture. We abstract these computations by calling
arch-dependent implementations.
Signed-off-by: Raphael Gault
---
tools/objtool/arch.h| 6 ++
tools/objtool/arch/x86/decode.c | 11 ++
Both __guest_entry and __guest_exit functions do not setup
a correct stack frame. Because they can be considered as callable
functions, even if they are particular cases, we chose to silence
the warnings given by objtool by annotating them as non-standard.
Signed-off-by: Raphael Gault
---
arch/a
This code doesn't respect the Arm PCS but it is intended this
way. Adapting it to respect the PCS would result in altering the
behaviour.
In order to suppress objtool's warnings, we setup a stack frame
for __cpu_suspend_enter and annotate cpu_resume and _cpu_resume
as having non-standard stack fra
Signed-off-by: Raphael Gault
---
arch/arm64/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index f5eb592b8579..c5fdfb635d3d 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -159,6 +159,7 @@ config ARM64
select HAVE_RCU_TABLE_
Some functions don't have standard stack-frames but are intended
this way. In order for objtool to ignore those particular cases
we add a macro that enables us to annotate the cases we chose
to mark as particular.
Signed-off-by: Raphael Gault
---
arch/arm64/include/asm/assembler.h | 13 +
This plugins comes into play before the final 2 RTL passes of GCC and
detects switch-tables that are to be outputed in the ELF and writes
information in an "objtool_data" section which will be used by objtool.
Signed-off-by: Raphael Gault
---
scripts/Makefile.gcc-plugins | 2 +
kuser32 being used for compatibility, it contains a32 instructions
which are not recognised by objtool when trying to analyse arm64
object files. Thus, we add an exception to skip validation on this
particular file.
Signed-off-by: Raphael Gault
---
arch/arm64/kernel/Makefile | 3 +++
1 file chan
Until now, the section .altinstr_replacement wasn't marked as containing
executable instructions on arm64. This patch changes that so that it is
coherent with what is done on x86.
Signed-off-by: Raphael Gault
---
arch/arm64/include/asm/alternative.h | 2 +-
1 file changed, 1 insertion(+), 1 dele
Annotate assembler functions which are callable but do not
setup a correct stack frame.
Signed-off-by: Raphael Gault
---
arch/arm64/kernel/hyp-stub.S | 2 ++
arch/arm64/kvm/hyp-init.S| 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/arm64/kernel/hyp-stub.S b/arch/arm64/kernel/hyp-s
Some crypto modules contain `.word` of data in the .text section.
Since objtool can't make the distinction between data and incorrect
instruction, it gives a warning about the instruction beeing unknown
and stops the analysis of the object file.
The exception can be removed if the data are moved t
The control flow information and register macro definitions were based on
the x86_64 architecture but should be abstract so that each architecture
can define the correct values for the registers, especially the registers
related to the stack frame (Frame Pointer, Stack Pointer and possibly
Return A
On Mon, 24 Jun 2019 02:40:21 PDT (-0700), nicolas.fe...@microchip.com wrote:
On 24/06/2019 at 08:16, Palmer Dabbelt wrote:
External E-Mail
The patch to add support for the FU540-C000 added a dependency on
COMMON_CLK, but didn't express that via Kconfig. This fixes the build
failure by adding
From: Miguel Ojeda
commit 0c97bf863efce63d6ab7971dad811601e6171d2f upstream.
Starting with GCC 9, -Warray-bounds detects cases when memset is called
starting on a member of a struct but the size to be cleared ends up
writing over further members.
Such a call happens in the trace code to clear,
From: Andrey Smirnov
commit 7c7da40da1640ce6814dab1e8031b44e19e5a3f6 upstream.
In the case of compat syscall ioctl numbers for UI_BEGIN_FF_UPLOAD and
UI_END_FF_UPLOAD need to be adjusted before being passed on
uinput_ioctl_handler() since code built with -m32 will be passing
slightly different v
[ Upstream commit ecc906a11c2a0940e1a380debd8bd5bc09faf454 ]
GMAC controller on HSDK boards supports 256 Hash Table size so we need to
add the multicast filter bins property. This allows for the Hash filter
to work properly using stmmac driver.
Cc: Joao Pinto
Cc: Rob Herring
Cc: Mark Rutland
C
On Mon, 24 Jun 2019 02:49:16 PDT (-0700), nicolas.fe...@microchip.com wrote:
On 24/06/2019 at 08:16, Palmer Dabbelt wrote:
External E-Mail
When touching the Kconfig for this driver I noticed that both the
Kconfig help text and a comment referred to this being an Atmel driver.
As far as I know,
Since the way the initial stack frame when entering a function is different
that what is done in the x86_64 architecture, we need to add some more
check to support the different cases. As opposed as for x86_64, the return
address is not stored by the call instruction but is instead loaded in a
reg
This patch implements the functions required to identify and add as
alternatives all the possible destinations of the switch table.
This implementation relies on the new plugin introduced previously which
records information about the switch-table in a .objtool_data section.
Signed-off-by: Raphael
Provide implementation for the arch-dependent functions that are called by
the main check function of objtool. The ORC unwinder is not yet supported
by the arm64 architecture so we only provide a dummy interface for now.
The decoding of the instruction is split into classes and subclasses as
descr
The ORC unwinder is only supported on x86 at the moment and should thus be
in the x86 architecture code. In order not to break the whole structure in
case another architecture decides to support the ORC unwinder via objtool
we choose to let the implementation be done in the architecture dependent
c
On arm64 some object files contain data stored in the .text section.
This data is interpreted by objtool as instruction but can't be
identified as a valid one. In order to keep analysing those files we
introduce INSN_UNKNOWN type. The "unknown instruction" warning will thus
only be raised if such i
This patch abstracts the few architecture dependent tests that are
perform when handling special section and switch tables. It enables any
architecture to ignore a particular CPU feature or not to handle switch
tables.
Signed-off-by: Raphael Gault
---
tools/objtool/arch/arm64/Build
The way to identify switch-tables and retrieves all the data necessary
to handle the different execution branches is not the same on all
architecture. In order to be able to add other architecture support,
this patch defines arch-dependent functions to process jump-tables.
Signed-off-by: Raphael G
From: Allan Xavier
commit 4a60aa05a0634241ce17f957bf9fb5ac1eed6576 upstream.
Add support for processing switch jump tables in objects with multiple
.rodata sections, such as those created by '-ffunction-sections' and
'-fdata-sections'. Currently, objtool always looks in .rodata for jump
table i
[ Upstream commit 4c70850aeb2e40016722cd1abd43c679666d3ca0 ]
Add the binding for RX/TX fifo size of GMAC node.
Cc: Joao Pinto
Cc: Rob Herring
Cc: Mark Rutland
Cc: Vineet Gupta
Tested-by: Eugeniy Paltsev
Acked-by: Alexey Brodkin
Signed-off-by: Jose Abreu
Signed-off-by: Vineet Gupta
Signed-
[ Upstream commit 62394708f3e01c9f2be6be74eb6305bae1ed924f ]
When non-bridged, non-vlan'ed mv88e6xxx port is moving down, error
message is logged:
failed to kill vid 0081/0 for device eth_cu_1000_4
This is caused by call from __vlan_vid_del() with vin set to zero, over
call chain this results in
[ Upstream commit 35164f5259a47ea756fa1deb3e463ac2a4f10dc9 ]
The command 'ibv_devinfo -v' reports 0 for max_mr.
Fix by assigning the query values after the mr lkey_table has been built
rather than early on in the driver.
Fixes: 7b1e2099adc8 ("IB/rdmavt: Move memory registration into rdmavt")
Rev
[ Upstream commit 2abae62a26a265129b364d8c1ef3be55e2c01309 ]
The qpn allocation logic has a WARN_ON() that intends to detect the use of
an index that will introduce bits in the lower order bits of the QOS bits
in the QPN.
Unfortunately, it has the following bugs:
- it misfires when wrapping QPN a
[ Upstream commit 80caf43549e7e41a695c6d1e11066286538b336f ]
In get_vdev_port_node_info(), 'node_info->vdev_port.name' is allcoated
by kstrdup_const(), and it returns NULL when fails. So
'node_info->vdev_port.name' should be checked.
Signed-off-by: Gen Zhang
Signed-off-by: David S. Miller
Signe
[ Upstream commit 880c2d4b2fdfd580ebcd6bb7240a8027a1d34751 ]
Should only enable HW RX_2BYTE_OFFSET function in the case NET_IP_ALIGN
equals to 2.
Signed-off-by: Mark Lee
Signed-off-by: Sean Wang
Signed-off-by: David S. Miller
Signed-off-by: Sasha Levin
---
drivers/net/ethernet/mediatek/mtk_e
[ Upstream commit f532beeeff0c0a3586cc15538bc52d249eb19e7c ]
Fixes gcc '-Wunused-but-set-variable' warning:
arch/mips/kernel/uprobes.c: In function 'arch_uprobe_pre_xol':
arch/mips/kernel/uprobes.c:115:17: warning: variable 'epc' set but not used
[-Wunused-but-set-variable]
It's never used sinc
[ Upstream commit b96151edced4edb6a18aa89a5fa02c7066efff45 ]
Rather than allowing any old mode through, then subsequently refusing
unmatchable clock rates in atomic_check when it's too late to back out
and pick a different mode, let's do that validation up-front where it
will cause unsupported mod
[ Upstream commit 1c7ebeabc9e5ee12e42075a597de40fdb9059530 ]
BUG: memory leak
unreferenced object 0x8881df48cda0 (size 16):
comm "syz-executor.0", pid 5077, jiffies 4295994670 (age 22.280s)
hex dump (first 16 bytes):
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b
From: Linus Torvalds
commit 6f303d60534c46aa1a239f29c321f95c83dda748 upstream.
We already did this for clang, but now gcc has that warning too. Yes,
yes, the address may be unaligned. And that's kind of the point.
Signed-off-by: Linus Torvalds
Signed-off-by: Greg Kroah-Hartman
---
Makefil
[ Upstream commit 9e4f56f1a7f3287718d0083b5cb85298dc05a5fd ]
Should hw_feature as hardware capability flags to check if hardware LRO
got support.
Signed-off-by: Mark Lee
Signed-off-by: Sean Wang
Signed-off-by: David S. Miller
Signed-off-by: Sasha Levin
---
drivers/net/ethernet/mediatek/mtk_e
[ Upstream commit 97736f36dbebf2cda2799db3b54717ba5b388255 ]
User applications can register memory regions for TID buffers that are not
aligned on page boundaries. Hfi1 is expected to pin those pages in memory
and cache the pages with mmu_rb. The rb tree will fail to insert pages
that are not alig
[ Upstream commit 1c810739097fdeb31b393b67a0a1e3d7ffdd9f63 ]
On the Arm Juno platform, the HDLCD pixel clock is constrained to 250KHz
resolution in order to avoid the tiny System Control Processor spending
aeons trying to calculate exact PLL coefficients. This means that modes
like my oddball 1600
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