Like in normal vDSOs, when compat vDSOs are enabled the auxiliary
vector symbol AT_SYSINFO_EHDR needs to point at the address of the
vDSO code, to allow the dynamic linker to find it.
Add the necessary code to the elf arm64 module to make this possible.
Cc: Catalin Marinas
Cc: Will Deacon
Signe
The mips vDSO library requires some adaptations to take advantage of the
newly introduced generic vDSO library.
Introduce the following changes:
- Modification of vdso.c to be compliant with the common vdso datapage
- Use of lib/vdso for gettimeofday
Cc: Ralf Baechle
Cc: Paul Burton
Signed-of
The generic vDSO library provides an implementation of clock_getres()
that can be leveraged by each architecture.
Add clock_getres() entry point on mips.
Cc: Ralf Baechle
Cc: Paul Burton
Signed-off-by: Vincenzo Frascino
---
arch/mips/include/asm/vdso/gettimeofday.h | 26 ++
With the release of Linux 5.1 has been added a new syscall,
clock_gettime64, that provided a 64 bit time value for a specified
clock_ID to make the kernel Y2038 safe on 32 bit architectures.
Update the arm specific vDSO library accordingly with what it has
been done for the kernel syscall exposing
The x86 vDSO library requires some adaptations to take advantage of the
newly introduced generic vDSO library.
Introduce the following changes:
- Modification of vdso.c to be compliant with the common vdso datapage
- Use of lib/vdso for gettimeofday
Cc: Thomas Gleixner
Signed-off-by: Vincenzo
The generic vDSO library provides an implementation of clock_getres()
that can be leveraged by each architecture.
Add clock_getres() entry point on x86.
Cc: Thomas Gleixner
Signed-off-by: Vincenzo Frascino
---
arch/x86/entry/vdso/vclock_gettime.c | 17 ++
arch/x86/entry/vdso/vd
With the release of Linux 5.1 has been added a new syscall,
clock_gettime64, that provided a 64 bit time value for a specified
clock_ID to make the kernel Y2038 safe on 32 bit architectures.
Update the mips32 specific vDSO library accordingly with what it has
been done for the kernel syscall expos
With the release of Linux 5.1 has been added a new syscall,
clock_gettime64, that provided a 64 bit time value for a specified
clock_ID to make the kernel Y2038 safe on 32 bit architectures.
Update the x86 specific vDSO library accordingly with what it has
been done for the kernel syscall exposing
The current version of the multiarch vDSO selftest verifies only
gettimeofday.
Extend the vDSO selftest to the other library functions:
- time
- clock_getres
- clock_gettime
The extension has been used to verify the unified vdso library on the
supported architectures.
Cc: Shuah Khan
Signed-o
The generic vDSO library provides an implementation of clock_getres() that
can be leveraged by each architecture.
Add clock_getres() entry point on arm to be on pair with arm64.
Cc: Russell King
Signed-off-by: Vincenzo Frascino
---
arch/arm/include/asm/vdso/gettimeofday.h | 20
Add vDSO compat support to the arm64 building system.
Cc: Catalin Marinas
Cc: Will Deacon
Signed-off-by: Vincenzo Frascino
Tested-by: Shijith Thotton
Tested-by: Andre Przywara
---
arch/arm64/Kconfig | 1 +
arch/arm64/Makefile| 23 +--
arch/arm64/kernel/Ma
Hi Geert,
Since the original patch hasn't been merged to upstream, I think we can merge
this into original patch, how do you think?
On 2019/6/20 22:38, Geert Uytterhoeven wrote:
> On 32-bit (e.g. m68k):
>
> fs/f2fs/gc.o: In function `f2fs_resize_fs':
> gc.c:(.text+0x3056): undefined refe
On Thu, 13 Jun 2019 13:08:15 +0200
Cornelia Huck wrote:
> Sometimes, we want to control which of the matching drivers
> binds to a subchannel device (e.g. for subchannels we want to
> handle via vfio-ccw).
>
> For pci devices, a mechanism to do so has been introduced in
> 782a985d7af2 ("PCI: Int
Hello.
I noticed (using below debug patch and reproducer) that memory allocation from
ion_system_heap_allocate() is calling ion_system_heap_shrink(). Is such behavior
what we want?
diff --git a/drivers/staging/android/ion/ion.h
b/drivers/staging/android/i
On Fri, Jun 21, 2019 at 2:31 PM Anup Patel wrote:
>
> On Fri, Jun 21, 2019 at 11:40 AM Yash Shah wrote:
> >
> > DT node for SiFive FU540-C000 GEMGXL Ethernet controller driver added
> >
> > Signed-off-by: Yash Shah
> > ---
> > arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 20
Remove the static from i2c_dev_irq_from _resources so that other parts
of the core code can use this helper function.
Reviewed-by: Mika Westerberg
Reviewed-by: Andy Shevchenko
Signed-off-by: Charles Keepax
---
No changes since v5.
Thanks,
Charles
drivers/i2c/i2c-core-base.c | 4 ++--
driver
It makes sense to contain all the ACPI IRQ handling in a single helper
function.
Reviewed-by: Mika Westerberg
Reviewed-by: Andy Shevchenko
Signed-off-by: Charles Keepax
---
drivers/i2c/i2c-core-acpi.c | 3 +++
drivers/i2c/i2c-core-base.c | 3 ---
2 files changed, 3 insertions(+), 3 deletions(-
In preparation for more refactoring make i2c_acpi_get_irq available
outside i2c-core-acpi.c.
Signed-off-by: Charles Keepax
---
Changes since v5:
- Pass a struct device rather than acpi_device to i2c_acpi_get_irq,
note this is more awkward than I would have liked as I am very
unconvinced t
This series attempts to align as much IRQ handling into the
probe path as possible. Note that I don't have a great setup
for testing these patches so they are mostly just build tested
and need careful review and testing before any of them are
merged.
The series brings the ACPI path inline with the
Bring the ACPI path in sync with the device tree path and handle all the
IRQ fetching at probe time. This leaves the only IRQ handling at device
registration time being that which is passed directly through the board
info as either a resource or an actual IRQ number.
Signed-off-by: Charles Keepax
Use the available IRQ helper functions, most of the functions have
additional helpful side affects like configuring the trigger type of the
IRQ.
Signed-off-by: Charles Keepax
---
Changes since v5:
- Pass info->irq to i2c_acpi_add_resource directly
- Remove call to acpi_dev_free_resource_list s
Only set init_irq during i2c_device_new and only handle client->irq on
the probe/remove paths.
Suggested-by: Benjamin Tissoires
Reviewed-by: Mika Westerberg
Reviewed-by: Andy Shevchenko
Signed-off-by: Charles Keepax
---
No changes since v5.
Thanks,
Charles
drivers/i2c/i2c-core-base.c | 5 +
On Fri, 21 Jun 2019, Arnd Bergmann wrote:
> > The use of 64-bit operations to access option's packet memory, which is
> > true SRAM, i.e. no side effects, is to improve throughput only and there's
> > no need for atomicity here nor also any kind of barriers, except at the
> > conclusion. Splitti
In preparation for future refactoring factor out the fetch of the IRQ
into its own helper function. Whilst we are at it update the handling
to return the actual error code returned from acpi_dev_get_resources
as well.
Signed-off-by: Charles Keepax
---
Changes since v5:
- Return error code from
> For what it's worth, maybe consider adding a dev_warn attached to the return
> of devm_i2c_new_dummy_device?
I am in the middle of some API changes. Once those are over, I want to
think about such warnings as a second step. I'd rather have them in the
core than in each and every driver. But thi
Hi,
On 21/06/2019 10:39, guo...@kernel.org wrote:
Signed-off-by: Guo Ren
Cc: Arnd Bergmann
Cc: Julien Grall
---
arch/arm64/lib/asid.c| 9 ++-
This change should be in a separate e-mail with the Arm64 maintainers in CC.
But you seem to have a copy of the allocator in csky now. So
This commit replaces printk with pr_debug, so we don't flood kernel log.
Signed-off-by: Paweł Chmiel
Acked-by: Krzysztof Kozlowski
---
Changes from v1:
- Added Acked-by
---
drivers/cpufreq/s5pv210-cpufreq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/cpufreq/s5
Both hugetlb and thp locate on the same migration type of pageblock, since
they are allocated from a free_list[]. Based on this fact, it is enough to
check on a single subpage to decide the migration type of the whole huge
page. By this way, it saves (2M/4K - 1) times loop for pmd_huge on x86,
simi
On Thursday 20 Jun 2019 at 14:04:39 (+0100), Patrick Bellasi wrote:
> On 19-Jun 17:08, Douglas Raillard wrote:
> > Hi Patrick,
> >
> > On 5/16/19 2:22 PM, Patrick Bellasi wrote:
> > > On 16-May 14:01, Quentin Perret wrote:
> > > > On Thursday 16 May 2019 at 13:42:00 (+0100), Patrick Bellasi wrote:
On Friday 21 Jun 2019 at 11:17:05 (+0100), Quentin Perret wrote:
> On Thursday 20 Jun 2019 at 14:04:39 (+0100), Patrick Bellasi wrote:
> > On 19-Jun 17:08, Douglas Raillard wrote:
> > > Hi Patrick,
> > >
> > > On 5/16/19 2:22 PM, Patrick Bellasi wrote:
> > > > On 16-May 14:01, Quentin Perret wrote
On 21 June 2019 11:10 Wolfram Sang wrote:
> Subject: Re: [PATCH] mfd: da9063: occupy second I2C address, too
>
> > For what it's worth, maybe consider adding a dev_warn attached to the return
> > of devm_i2c_new_dummy_device?
>
> I am in the middle of some API changes. Once those are over, I wan
Hi Alex,
> From: Alex Williamson [mailto:alex.william...@redhat.com]
> Sent: Friday, June 21, 2019 5:08 AM
> To: Liu, Yi L
> Subject: Re: [PATCH v1 9/9] smaples: add vfio-mdev-pci driver
>
> On Thu, 20 Jun 2019 13:00:34 +
> "Liu, Yi L" wrote:
>
> > Hi Alex,
> >
> > > From: Alex Williamson
On Tue, Jun 11, 2019 at 10:38:05AM +0100, Julien Thierry wrote:
> Julien Thierry (7):
> arm64: Do not enable IRQs for ct_user_exit
> arm64: irqflags: Pass flags as readonly operand to restore instruction
> arm64: irqflags: Add condition flags to inline asm clobber list
> arm64: Fix interrup
Hello Vignesh,
On Fri, Jun 21, 2019 at 11:33 AM Vignesh Raghavendra wrote:
>
> Hi,
>
> On 17/06/19 8:48 PM, Sagar Kadam wrote:
> > Hello Vignesh,
> >
> > Thanks for your review comments.
> >
> > On Sun, Jun 16, 2019 at 6:14 PM Vignesh Raghavendra wrote:
> >>
> >> Hi,
> >>
> >> On 12-Jun-19 4:17
Hi Suzuki,
On 6/21/2019 3:10 PM, Suzuki K Poulose wrote:
On 06/20/2019 07:31 PM, Sai Prakash Ranjan wrote:
Currently coresight etm and cpu-debug will go ahead with
the probe even when corresponding cpus are not available
and error out later in the probe path. In such cases, it
is better to abor
The RK809 and RK817 are a Power Management IC (PMIC) for multimedia
and handheld devices. They contains the following components:
- Regulators
- RTC
- Clocking
Both RK809 and RK817 chips are using a similar register map,
so we can reuse the RTC and Clocking functionality.
Most of regulators
Add support for the rk809 and rk817 regulator driver.
Their specifications are as follows：
1. The RK809 and RK809 consist of 5 DCDCs, 9 LDOs
and have the same registers for these components except dcdc5.
2. The dcdc5 is a boost dcdc for RK817 and is a buck for RK809.
3. T
Remove the id_table because it's not used.
Signed-off-by: Tony Xie
---
drivers/mfd/rk808.c | 9 -
1 file changed, 9 deletions(-)
diff --git a/drivers/mfd/rk808.c b/drivers/mfd/rk808.c
index 216fbf6adec9..94377782d208 100644
--- a/drivers/mfd/rk808.c
+++ b/drivers/mfd/rk808.c
@@ -568,14
Most of functions and registers of the rk817 and rk808 are the same,
so they can share allmost all codes.
Their specifications are as follows:
1) The RK809 and RK809 consist of 5 DCDCs, 9 LDOs and have the same
registers
for these components except dcdc5.
2) The dcdc5 is a boost dcdc for
Add device tree bindings documentation for Rockchip's RK809 & RK817 PMIC.
Signed-off-by: Tony Xie
Reviewed-by: Rob Herring
Acked-for-MFD-by: Lee Jones
---
.../devicetree/bindings/mfd/rk808.txt | 44 +++
1 file changed, 44 insertions(+)
diff --git a/Documentation/device
Hello Suzuki,
On 6/21/2019 3:18 PM, Suzuki K Poulose wrote:
Hi Sai,
On 06/20/2019 07:31 PM, Sai Prakash Ranjan wrote:
Coresight platform support assumes that a missing "cpu" phandle
defaults to CPU0. This could be problematic and unnecessarily binds
components to CPU0, where they may not be.
Hi Daniel,
On 20.06.2019 11:53, Daniel Lezcano wrote:
> Hi Claudiu,
>
> sorry for the late reply.
No problem, I understand.
>
>
> On 13/06/2019 16:12, claudiu.bez...@microchip.com wrote:
>> Hi Daniel,
>>
>> On 31.05.2019 13:41, Daniel Lezcano wrote:
>>>
>>> Hi Claudiu,
>>>
>>>
>>> On 30/05/20
RK809 and RK817 are power management IC chips for multimedia products.
most of their functions and registers are same, including the clkout
funciton.
Signed-off-by: Tony Xie
Acked-by: Stephen Boyd
---
drivers/clk/Kconfig | 9 +++---
drivers/clk/clk-rk808.c | 64
RK809 and RK817 are power management IC chips for multimedia products.
Most of their functions and registers are same, including the rtc.
Signed-off-by: Tony Xie
Acked-by: Alexandre Belloni
---
drivers/rtc/Kconfig | 4 +--
drivers/rtc/rtc-rk808.c | 68 --
Thanks, got it on my radar already since Feb 5:
https://github.com/sriemer/fix-linux-mouse/issues/15#issuecomment-460713115
If you see "Manufacturer: PixArt", then chances are high, that the
device is affected. IMHO generic quirks like described in GitHub issue
#20 would cover those easier.
Ack
On Fri, Jun 21, 2019 at 3:01 AM Kees Cook wrote:
>
> On Thu, Jun 20, 2019 at 04:46:06PM -0400, Qian Cai wrote:
> > The linux-next commit "mm: security: introduce init_on_alloc=1 and
> > init_on_free=1 boot options" [1] introduced a false positive when
> > init_on_free=1 and page_poison=on, due to
On 21/06/2019 01:43, Finn Thain wrote:
> On Thu, 20 Jun 2019, Marc Gonzalez wrote:
>
>> How likely is it that distro kernels would *not* enable CHR_DEV_SG?
>> (Distros tend to enable everything, and then some.)
>
> How likely is it that embedded developers would *not* disable CHR_DEV_SG?
> They
On 20/06/2019 19:25, Jiri Olsa wrote:
On Mon, Jun 17, 2019 at 10:06:08AM +0100, John Garry wrote:
On 16/06/2019 10:58, Jiri Olsa wrote:
On Fri, Jun 14, 2019 at 10:08:00PM +0800, John Garry wrote:
The jevent "Unit" field is used for uncore PMU alias definition.
The form uncore_pmu_example_X is
On Fri, Jun 21, 2019 at 9:55:11, Arnd Bergmann wrote:
> On Fri, Jun 21, 2019 at 10:42 AM Gustavo Pimentel
> wrote:
> > On Mon, Jun 17, 2019 at 14:17:47, Arnd Bergmann wrote:
> >
> > > When building with 'make C=1', sparse reports an endianess bug:
> >
> > I didn't know that option.
> >
> > >
>
On Fri, Jun 21, 2019 at 10:52:30AM +0100, Vincenzo Frascino wrote:
> diff --git a/kernel/vdso/vsyscall.c b/kernel/vdso/vsyscall.c
> new file mode 100644
> index ..d1e8074e3d10
> --- /dev/null
> +++ b/kernel/vdso/vsyscall.c
> +static inline void update_vdso_data(struct vdso_data *vdata,
Hi,
On Fri, Jun 21, 2019 at 03:16:11PM +0900, Masahiro Yamada wrote:
> (Added Lars Persson, Guennadi Liakhovetski)
>
> On Fri, Jun 21, 2019 at 3:06 PM Masahiro Yamada
> wrote:
>
> This needs Ack from Renesas.
> But, I do not know if TMIO folks are sure about this driver, though.
> (If they had
With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller
and NAND chips"), the Denali NAND controller driver migrated to the
new controller/chip representation.
Update DT for it.
In the new binding, the number of connected chips are described in
DT instead of run-time probed.
I added
On Thu, Jun 20, 2019 at 03:13:36PM -0700, Paul E. McKenney wrote:
> So how about the following patch, which passes very light rcutorture
> testing but should otherwise be regarded as being under suspicion?
Looks good to me,
Acked-by: Peter Zijlstra (Intel)
Or, if you want me to apply it, I can
On Fri, Jun 21, 2019 at 05:02:49PM +0800, Baoquan He wrote:
> Hi Kirill,
>
> On 06/20/19 at 02:22pm, Kirill A. Shutemov wrote:
> > Kyle has reported that kernel crashes sometimes when it boots in
> > 5-level paging mode with KASLR enabled:
>
> This is a great finding, thanks for the fix. I ever h
This patch-set is based on 'riscv-for-v5.2/fixes-rc6' tag of
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git
Tested on HiFive Unleashed board with additional patches required for
testing can be found at dev/yashs/ethernet_dt_v2 branch of:
https://github.com/yashshah7/riscv-linux.git
DT node for SiFive FU540-C000 GEMGXL Ethernet controller driver added
Signed-off-by: Yash Shah
---
arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 16
arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 9 +
2 files changed, 25 insertions(+)
diff --git a/arch/r
Hi all,
Changes since 20190620:
The samsung-krzk tree gained a conflict against the arm tree.
The fbdev tree still had its build failure so I used the version from
next-20190619.
The net-next tree still had its build failure for which I reverted a commit.
The block tree gained a build failure
On Fri 2019-06-14 18:54:07, Suzuki K Poulose wrote:
> Add a new wrapper for class_find_device() to search for devices
> by name and convert the existing users to use the new helper.
>
> Signed-off-by: Suzuki K Poulose
Acked-by: Pavel Machek
--
(english) http://www.livejournal.com/~pavelmachek
On Wed 2019-06-12 10:36:08, Nikolaus Voss wrote:
> DT specific handling is replaced by firmware-node abstration to support
> ACPI specification of PWM LEDS.
>
> Example ASL:
> Device (PWML)
> {
> Name (_HID, "PRP0001")
> Name (_DSD, Package () {
> ToUUID("daffd814-6eba-4d8c-8a91-
Hi!
I get this during compilation:
CC net/netfilter/core.o
In file included from net/netfilter/core.c:19:0:
./include/linux/netfilter_ipv6.h: In function
‘nf_ipv6_cookie_init_sequence’:
./include/linux/netfilter_ipv6.h:174:2: error: implicit declaration
of function ‘__cookie_v6_i
With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller
and NAND chips"), the Denali NAND controller driver migrated to the
new controller/chip representation.
Update DT for it.
Signed-off-by: Masahiro Yamada
---
arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts | 4
arc
On Wed 2019-06-19 17:46:48, Lukas Schneider wrote:
> This patch fixes the issue reported by checkpatch:
>
> CHECK: usleep_range is preferred over udelay;
> see Doucmentation/timers/timers-howto.txt
>
> It's save to sleep here instead of using busy waiting,
> because we are not in an atomic contex
Sorry, I forgot delete arm's. It's mistake, no change arm64 file.
On Fri, Jun 21, 2019 at 6:10 PM Julien Grall wrote:
>
> Hi,
>
> On 21/06/2019 10:39, guo...@kernel.org wrote:
> > Signed-off-by: Guo Ren
> > Cc: Arnd Bergmann
> > Cc: Julien Grall
> > ---
> > arch/arm64/lib/asid.c| 9
On Fri, Jun 21, 2019 at 12:09 PM Maciej W. Rozycki wrote:
>
> On Fri, 21 Jun 2019, Arnd Bergmann wrote:
>
> > > The use of 64-bit operations to access option's packet memory, which is
> > > true SRAM, i.e. no side effects, is to improve throughput only and there's
> > > no need for atomicity here
Cleanup DBI read and write APIs by removing "__" (underscore) from their
names as there are no no-underscore versions and the underscore versions
are already doing what no-underscore versions typically do. It also removes
passing dbi/dbi2 base address as one of the arguments as the same can be
deri
Add an API to group all the tasks to be done to de-initialize host which
can then be called by any DesignWare core based driver implementations
while adding .remove() support in their respective drivers.
Signed-off-by: Vidya Sagar
Acked-by: Gustavo Pimentel
---
Changes from v5:
* None
Changes f
Export all configuration space access APIs and also other APIs to
support host controller drivers of DesignWare core based implementations
while adding support for .remove() hook to build their respective drivers
as modules
Signed-off-by: Vidya Sagar
Acked-by: Gustavo Pimentel
---
Changes from v
Hi,
On 2019-06-20 20:35, Krzysztof Kozlowski wrote:
> Add the PMIC regulator suspend configuration to entire Odroid
> XU3/XU4/HC1 family of boards to reduce power usage during suspend. The
> configuration is based on vendor (Hardkernel) reference kernel.
>
> Signed-off-by: Krzysztof Kozlowski
O
From: Tomasz Figa
This patch adds documentation for binding of extcont Fairchild
Semiconductor FSA9480 microusb switch.
This usb port accessory detector and switch, can be found for example in
some Samsung s5pv210 based phones.
Signed-off-by: Tomasz Figa
Signed-off-by: Paweł Chmiel
Acked-by: C
This small patchset adds support for Fairchild Semiconductor FSA9480
microUSB switch.
It has been tested on Samsung Galaxy S and Samsung Fascinate 4G,
but it can be found also on other Samsung Aries (s5pv210) based devices.
Tomasz Figa (2):
dt-bindings: extcon: Add support for fsa9480 switch
From: Tomasz Figa
This patch adds extcon driver for Fairchild Semiconductor FSA9480
microUSB switch.
Signed-off-by: Tomasz Figa
Signed-off-by: Jonathan Bakker
Signed-off-by: Paweł Chmiel
---
Changes from v1:
- Remove license sentences
- Remove custom sysfs entries
- Remove manual switch
From: sudheer veliseti
Hi,
AST2500 has dedicated Uart DMA controller which has 12 sets of
Tx and RX channels connected to UART controller directly.
Since the DMA controller have dedicated buffers and registers,
there would be little benifit in adding DMA framework overhead.
So the software for DM
From: sudheer veliseti
Signed-off-by: sudheer veliseti
---
MAINTAINERS | 13 +
arch/arm/configs/aspeed_g5_defconfig | 1 +
2 files changed, 14 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 997e27ab492f..c9a9790b97f6 100644
--- a/MAINTAINERS
++
From: sudheer veliseti
DT node for DMA controller(ast_uart_sdma) doesn't bind to any DMA controller
driver.
This is because Software for DMA controller is not based on DMA framework,but
is dedicated
and serves only UARTs in AST2500. ast_uart_sdma node is searched by compatible
string in the
d
From: sudheer veliseti
Signed-off-by: sudheer veliseti
---
.../bindings/serial/ast2500-dma-uart.txt | 40 +++
1 file changed, 40 insertions(+)
create mode 100644
Documentation/devicetree/bindings/serial/ast2500-dma-uart.txt
diff --git a/Documentation/devicetree/bindings/
From: sudheer veliseti
Signed-off-by: sudheer veliseti
---
drivers/tty/serial/8250/Kconfig | 35 +++-
drivers/tty/serial/8250/Makefile | 1 +
2 files changed, 35 insertions(+), 1 deletion(-)
diff --git a/drivers/tty/serial/8250/Kconfig b/drivers/tty/serial/8250/Kc
From: sudheer veliseti
UART driver for Aspeed's bmc chip AST2500
Design approch:
AST2500 has dedicated Uart DMA controller which has 12 sets of Tx and RX
channels
connected to UART controller directly.
Since the DMA controller have dedicated buffers and registers,
there would be little benifit
On Fri, Jun 21, 2019 at 11:37:50AM +0200, Arnd Bergmann wrote:
> On Fri, Jun 21, 2019 at 12:10 AM Christian Brauner
> wrote:
> > On Thu, Jun 20, 2019 at 11:44:51AM -0700, Guenter Roeck wrote:
> > > On Tue, Jun 04, 2019 at 06:09:44PM +0200, Christian Brauner wrote:
> >
> > clone3() was placed unde
On Fri, Jun 21, 2019 at 4:27 PM Yash Shah wrote:
>
> DT node for SiFive FU540-C000 GEMGXL Ethernet controller driver added
>
> Signed-off-by: Yash Shah
> ---
> arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 16
> arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 9 ++
With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller
and NAND chips"), the Denali NAND controller driver migrated to the
new controller/chip representation.
Update DT for it.
Signed-off-by: Masahiro Yamada
---
arch/arm/boot/dts/socfpga.dtsi| 2 +-
arch/arm/boot
On 6/21/19 1:05 PM, Arnd Bergmann wrote:
> On Fri, Jun 21, 2019 at 12:58 PM Bartlomiej Zolnierkiewicz
> wrote:
>>
>> On 6/17/19 3:16 PM, Arnd Bergmann wrote:
>>> When the driver is built-in for PCI, we reference the exit function
>>> after discarding it:
>>>
>>> `pvr2fb_pci_exit' referenced in s
Hi Greg,
Commit
ecefae6db042 ("docs: usb: rename files to .rst and add them to drivers-api")
added this unexpected file:
Documentation/index.rst.rej
--
Cheers,
Stephen Rothwell
pgpyQTQwC6kyT.pgp
Description: OpenPGP digital signature
> +/* Check if the patch is able to deal with the given system state. */
> +static bool klp_is_state_compatible(struct klp_patch *patch,
> + struct klp_state *state)
> +{
> + struct klp_state *new_state;
> +
> + new_state = klp_get_state(patch, state->id);
>
Hi!
On 18.06.19 11:34, Stanislaw Gruszka wrote:
> Hi
>
> On Mon, Jun 17, 2019 at 11:46:56AM +0200, Soeren Moch wrote:
>> Since commit ed194d136769 ("usb: core: remove local_irq_save() around
>> ->complete() handler") the handlers rt2x00usb_interrupt_rxdone() and
>> rt2x00usb_interrupt_txdone() ar
On 6/20/19 6:08 PM, Yang Shi wrote:
>
>
> On 6/20/19 12:18 AM, Vlastimil Babka wrote:
>> On 6/19/19 8:19 PM, Yang Shi wrote:
>> This is getting even more muddy TBH. Is there any reason that we
>> have to
>> handle this problem during the isolation phase rather the migration?
> I t
of_get_next_child() increments the reference count of the returning
device_node. Decrement it in the check if we are using the old or the
new DTB.
Fixes: ba1f1f70c2c0 ("[media] media: mtk-mdp: Fix mdp device tree")
Signed-off-by: Matthias Brugger
---
drivers/media/platform/mtk-mdp/mtk_mdp_core.c
Hi,
On 6/7/19 2:21 PM, Bartlomiej Zolnierkiewicz wrote:
>
> On 5/9/19 7:38 PM, Christoph Hellwig wrote:
>> Virtual addresses return from dma(m)_alloc_coherent are opaque in what
>> backs then, and drivers must not poke into them. Switch the driver
>> to use the generic DMA API mmap helper to a
Hi all,
In commit
86fc32fee888 ("arm64: Fix incorrect irqflag restore for priority masking")
Fixes tag
Fixes: commit 4a503217ce37 ("arm64: irqflags: Use ICC_PMR_EL1 for interrupt
masking")
has these problem(s):
- leading word 'commit' unexpected
In commit
1500e8ca63f4 ("arm64: Fix
When setting the low and high watermarks we use min_wmark_pages(zone).
I guess this is to reduce the line length. But we forgot that this macro
includes zone->watermark_boost. We need to reset zone->watermark_boost
first. Otherwise the watermarks will be set inconsistently.
E.g. this could caus
errors
> scripts/Makefile.build:278: recipe for target
> 'net/netfilter/core.o' failed
> make[2]: *** [net/netfilter/core.o] Error 1
> scripts/Makefile.build:498: recipe for target 'net/netfilter' failed
> make[1]: *** [net/netfilter] Erro
> diff --git a/lib/livepatch/test_klp_state.c b/lib/livepatch/test_klp_state.c
> new file mode 100644
> index ..c43dc2f2e01d
> --- /dev/null
> +++ b/lib/livepatch/test_klp_state.c
> @@ -0,0 +1,161 @@
> +// SPDX-License-Identifier: GPL-2.0
> +// Copyright (C) 2019 SUSE
> +
> +#define pr_
This patch adds devicetree bindings documentation for
battery charging controller as the subnode of MAX8998 PMIC.
Signed-off-by: Paweł Chmiel
---
Changes from v3:
- Property prefix should be maxim, not max8998
- Describe what End of Charge in percent means
Changes from v2:
- Make charge-re
This patch adds missing code for reading charger configuration
from devicetree.
Signed-off-by: Paweł Chmiel
---
Changes from v3:
- Property prefix should be maxim, not max8998
- Changed property name to more meaning full
Changes from v2:
- Make restart level and charge timeout properties o
This patch series compose of 2 patches.
First patch, updates max8998 charger driver, so it's possible to parse
devicetree for configuration.
Second patch, updates max8998 documentation, so it includes new node
and properties, needed for charger.
Patches has been tested on, Samsung Galaxy S (i90
On 20/06/2019 18:28, Guenter Roeck wrote:
> This gets rid of the unnecessary license boilerplate, and avoids
> having to deal with individual patches one by one.
>
> No functional changes.
>
> Signed-off-by: Guenter Roeck
> ---
> Note: Several drivers include a paragraph such as
>
> "Neither
On Wed, Jun 19, 2019 at 09:54:48AM +, Waibel Georg wrote:
> In case the requested gpio property is not found in the device tree, some
> callers of gpiod_get_from_of_node() expect a return value of NULL, others
> expect -ENOENT.
> In particular devm_fwnode_get_index_gpiod_from_child() expects -E
On Fri, 21 Jun 2019, David Runge wrote:
> Hi!
>
> On 2019-06-20 15:26:30 (+0200), John Kacur wrote:
> > We haven't had a release in a while as people were content to work
> > from git. However, in order to make it easier to use, test, and put
> > into distributions, now would be a good time fo
On Thu, Jun 20, 2019 at 11:22:56PM +0200, Peter Zijlstra wrote:
> On Thu, Jun 20, 2019 at 11:48:17AM -0700, Vineet Gupta wrote:
> > I do worry about the occasional alignment induced extra NOP_S instruction
> > (2 byte)
> > but there doesn't seem to be an easy solution. Heck if we could use the
>
On 6/21/19 1:43 PM, Alan Jenkins wrote:
> When setting the low and high watermarks we use min_wmark_pages(zone).
> I guess this is to reduce the line length. But we forgot that this macro
> includes zone->watermark_boost. We need to reset zone->watermark_boost
> first. Otherwise the watermarks w
On Fri, Jun 21, 2019 at 02:09:23PM +0200, Peter Zijlstra wrote:
> --- /dev/null
> +++ b/arch/x86/include/asm/jump_label_asm.h
> @@ -0,0 +1,44 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +#ifndef _ASM_X86_JUMP_LABEL_ASM_H
> +#define _ASM_X86_JUMP_LABEL_ASM_H
> +
> +#include
> +#include
> +
> +
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