A forked tasks gets the same clamp values of its parent however, when
the RESET_ON_FORK flag is set on parent, e.g. via:
sys_sched_setattr()
sched_setattr()
__sched_setscheduler(attr::SCHED_FLAG_RESET_ON_FORK)
the new forked task is expected to start with all attributes reset to
So far uclamp_util() allows to clamp a specified utilization considering
the clamp values requested by RUNNABLE tasks in a CPU. For the Energy
Aware Scheduler (EAS) it is interesting to test how clamp values will
change when a task is becoming RUNNABLE on a given CPU.
For example, EAS is interested
Each time a frequency update is required via schedutil, a frequency is
selected to (possibly) satisfy the utilization reported by each
scheduling class and irqs. However, when utilization clamping is in use,
the frequency selection should consider userspace utilization clamping
hints. This will al
The sched_setattr() syscall mandates that a policy is always specified.
This requires to always know which policy a task will have when
attributes are configured and this makes it impossible to add more
generic task attributes valid across different scheduling policies.
Reading the policy before se
SVS driver use OPP adjust event in [1] to update
OPP table voltage part.
[1] https://patchwork.kernel.org/patch/10946069/
changes since v2:
- Improve SVS driver: For power saving point of view,
disable SVS main clk when probe fail.
Roger Lu (2):
dt-bindings: soc: add mtk svs dt-bindings
PM /
Tasks without a user-defined clamp value are considered not clamped
and by default their utilization can have any value in the
[0..SCHED_CAPACITY_SCALE] range.
Tasks with a user-defined clamp value are allowed to request any value
in that range, and the required clamp is unconditionally enforced.
The clamp values are not tunable at the level of the root task group.
That's for two main reasons:
- the root group represents "system resources" which are always
entirely available from the cgroup standpoint.
- when tuning/restricting "system resources" makes sense, tuning must
be done u
On Sat, Jun 15, 2019 at 17:5:50, kbuild test robot wrote:
> From: kbuild test robot
>
> drivers/dma/dw-edma/dw-edma-core.c:617:2-3: Unneeded semicolon
>
>
> Remove unneeded semicolon.
>
> Generated by: scripts/coccinelle/misc/semicolon.cocci
>
> Fixes: e63d79d1ffcd ("dmaengine: Add Synopsy
Hi,
On Mon, Jun 17, 2019 at 14:17:47, Arnd Bergmann wrote:
> When building with 'make C=1', sparse reports an endianess bug:
I didn't know that option.
>
> drivers/dma/dw-edma/dw-edma-v0-debugfs.c:60:30: warning: cast removes address
> space of expression
> drivers/dma/dw-edma/dw-edma-v0-deb
When a task sleeps it removes its max utilization clamp from its CPU.
However, the blocked utilization on that CPU can be higher than the max
clamp value enforced while the task was running. This allows undesired
CPU frequency increases while a CPU is idle, for example, when another
CPU on the same
The cgroup CPU bandwidth controller allows to assign a specified
(maximum) bandwidth to the tasks of a group. However this bandwidth is
defined and enforced only on a temporal base, without considering the
actual frequency a CPU is running on. Thus, the amount of computation
completed by a task wit
The Energy Aware Scheduler (EAS) estimates the energy impact of waking
up a task on a given CPU. This estimation is based on:
a) an (active) power consumption defined for each CPU frequency
b) an estimation of which frequency will be used on each CPU
c) an estimation of the busy time (utilizatio
By default FAIR tasks start without clamps, i.e. neither boosted nor
capped, and they run at the best frequency matching their utilization
demand. This default behavior does not fit RT tasks which instead are
expected to run at the maximum available frequency, if not otherwise
required by explicit
The SCHED_DEADLINE scheduling class provides an advanced and formal
model to define tasks requirements that can translate into proper
decisions for both task placements and frequencies selections. Other
classes have a more simplified model based on the POSIX concept of
priorities.
Such a simple pr
On Thu, Jun 20, 2019 at 11:55:58AM -0400, Alan Stern wrote:
> Herbert Xu recently reported a problem concerning RCU and compiler
> barriers. In the course of discussing the problem, he put forth a
> litmus test which illustrated a serious defect in the Linux Kernel
> Memory Model's data-race-detec
Jim Mattson writes:
> On Thu, Jun 20, 2019 at 4:02 AM Vitaly Kuznetsov wrote:
>>
>> svm->next_rip is only used by skip_emulated_instruction() and in case
>> kvm_set_msr() fails we rightfully don't do that. Move svm->next_rip
>> advancement to 'else' branch to avoid creating false impression that
Document the binding for enabling mtk svs on MediaTek SoC.
Signed-off-by: Roger Lu
---
.../devicetree/bindings/power/mtk-svs.txt | 88 +++
1 file changed, 88 insertions(+)
create mode 100644 Documentation/devicetree/bindings/power/mtk-svs.txt
diff --git a/Documentation/devi
Utilization clamping allows to clamp the CPU's utilization within a
[util_min, util_max] range, depending on the set of RUNNABLE tasks on
that CPU. Each task references two "clamp buckets" defining its minimum
and maximum (util_{min,max}) utilization "clamp values". A CPU's clamp
bucket is active i
On updates of task group (TG) clamp values, ensure that these new values
are enforced on all RUNNABLE tasks of the task group, i.e. all RUNNABLE
tasks are immediately boosted and/or clamped as requested.
Do that by slightly refactoring uclamp_bucket_inc(). An additional
parameter *cgroup_subsys_st
Hi all, this is a respin of:
https://lore.kernel.org/lkml/20190515094459.10317-1-patrick.bell...@arm.com/
which addresses all Tejun's concerns:
- rename cgroup attributes to be cpu.uclamp.{min,max}
- update initialization of subgroups clamps to be "no clamps" by default
- use percentage rat
When a task specific clamp value is configured via sched_setattr(2),
this value is accounted in the corresponding clamp bucket every time the
task is {en,de}qeued. However, when cgroups are also in use, the task
specific clamp values could be restricted by the task_group (TG)
clamp values.
Update
The SVS (Smart Voltage Scaling) engine is a piece of hardware which is
used to calculate optimized voltage values of several power domains, e.g.
CPU/GPU/CCI, according to chip process corner, temperatures, and other
factors. Then DVFS driver could apply those optimized voltage values to
reduce powe
Hi,
On Mon, Jun 17, 2019 at 02:50:02AM -0600, Naga Sureshkumar Relli wrote:
> Add driver for arm pl353 static memory controller nand interface with
> HW ECC support. This controller is used in Xilinx Zynq SoC for
> interfacing the NAND flash memory.
Thank you for the update.
> -> Tested Micron M
On Fri, Jun 21, 2019 at 11:43 AM Gustavo Pimentel
wrote:
>
> Hi,
>
> On Mon, Jun 17, 2019 at 14:17:47, Arnd Bergmann wrote:
>
> > When building with 'make C=1', sparse reports an endianess bug:
>
> I didn't know that option.
And CF="-D__CHECK_ENDIAN__" is useful.
--
With Best Regards,
Andy Sh
On Fri, Jun 21, 2019 at 09:34:50AM +0100, Parshuram Thombare wrote:
> @@ -486,23 +503,54 @@ static void gem_mac_config(struct phylink_config
> *pl_config, unsigned int mode,
> {
> struct net_device *netdev = to_net_dev(pl_config->dev);
> struct macb *bp = netdev_priv(netdev);
> +
at 20:50, Mika Westerberg wrote:
We try to keep PCIe hotplug ports runtime suspended when entering system
suspend. Due to the fact that the PCIe portdrv sets NEVER_SKIP driver PM
flag the PM core always calls system suspend/resume hooks even if the
device is left runtime suspended. Since PCIe h
On Mon, Jun 17, 2019 at 14:18:43, Arnd Bergmann wrote:
> The new driver mixes up dma_addr_t and __iomem pointers, which results
> in warnings on some 32-bit architectures, like:
>
> drivers/dma/dw-edma/dw-edma-v0-core.c: In function '__dw_regs':
> drivers/dma/dw-edma/dw-edma-v0-core.c:28:9: erro
On Fri, Jun 21, 2019 at 10:42 AM Gustavo Pimentel
wrote:
> On Mon, Jun 17, 2019 at 14:17:47, Arnd Bergmann wrote:
>
> > When building with 'make C=1', sparse reports an endianess bug:
>
> I didn't know that option.
>
> >
> > drivers/dma/dw-edma/dw-edma-v0-debugfs.c:60:30: warning: cast removes
>
On Fri, Jun 21, 2019 at 9:51:13, Andy Shevchenko
wrote:
> On Fri, Jun 21, 2019 at 11:43 AM Gustavo Pimentel
> wrote:
> >
> > Hi,
> >
> > On Mon, Jun 17, 2019 at 14:17:47, Arnd Bergmann wrote:
> >
> > > When building with 'make C=1', sparse reports an endianess bug:
> >
> > I didn't know that o
Realtek RTL8822BE BT chip on ASUS X420FA cannot be turned on correctly
after on-off several times. Bluetooth daemon sets BT mode failed when
this issue happens.
bluetoothd[1576]: Failed to set mode: Failed (0x03)
If BT is tunred off, then turned on again, it works correctly again.
This patch mak
When building with clang-8 the frame size limit is hit:
../arch/powerpc/lib/xor_vmx.c:119:6: error: stack frame size of 1200 bytes in
function '__xor_altivec_5' [-Werror,-Wframe-larger-than=]
Follow the same approach as commit 9c87156cce5a ("powerpc/xmon: Relax
frame size for clang") until a p
On Fri, Jun 21, 2019 at 11:40 AM Yash Shah wrote:
>
> DT node for SiFive FU540-C000 GEMGXL Ethernet controller driver added
>
> Signed-off-by: Yash Shah
> ---
> arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 20
> 1 file changed, 20 insertions(+)
>
> diff --git a/arch/riscv/bo
On Fri, Jun 21, 2019 at 10:53 AM Gustavo Pimentel
wrote:
> >
> > static struct dentry *base_dir;
> > static struct dw_edma*dw;
> > -static struct dw_edma_v0_regs*regs;
> > +static struct dw_edma_v0_regs
From: Christian Lamparter
This patch adds a firmware check for the uPD720201K8-711-BAC-A
and uPD720202K8-711-BAA-A variant. Both of these chips are listed
in Renesas' R19UH0078EJ0500 Rev.5.00 "User's Manual: Hardware" as
devices which need a firmware in order to work as they do not have
support t
This series add support for Renesas USB controllers uPD720201 and uPD720202.
These require firmware to be loaded and in case devices have ROM those can
also be programmed if empty. If ROM is programmed, it runs from ROM as well.
This includes two patches from Christian which supported these contro
From: Christian Lamparter
This patch adds a firmware loader for the uPD720201K8-711-BAC-A
and uPD720202K8-711-BAA-A variant. Both of these chips are listed
in Renesas' R19UH0078EJ0500 Rev.5.00 "User's Manual: Hardware" as
devices which need the firmware loader on page 2 in order to
work as they "
uPD720201 supports ROM and allows software to program the ROM and boot
from it. Add support for detecting if ROM is present, if so load the ROM
if not programmed earlier.
Signed-off-by: Vinod Koul
Cc: Yoshihiro Shimoda
Cc: Christian Lamparter
---
drivers/usb/host/xhci-pci.c | 357 +
Instead of using register values and fields lets define them and
use in the driver.
Signed-off-by: Vinod Koul
Cc: Yoshihiro Shimoda
Cc: Christian Lamparter
---
drivers/usb/host/xhci-pci.c | 68 +
1 file changed, 47 insertions(+), 21 deletions(-)
diff --git
Allow multiple firmware file versions in table and load them in
increasing order as we find them in the file system.
Signed-off-by: Vinod Koul
Cc: Yoshihiro Shimoda
Cc: Christian Lamparter
---
drivers/usb/host/xhci-pci.c | 46 +++--
1 file changed, 44 insertions
On Fri, Jun 21, 2019 at 09:34:50AM +0100, Parshuram Thombare wrote:
> This patch add support for SGMII interface) and
> 2.5Gbps MAC in Cadence ethernet controller driver.
Also, I'm not sure that merely using PHY_INTERFACE_MODE_SGMII with a
speed of 2.5Gbps is really on for up-clocked SGMII.
Cisco
Hi Kirill,
On 06/20/19 at 02:22pm, Kirill A. Shutemov wrote:
> Kyle has reported that kernel crashes sometimes when it boots in
> 5-level paging mode with KASLR enabled:
This is a great finding, thanks for the fix. I ever have modified codes
to make them accommodate PMD level of randomization, th
On Fri, Jun 21, 2019 at 10:21 AM Gustavo Pimentel
wrote:
> On Mon, Jun 17, 2019 at 14:16:45, Arnd Bergmann wrote:
>
> > Putting large constant data on the stack causes unnecessary overhead
> > and stack usage:
> >
> > drivers/dma/dw-edma/dw-edma-v0-debugfs.c:285:6: error: stack frame size of
>
On 20/06/2019 17:27, Andre Przywara wrote:
> On Thu, 30 May 2019 15:15:12 +0100
> Vincenzo Frascino wrote:
>
> Hi,
>
>> vDSO (virtual dynamic shared object) is a mechanism that the Linux
>> kernel provides as an alternative to system calls to reduce where
>> possible the costs in terms of cycles
From: Heiner Litz
bio_add_pc_page() may merge pages when a bio is padded due to a flush.
Fix iteration over the bio to free the correct pages in case of a merge.
Signed-off-by: Heiner Litz
Reviewed-by: Javier González
Signed-off-by: Matias Bjørling
---
drivers/lightnvm/pblk-core.c | 16 +
Dear David, Jose,
any comments about this patch?
Thanks
Biao
On Thu, 2019-05-30 at 17:30 +0800, Biao Huang wrote:
> 1. get hash table size in hw feature reigster, and add support
> for taller hash table(128/256) in dwmac4.
> 2. only clear GMAC_PACKET_FILTER bits used in this function,
>
On 6/21/19 3:11 AM, Matias Bjørling wrote:
> Hi Jens,
>
> A couple of patches for the 5.3 window. Geert fixed an uninitialized
> pointer bug, and Heiner fixed up a bug when merging bio pages in pblk.
Applied, thanks.
--
Jens Axboe
I've spotted another Chicony PixArt mouse in the wild, which requires
HID_QUIRK_ALWAYS_POLL quirk, otherwise it disconnects each minute.
USB ID of this device is 0x04f2:0x0939.
We've introduced quirks like this for other models before, so lets add
this mouse too.
Link:
https://github.com/srieme
Le ven. 21 juin 2019 à 11:13, Daniel Vetter a écrit
:
On Fri, Jun 21, 2019 at 11:07:30AM +0200, Paul Cercueil wrote:
Le ven. 21 juin 2019 à 11:04, Daniel Vetter a
écrit :
> On Thu, Jun 20, 2019 at 04:15:59PM +0200, Paul Cercueil wrote:
> >
> >
> > Le mer. 19 juin 2019 à 14:26, Sa
Cleanup DBI read and write APIs by removing "__" (underscore) from their
names as there are no no-underscore versions and the underscore versions
are already doing what no-underscore versions typically do.
Signed-off-by: Vidya Sagar
---
Changes from v4:
* This is a new patch in this series
driv
Add an API to group all the tasks to be done to de-initialize host which
can then be called by any DesignWare core based driver implementations
while adding .remove() support in their respective drivers.
Signed-off-by: Vidya Sagar
Acked-by: Gustavo Pimentel
---
Changes from v4:
* None
Changes f
Le 21/06/2019 à 03:47, Oliver O'Halloran a écrit :
On Thu, May 23, 2019 at 5:51 PM Christoph Hellwig wrote:
These have been unused ever since they've been added to the kernel.
Signed-off-by: Christoph Hellwig
---
arch/powerpc/include/asm/pnv-pci.h| 4 --
arch/powerpc/platforms
Export all configuration space access APIs and also other APIs to
support host controller drivers of DesignWare core based implementations
while adding support for .remove() hook to build their respective drivers
as modules
Signed-off-by: Vidya Sagar
Acked-by: Gustavo Pimentel
---
Changes from v
Hi Wolfram,
On 20 June 2019 10:21, Wolfram Sang wrote:
> Subject: Re: [PATCH] mfd: da9063: occupy second I2C address, too
>
> > Is this a safety clause? What I mean is, shouldn't the hardware design make
> > sure there are not two devices located on the same I2C bus with the same
> > slave
> > a
On Fri, Jun 21, 2019 at 11:21:38AM +0200, Frederic Barrat wrote:
> The as-notify can be used in both CAPI mode and PCI mode. In capi mode,
> it's integrated in the capi protocol, so the cxl driver doesn't need to do
> extra setup, compared to what's already done to activate capi.
> As mentioned i
On Thu, Jun 20, 2019 at 8:19 PM Maciej W. Rozycki wrote:
>
> On Thu, 20 Jun 2019, Paul Burton wrote:
>
> > So this seems pretty reasonable. Build testing all our defconfigs only
> > showed up one issue for decstation_defconfig & decstation_r4k_defconfig:
> >
> > drivers/net/fddi/defza.c: In func
Hi Vidya,
On 21/06/19 2:51 PM, Vidya Sagar wrote:
> Cleanup DBI read and write APIs by removing "__" (underscore) from their
> names as there are no no-underscore versions and the underscore versions
> are already doing what no-underscore versions typically do.
>
> Signed-off-by: Vidya Sagar
> -
On 20/06/2019 10:30:42+, claudiu.bez...@microchip.com wrote:
> Hi,
>
> On 18.06.2019 12:55, Alexandre Belloni wrote:
> > On 13/06/2019 15:37:06+, claudiu.bez...@microchip.com wrote:
> >> From: Claudiu Beznea
> >>
> >> Hi,
> >>
> >> This series tries to improve error path for slow clock re
On Fri, Jun 21, 2019 at 10:1:1, Arnd Bergmann wrote:
> On Fri, Jun 21, 2019 at 10:53 AM Gustavo Pimentel
> wrote:
>
> > >
> > > static struct dentry *base_dir;
> > > static struct dw_edma*dw;
> > > -static struct dw_edma_v0_regs
On 06/20/2019 07:31 PM, Sai Prakash Ranjan wrote:
Currently coresight etm and cpu-debug will go ahead with
the probe even when corresponding cpus are not available
and error out later in the probe path. In such cases, it
is better to abort the probe earlier.
Without this, setting *nosmp* will th
From: Guo Ren
Current C-SKY ASID mechanism is from mips and it doesn't work well
with multi-cores. ASID per core mechanism is not suitable for C-SKY
SMP tlb maintain operations, eg: tlbi.vas need share the same asid
in all processors and it'll invalid the tlb entry in all cores with
the same asid
From: Wanpeng Li
When lapic timer is injected by posted-interrupt, the emulated timer is
offload to the housekeeping cpu. The timer interrupt will be delivered
properly, no need to migrate timer.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Cc: Marcelo Tosatti
Signed-off-by: Wanpeng Li
---
arch/x86/k
Erm. Cc: s.parscha...@gmx.de instead of inactive @suse address.
On Fri, Jun 21, 2019 at 11:17:36AM +0200, Oleksandr Natalenko wrote:
> I've spotted another Chicony PixArt mouse in the wild, which requires
> HID_QUIRK_ALWAYS_POLL quirk, otherwise it disconnects each minute.
>
> USB ID of this devi
On Fri, Jun 21, 2019 at 5:12 AM Daniel Vetter wrote:
>
> Massively cutting this thread, since halfway through in my previous reply
> I realized that maybe hdmi_codec is a much better starting point.
>
ACK
> On Thu, Jun 20, 2019 at 09:23:23PM +0800, Cheng-yi Chiang wrote:
> > On Thu, Jun 20, 2019 a
> I still don't see the point of specifying return. Why not just S, where S
> is a statement metavariable?
Do you find the following SmPL change specification more appropriate?
@deletion depends on patch@
expression e;
statement s;
@@
e = devm_ioremap_resource(...);
if (IS_ERR(e))
(
-{
- dev
On Fri, Jun 21, 2019 at 12:10 AM Christian Brauner wrote:
> On Thu, Jun 20, 2019 at 11:44:51AM -0700, Guenter Roeck wrote:
> > On Tue, Jun 04, 2019 at 06:09:44PM +0200, Christian Brauner wrote:
>
> clone3() was placed under __ARCH_WANT_SYS_CLONE. Most architectures
> simply define __ARCH_WANT_SYS_
From: Wanpeng Li
already-expired timer interrupt can be injected to guest when vCPU who
arms the lapic timer re-vmentry, don't posted inject in this case.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Cc: Marcelo Tosatti
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/lapic.c | 14 +++---
1 file c
From: Guo Ren
Use linux generic asid/vmid algorithm to implement csky
switch_mm function. The algorithm is from arm and it could
work with SMP system. It'll help reduce tlb flush for
switch_mm in task/vm switch.
Signed-off-by: Guo Ren
Cc: Arnd Bergmann
---
arch/csky/abiv1/inc/abi/ckmmu.h
From: Wanpeng Li
Dedicated instances are currently disturbed by unnecessary jitter due
to the emulated lapic timers fire on the same pCPUs which vCPUs resident.
There is no hardware virtual timer on Intel for guest like ARM. Both
programming timer in guest and the emulated timer fires incur vme
From: Wanpeng Li
Commit 61abdbe0bcc2 ("kvm: x86: make lapic hrtimer pinned") pinned the
lapic timer to avoid to wait until the next kvm exit for the guest to
see KVM_REQ_PENDING_TIMER set. There is another solution to give a kick
after setting the KVM_REQ_PENDING_TIMER bit, make lapic timer un
From: Guo Ren
For C-SKY the first implementation is from mips and it's not implemented
well for SMP in performance. Arm's asid allocator is right for us and
we've tested it in our all CPUs:610/807/810/860 and it really reduce the
tlb flush. We'll continue stress testing before merge into master.
From: Guo Ren
There are two generations of tlb operation instruction for C-SKY.
First generation is use mcr register and it need software do more
things, second generation is use specific instructions, eg:
tlbi.va, tlbi.vas, tlbi.alls
We implemented the following functions:
- flush_tlb_range
From: Guo Ren
This patch only contains asid help code from arm for next patch to
use.
The asid allocator use five level check to reduce the cost of
switch_mm.
1. Check if the asid version is the same (it's general)
2. Check reserved_asid which is set in rollover flush_context()
and key po
Dedicated instances are currently disturbed by unnecessary jitter due
to the emulated lapic timers fire on the same pCPUs which vCPUs resident.
There is no hardware virtual timer on Intel for guest like ARM. Both
programming timer in guest and the emulated timer fires incur vmexits.
This patchset
ping,
On Fri, 14 Jun 2019 at 09:15, Wanpeng Li wrote:
>
> From: Wanpeng Li
>
> Advance lapic timer tries to hidden the hypervisor overhead between the
> host emulated timer fires and the guest awares the timer is fired. However,
> even though after more sustaining optimizations,
> kvm-unit-tests
Le jeu. 20 juin 2019 à 16:56, YueHaibing a écrit :
>
> Remove duplicated include.
>
> Signed-off-by: YueHaibing
Applied on drm-misc-next,
Thanks for the patch.
Benjamin
> ---
> drivers/gpu/drm/sti/sti_drv.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/sti/sti_drv.c
On Thu, Jun 20, 2019 at 7:36 PM Kees Cook wrote:
>
> On Tue, Jun 18, 2019 at 11:47:13AM +0200, Arnd Bergmann wrote:
> > The combination of KASAN_STACK and GCC_PLUGIN_STRUCTLEAK_BYREF_ALL
> > leads to much larger kernel stack usage, as seen from the warnings
> > about functions that now exceed the
Hi Sai,
On 06/20/2019 07:31 PM, Sai Prakash Ranjan wrote:
Coresight platform support assumes that a missing "cpu" phandle
defaults to CPU0. This could be problematic and unnecessarily binds
components to CPU0, where they may not be. Let us make the DT binding
rules a bit stricter by not default
Rename the PCI_REV_ID and other local defines to Generic PCI define names
in skfbi.h and drvfbi.c to make it compatible with the pci_regs.h.
Signed-off-by: Puranjay Mohan
---
drivers/net/fddi/skfp/drvfbi.c | 2 +-
drivers/net/fddi/skfp/h/skfbi.h | 4 ++--
2 files changed, 3 insertions(+), 3 del
This patch series removes the private duplicates of PCI definitions in
favour of generic definitions defined in pci_regs.h.
This driver only uses some of the generic PCI definitons,
which are included from pci_regs.h and thier private versions
are removed from skfbi.h with all other private define
Include the uapi/linux/pci_regs.h header file which contains the generic
PCI defines.
Signed-off-by: Puranjay Mohan
---
drivers/net/fddi/skfp/drvfbi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/fddi/skfp/drvfbi.c b/drivers/net/fddi/skfp/drvfbi.c
index b324c1acf195..9c8aa3a95
On 2019/6/21 0:07, Gao Xiang wrote:
> This patch adds a new generic decompression framework
> in order to replace the old LZ4-specific decompression code.
>
> Even though LZ4 is still the only supported algorithm, yet
> it is more cleaner and easy to integrate new algorithm than
> the old almost h
Remove unused private PCI definitions from skfbi.h because generic PCI
symbols are already included from pci_regs.h.
Signed-off-by: Puranjay Mohan
---
drivers/net/fddi/skfp/h/skfbi.h | 76 -
1 file changed, 76 deletions(-)
diff --git a/drivers/net/fddi/skfp/h/skf
On 6/21/2019 2:57 PM, Kishon Vijay Abraham I wrote:
Hi Vidya,
On 21/06/19 2:51 PM, Vidya Sagar wrote:
Cleanup DBI read and write APIs by removing "__" (underscore) from their
names as there are no no-underscore versions and the underscore versions
are already doing what no-underscore versions t
On Tue, May 28, 2019 at 04:11:19PM +0100, David Howells wrote:
> Allow fsinfo() to be used to query the filesystem attached to an fs_context
> once a superblock has been created or if it comes from fspick().
>
> This is done with something like:
>
> fd = fsopen("ext4", 0);
> ...
>
In an effort to unify the common code for managing the vdso library in
between all the architectures that support it, this patch tries to
provide a common format for the vdso datapage.
As a result of this, this patch generalized the data structures in vgtod.h
from x86 private includes to general i
vDSO (virtual dynamic shared object) is a mechanism that the Linux
kernel provides as an alternative to system calls to reduce where
possible the costs in terms of cycles.
This is possible because certain syscalls like gettimeofday() do
not write any data and return one or more values that are stor
In the last few years we have seen an explosion in vdso
implementations that mostly share similar code.
Try to unify the gettimeofday vdso implementation introducing
lib/vdso. The code contained in this library can ideally be
reused by all the architectures avoiding, where possible, code
duplicati
vDSO requires gettimeofday and clock_gettime syscalls to implement the
fallback mechanism.
Add the missing syscall numbers to unistd.h for arm64.
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Arnd Bergmann
Signed-off-by: Vincenzo Frascino
Tested-by: Shijith Thotton
Tested-by: Andre Przywara
---
From: Peter Collingbourne
The vDSO needs to be build with x18 reserved in order to accommodate
userspace platform ABIs built on top of Linux that use the register
to carry inter-procedural state, as provided for by the AAPCS.
An example of such a platform ABI is the one that will be used by an
up
Update asm-offsets for arm64 to generate the correct offsets for
compat signals.
They will be useful for the implementation of the compat sigreturn
trampolines in vDSO context.
Cc: Catalin Marinas
Cc: Will Deacon
Signed-off-by: Vincenzo Frascino
Tested-by: Shijith Thotton
Tested-by: Andre Prz
The compat signal data structures are required as part of the compat
vDSO implementation in order to provide the unwinding information for
the sigreturn trampolines.
Expose the mentioned data structures as part of signal32.h.
Cc: Catalin Marinas
Cc: Will Deacon
Signed-off-by: Vincenzo Frascino
If CONFIG_GENERIC_COMPAT_VDSO is enabled, compat vDSO are installed in a
compat (32 bit) process instead of sigpage.
Add the necessary code to setup the vDSO required pages.
Cc: Catalin Marinas
Cc: Will Deacon
Signed-off-by: Vincenzo Frascino
Tested-by: Shijith Thotton
Tested-by: Andre Przywa
With the definition of the unified vDSO library the implementations of
update_vsyscall and update_vsyscall_tz became quite similar across
architectures.
Define a unified implementation of these two functions in kernel/vdso
and provide the bindings that can be implemented by every architecture
that
When the compat vDSO is enabled, the sigreturn trampolines are not
anymore available through [sigpage] but through [vdso].
Add the relevant code the enable the feature.
Cc: Catalin Marinas
Cc: Will Deacon
Signed-off-by: Vincenzo Frascino
Tested-by: Shijith Thotton
Tested-by: Andre Przywara
-
On Fri, Jun 21, 2019 at 01:54:11PM +1000, Dave Airlie wrote:
> On Thu, 20 Jun 2019 at 20:35, Liviu Dudau wrote:
> >
> > Hi DRM maintainers,
> >
> > Picking up pace on the upstreaming of Komeda driver, with quite a lot
> > of new features added this time. On top of that we have the small
> > cleanu
Some 64 bit architectures have support for 32 bit applications that
require a separate version of the vDSOs.
Add support to the generic code for compat fallback functions.
Cc: Catalin Marinas
Cc: Will Deacon
Signed-off-by: Vincenzo Frascino
Tested-by: Shijith Thotton
Tested-by: Andre Przywara
Most of the code for initializing the vDSOs in arm64 and compat will
be in common, hence a refactor of the current code is required to avoid
duplication and simplify maintainability.
Refactor vdso.c to simplify the implementation of arm64 vDSO compat
(which will be pushed with a future patch).
Cc
To take advantage of the commonly defined vdso interface for
gettimeofday the architectural code requires an adaptation.
Re-implement the gettimeofday vdso in C in order to use lib/vdso.
With the new implementation arm64 gains support for CLOCK_BOOTTIME
and CLOCK_TAI.
Cc: Catalin Marinas
Cc: Wi
The arm vDSO library requires some adaptations to use to take advantage
of the newly introduced generic vDSO library.
Introduce the following changes:
- Modification vdso.c to be compliant with the common vdso datapage
- Use of lib/vdso for gettimeofday
- Implementation of elf note
Cc: Russell
Provide the arm64 compat (AArch32) vDSO in kernel/vdso32 in a similar
way to what happens in kernel/vdso.
The compat vDSO leverages on an adaptation of the arm architecture code
with few changes:
- Use of lib/vdso for gettimeofday
- Implementation of syscall based fallback
- Introduction of clo
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