Use 'kasprintf()' instead of:
- snprintf(NULL, 0...
- kmalloc(...
- snprintf(...
This is less verbose and saves 7 bytes (i.e. the space for '/(null)') if
'udev->dev_config' is NULL.
Signed-off-by: Christophe JAILLET
---
drivers/target/target_core_user.c | 16 +++-
1 file ch
Hi Greg,
Sorry for annoying... Could you help merge these two fixes? Thanks in advance...
decompression inplace optimization needs these two patches and I will integrate
erofs decompression inplace optimization later for linux-next 5.3, and try to
start
making effort on moving to fs/ directory o
This patch modify MDIO read/write functions to support
communication with C45 PHY.
Signed-off-by: Parshuram Thombare
---
drivers/net/ethernet/cadence/macb.h | 15 --
drivers/net/ethernet/cadence/macb_main.c | 61 +++-
drivers/net/ethernet/cadence/macb_pci.c | 60 +++
This is version 2 of patch to add support for SGMII interface) and
2.5Gbps MAC in Cadence ethernet controller driver.
Signed-off-by: Parshuram Thombare
---
drivers/net/ethernet/cadence/macb.h | 76 +--
drivers/net/ethernet/cadence/macb_main.c | 157 ---
2 files
This patch add TI PHY DP83867 configuration for SGMII link in
Cadence MACB PCI wrapper.
Signed-off-by: Parshuram Thombare
---
drivers/net/ethernet/cadence/macb_pci.c | 225
1 file changed, 225 insertions(+)
diff --git a/drivers/net/ethernet/cadence/macb_pci.c
b/drivers
This patch add support for high speed USXGMII PCS and 10G
speed in Cadence ethernet controller driver.
Signed-off-by: Parshuram Thombare
---
drivers/net/ethernet/cadence/macb.h | 42 +
drivers/net/ethernet/cadence/macb_main.c | 215 +++
2 files changed, 224 insertio
New parameters added to Cadence ethernet controller DT binding
for USXGMII interface.
Signed-off-by: Parshuram Thombare
---
Documentation/devicetree/bindings/net/macb.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/macb.txt
b/Documentation/devic
On Sat, Jun 15, 2019 at 06:41:59PM -0400, Sasha Levin wrote:
> On Sat, Jun 15, 2019 at 07:47:39AM +0200, Greg Kroah-Hartman wrote:
> > On Fri, Jun 14, 2019 at 04:28:00PM -0400, Sasha Levin wrote:
> > > From: Scott Wood
> > >
> > > [ Upstream commit dfe3de8d397bf878b31864d4e489d41118ec475f ]
> > >
On 6/10/19 2:44 AM, Xin Long wrote:
> Looks we need to purge each member's deferredq list in tipc_group_delete():
> diff --git a/net/tipc/group.c b/net/tipc/group.c
> index 992be61..23823eb 100644
> --- a/net/tipc/group.c
> +++ b/net/tipc/group.c
> @@ -218,6 +218,7 @@ void tipc_group_delete(struct
On 2019/06/16 6:33, Tetsuo Handa wrote:
> On 2019/06/16 3:50, Shakeel Butt wrote:
>>> While dump_tasks() traverses only each thread group, mem_cgroup_scan_tasks()
>>> traverses each thread.
>>
>> I think mem_cgroup_scan_tasks() traversing threads is not intentional
>> and css_task_iter_start in it
Dan Williams writes:
> Teach devm_memremap_pages() about the new sub-section capabilities of
> arch_{add,remove}_memory(). Effectively, just replace all usage of
> align_start, align_end, and align_size with res->start, res->end, and
> resource_size(res). The existing sanity check will still make
On Sat, 2019-06-15 at 14:29 -0700, Shobhit Kukreti wrote:
> Cleaned up the code from the following files to get rid of
> check patch error "that open brace { should be on the previous line"
It's fine you are modifying brace styles, but:
> diff --git a/drivers/staging/rtl8723bs/os_dep/mlme_linux.c
On Sun, Jun 16, 2019 at 11:02:50AM +0530, Hariprasad Kelam wrote:
> rtw_malloc with memset can be replace with rtw_zmalloc.
>
> Signed-off-by: Hariprasad Kelam
> ---
> drivers/staging/rtl8723bs/os_dep/ioctl_linux.c | 12 +++-
> 1 file changed, 3 insertions(+), 9 deletions(-)
>
> diff --
Le 15/06/2019 à 13:23, Andreas Schwab a écrit :
This breaks suspend (or resume) on the iBook G4. no_console_suspend
doesn't give any clues, the display just stays dark.
After a quick look at the suspend functions, I have the feeling that
those functions only store and restore BATs 0 to 3.
Le 15/06/2019 à 16:36, Andreas Schwab a écrit :
On Jun 15 2019, Christophe Leroy wrote:
Andreas Schwab a écrit :
If STRICT_KERNEL_RWX is disabled, never use the MMU to mark initmen
nonexecutable.
I dont understand, can you elaborate ?
It breaks suspend.
Ok, but we need to explain w
Le 15/06/2019 à 14:28, Andreas Schwab a écrit :
On Feb 21 2019, Christophe Leroy wrote:
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index a000768a5cc9..6e56a6240bfa 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -353,7 +353,10 @@
On Sun, 16 Jun 2019, Bae, Chang Seok wrote:
> On Jun 14, 2019, at 13:07, Bae, Chang Seok
> mailto:chang.seok@intel.com>> wrote:
>
>
> On Jun 13, 2019, at 23:54, Thomas Gleixner
> mailto:t...@linutronix.de>> wrote:
>
> +The GS segment has no common use and can be used freely by
> +applicati
On Tue, 11 Jun 2019, Miroslav Benes wrote:
> Recent rework of stack trace infrastructure introduced a new set of
> helpers for common stack trace operations (commit e9b98e162aa5
> ("stacktrace: Provide helpers for common stack trace operations") and
> related). As a result, save_stack_trace_tsk_re
On Jun 16 2019, christophe leroy wrote:
> Le 15/06/2019 à 14:28, Andreas Schwab a écrit :
>> On Feb 21 2019, Christophe Leroy wrote:
>>
>>> diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
>>> index a000768a5cc9..6e56a6240bfa 100644
>>> --- a/arch/powerpc/mm/pgtable_32.c
Just to highlight it after our conversation.
Signed-off-by: Oleksandr Natalenko
---
mm/madvise.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/mm/madvise.c b/mm/madvise.c
index edb7184f665c..70aeb54f3e1c 100644
--- a/mm/madvise.c
+++ b/mm/madvise.c
@@ -1041,8 +1041,7 @@ s
I couldn't compile it w/o this header.
Signed-off-by: Oleksandr Natalenko
---
mm/madvise.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/mm/madvise.c b/mm/madvise.c
index 70aeb54f3e1c..9755340da157 100644
--- a/mm/madvise.c
+++ b/mm/madvise.c
@@ -25,6 +25,7 @@
#include
#include
#inclu
"core" usually means something very different within the kernel land,
thus lets just follow the way it is handled in mutexes, rw_semaphores
etc and name common things as "_common".
Signed-off-by: Oleksandr Natalenko
---
mm/madvise.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletio
It all began with the fact that KSM works only on memory that is marked
by madvise(). And the only way to get around that is to either:
* use LD_PRELOAD; or
* patch the kernel with something like UKSM or PKSM.
(i skip ptrace can of worms here intentionally)
To overcome this restriction, lets
Hi, Minchan.
This is a set of commits based on our discussion on your submission [1].
First 2 implement minor suggestions just for you to not forget to take
them into account.
uio.h inclusion was needed for me to be able to compile your series
successfully. Also please note I had to enable "Tran
Do the very same trick as we already do since 04f5866e41fb. KSM hints
will require locking mmap_sem for write since they modify vm_flags, so
for remote KSM hinting this additional check is needed.
Signed-off-by: Oleksandr Natalenko
---
mm/madvise.c | 3 +++
1 file changed, 3 insertions(+)
diff
On 2019-06-16 01:24, Serge Semin wrote:
> On Sat, Jun 15, 2019 at 02:43:09PM +0300, Andy Shevchenko wrote:
>> On Sat, Jun 15, 2019 at 12:51 AM Serge Semin wrote:
>>>
>>> Recent patch - ("i2c: mux/i801: Switch to use descriptor passing")
>>> altered the i2c-mux-gpio driver to use the GPIO-descripto
On Jun 16 2019, christophe leroy wrote:
> If any of registers IBATs 4 to 7 are used
Nope.
Andreas.
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510 2552 DF73 E780 A9DA AEC1
"And now for something completely different."
On Fri, Jun 14, 2019 at 04:30:13PM +0200, Daniel Lezcano wrote:
> On 14/06/2019 16:02, Robin Murphy wrote:
> > On 14/06/2019 14:03, Daniel Lezcano wrote:
> >> On 14/06/2019 11:35, Heiko Stuebner wrote:
> >>> Hi Daniel,
> >>>
> >>> Am Dienstag, 4. Juni 2019, 18:57:57 CEST schrieb Daniel Lezcano:
> >
UMWAIT and TPAUSE instructions use IA32_UMWAIT_CONTROL at MSR index E1H
to determines the maximum time in TSC-quanta that the processor can reside
in either C0.1 or C0.2.
This patch emulates MSR IA32_UMWAIT_CONTROL in guest and differentiate
IA32_UMWAIT_CONTROL between host and guest. The variable
UMONITOR, UMWAIT and TPAUSE are a set of user wait instructions.
UMONITOR arms address monitoring hardware using an address. A store
to an address within the specified address range triggers the
monitoring hardware to wake up the processor waiting in umwait.
UMWAIT instructs the processor to ente
UMONITOR, UMWAIT and TPAUSE are a set of user wait instructions.
This patch adds support for user wait instructions in KVM. Availability
of the user wait instructions is indicated by the presence of the CPUID
feature flag WAITPKG CPUID.0x07.0x0:ECX[5]. User wait instructions may
be executed at any
As the latest Intel 64 and IA-32 Architectures Software Developer's
Manual, UMWAIT and TPAUSE instructions cause a VM exit if the
RDTSC exiting and enable user wait and pause VM-execution
controls are both 1.
This patch is to handle the vm-exit for UMWAIT and TPAUSE as this
should never happen.
C
On Fri, Jun 14, 2019 at 11:39:47AM -0700, Florian Fainelli wrote:
> Hardcoding /usr/include/slang is fundamentally incompatible with cross
> compilation and will lead to the inability for a cross-compiled
> environment to properly detect whether slang is available or not.
>
> If /usr/include/slang
On Sat, Jun 15, 2019 at 03:12:36PM +0300, Oded Gabbay wrote:
> So after the dust has settled a bit, do you think it is reasonable to
> add this patch upstream ?
I'm not Greg, but the answer is a very clear no. drivers have abslutely
no business adding these hacks.
On Fri, Jun 14, 2019 at 10:08:00PM +0800, John Garry wrote:
> The jevent "Unit" field is used for uncore PMU alias definition.
>
> The form uncore_pmu_example_X is supported, where "X" is a wildcard,
> to support multiple instances of the same PMU in a system.
>
> Unfortunately this format not su
UMONITOR, UMWAIT and TPAUSE are a set of user wait instructions.
This patch adds support for user wait instructions in KVM. Availability
of the user wait instructions is indicated by the presence of the CPUID
feature flag WAITPKG CPUID.0x07.0x0:ECX[5]. User wait instructions may
be executed at any
UMWAIT and TPAUSE instructions use IA32_UMWAIT_CONTROL at MSR index E1H
to determines the maximum time in TSC-quanta that the processor can reside
in either C0.1 or C0.2.
This patch emulates MSR IA32_UMWAIT_CONTROL in guest and differentiate
IA32_UMWAIT_CONTROL between host and guest. The variable
UMONITOR, UMWAIT and TPAUSE are a set of user wait instructions.
UMONITOR arms address monitoring hardware using an address. A store
to an address within the specified address range triggers the
monitoring hardware to wake up the processor waiting in umwait.
UMWAIT instructs the processor to ente
As the latest Intel 64 and IA-32 Architectures Software Developer's
Manual, UMWAIT and TPAUSE instructions cause a VM exit if the
RDTSC exiting and enable user wait and pause VM-execution
controls are both 1.
This patch is to handle the vm-exit for UMWAIT and TPAUSE as this
should never happen.
C
Hi,
I finished today bisecting kernel.
And first bad commit for me was cd736d8b67fb22a85a68c1ee8020eb0d660615ec
Can you look into this?
$ git bisect log
git bisect start
# good: [a188339ca5a396acc588e5851ed7e19f66b0ebd9] Linux 5.2-rc1
git bisect good a188339ca5a396acc588e5851ed7e19f66b0ebd9
# go
On Jun 16 2019, christophe leroy wrote:
> If any of registers IBATs 4 to 7 are used, could you adjust
> CONFIG_ETEXT_SHIFT so that only IBATs 0 to 3 be used, and check if
> suspend/resume works when IBATs 4 to 7 are not used ?
I forgot to remove my patch. With only 0-3 used, suspend/resume work
On Fri, 14 Jun 2019 13:50:59 -0300
Melissa Wen wrote:
> Remove idiom and use ternary operator for consistently trigger 0/1 value
> on variable declaration.
>
> Signed-off-by: Melissa Wen
Hi Melissa,
In general I would consider this unnecessary churn as, whilst
it's no longer a favoured idiom,
On Fri, 14 Jun 2019 13:32:21 -0300
Melissa Wen wrote:
> Use the bitfield macro FIELD_GET, and GENMASK to do the shift and mask in
> one go. This makes the code more readable than explicit masking followed
> by a shift.
>
> Signed-off-by: Melissa Wen
Applied to the togreg branch of iio.git and p
On Fri, 14 Jun 2019 13:33:19 -0300
Melissa Wen wrote:
> General cleaning of comments to remove useless information or improve
> description.
>
> Signed-off-by: Melissa Wen
Applied,
Thanks,
Jonathan
> ---
> drivers/staging/iio/cdc/ad7150.c | 11 ++-
> 1 file changed, 2 insertions(+),
On Fri, 14 Jun 2019 13:32:54 -0300
Melissa Wen wrote:
> Since i2c_smbus_write_byte_data returns no-positive value, this commit
> making the treatment of its return value less verbose.
>
> Signed-off-by: Melissa Wen
Applied to the togreg branch of iio.git and pushed out as testing for
the autobu
On Sat, Jun 15, 2019 at 10:45 PM Alexei Starovoitov
wrote:
> It's certainly should be in bpf tree.
> It didn't apply directly, so I tweaked it a tiny bit,
> reduced verbosity of commit log and pushed to bpf tree.
> Thanks for the fix!
Thanks! I didn't realize this had already made it to the bpf t
Hi Xunlei,
Xunlei Pang writes:
docker and various types(different memory capacity) of containers
are managed by k8s, it's a burden for k8s to maintain those dynamic
figures, simply set "max" to key containers is always welcome.
Right, setting "max" is generally a fine way of going about it.
On Sun, Jun 16, 2019 at 12:55 PM Christoph Hellwig wrote:
>
> On Sat, Jun 15, 2019 at 03:12:36PM +0300, Oded Gabbay wrote:
> > So after the dust has settled a bit, do you think it is reasonable to
> > add this patch upstream ?
>
> I'm not Greg, but the answer is a very clear no. drivers have absl
Linus,
please pull the latest timers-urgent-for-linus git tree from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
timers-urgent-for-linus
up to: e3ff9c3678b4: timekeeping: Repair ktime_get_coarse*() granularity
A set of small fixes:
- Repair the ktime_get_coarse() functions
Linus,
please pull the latest x86-urgent-for-linus git tree from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
x86-urgent-for-linus
up to: 78f4e932f776: x86/microcode, cpuhotplug: Add a microcode loader CPU
hotplug callback
The accumulated fixes from this and last week:
- F
Linus,
please pull the latest ras-urgent-for-linus git tree from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
ras-urgent-for-linus
up to: 0ade0b6240c4: RAS/CEC: Convert the timer callback to a workqueue
Two small fixes for RAS:
- Use a proper search algorithm to find the co
Dmitry Torokhov writes:
> Hi Christian,
>
> On Sun, Apr 29, 2018 at 3:45 AM Christian Brauner
> wrote:
>>
>> commit 07e98962fa77 ("kobject: Send hotplug events in all network
>> namespaces")
>>abhishe...@google.com
>> enabled sending hotplug events into all network namespaces back in 2010.
>> O
Hi Chris,
On 2019/6/16 PM 6:37, Chris Down wrote:
> Hi Xunlei,
>
> Xunlei Pang writes:
>> docker and various types(different memory capacity) of containers
>> are managed by k8s, it's a burden for k8s to maintain those dynamic
>> figures, simply set "max" to key containers is always welcome.
>
>
After applied the patch series(v2), the kexec-d kernel and the kdump kernel can
successfully boot.
Thanks.
Tested-by: Lianbo Jiang
在 2019年06月15日 05:15, Lendacky, Thomas 写道:
> The memory occupied by the kernel is reserved using memblock_reserve()
> in setup_arch(). Currently, the area is from sy
On Thu, 2019-05-23 at 08:39:27 UTC, Christophe Leroy wrote:
> Build failure was introduced by the commit identified below,
> due to missed macro expension leading to wrong called function's name.
>
> arch/powerpc/kernel/head_fsl_booke.o: In function `SystemCall':
> arch/powerpc/kernel/head_fsl_boo
On Tue, 2019-06-11 at 15:47:20 UTC, Christophe Leroy wrote:
> The patch referenced below moved the loading of segment registers
> out of load_up_mmu() in order to do it earlier in the boot sequence.
> However, the secondary CPU still needs it to be done when loading up
> the MMU.
>
> Reported-by:
On Thu, 2019-06-13 at 13:52:30 UTC, Christophe Leroy wrote:
> Use r10 instead of r9 to calculate CPU offset as r9 contains
> the value from SRR1 which is used later.
>
> Fixes: 1a4b739bbb4f ("powerpc/32: implement fast entry for syscalls on BOOKE")
> Signed-off-by: Christophe Leroy
Applied to po
On Sun, 16 Jun 2019, Thomas Gleixner wrote:
> On Sun, 16 Jun 2019, Bae, Chang Seok wrote:
> > On Jun 14, 2019, at 13:07, Bae, Chang Seok
> > mailto:chang.seok@intel.com>> wrote:
> >
> >
> > On Jun 13, 2019, at 23:54, Thomas Gleixner
> > mailto:t...@linutronix.de>> wrote:
> >
> > +The GS se
Hi,
On 12-Jun-19 4:17 PM, Sagar Shrikant Kadam wrote:
[...]
> @@ -4129,7 +4137,7 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
> if (ret)
> return ret;
>
> - if (nor->addr_width) {
> + if (nor->addr_width && JEDEC_MFR(info) != SNOR_MFR_ISSI) {
>
On 12-Jun-19 4:17 PM, Sagar Shrikant Kadam wrote:
> Nor device (is25wp256 mounted on HiFive unleashed Rev A00 board) from ISSI
> have memory blocks guarded by block protection bits BP[0,1,2,3].
>
> Clearing block protection bits,unlocks the flash memory regions
> The unlock scheme is registered
On Wed, Jun 05, 2019 at 02:57:54PM -0700, Dan Williams wrote:
>Towards enabling memory hotplug to track partial population of a
>section, introduce 'struct mem_section_usage'.
>
>A pointer to a 'struct mem_section_usage' instance replaces the existing
>pointer to a 'pageblock_flags' bitmap. Effecti
On Sun, Jun 16, 2019 at 01:13:11AM -0700, Joe Perches wrote:
> On Sat, 2019-06-15 at 14:29 -0700, Shobhit Kukreti wrote:
> > Cleaned up the code from the following files to get rid of
> > check patch error "that open brace { should be on the previous line"
>
> It's fine you are modifying brace sty
On Fri, 14 Jun 2019 23:28:46 +0800
YueHaibing wrote:
> Fix build error:
>
> drivers/staging/iio/addac/adt7316.c: In function adt7316_store_update_DAC:
> drivers/staging/iio/addac/adt7316.c:949:3: error: implicit declaration of
> function gpiod_set_value; did you mean gpio_set_value?
> [-Werror
I am Sgt John Anup,US Army base in Afghanistan for peace keeping,I have a
monetary proposal for you, I found your contact detail in a address journal am
seeking your assistance to evacuate the sum of $25,000,000 to you as long as I
am assured that it will be safe in your care until I complete my
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git WIP.x86/cpu
head: a0e3bbdc2e84af76864e16772ef0099ce933cded
commit: 9a17639c0ad237666277861b65cf8fa80a4e9775 [1/18] x86/process/64: Fix
ARCH_SET_FS/GS for a remote task
config: x86_64-randconfig-x019-201924 (attached as .config)
Hi Daniel,
[Sorry for the slow response.]
On Thu, 13 Jun 2019 08:52:21 +0200 Daniel Lezcano
wrote:
>
> actually it returns:
>
> git log -1 --format='Fixes: %h ("%s")' 3be2a85a0b61
>
> Fixes: 3be2a85a0b61 ("clocksource/drivers/tegra: Support per-CPU timers on
> all Tegra's")
Indeed.
> Is it
14.06.2019 18:09, Piotr Sroka пишет:
Commit description is mandatory.
> Signed-off-by: Piotr Sroka
> ---
[snip]
> +
> +/* Cadnence NAND flash controller capabilities get from driver data. */
> +struct cadence_nand_dt_devdata {
> + /* Skew value of the output signals of the NAND Flash inter
Allows using the addr/data32 debugfs nodes to access a device VA of a
host mapped memory when the IOMMU is disabled.
Due to the possible large amount of a user host mapped memory, the
driver doesn't maintain a database with the host addresses per device VA.
When the IOMMU is disabled, this missing
On Thu, 13 Jun 2019 00:02:21 +0900
William Breathitt Gray wrote:
> On Wed, Jun 12, 2019 at 04:52:23PM +0200, Patrick Havelange wrote:
> > Adding myself as maintainer for this driver
> >
> > Signed-off-by: Patrick Havelange
> > ---
> > MAINTAINERS | 8
> > 1 file changed, 8 insertions(
15.06.2019 7:54, Wolfram Sang пишет:
>
>>> Without a maintainer ack, this is an exception this time. Should we add
>>> Dmitry as another maintainer or reviewer at least?
>>>
>> I shall followup with Maintainer for ACK in future I2C tegra patches.
>
> This comment was not directed at you, sorry if
On Fri, 14 Jun 2019 03:38 AM Andrew Morton wrote:
>On Thu, 13 Jun 2019 22:07:44 +0800 Xiaoming Ni wrote:
>
>> Registering the same notifier to a hook repeatedly can cause the hook
>> list to form a ring or lose other members of the list.
>> .
>>
>> diff --git a/kernel/notifier.c b/kernel/not
On Wed, 12 Jun 2019 01:33:58 -0700
Ronald Tschalär wrote:
> The iBridge device provides access to several devices, including:
> - the Touch Bar
> - the iSight webcam
> - the light sensor
> - the fingerprint sensor
>
> This driver provides the core support for managing the iBridge device
> and th
Getting the apply_quirk bool from new rapl_model_match array.
And because apply_quirk was the last remaining piece of data
in rapl_cpu_match, replacing it with rapl_model_match as device
table.
The switch to new perf_msr_probe detection API is done.
Signed-off-by: Jiri Olsa
---
arch/x86/events
We no longer need model specific attribute arrays,
because we get all this detected in rapl_events_attrs.
Signed-off-by: Jiri Olsa
---
arch/x86/events/intel/rapl.c | 89
1 file changed, 89 deletions(-)
diff --git a/arch/x86/events/intel/rapl.c b/arch/x86/eve
hi,
following up on [1], [2] and [3], this patchset adds update
attribute groups to pmu, factors out the MSR probe code and
use it in msr,cstate* and rapl PMUs.
The functionality stays the same with one exception:
for msr PMU: the event is not exported if the rdmsr return zero
on event's msr, csta
Adding perf_msr_probe function to provide interface for
checking up on MSR register and set the related attribute
group visibility.
User defines following struct for each MSR register:
struct perf_msr {
u64 msr;
struct attribute_group *grp;
bool
Using perf_msr_probe function to probe for cstate events.
The functionality is the same, with one exception, that
perf_msr_probe checks for rdmsr to return value != 0 for
given MSR register.
Using the new attribute groups and adding the events via
pmu::attr_update.
Signed-off-by: Jiri Olsa
---
Using perf_msr_probe function to probe for rapl msrs.
Adding new rapl_model_match device table, that
gathers events info for given model, following
the msr and cstate module design.
It will replace the current rapl_cpu_match device
table and detection code in following patches.
Signed-off-by: Ji
We get rapl_cntr_mask from perf_msr_probe call, as a replacement
for current intel_rapl_init_fun::cntr_mask value for each model.
Signed-off-by: Jiri Olsa
---
arch/x86/events/intel/rapl.c | 38 ++--
1 file changed, 2 insertions(+), 36 deletions(-)
diff --git a/ar
There's no need to have special code for getting
the bit and msr value for given event. We can
now easily get it from rapl_msrs array.
Also getting rid of RAPL_IDX_*, which is no longer
needed and replacing INTEL_RAPL* with PERF_RAPL*
enums.
Signed-off-by: Jiri Olsa
---
arch/x86/events/intel/ra
Using perf_msr_probe function to probe for msr events.
The functionality is the same, with one exception, that
perf_msr_probe checks for rdmsr to return value != 0 for
given MSR register.
Using the new attribute groups and adding the events via
pmu::attr_update.
Signed-off-by: Jiri Olsa
---
ar
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16.06.2019 16:24, Stephen Rothwell пишет:
> Hi Daniel,
>
> [Sorry for the slow response.]
>
> On Thu, 13 Jun 2019 08:52:21 +0200 Daniel Lezcano
> wrote:
>>
>> actually it returns:
>>
>> git log -1 --format='Fixes: %h ("%s")' 3be2a85a0b61
>>
>> Fixes: 3be2a85a0b61 ("clocksource/drivers/tegra: Su
gcc reports:
arch/xtensa/kernel/pci.c:40:32: warning:
'pci_ctrl_tail' defined but not used
which is indeed the case.
Signed-off-by: Guenter Roeck
---
arch/xtensa/kernel/pci.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/xtensa/kernel/pci.c b/arch/xtensa/kernel/pci.c
index 8b
On Fri, Jun 14, 2019 at 09:45:21AM -0400, Liang, Kan wrote:
>
>
> On 6/14/2019 7:28 AM, Jiri Olsa wrote:
> > hi,
> > the HPE server can do POST tracing and have enabled LBR
> > tracing during the boot, which makes check_msr fail falsly.
> >
> > It looks like check_msr code was added only to chec
On 16/06/2019 16:08, Dmitry Osipenko wrote:
> 16.06.2019 16:24, Stephen Rothwell пишет:
>> Hi Daniel,
>>
>> [Sorry for the slow response.]
>>
>> On Thu, 13 Jun 2019 08:52:21 +0200 Daniel Lezcano
>> wrote:
>>>
>>> actually it returns:
>>>
>>> git log -1 --format='Fixes: %h ("%s")' 3be2a85a0b61
>>>
Am Donnerstag, 13. Juni 2019, 19:44:43 CEST schrieb Robin Murphy:
> On 13/06/2019 18:20, Enric Balletbo i Serra wrote:
> > Hi Robin,
> >
> > On 13/6/19 18:56, Robin Murphy wrote:
> >> On 13/06/2019 17:27, Enric Balletbo i Serra wrote:
> >>> As per binding documentation [1], the DWC3 core should ha
On Wed, 12 Jun 2019 01:33:59 -0700
Ronald Tschalär wrote:
> This driver enables basic touch bar functionality: enabling it, switching
> between modes on FN key press, and dimming and turning the display
> off/on when idle/active.
>
> Signed-off-by: Ronald Tschalär
A few minor comments inline fr
16.06.2019 17:18, Daniel Lezcano пишет:
> On 16/06/2019 16:08, Dmitry Osipenko wrote:
>> 16.06.2019 16:24, Stephen Rothwell пишет:
>>> Hi Daniel,
>>>
>>> [Sorry for the slow response.]
>>>
>>> On Thu, 13 Jun 2019 08:52:21 +0200 Daniel Lezcano
>>> wrote:
actually it returns:
gi
On Wed, 12 Jun 2019 01:34:00 -0700
Ronald Tschalär wrote:
> On 2016/2017 MacBook Pro's with a Touch Bar the ALS is attached to,
> and exposed via the iBridge device. This provides the driver for that
> sensor.
>
> Signed-off-by: Ronald Tschalär
Hi Ronald,
One thing that we should perhaps docum
Use delayed work instead of timers to run the watchdog of the e1000e
driver.
Simplify the code with one less middle function.
Signed-off-by: Detlev Casanova
---
drivers/net/ethernet/intel/e1000e/e1000.h | 3 +-
drivers/net/ethernet/intel/e1000e/netdev.c | 52 +++---
2 files ch
From: Sahara
Since uart_close was converted to use tty_port_close, uart_shutdown
also moved to uart_tty_port_shutdown, which means it does not backup
tty's termios to uart_port.console.cflag when console is closed and
uart_console is true.
By losing this value, serial console was not set correctl
On Wed, 12 Jun 2019 09:24:35 +0200
Fabrice Gasnier wrote:
> On stm32h7 and stm32mp1, the ADC inputs are multiplexed with analog
> switches which have reduced performances when their supply is below 2.7V
> (vdda by default):
> - vdd supply can be selected if above 2.7V by setting ANASWVDD syscfg b
On Wed, 12 Jun 2019 09:24:34 +0200
Fabrice Gasnier wrote:
> On stm32h7 and stm32mp1, the ADC inputs are multiplexed with analog
> switches which have reduced performances when their supply is below 2.7V
> (vdda by default).
>
> Add documentation for optional vdda-supply & vdd-supply that can be
On 2019/06/16 16:37, Tetsuo Handa wrote:
> On 2019/06/16 6:33, Tetsuo Handa wrote:
>> On 2019/06/16 3:50, Shakeel Butt wrote:
While dump_tasks() traverses only each thread group,
mem_cgroup_scan_tasks()
traverses each thread.
>>>
>>> I think mem_cgroup_scan_tasks() traversing thread
On Tue, 11 Jun 2019 13:30:42 +0200
Harald Geyer wrote:
> Shobhit Kukreti writes:
> > The dht11 driver uses a single gpio to make measurements. It was
> > using the older global gpio numberspace. The patch replaces the
> > old gpio api with the new gpio descriptor based api.
> >
> > Removed heade
On Sat, Jun 15, 2019 at 7:08 AM Vasily Khoruzhick wrote:
>
> On Wed, Jun 12, 2019 at 9:50 AM Frank Lee wrote:
> >
> > > If you have a git tree I'll be happy to contribute A64 support. IIRC
> > > it was quite similar to H3.
> >
> > I built a ths branch and I will do some work later.
> >
> > https:
> On Jun 16, 2019, at 05:34, Thomas Gleixner wrote:
>
> On Sun, 16 Jun 2019, Thomas Gleixner wrote:
>>
>> Please dont. Send me a delta patch against the documentation. I have queued
>> all the other patches already internally. I did not push it out because I
>> wanted to have proper docs.
>
>
On Mon, 10 Jun 2019 11:29:45 +0200
Alexandre Mergnat wrote:
> This adds support for PixArt Imaging’s miniature low power optical
> navigation chip using LASER light source enabling digital surface tracking.
>
> Feature and datasheet: [0]
>
> This IIO driver allows to read delta or relative posi
Hi!
> This reverts commit 288ceb85b505c19abe1895df068dda5ed20cf482.
>
> According to the commit message the AUO B101EAN01 panel on minnie
> requires a PWM delay of 200 ms, however this is not what the
> datasheet says. The datasheet mentions a *max* delay of 200 ms
> for T2 ("delay from LCDVDD to
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