On Thu, Jun 06, 2019 at 09:57:00PM -0600, Jidong Xiao wrote:
> Hi, Weijiang,
>
> Does this require some specific Intel processors or is it supported by
> older processors as well?
>
> -Jidong
Hi, Jidong,
SPP is a feature on new platforms, so only available with new
Intel processors.
>
> On Thu,
On HMZONED drives, writes must always be sequential and directed at a block
group zone write pointer position. Thus, block allocation in a block group
must also be done sequentially using an allocation pointer equal to the
block group zone write pointer plus the number of blocks allocated but not
y
fallocate() is implemented by reserving actual extent instead of
reservations. This can result in exposing the sequential write constraint
of host-managed zoned block devices to the application, which would break
the POSIX semantic for the fallocated file. To avoid this, report
fallocate() as not
Direct write I/Os can be directed at existing extents that have already
been written. Such write requests are prohibited on host-managed zoned
block devices. So disable direct IO support for a volume with HMZONED mode
enabled.
Signed-off-by: Naohiro Aota
---
fs/btrfs/inode.c | 3 +++
1 file chan
YueHaibing,
> Fixes gcc '-Wunused-but-set-variable' warnings:
>
> drivers/scsi/megaraid/megaraid_sas_base.c: In function
> megasas_fw_crash_buffer_show:
> drivers/scsi/megaraid/megaraid_sas_base.c:3138:16: warning: variable
> buff_addr set but not used [-Wunused-but-set-variable]
> drivers/scs
YueHaibing,
> Fixes gcc '-Wunused-but-set-variable' warning:
>
> drivers/scsi/megaraid/megaraid_sas_base.c: In function
> megasas_create_frame_pool:
> drivers/scsi/megaraid/megaraid_sas_base.c:4124:6: warning: variable sge_sz
> set but not used [-Wunused-but-set-variable]
>
> It's not used any
Geert,
Applied to 5.3/scsi-queue. Thanks.
--
Martin K. Petersen Oracle Linux Engineering
Geert,
Applied to 5.3/scsi-queue. Thanks.
--
Martin K. Petersen Oracle Linux Engineering
On Tue, Jun 4, 2019 at 2:26 PM Walter Wu wrote:
>
> This patch adds memory corruption identification at bug report for
> software tag-based mode, the report show whether it is "use-after-free"
> or "out-of-bound" error instead of "invalid-access" error.This will make
> it easier for programmers to
This patch makes the size of the temporary system group chunk equal to the
device zone size. It also enables PREP_DEVICE_HMZONED if the user enables
the HMZONED feature.
Enabling HMZONED feature is done using option "-O hmzoned". This feature is
incompatible for now with source directory setup.
S
This patch checks if a device added to btrfs is a zoned block device. If it
is, load zones information and the zone size for the device.
For a btrfs volume composed of multiple zoned block devices, all devices
must have the same zone size.
Signed-off-by: Naohiro Aota
---
utils.c | 10
This patch check if the target file system is flagged as HMZONED. If it is,
the device to be added is flagged PREP_DEVICE_HMZONED. Also add checks to
prevent mixing non-zoned devices and zoned devices.
Signed-off-by: Naohiro Aota
---
cmds-device.c | 29 +++--
1 file chan
Hi Shimoda-san,
Thanks for the update!
On Fri, Jun 7, 2019 at 12:07 PM Yoshihiro Shimoda
wrote:
> The powered flag should be set for any other phys anyway. Also
> the flag should be locked by the channel. Otherwise, after we have
> revised the device tree for the usb phy, the following warning
>
On 06/06/19 17:28, Yang Weijiang wrote:
> EPT-Based Sub-Page write Protection(SPP)is a HW capability which
> allows Virtual Machine Monitor(VMM) to specify write-permission for
> guest physical memory at a sub-page(128 byte) granularity. When this
> capability is enabled, the CPU enforces write-acc
John,
>> Many times in libsas, and in LLDDs which use libsas, the check for an
>> expander device is re-implemented or open coded.
>
> Applied to 5.3/scsi-queue, thanks.
Dropped again. Breaks isci. Please fix.
--
Martin K. Petersen Oracle Linux Engineering
On 07/06/2019 14:26, Martin K. Petersen wrote:
John,
Many times in libsas, and in LLDDs which use libsas, the check for an
expander device is re-implemented or open coded.
Applied to 5.3/scsi-queue, thanks.
Dropped again. Breaks isci. Please fix.
Hi Martin,
I assume that you mean that
On June 7, 2019 2:40:04 PM Adrian Hunter wrote:
On 7/06/19 8:12 AM, Arend Van Spriel wrote:
On June 6, 2019 11:37:22 PM Doug Anderson wrote:
In the case of dw_mmc, which I'm most familiar with, we don't have any
sort of automated or timed-based retuning. ...so we'll only re-tune
when we se
On Fri, Jun 07, 2019 at 11:30:46AM +0100, Mark Rutland wrote:
> On Fri, Jun 07, 2019 at 02:43:05PM +0530, Anshuman Khandual wrote:
> > This consolidates page fault information capture and move them bit earlier.
> > While here it also adds an wrapper is_write_abort(). It also saves some
> > cycles b
On Mon, May 27, 2019 at 8:27 PM Maxime Ripard wrote:
>
> Hi!
>
> Thanks for submitting a new version
>
> On Sat, May 25, 2019 at 02:13:27PM -0400, Yangtao Li wrote:
> > This patch adds the support for allwinner thermal sensor, within
> > allwinner SoC. It will register sensors for thermal framewor
On 07/06/2019 15.58, Jon Hunter wrote:
>> Imho if you can explain it without using 'HACK' in the sentences it
>> might be OK, but it does not feel right.
>
> I don't perceive this as a hack. Although from looking at the
> description of the src/dst_maxburst these are burst size with regard to
>
On Wed, Jun 05, 2019 at 09:04:02AM -0600, Jens Axboe wrote:
> How about the following plan - if folks are happy with this sched patch,
> we can queue it up for 5.3. Once that is in, I'll kill the block change
> that special cases the polled task wakeup. For 5.2, we go with Oleg's
> patch for the sw
+config SOUNDWIRE_QCOM
+ tristate "Qualcomm SoundWire Master driver"
+ select SOUNDWIRE_BUS
+ depends on SND_SOC
depends on SLIMBUS if you need the SlimBus link to talk to your
SoundWire Master?
Also depends on device tree since you use of_ functions?
+#define SWRM_COMP
On Fri, Jun 07, 2019 at 10:02:10PM +0900, Masami Hiramatsu wrote:
> On Wed, 05 Jun 2019 15:07:56 +0200
> Peter Zijlstra wrote:
>
> > The kprobe trampolines have a FRAME_POINTER annotation that makes no
> > sense. It marks the frame in the middle of pt_regs, at the place of
> > saving BP.
>
> com
Hi Suzuki,
On Fri, Jun 07, 2019 at 09:40:48AM +0100, Suzuki K Poulose wrote:
> Hi Leo,
>
> > > > >A Coresight PMU works the same way as any other PMU, i.e the name
> > > > > of the PMU is
> > > > >listed along with configuration options within forward slashes
> > > > > '/'. Since a
> >
On Thu, Jun 06, 2019 at 07:54:35PM -0400, Theodore Ts'o wrote:
> On Thu, Jun 06, 2019 at 05:42:25PM +0200, Christian Brauner wrote:
> > Hey everyone,
> >
> > I hope this is not going to start a trash fire.
> >
> > While working on a new clone version I tried to find out what the
> > current namin
On 6/6/2019 10:00 PM, Dmitry Osipenko wrote:
26.05.2019 7:37, Vidya Sagar пишет:
Synopsys DesignWare core based PCIe controllers in Tegra 194 SoC interface
with Universal PHY (UPHY) module through a PIPE2UPHY (P2U) module.
For each PCIe lane of a controller, there is a P2U unit instantiated at
h
HI Ondřej,
On Mon, May 27, 2019 at 10:25 PM Ondřej Jirman wrote:
>
> Hi Yangtao,
>
> On Sat, May 25, 2019 at 02:13:27PM -0400, Yangtao Li wrote:
> > This patch adds the support for allwinner thermal sensor, within
> > allwinner SoC. It will register sensors for thermal framework
> > and use devi
On Fri, Jun 7, 2019 at 9:50 PM Frank Lee wrote:
>
> HI Ondřej,
>
>
> On Mon, May 27, 2019 at 10:25 PM Ondřej Jirman wrote:
> >
> > Hi Yangtao,
> >
> > On Sat, May 25, 2019 at 02:13:27PM -0400, Yangtao Li wrote:
> > > This patch adds the support for allwinner thermal sensor, within
> > > allwinner
On Fri, Jun 07, 2019 at 08:23:37AM +, Varadarajan, Kiruthika wrote:
> Hi All,
> During Cay Play session connect/disconnect several times, with USB gadget
> driver I found kernel crash in rx_submit.
>
>
> 64.802125] CPU: 0 PID: 636 Comm: kworker/u8:2 Tainted: G U W O
> 4.4.71-quilt-2e5dc0
From: JingHai Zhang
arch_mmap_rnd() is only used in mmap.c, make it static.
Signed-off-by: JingHai Zhang
---
arch/arm/mm/mmap.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mm/mmap.c b/arch/arm/mm/mmap.c
index f866870db749..0a7a046fcd90 100644
--- a/arch/arm/mm/
+++ Miroslav Benes [04/06/19 12:46 +0200]:
On Mon, 3 Jun 2019, YueHaibing wrote:
In module_add_modinfo_attrs if sysfs_create_file
fails, we forget to free allocated modinfo_attrs
and roll back the sysfs files.
Fixes: 03e88ae1b13d ("[PATCH] fix module sysfs files reference counting")
Signed-off
Change the return values of function r8712_setdatarate_cmd from _SUCCESS
and _FAIL to 0 and -ENOMEM respectively.
Change the return type of the function from u8 to int to reflect this.
Change the call site of the function to check for 0 instead of _SUCCESS.
(Checking that the return value != 0 is n
Change return values of r8712_createbss_cmd from _SUCCESS and _FAIL to 0
and -ENOMEM respectively.
Change return type of the function from unsigned to int to reflect this.
Change call site to check for 0 instead of _SUCCESS.
(Instead of !=0, simply passing the function output to the conditional
wil
On Thu, Jun 6, 2019 at 5:00 PM Stephen Boyd wrote:
>
> Quoting Jeffrey Hugo (2019-05-28 09:48:03)
> > diff --git a/drivers/clk/qcom/gpucc-msm8998.c
> > b/drivers/clk/qcom/gpucc-msm8998.c
> > new file mode 100644
> > index ..e45062e40718
> > --- /dev/null
> > +++ b/drivers/clk/qcom/gpu
On Tue, Jun 04, 2019 at 09:04:55AM -0700, Linus Torvalds wrote:
>
> In fact, the alpha port was always subtly buggy exactly because of the
> "byte write turns into a read-and-masked-write", even if I don't think
> anybody ever noticed (we did fix cases where people _did_ notice,
> though, and we mi
Remove function rtw_free_network_nolock, as all it does is call
_rtw_free_network_nolock, and rename _rtw_free_network_nolock to
rtw_free_network_nolock.
Keep the new rtw_free_network_nolock a static function and remove the
old version from the header file.
Signed-off-by: Nishka Dasgupta
---
dri
On 6/7/2019 12:22 AM, Dmitry Osipenko wrote:
06.06.2019 19:35, Dmitry Osipenko пишет:
26.05.2019 7:37, Vidya Sagar пишет:
Add support for Synopsys DesignWare core IP based PCIe host controller
present in Tegra194 SoC.
Signed-off-by: Vidya Sagar
---
Changes since [v7]:
* Addressed review comme
This series allows sockops programs to access the network namespace
inode and device via (struct bpf_sock_ops)->netns_ino and ->netns_dev.
This can be useful to apply different policies on different network
namespaces.
In the unlikely case where network namespaces are not compiled in
(CONFIG_NET_N
From: Alban Crequy
The change in struct bpf_sock_ops is synchronised
from: include/uapi/linux/bpf.h
to: tools/include/uapi/linux/bpf.h
Signed-off-by: Alban Crequy
---
Changes since v2:
- standalone patch for the sync (requested by Y Song)
Changes since v4:
- add netns_dev comment on uapi hea
On 07/06/2019 15:38, Laurent Pinchart wrote:
> Hi Neil,
>
> Thank you for the patch.
>
> On Mon, May 20, 2019 at 03:37:50PM +0200, Neil Armstrong wrote:
>> This patch adds a new format_set() callback to the bridge ops permitting
>> the encoder to specify the new input format and encoding.
>>
>> T
From: Alban Crequy
sockops programs can now access the network namespace inode and device
via (struct bpf_sock_ops)->netns_ino and ->netns_dev. This can be useful
to apply different policies on different network namespaces.
In the unlikely case where network namespaces are not compiled in
(CONFI
From: Alban Crequy
Tested with:
> $ sudo ./test_verifier
> ...
> #905/p sockops accessing bpf_sock_ops->netns_dev, ok OK
> #906/p sockops accessing bpf_sock_ops->netns_ino, ok OK
> ...
> Summary: 1421 PASSED, 0 SKIPPED, 0 FAILED
Signed-off-by: Alban Crequy
---
Changes since v1:
- This is a ne
From: Alban Crequy
This shows how a sockops program could be restricted to a specific
network namespace. The sockops program looks at the current netns via
(struct bpf_sock_ops)->netns_ino and checks if the value matches the
configuration in the new BPF map "sock_netns".
The test program ./test_
Hey Thomas,
After some discussions here prior about the different clocks
available, WireGuard uses ktime_get_boot_fast_ns() pretty extensively.
The requirement is for a quasi-accurate monotonic counter that takes
into account sleep time, and this seems to fit the bill pretty well.
Sultan (CC'd) re
On Fri, 2019-06-07 at 11:21 +0800, Yuyang Du wrote:
> Thanks for the report, but
>
> On Fri, 7 Jun 2019 at 05:14, Qian Cai wrote:
> >
> > The linux-next commit "locking/lockdep: Consolidate lock usage bit
> > initialization" [1] will always generate a warning below.
>
> I never had such warning
Probably you sent this patch unintentionally. The subject doesn't make
any sort of sense. :P
On Fri, Jun 07, 2019 at 07:36:57PM +0530, Nishka Dasgupta wrote:
> Change the return values of function r8712_setdatarate_cmd from _SUCCESS
> and _FAIL to 0 and -ENOMEM respectively.
> Change the return
On Thu, Jun 6, 2019 at 12:53 PM Jeffrey Hugo wrote:
>
> From: Jorge Ramirez
>
> The PMS405 has 5 HFSMPS and 13 LDO regulators,
>
> This commit adds support for one of the 5 HFSMPS regulators (s3) to
> the spmi regulator driver.
>
> The PMIC HFSMPS 430 regulators have 8 mV step size and a voltage
On Thu, 6 Jun 2019 20:18:45 +0200, Pali Rohár wrote:
> Dell platform team told us that some (DMI whitelisted) Dell Latitude
> machines have ST microelectronics accelerometer at I2C address 0x29.
>
> Presence of that ST microelectronics accelerometer is verified by existence
> of SMO88xx ACPI devi
On Fri, Jun 07, 2019 at 02:19:20PM +0200, Paolo Bonzini wrote:
> On 06/06/19 20:41, Sean Christopherson wrote:
> >> +static void prepare_vmcs02_early_extra(struct vcpu_vmx *vmx,
> > Or maybe 'uncommon', 'rare' or 'ext'? I don't I particularly love any of
> > the names, but they're all better than
Add a superblock event notification facility whereby notifications about
superblock events, such as I/O errors (EIO), quota limits being hit
(EDQUOT) and running out of space (ENOSPC) can be reported to a monitoring
process asynchronously. Note that this does not cover vfsmount topology
changes.
Fix the subject.
On Fri, Jun 07, 2019 at 07:36:58PM +0530, Nishka Dasgupta wrote:
> Change return values of r8712_createbss_cmd from _SUCCESS and _FAIL to 0
> and -ENOMEM respectively.
> Change return type of the function from unsigned to int to reflect this.
> Change call site to check for 0 inst
This needs to be linked with -lkeyutils.
It is run like:
./watch_test
and watches "/" for mount changes and the current session keyring for key
changes:
# keyctl add user a a @s
1035096409
# keyctl unlink 1035096409 @s
# mount -t tmpfs none /mnt/nfsv3tcp/
On Wed, Jun 05, 2019 at 03:07:54PM +0200, Peter Zijlstra wrote:
> The code flow around the return from interrupt preemption point seems
> needlesly complicated.
"needlessly"
>
> There is only one site jumping to resume_kernel, and none (outside of
> resume_kernel) jumping to restore_all_kernel.
On Fri, Jun 07, 2019 at 03:35:41PM +0200, Peter Zijlstra wrote:
> On Wed, Jun 05, 2019 at 09:04:02AM -0600, Jens Axboe wrote:
> > How about the following plan - if folks are happy with this sched patch,
> > we can queue it up for 5.3. Once that is in, I'll kill the block change
> > that special cas
On Wed, Jun 05, 2019 at 03:07:55PM +0200, Peter Zijlstra wrote:
> In preparation for wider use, move the ENCODE_FRAME_POINTER macros to
> a common header and provide inline asm versions.
>
> These macros are used to encode a pt_regs frame for the unwinder; see
> unwind_frame.c:decode_frame_pointer
On Fri 07-06-19 03:57:18, Hugh Dickins wrote:
[...]
> The addition of "THPeligible" without an "Anon" in its name was
> unfortunate. I suppose we're two releases too late to change that.
Well, I do not really see any reason why THPeligible should be Anon
specific at all. Even if ...
> Applying pr
07.06.2019 17:10, Vidya Sagar пишет:
> On 6/7/2019 12:22 AM, Dmitry Osipenko wrote:
>> 06.06.2019 19:35, Dmitry Osipenko пишет:
>>> 26.05.2019 7:37, Vidya Sagar пишет:
Add support for Synopsys DesignWare core IP based PCIe host controller
present in Tegra194 SoC.
Signed-off-by:
On Fri, 7 Jun 2019 10:20:13 +0200
Peter Zijlstra wrote:
> On Fri, Jun 07, 2019 at 05:41:42AM +, Nadav Amit wrote:
>
> > > int poke_int3_handler(struct pt_regs *regs)
> > > {
> > > + long ip = regs->ip - INT3_INSN_SIZE + CALL_INSN_SIZE;
> > > + struct opcode {
> > > + u8 insn;
> > > +
On Fri, Jun 07, 2019 at 03:27:01PM +0200, Paolo Bonzini wrote:
> On 06/06/19 17:28, Yang Weijiang wrote:
> > EPT-Based Sub-Page write Protection(SPP)is a HW capability which
> > allows Virtual Machine Monitor(VMM) to specify write-permission for
> > guest physical memory at a sub-page(128 byte) gra
In commit
39388e80f9b0c ("x86/fpu: Don't save fxregs for ia32 frames in
copy_fpstate_to_sigframe()")
I removed the statement
| if (ia32_fxstate)
| copy_fxregs_to_kernel(fpu);
and argued that is was wrongly merged because the content was already
saved in kernel's state and
On Tue, 4 Jun 2019 15:38:51 -0400
Tony Krowiak wrote:
> On 5/21/19 11:34 AM, Pierre Morel wrote:
> > We register a AP PQAP instruction hook during the open
> > of the mediated device. And unregister it on release.
[..]
> > +/**
> > + * vfio_ap_wait_for_irqclear
> > + * @apqn: The AP Queue numbe
From: Bartosz Golaszewski
The lcdc device is missing the dma_coherent_mask definition causing the
following warning on da850-evm:
da8xx_lcdc da8xx_lcdc.0: found Sharp_LK043T1DG01 panel
[ cut here ]
WARNING: CPU: 0 PID: 1 at kernel/dma/mapping.c:247 dma_alloc_attrs+0xc8/0x
Define new IDs for clocks used by Dynamic Memory Controller in
Exynos5422 SoC.
Acked-by: Rob Herring
Acked-by: Chanwoo Choi
Acked-by: Krzysztof Kozlowski
Signed-off-by: Lukasz Luba
---
include/dt-bindings/clock/exynos5420.h | 18 +-
1 file changed, 17 insertions(+), 1 deletion
Enable driver for Exynos5422 Dynamic Memory Controller supporting
dynamic frequency and voltage scaling in Exynos5422 SoCs.
Signed-off-by: Lukasz Luba
---
arch/arm/configs/exynos_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/exynos_defconfig
b/arch/arm/configs/e
In order to get the clock by phandle and use it with regmap it needs to be
compatible with syscon. The DMC driver uses two registers from clock
register set and needs the regmap of them.
Signed-off-by: Lukasz Luba
---
arch/arm/boot/dts/exynos5420.dtsi | 2 +-
arch/arm/boot/dts/exynos5800.dtsi |
Add description of Dynamic Memory Controller and PPMU counters.
They are used by exynos5422-dmc driver.
There is a definition of the memory chip, which is then used during
calculation of timings for each OPP.
The algorithm in the driver needs these two sets to bound the timings.
Signed-off-by: Luk
The patch adds AC timings information needed to support LPDDR3 and memory
controllers. The structure is used in of_memory and currently in Exynos
5422 DMC. Add parsing data needed for LPDDR3 support.
It is currently used in Exynos5422 Dynamic Memory Controller.
Acked-by: Krzysztof Kozlowski
Signe
Add the chipid label which allows to use it in phandle from other device.
Use syscon in compatible to get the regmap of the device register set.
The chipid is used in DMC during initialization to compare compatibility.
Signed-off-by: Lukasz Luba
---
arch/arm/boot/dts/exynos5.dtsi | 4 ++--
1 fil
This patch adds driver for Exynos5422 Dynamic Memory Controller.
The driver provides support for dynamic frequency and voltage scaling for
DMC and DRAM. It supports changing timings of DRAM running with different
frequency. There is also an algorithm to calculate timigns based on
memory description
Define new performance events supported by Exynos5422 SoC counters.
The counters are built-in in Dynamic Memory Controller and provide
information regarding memory utilization.
Signed-off-by: Lukasz Luba
---
drivers/devfreq/event/exynos-ppmu.c | 6 ++
1 file changed, 6 insertions(+)
diff --
This patch provides support for clocks needed for Dynamic Memory Controller
in Exynos5422 SoC. It adds CDREX base register addresses, new DIV, MUX and
GATE entries.
Acked-by: Chanwoo Choi
Acked-by: Krzysztof Kozlowski
Signed-off-by: Lukasz Luba
---
drivers/clk/samsung/clk-exynos5420.c | 61 +++
The patch adds description for DT binding for a new Exynos5422 Dynamic
Memory Controller device.
Acked-by: Krzysztof Kozlowski
Signed-off-by: Lukasz Luba
---
.../memory-controllers/exynos5422-dmc.txt | 75 +++
1 file changed, 75 insertions(+)
create mode 100644
Documentati
The clang bpf cmdline template has defined default value in the file
tools/perf/util/llvm-utils.c, which has been changed for several times.
This patch updates the documentation to reflect the latest default value
for the configuration llvm.clang-bpf-cmd-template.
Fixes: d35b168c3dcd ("perf bpf:
Setting to 2Mbaud/s is the nominal bus speed for common usages.
Signed-off-by: Neil Armstrong
Acked-by: Martin Blumenstingl
---
arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
b/arch/arm64
These patches :
- adds the 32khz low power clock to the bluetooth node, since this
clock is needed for the bluetooth part of the module to initialize
- bumps the bus speed to 2Mbaud/s
Changes since v1:
- removed the invalid Fixes tags
- added the reviewed/acked by tags
Neil Armstrong (4):
arm
The 32k low power clock is necessary for the bluetooth part of the
combo module to initialize correctly, simply add the same clock we
use for the sdio pwrseq.
Signed-off-by: Neil Armstrong
Reviewed-by: Martin Blumenstingl
---
arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts | 2 ++
1 file chan
The 32k low power clock is necessary for the bluetooth part of the
combo module to initialize correctly, simply add the same clock we
use for the sdio pwrseq.
Signed-off-by: Neil Armstrong
Reviewed-by: Martin Blumenstingl
---
arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts | 2 ++
1 file cha
Setting to 2Mbaud/s is the nominal bus speed for common usages.
Signed-off-by: Neil Armstrong
Acked-by: Martin Blumenstingl
---
arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
b/arch/arm64/b
Change directory name to be ready for new types of memories.
Reviewed-by: Rob Herring
Signed-off-by: Lukasz Luba
---
.../devicetree/bindings/{lpddr2 => ddr}/lpddr2-timings.txt | 0
Documentation/devicetree/bindings/{lpddr2 => ddr}/lpddr2.txt| 2 +-
2 files changed, 1 insertion(+), 1 de
Specifies the AC timing parameters of the LPDDR3 memory device.
Reviewed-by: Rob Herring
Signed-off-by: Lukasz Luba
---
.../bindings/ddr/lpddr3-timings.txt | 58 +++
.../devicetree/bindings/ddr/lpddr3.txt| 97 +++
2 files changed, 155 insertions(+)
cre
Hi all,
This is v9 which introduces minor changes. The patch set adds support of
Dynamic Memory Controller for Exynos5422 SoC.
The driver supports Dynamic Voltage and Frequency Scaling
for the DMC and DRAM. It also provides needed timings for different
speed operations of the DRAM memory.
There is
Add new table rate for BPLL for Exynos5422 SoC supporting Dynamic Memory
Controller frequencies for driver's DRAM timings.
Acked-by: Chanwoo Choi
Acked-by: Krzysztof Kozlowski
Signed-off-by: Lukasz Luba
---
drivers/clk/samsung/clk-exynos5420.c | 17 -
1 file changed, 16 inserti
On Thu, 6 Jun 2019 at 12:50, Arnaldo Carvalho de Melo
wrote:
>
> Em Fri, May 24, 2019 at 11:35:07AM -0600, Mathieu Poirier escreveu:
> > This patch deals with timestamp packets received from the decoding library
> > in order to give the front end packet processing loop a handle on the time
> > ins
Hi Arnaldo,
On Thu, Jun 06, 2019 at 03:29:41PM -0300, Arnaldo Carvalho de Melo wrote:
> Em Thu, Jun 06, 2019 at 10:35:32PM +0800, Leo Yan escreveu:
> > On Thu, Jun 06, 2019 at 11:08:00AM -0300, Arnaldo Carvalho de Melo wrote:
> > > Em Thu, Jun 06, 2019 at 05:48:45PM +0800, Leo Yan escreveu:
> > >
From: Enrico Weigelt
Support the recently introduced gpio lookup tables for
attaching to gpio lines. So, harcoded gpio numbers aren't
needed anymore.
changes v3:
* fix printf string in gpio_keys_polled_get_gpiod()
* fix unused variable 'error' in gpio_keys_polled_get_gpiod()
* fix un
On Thu, 6 Jun 2019 at 14:11, Arnaldo Carvalho de Melo
wrote:
>
> Em Wed, Jun 05, 2019 at 10:16:33AM -0600, Mathieu Poirier escreveu:
> > This patch adds the necessay intelligence to properly compute the value
> > of 'old' and 'head' when operating in snapshot mode. That way we can get
> > the lat
On Wed, Jun 05, 2019 at 03:07:57PM +0200, Peter Zijlstra wrote:
> When CONFIG_FRAME_POINTER, we should mark pt_regs frames.
>
> Signed-off-by: Peter Zijlstra (Intel)
Reviewed-by: Josh Poimboeuf
--
Josh
Tegra194 has six PCIe controllers based on Synopsys DesignWare core.
There are two Universal PHY (UPHY) blocks with each supporting 12(HSIO:
Hisg Speed IO) and 8(NVHS: NVIDIA High Speed) lanes respectively.
Controllers:0~4 use UPHY lanes from HSIO brick whereas Controller:5 uses
UPHY lanes from NVH
Add #defines only for the Data Link Feature and Physical Layer 16.0 GT/s
features.
Signed-off-by: Vidya Sagar
Reviewed-by: Thierry Reding
---
Changes since [v8]:
* None
Changes since [v7]:
* None
Changes since [v6]:
* None
Changes since [v5]:
* None
Changes since [v4]:
* None
Changes since
Tegra194 rootports don't generate MSI interrupts for PME and AER events.
Since PCIe spec (Ref: r4.0 sec 7.7.1.2 and 7.7.2.2) doesn't support using
a mix of INTx and MSI/MSI-X, MSI needs to be disabled to avoid root ports
service drivers registering their respective ISRs with MSI interrupt and
to le
powerpc/pseries/svm: Unshare all pages before kexecing a new kernel.
A new kernel deserves a clean slate. Any pages shared with the
hypervisor is unshared before invoking the new kernel. However there are
exceptions. If the new kernel is invoked to dump the current kernel, or
if there is a ex
Remove multiple write enable and disable sequences of dbi registers as
Tegra194 implements writes to BAR-0 register (offset: 0x10) controlled by
DBI write-lock enable bit thereby not allowing any further writes to BAR-0
register in config space to take place. Hence enabling write permission at
the
The SEI510 embeds an AP6398S SDIO module, let's add the
corresponding SDIO, PWM clock and mmc-pwrseq nodes.
Acked-by: Martin Blumenstingl
Signed-off-by: Neil Armstrong
---
.../boot/dts/amlogic/meson-g12a-sei510.dts| 50 +++
1 file changed, 50 insertions(+)
diff --git a/arch
The X96 Max embeds an AP6398S SDIO module, let's add the
corresponding SDIO, PWM clock and mmc-pwrseq nodes.
Reviewed-by: Martin Blumenstingl
Signed-off-by: Neil Armstrong
---
.../boot/dts/amlogic/meson-g12a-x96-max.dts | 50 +++
1 file changed, 50 insertions(+)
diff --git a/
From: Guillaume La Roque
Add nodes to support SDCard and onboard eMMC on the X96 Max.
Signed-off-by: Guillaume La Roque
Reviewed-by: Martin Blumenstingl
Signed-off-by: Neil Armstrong
---
.../boot/dts/amlogic/meson-g12a-x96-max.dts | 40 +++
1 file changed, 40 insertions(+)
This patchset :
- adds the SDIO controller node using the dram-access-quirk
- adds SDCard, eMMC & SDIO support to X96
- Add SDIO support to SEI510
Changes since v1:
- removed already applied SDIO patch
- added missing clock input from pwm
- added reviewed-by tags
Guillaume La Roque (1):
arm64:
Add extended configuration space capability search API using struct dw_pcie *
pointer
Signed-off-by: Vidya Sagar
Acked-by: Gustavo Pimentel
Acked-by: Thierry Reding
---
Changes since [v8]:
* Added Acked-by from Thierry
Changes since [v7]:
* Changed data types of return and arguments to be inli
Move PCIe config space capability search API to common DesignWare file
as this can be used by both host and ep mode codes.
Signed-off-by: Vidya Sagar
Acked-by: Gustavo Pimentel
Reviewed-by: Thierry Reding
---
Changes since [v8]:
* None
Changes since [v7]:
* Changed comment to explicitly state
Add support to enable CDM (Configuration Dependent Module) register check
for any data corruption based on the device-tree flag 'snps,enable-cdm-check'.
Signed-off-by: Vidya Sagar
Acked-by: Gustavo Pimentel
Reviewed-by: Thierry Reding
---
Changes since [v8]:
* None
Changes since [v7]:
* None
Add support to enable CDM (Configuration Dependent Module) registers check
for any data corruption. CDM registers include standard PCIe configuration
space registers, Port Logic registers and iATU and DMA registers.
Refer Section S.4 of Synopsys DesignWare Cores PCI Express Controller Databook
Vers
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