"Gautham R. Shenoy" writes:
> From: "Gautham R. Shenoy"
>
> During a memory hotplug operations involving resizing of the HPT, we
> invoke a stop_machine() to perform the resizing. In this code path, we
> end up recursively taking the cpu_hotplug_lock, first in
> memory_hotplug_begin() and then su
"Gautham R. Shenoy" writes:
> From: "Gautham R. Shenoy"
>
> Subject: Re: [RESEND PATCH] powerpc/pseries: Fix cpu_hotplug_lock acquisition
> in resize_hpt
ps. A "RESEND" implies the patch is unchanged and you're just resending
it because it was ignored.
In this case it should have just been "PA
On Mon, May 13, 2019 at 11:13:34AM -0700, Andy Lutomirski wrote:
> On Mon, May 13, 2019 at 9:28 AM Alexandre Chartre
> wrote:
> > Actually, I am not sure this is effectively useful because the IRQ
> > handler is probably faulting before it tries to exit isolation, so
> > the isolation exit will b
On Tue, May 14, 2019 at 11:32:19AM +0800, Kefeng Wang wrote:
> After commit 415b43bdb008 "tty: serial: uartlite: Move uart register to
> probe", calling uart_unregister_driver unconditionally will trigger a
> null pointer dereference due to ulite_uart_driver may not registed.
>
> CPU: 1 PID: 375
On Mon, May 13, 2019 at 11:18:41AM -0700, Andy Lutomirski wrote:
> On Mon, May 13, 2019 at 7:39 AM Alexandre Chartre
> wrote:
> >
> > pcpu_base_addr is already mapped to the KVM address space, but this
> > represents the first percpu chunk. To access a per-cpu buffer not
> > allocated in the first
Commit-ID: c7a286577d7592720c2f179aadfb325a1ff48c95
Gitweb: https://git.kernel.org/tip/c7a286577d7592720c2f179aadfb325a1ff48c95
Author: Stephane Eranian
AuthorDate: Mon, 13 May 2019 17:34:00 -0700
Committer: Ingo Molnar
CommitDate: Tue, 14 May 2019 09:07:58 +0200
perf/x86/intel: Allow
- Original Message -
>
>
> On May 13, 2019 4:01 PM, Yang Shi wrote:
>
>
> On 5/13/19 9:38 AM, Will Deacon wrote:
> > On Fri, May 10, 2019 at 07:26:54AM +0800, Yang Shi wrote:
> >> diff --git a/mm/mmu_gather.c b/mm/mmu_gather.c
> >> index 99740e1..469492d 100644
> >> --- a/mm/mmu_gath
Hi Eduardo,
On Monday 13 May 2019 at 20:40:59 (-0700), Eduardo Valentin wrote:
> On Fri, May 03, 2019 at 10:44:09AM +0100, Quentin Perret wrote:
> > The newly introduced Energy Model framework manages power cost tables in
> > a generic way. Moreover, it supports a several types of models since the
Hi Oleksandr,
On Mon, May 13, 2019 at 6:00 PM Oleksandr wrote:
> On 13.05.19 18:13, Geert Uytterhoeven wrote:
> >> So, if the DT bindings for the counter module is not an option (if I
> >> correctly understood a discussion pointed by Geert in another letter),
> >> we should probably prevent all t
> On May 14, 2019, at 12:15 AM, Jan Stancek wrote:
>
>
> - Original Message -
>> On May 13, 2019 4:01 PM, Yang Shi wrote:
>>
>>
>> On 5/13/19 9:38 AM, Will Deacon wrote:
>>> On Fri, May 10, 2019 at 07:26:54AM +0800, Yang Shi wrote:
diff --git a/mm/mmu_gather.c b/mm/mmu_gather.c
>
On Mon, May 13, 2019 at 07:02:30PM -0700, Andy Lutomirski wrote:
> This sounds like a great use case for static_call(). PeterZ, do you
> suppose we could wire up static_call() with the module infrastructure
> to make it easy to do "static_call to such-and-such GPL module symbol
> if that symbol i
Andy Shevchenko writes:
> On Tue, May 07, 2019 at 02:22:18PM +0200, Esben Haabendal wrote:
>> Andy Shevchenko writes:
>> > On Tue, May 07, 2019 at 01:35:58PM +0200, Esben Haabendal wrote:
>> >> Lee Jones writes:
>> >> > On Thu, 02 May 2019, Esben Haabendal wrote:
>> >> >
>> >> >> Could you help
* Masami Hiramatsu wrote:
> +/* Return the length of string -- including null terminal byte */
> +static nokprobe_inline int
> +fetch_store_strlen_user(unsigned long addr)
> +{
> + return strnlen_unsafe_user((__force const void __user *)addr,
> +MAX_STRING_SI
The function should return NULL in case no device is found, but it
always returns the last checked mc device from the list even if the
index did not match. This patch fixes this.
I did some analysis why this did not raise any issues for about 3
years and the reason is that edac_mc_find() is mostly
(please, wrap our emails at 78 chars)
On Tue, May 14, 2019 at 12:08:23AM +0300, Liran Alon wrote:
> 3) From (2), we should have theoretically deduced that for every
> #VMExit, there is a need to kick the sibling hyperthread also outside
> of guest until the #VMExit is completed.
That's not in
On Thu, May 09, 2019 at 01:42:39PM +0800, Lanqing Liu wrote:
> When userspace opens a serial port for console, uart_port_startup()
> is called. This function assigns the uport->cons->cflag value to
> TTY->termios.c_cflag, then it is cleared to 0. When the user space
> closes this serial port, the T
Andy Shevchenko writes:
> On Tue, May 07, 2019 at 02:22:18PM +0200, Esben Haabendal wrote:
>> Andy Shevchenko writes:
>> > On Tue, May 07, 2019 at 01:35:58PM +0200, Esben Haabendal wrote:
>> >> Lee Jones writes:
>> >> > On Thu, 02 May 2019, Esben Haabendal wrote:
>> >> >
>> >> >> Could you help
On Mon, May 13, 2019 at 07:07:36PM -0700, Andy Lutomirski wrote:
> On Mon, May 13, 2019 at 2:09 PM Liran Alon wrote:
> > The hope is that the very vast majority of #VMExit handlers will be
> > able to completely run without requiring to switch to full address
> > space. Therefore, avoiding the pe
Hello,
On Tue, 14 May 2019 09:53:16 +0800
masonccy...@mxic.com.tw wrote:
> > > ---
> > > static void macronix_nand_onfi_init(struct nand_chip *chip)
> > > {
> > > struct nand_parameters *p = &chip->parameters;
> > >
Hi Linus,
Please pull from:
git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/fuse.git
tags/fuse-update-5.2
Add more caching controls for userspace filesystems to use, as well as bug
fixes and cleanups.
Thanks,
Miklos
---
Alan Somers (3):
fuse: document fuse_fsync_in.fsync_flags
Hi Linus,
Please pull from:
git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/vfs.git
tags/ovl-update-5.2
Just bug fixes in this small update.
Thanks,
Miklos
---
Amir Goldstein (4):
ovl: fix missing upper fs freeze protection on copy up for ioctl
ovl: support stacked SEEK_H
> On 14 May 2019, at 10:29, Peter Zijlstra wrote:
>
>
> (please, wrap our emails at 78 chars)
>
> On Tue, May 14, 2019 at 12:08:23AM +0300, Liran Alon wrote:
>
>> 3) From (2), we should have theoretically deduced that for every
>> #VMExit, there is a need to kick the sibling hyperthread als
Lee Jones writes:
> On Tue, 07 May 2019, Esben Haabendal wrote:
>
>> Lee Jones writes:
>>
>> > On Fri, 26 Apr 2019, Esben Haabendal wrote:
>> >
>> >> The serial8250-mfd driver is for adding 8250/16550 UART ports as functions
>> >> to an MFD driver.
>> >>
>> >> When calling mfd_add_device(), pl
On 5/14/19 9:07 AM, Peter Zijlstra wrote:
On Mon, May 13, 2019 at 11:13:34AM -0700, Andy Lutomirski wrote:
On Mon, May 13, 2019 at 9:28 AM Alexandre Chartre
wrote:
Actually, I am not sure this is effectively useful because the IRQ
handler is probably faulting before it tries to exit isolat
On Sat, May 11, 2019 at 08:43:23AM +0200, Knut Omang wrote:
> On Fri, 2019-05-10 at 14:59 -0700, Frank Rowand wrote:
> > On 5/10/19 3:23 AM, Brendan Higgins wrote:
> > >> On Fri, May 10, 2019 at 7:49 AM Knut Omang wrote:
> > >>>
> > >>> On Thu, 2019-05-09 at 22:18 -0700, Frank Rowand wrote:
> > >>
From: Nadav Amit
Date: Fri, May 10, 2019 at 7:45 PM
To:
Cc: Borislav Petkov, , Nadav Amit, Andy
Lutomirsky, Ingo Molnar, Peter Zijlstra, Thomas Gleixner, Jann Horn
> It may be useful to check in runtime whether certain assertions are
> violated even during speculative execution. This can allow t
> On 14 May 2019, at 5:07, Andy Lutomirski wrote:
>
> On Mon, May 13, 2019 at 2:09 PM Liran Alon wrote:
>>
>>
>>
>>> On 13 May 2019, at 21:17, Andy Lutomirski wrote:
>>>
I expect that the KVM address space can eventually be expanded to include
the ioctl syscall entries. By doin
On Mon, May 13, 2019 at 9:23 PM Ulf Hansson wrote:
>
> This series enables support for hierarchical CPU arrangement, managed by PSCI
> for ARM/ARM64. It's based on using the generic PM domain (genpd), which
> recently was extended to manage devices belonging to CPUs.
ACK for the patches touching
Hi Michael,
On Tue, Apr 30, 2019 at 07:34:12PM +0200, Michael Tretter wrote:
> On Thu, 24 Jan 2019 19:04:19 +0900, Tomasz Figa wrote:
[snip]
> > +State machine
> > +=
> > +
> > +.. kernel-render:: DOT
> > + :alt: DOT digraph of encoder state machine
> > + :caption: Encoder state
On Mon, May 13, 2019 at 5:10 PM Keith Busch wrote:
>
> On Mon, May 13, 2019 at 03:05:42PM +, mario.limoncie...@dell.com wrote:
> > This system power state - suspend to idle is going to freeze threads.
> > But we're talking a multi threaded kernel. Can't there be a timing problem
> > going
>
BUG: unable to handle kernel paging request at a018f000
PGD 3270067 P4D 3270067 PUD 3271063 PMD 2307eb067 PTE 0
Oops: [#1] PREEMPT SMP
CPU: 0 PID: 4138 Comm: modprobe Not tainted 5.1.0-rc7+ #1
Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS
rel-1.9.3-0-ge2fc41e-prebuilt.qem
Add optional drive-strength-microamp property
Signed-off-by: Guillaume La Roque
Reviewed-by: Martin Blumenstingl
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/pi
add drive-strength bank regiter and bit value for G12A SoC
Signed-off-by: Guillaume La Roque
Reviewed-by: Martin Blumenstingl
---
drivers/pinctrl/meson/pinctrl-meson-g12a.c | 36 +++---
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/drivers/pinctrl/meson/pinctrl
drive-strength-microamp is a new feature needed for G12A SoC.
the default DS setting after boot is usually 500uA and it is not enough for
many functions. We need to be able to set the drive strength to reliably
enable things like MMC, I2C, etc ...
Signed-off-by: Guillaume La Roque
Reviewed-by: Ma
This property allow drive-strength parameter in uA instead of mA.
Signed-off-by: Guillaume La Roque
Acked-by: Martin Blumenstingl
Reviewed-by: Martin Blumenstingl
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt | 3 +++
1 file changed, 3 insertions(
rework bias enable/disable part to prepare drive-strength integration
no functional changes
Signed-off-by: Guillaume La Roque
Reviewed-by: Martin Blumenstingl
Tested-by: Martin Blumenstingl
---
drivers/pinctrl/meson/pinctrl-meson.c | 85 +++
1 file changed, 49 insertion
On 5/14/19 9:09 AM, Peter Zijlstra wrote:
On Mon, May 13, 2019 at 11:18:41AM -0700, Andy Lutomirski wrote:
On Mon, May 13, 2019 at 7:39 AM Alexandre Chartre
wrote:
pcpu_base_addr is already mapped to the KVM address space, but this
represents the first percpu chunk. To access a per-cpu buff
Add drive-strength-microamp property support to allow drive strength in uA
Signed-off-by: Guillaume La Roque
---
drivers/pinctrl/pinconf-generic.c | 2 ++
include/linux/pinctrl/pinconf-generic.h | 3 +++
2 files changed, 5 insertions(+)
diff --git a/drivers/pinctrl/pinconf-generic.c
b/dr
This patch introduces a new remoteproc driver to control Cortex-M4
co-processor of the STM32 family.
It provides with the following features:
- start and stop
- dedicated co-processor memory regions registration
- coredump and recovery
Signed-off-by: Fabien Dessenne
Signed-off-by: Ludovic Barre
Add the device tree bindings document for the stm32 remoteproc devices.
Signed-off-by: Fabien Dessenne
---
.../devicetree/bindings/remoteproc/stm32-rproc.txt | 63 ++
1 file changed, 63 insertions(+)
create mode 100644 Documentation/devicetree/bindings/remoteproc/stm32-rproc
The purpose of this patchset is to add drive-strength support in meson pinconf
driver. This is a new feature that was added on the g12a. It is critical for us
to support this since many functions are failing with default pad
drive-strength.
The value achievable by the SoC are 0.5mA, 2.5mA, 3mA an
On Tue, May 14, 2019 at 9:09 AM Anson Huang wrote:
>
> Unnecessary blank lines do NOT help readability, so remove them.
>
> Signed-off-by: Anson Huang
Reviewed-by: Daniel Baluta
Enable m4 coprocessor for STM32MP157c-ed1 board.
Signed-off-by: Fabien Dessenne
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot/dts/stm32mp157c-ed1.dts
index acfc5cd..e5a6f40 100644
-
STMicrolectronics STM32MP157 MPU are based on a Dual Arm Cortex-A7 core and a
Cortex-M4.
This patchset adds the support of the stm32_rproc driver allowing to control
the M4 remote processor.
Changes since v3:
-Replaced "st,auto_boot" with "st,auto-boot"
-Update m4 reg values and align with unit-ad
Declare reserved memories shared by the processors for STM32MP157a-dk1
Signed-off-by: Fabien Dessenne
---
arch/arm/boot/dts/stm32mp157a-dk1.dts | 42 +++
1 file changed, 42 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts
b/arch/arm/boot/dts/stm3
Declare reserved memories shared by the processors for STM32MP157c-ed1
board.
Signed-off-by: Fabien Dessenne
---
arch/arm/boot/dts/stm32mp157c-ed1.dts | 42 +++
1 file changed, 42 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c-ed1.dts
b/arch/arm/boot/d
Enable m4 coprocessor for STM32MP157a-dk1 board.
Signed-off-by: Fabien Dessenne
---
arch/arm/boot/dts/stm32mp157a-dk1.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157a-dk1.dts
b/arch/arm/boot/dts/stm32mp157a-dk1.dts
index 26ce8de..da64ee2 100644
-
Declare the M4 remote processor in a sub-node of the mlahb simple bus.
Signed-off-by: Fabien Dessenne
---
arch/arm/boot/dts/stm32mp157c.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157c.dtsi
index c6
Document the ML-AHB interconnect for stm32 SoCs.
Signed-off-by: Fabien Dessenne
---
.../devicetree/bindings/arm/stm32/mlahb.txt| 37 ++
1 file changed, 37 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/stm32/mlahb.txt
diff --git a/Documentati
> And I like Steven's "(fault)" idea.
> How about this:
>
> if ptr < PAGE_SIZE -> "(null)"
> if IS_ERR_VALUE(ptr)-> "(fault)"
>
> -ss
Or:
if (ptr < PAGE_SIZE)
return ptr ? "(null+)" : "(null)";
if IS_ERR_VALUE(ptr)
Hi George,
On Mon, May 13, 2019 at 5:48 PM George G. Davis wrote:
> As noted in commit 84b40e3b57ee ("serial: 8250: omap: Disable DMA for
> console UART"), UART console lines use low-level PIO only access functions
> which will conflict with use of the line when DMA is enabled, e.g. when
> the co
Le 14/05/2019 à 08:56, Michael Ellerman a écrit :
Christophe Leroy writes:
Some SCC functions like the QMC requires an extended parameter RAM.
On modern 8xx (ie 866 and 885), SPI area can already be relocated,
allowing the use of those functions on SCC2. But SCC3 and SCC4
parameter RAM coll
On Tue, May 14, 2019 at 04:50:49PM +1000, Michael Ellerman wrote:
> Looks good. I even booted it :)
Cool, thanks!
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
On Sat, 2019-04-27 at 22:41 +0200, Erik Stromdahl wrote:
> This patch fixes a possible deadlock when updating the TX statistics
> (when calling into ieee80211_tx_stats()) from ieee80211_tx_dequeue().
>
> ieee80211_tx_dequeue() might be called from process context.
I think this really is the probl
> On May 14, 2019, at 1:25 AM, Alexandre Chartre
> wrote:
>
>
>> On 5/14/19 9:09 AM, Peter Zijlstra wrote:
>>> On Mon, May 13, 2019 at 11:18:41AM -0700, Andy Lutomirski wrote:
>>> On Mon, May 13, 2019 at 7:39 AM Alexandre Chartre
>>> wrote:
pcpu_base_addr is already mapped to the
On 5/13/19 11:08 PM, Liran Alon wrote:
On 13 May 2019, at 21:17, Andy Lutomirski wrote:
I expect that the KVM address space can eventually be expanded to include
the ioctl syscall entries. By doing so, and also adding the KVM page table
to the process userland page table (which should be
Le 14/05/2019 à 10:31, Christophe Leroy a écrit :
Le 14/05/2019 à 08:56, Michael Ellerman a écrit :
Christophe Leroy writes:
Some SCC functions like the QMC requires an extended parameter RAM.
On modern 8xx (ie 866 and 885), SPI area can already be relocated,
allowing the use of those fun
On Tue, May 14, 2019 at 2:34 AM Anson Huang wrote:
>
> Hi, Daniel
>
> > -Original Message-
> > From: Daniel Baluta [mailto:daniel.bal...@gmail.com]
> > Sent: Monday, May 13, 2019 10:30 PM
> > To: Anson Huang
> > Cc: catalin.mari...@arm.com; will.dea...@arm.com;
> > shawn...@kernel.org; s.
On Sat, May 04, 2019 at 05:28:51AM +0530, Raag Jadav wrote:
> On Thu, May 02, 2019 at 04:01:16PM +0200, Ludovic Desroches wrote:
> > On Tue, Apr 30, 2019 at 04:03:32AM +0530, Raag Jadav wrote:
> > > External E-Mail
> > >
> > >
> > > On Mon, Apr 29, 2019 at 11:00:05AM +0200, Ludovic Desroches wrot
On Thu, May 09, 2019 at 06:19:25PM +0200, Sebastian Andrzej Siewior wrote:
> On 2019-05-08 15:57:28 [-0500], miny...@acm.org wrote:
> > kernel/sched/completion.c | 8
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/kernel/sched/completion.c b/kernel/sched/comple
> -Original Message-
> From: Daniel Baluta [mailto:daniel.bal...@gmail.com]
> Sent: Tuesday, May 14, 2019 4:39 PM
> To: Anson Huang
> Cc: catalin.mari...@arm.com; will.dea...@arm.com;
> shawn...@kernel.org; s.ha...@pengutronix.de; ker...@pengutronix.de;
> feste...@gmail.com; maxime.rip..
Make the naming of units consistent with common practices:
- Do not capitalize the first character of units ("Celsius" is
special, as it is not the unit name, but a reference to its
proposer),
- Do not use plural for units,
- Do not abbreviate "ampere",
- Concatenate prefixes and un
On Mon, May 06, 2019 at 10:19:01AM +0200, Eugen Hristev - M18282 wrote:
>
>
> On 04.05.2019 02:58, Raag Jadav wrote:
>
> > On Thu, May 02, 2019 at 04:01:16PM +0200, Ludovic Desroches wrote:
> >> On Tue, Apr 30, 2019 at 04:03:32AM +0530, Raag Jadav wrote:
> >>> External E-Mail
> >>>
> >>>
> >>> O
Hi Stanimir,
On 4/12/19 5:59 PM, Stanimir Varbanov wrote:
> This changes v4l2_pix_format and v4l2_plane_pix_format sizeimage
> field description to allow v4l clients to set bigger image size
> in case of variable length compressed data.
I've been reconsidering this change. The sizeimage value in
On Mon, May 13, 2019 at 19:37:28, Arnaldo Carvalho de Melo
wrote:
Hi Arnaldo,
I think Kishon has already dispatched a patch fixing this issue.
Kishon, can you confirm it?
Regards,
Gustavo
> Hi,
>
> I have this in my local perf/core branch, lined up for 5.2,
> please let me know if you
On Mon, May 13, 2019 at 05:06:03PM +, Nadav Amit wrote:
> > On May 13, 2019, at 9:37 AM, Will Deacon wrote:
> >
> > On Mon, May 13, 2019 at 09:11:38AM +, Nadav Amit wrote:
> >>> On May 13, 2019, at 1:36 AM, Peter Zijlstra wrote:
> >>>
> >>> On Thu, May 09, 2019 at 09:21:35PM +, Nada
On Tue, 14 May 2019 at 10:08, Rafael J. Wysocki wrote:
>
> On Mon, May 13, 2019 at 9:23 PM Ulf Hansson wrote:
> >
> > This series enables support for hierarchical CPU arrangement, managed by
> > PSCI
> > for ARM/ARM64. It's based on using the generic PM domain (genpd), which
> > recently was ext
Memory hot remove uses get_nid_for_pfn() while tearing down linked sysfs
entries between memory block and node. It first checks pfn validity with
pfn_valid_within() before fetching nid. With CONFIG_HOLES_IN_ZONE config
(arm64 has this enabled) pfn_valid_within() calls pfn_valid().
pfn_valid() is a
From: Mark Rutland
The arm64 ptdump code can race with concurrent modification of the
kernel page tables. At the time this was added, this was sound as:
* Modifications to leaf entries could result in stale information being
logged, but would not result in a functional problem.
* Boot time mo
The arm64 pagetable dump code can race with concurrent modification of the
kernel page tables. When a leaf entries are modified concurrently, the dump
code may log stale or inconsistent information for a VA range, but this is
otherwise not harmful.
When intermediate levels of table are freed, the
This series enables memory hot remove on arm64 after fixing a memblock
removal ordering problem in generic __remove_memory() and kernel page
table race conditions on arm64. This is based on the following arm64
working tree.
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git for-next/cor
Memory removal from an arch perspective involves tearing down two different
kernel based mappings i.e vmemmap and linear while releasing related page
table and any mapped pages allocated for given physical memory range to be
removed.
Define a common kernel page table tear down helper remove_pageta
On Tue, May 14, 2019 at 10:29 AM David Laight wrote:
> > And I like Steven's "(fault)" idea.
> > How about this:
> >
> > if ptr < PAGE_SIZE -> "(null)"
> > if IS_ERR_VALUE(ptr)-> "(fault)"
> >
> > -ss
>
> Or:
> if (ptr < PAGE_SIZE)
>
This patch drops the assembly PPC64 version of flush_dcache_range()
and re-uses the PPC32 static inline version.
With GCC 8.1, the following code is generated:
void flush_test(unsigned long start, unsigned long stop)
{
flush_dcache_range(start, stop);
}
0130 <.flush_test>:
1
On most arches having function flush_dcache_range(), including PPC32,
this function does a writeback and invalidation of the cache bloc.
On PPC64, flush_dcache_range() only does a writeback while
flush_inval_dcache_range() does the invalidation in addition.
In addition it looks like within arch/p
PPC32 also have flush_dcache_range() so it can also support
ARCH_HAS_PMEM_API and ARCH_HAS_UACCESS_FLUSHCACHE without changes.
Signed-off-by: Christophe Leroy
---
arch/powerpc/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kcon
This patch defines C helpers to retrieve the size of
cache blocks and uses them in the cacheflush functions.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/cache.h | 16 ++--
arch/powerpc/include/asm/cacheflush.h | 24 +++-
2 files changed, 29 i
On 14.05.19 11:00, Anshuman Khandual wrote:
> Memory hot remove uses get_nid_for_pfn() while tearing down linked sysfs
> entries between memory block and node. It first checks pfn validity with
> pfn_valid_within() before fetching nid. With CONFIG_HOLES_IN_ZONE config
> (arm64 has this enabled) pfn
On 14.05.19 11:00, Anshuman Khandual wrote:
> Memory removal from an arch perspective involves tearing down two different
> kernel based mappings i.e vmemmap and linear while releasing related page
> table and any mapped pages allocated for given physical memory range to be
> removed.
>
> Define a
On 14.05.19 11:00, Anshuman Khandual wrote:
> This series enables memory hot remove on arm64 after fixing a memblock
> removal ordering problem in generic __remove_memory() and kernel page
> table race conditions on arm64. This is based on the following arm64
> working tree.
>
> git://git.kernel.o
On Tue, May 14, 2019 at 06:14:41AM +, Vaittinen, Matti wrote:
> I am not sure but perhaps the regulator core is changed so that this
> parent/child relation must be modelled using -supply properties in
> device-tree. Are you able to bisect the change which breaks this? There
> may be other reg
On 14.05.2019 09:30, Oleksandr Natalenko wrote:
> Hi.
>
> On Mon, May 13, 2019 at 03:37:56PM +0300, Kirill Tkhai wrote:
>>> Yes, I get your point. But the intention is to avoid another hacky trick
>>> (LD_PRELOAD), thus *something* should *preferably* be done on the
>>> kernel level instead.
>>
>>
On 2019-05-14 10:43:56 [+0200], Peter Zijlstra wrote:
> Now.. that will fix it, but I think it is also wrong.
>
> The problem being that it violates FIFO, something that might be more
> important on -RT than elsewhere.
Wouldn't -RT be more about waking the task with the highest priority
instead t
On 5/13/19 11:15 AM, Neil Armstrong wrote:
> On the Amlogic G12A SoC family, (only) the SDIO controller fails to access
> the data from DDR, leading to a broken controller.
>
> Add the amlogic,ddr-access-quirk property so signal this particular
> controller has this bug and needs a quirk to work
Enable eMMC and SDCard on the g12a u200 board
Signed-off-by: Jerome Brunet
---
.../boot/dts/amlogic/meson-g12a-u200.dts | 42 +++
1 file changed, 42 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
b/arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
Add port B (sdcard) and port C (eMMC) pinctrl and controllers nodes to
the g12a DT.
Signed-off-by: Jerome Brunet
---
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 124
1 file changed, 124 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
b/arch/arm64/b
On 14.05.19 11:00, Anshuman Khandual wrote:
> The arm64 pagetable dump code can race with concurrent modification of the
> kernel page tables. When a leaf entries are modified concurrently, the dump
> code may log stale or inconsistent information for a VA range, but this is
> otherwise not harmful
This patchset adds the MMC controller B and C to the g12a SoC as well
as the u200 and sei510 boards.
MMC controller A has been left out on purpose. This controller is
special on this SoC family and will be added later on.
Notice the use of the pinconf DT property 'drive-strength-microamp'.
Suppor
Enable eMMC and SDCard on the g12a sei510 board
Signed-off-by: Jerome Brunet
---
.../boot/dts/amlogic/meson-g12a-sei510.dts| 42 +++
1 file changed, 42 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
b/arch/arm64/boot/dts/amlogic/meson-g12a-sei5
On (05/11/19 00:19), Tetsuo Handa wrote:
> We are seeing syzbot reports [1] where printk() messages prior to panic()
> are missing for unknown reason. To test whether it is due to some testcase
> changing console loglevel, let's panic() as soon as console loglevel has
> changed. This patch is inten
On Mon, May 13, 2019 at 11:55:18AM -0600, Raul E Rangel wrote:
> I think we should cherry-pick 41e3efd07d5a02c80f503e29d755aa1bbb4245de
> https://lore.kernel.org/patchwork/patch/856512/ into 4.14. It fixes a
> potential resource leak when shutting down the request queue.
Potential meaning "it does
On 14.05.19 11:00, Anshuman Khandual wrote:
> From: Mark Rutland
>
> The arm64 ptdump code can race with concurrent modification of the
> kernel page tables. At the time this was added, this was sound as:
>
> * Modifications to leaf entries could result in stale information being
> logged, but
On Mon, May 13, 2019 at 03:16:11AM -0400, Jan Stancek wrote:
> - Original Message -
> > We have noticed 274 syscall test failures on x86_64 and i386 due to
> > Make the temporary directory in one shot using mkdtemp failed.
> > tst_tmpdir.c:264: BROK: tst_tmpdir:
> > mkdtemp(/scratch/ltp-7D8
On Tue, May 14, 2019 at 10:24 AM Esben Haabendal wrote:
> Andy Shevchenko writes:
> > On Tue, May 07, 2019 at 02:22:18PM +0200, Esben Haabendal wrote:
> We are on repeat here. I don't agree with you here. I have a simple
> generic 8250 (16550A) compatible device, and cannot use it in a mfd
> d
On 07/05/2019 09:36, Marc Zyngier wrote:
> On 29/04/2019 17:00, Julien Thierry wrote:
>> When using IRQ priority masking to disable interrupts, in order to deal
>> with the PSR.I state, local_irq_save() would convert the I bit into a
>> PMR value (GIC_PRIO_IRQOFF). This resulted in local_irq_res
On Mon, May 13, 2019 at 01:24:57PM -0700, Doug Anderson wrote:
> On Sun, May 12, 2019 at 10:05 AM Mark Brown wrote:
> > If performance is important you probably also want to avoid the context
> > thrashing - executing in the calling context is generally a substantial
> > performance boost. I can
On 14/05/2019 06:03, Sowjanya Komatineni wrote:
> This patch adds support for GPIO based CS control through SPI core
> function spi_set_cs.
>
> Signed-off-by: Sowjanya Komatineni
Can you elaborate on the use-case where this is needed? I am curious
what platforms are using this and why they woul
The directive specified in the documentation to add an exception
for a single file in a Makefile was inverted.
Signed-off-by: Raphael Gault
---
tools/objtool/Documentation/stack-validation.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/objtool/Documentation/stack-v
On Tue, May 14, 2019 at 12:23 PM Andy Shevchenko
wrote:
> On Tue, May 14, 2019 at 10:24 AM Esben Haabendal wrote:
> > Please take a look at https://lkml.org/lkml/2019/4/9/576
> > ("[PATCH v2 2/4] mfd: ioc3: Add driver for SGI IOC3 chip")
>
> Thank you for this link.
> Now, look at this comment:
On Tue, May 14, 2019 at 07:25:58AM +, Robert Richter wrote:
> The function should return NULL in case no device is found, but it
> always returns the last checked mc device from the list even if the
> index did not match. This patch fixes this.
>
> I did some analysis why this did not raise an
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