Hi Geert/Masahiro.
On Fri, May 10, 2019 at 08:46:35AM +0200, Geert Uytterhoeven wrote:
> Hi Yamada-san,
>
> On Fri, May 10, 2019 at 8:14 AM Masahiro Yamada
> wrote:
> > Kconfig updates the .config when it exits even if its content is
> > exactly the same as before. Since its timestamp becomes ne
On Thu, 09 May 2019, Kefeng Wang wrote:
> Using dev_get_drvdata directly.
>
> Cc: David Brown
> Cc: Lee Jones
> Cc: linux-arm-...@vger.kernel.org
> Signed-off-by: Kefeng Wang
> ---
> v3:
> - fix build issue('dev' undeclared) in tc6393xb_nand_enable()
> v2:
> -use dev_get_drvdata() instead of t
On 09/05/2019 21:19, Parav Pandit wrote:
-Original Message-
From: Cornelia Huck
Sent: Thursday, May 9, 2019 4:06 AM
To: Parav Pandit
Cc: k...@vger.kernel.org; linux-kernel@vger.kernel.org;
kwankh...@nvidia.com; alex.william...@redhat.com; c...@nvidia.com;
Tony Krowiak ; Pierre Morel
From: Colin Ian King
There is a spelling mistake in a DRM_ERROR error message. Fix this.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/amd/amdgpu/df_v3_6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/df_v3_6.c
b/drivers/gpu/drm/amd/amdgpu
On Thu, 09 May 2019, Thomas Bogendoerfer wrote:
> On Wed, 8 May 2019 11:23:13 +0100
> Lee Jones wrote:
>
> > On Tue, 09 Apr 2019, Thomas Bogendoerfer wrote:
> >
> > > +static u32 crc8_addr(u64 addr)
> > > +{
> > > + u32 crc = 0;
> > > + int i;
> > > +
> > > + for (i = 0; i < 64; i += 8)
> > > +
On Fri, 10 May 2019 04:36:57 +0200,
YueHaibing wrote:
>
> Fix gcc build error while CONFIG_SND_SOC_SOF_NOCODEC=m
>
> sound/soc/sof/core.o: In function `snd_sof_device_probe':
> core.c:(.text+0x4af): undefined reference to `sof_nocodec_setup'
>
> Change SND_SOC_SOF_NOCODEC to bool to fix this.
>
On Fri, May 10, 2019 at 3:21 PM Greg KH wrote:
>
> On Fri, May 10, 2019 at 03:12:05PM +0900, Masahiro Yamada wrote:
> > Kconfig updates the .config when it exits even if its content is
> > exactly the same as before. Since its timestamp becomes newer than
> > that of other build artifacts, additio
On 10/05/2019 05:40, Andy Tang wrote:
>> -Original Message-
>> From: Shawn Guo
>> Sent: 2019年5月10日 11:14
>> To: Andy Tang
>> Cc: Leo Li ; robh...@kernel.org;
>> mark.rutl...@arm.com; linux-arm-ker...@lists.infradead.org;
>> devicet...@vger.kernel.org; linux-kernel@vger.kernel.org;
>> linu
By default, KSM works only on memory that is marked by madvise(). And the
only way to get around that is to either:
* use LD_PRELOAD; or
* patch the kernel with something like UKSM or PKSM.
Instead, lets implement a so-called "always" mode, which allows marking
VMAs as mergeable on do_anonymo
Add separate vmaflag to allow applications to opt out of automatic VMAs
merging due to (possible) security concerns.
Since vmaflags are tight on free bits, this flag is available on 64-bit
architectures only. Thus, subsequently, KSM "always" mode will be
available for 64-bit architectures only as
Fix gcc build error while CONFIG_REGULATOR is not set
drivers/power/supply/ucs1002_power.o: In function `ucs1002_probe':
drivers/power/supply/ucs1002_power.c:593: undefined reference to
`devm_regulator_register'
drivers/power/supply/ucs1002_power.o:(.rodata+0x3b8): undefined reference to
`regula
Move MADV_MERGEABLE part of ksm_madvise() into a dedicated helper since
it will be further used in do_anonymous_page().
This does not bring any functional changes.
Signed-off-by: Oleksandr Natalenko
---
include/linux/ksm.h | 2 ++
mm/ksm.c| 66 ++
Enjoy!
The following changes since commit e93c9c99a629c61837d5a7fc2120cd2b6c70dbdd:
Linux 5.1 (2019-05-05 17:42:58 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git ib-mfd-pinctrl-v5.2
for you to fetch changes up to 1490d9f841b186664f9
Introduce 2 KSM modes:
* madvise, which is default and maintains old behaviour; and
* always, in which new anonymous allocations are marked as eligible
for merging.
The mode is controlled either via sysfs or via kernel cmdline for VMAs
to be marked as soon as possible during the boot proc
Add a driver for Macronix NAND read retry.
Macronix NAND supports specfical read for data recovery and enabled
it by Set Feature.
Driver check byte 167 of Vendor Blocks in ONFI parameter page table
to see if this high reliability function is support or not.
Signed-off-by: Mason Yang
---
drivers
On Thu, Apr 25, 2019 at 03:07:40PM +0530, Viresh Kumar wrote:
> We target for an idle CPU in select_idle_sibling() to run the next task,
> but in case we don't find idle CPUs it is better to pick a CPU which
> will run the task the soonest, for performance reason. A CPU which isn't
> idle but has o
Document KSM "always" mode kernel cmdline option as well as
corresponding sysfs knob.
Signed-off-by: Oleksandr Natalenko
---
Documentation/admin-guide/kernel-parameters.txt | 7 +++
Documentation/admin-guide/mm/ksm.rst| 7 +++
2 files changed, 14 insertions(+)
diff --git a/D
On Fri, May 10, 2019 at 01:32:22PM +1000, Michael Ellerman wrote:
> Yury Norov writes:
> > On Tue, May 07, 2019 at 08:54:31AM -0400, Rafael Aquini wrote:
> >> On Mon, May 06, 2019 at 11:53:43AM -0400, Joel Savitz wrote:
> >> > There is currently no easy and architecture-independent way to find the
Hi Sam,
On Fri, May 10, 2019 at 9:03 AM Sam Ravnborg wrote:
> On Fri, May 10, 2019 at 08:46:35AM +0200, Geert Uytterhoeven wrote:
> > On Fri, May 10, 2019 at 8:14 AM Masahiro Yamada
> > wrote:
> > > Kconfig updates the .config when it exits even if its content is
> > > exactly the same as before
On Thu, 9 May 2019, Steven Rostedt wrote:
> As this patch is simply a "remove mcount" patch, I'd like to have the
> removal of klp_check_compiler_support() be a separate patch.
>
> Jiri or Josh, care to send a patch on top of this one?
Sure thing, I'll do that once you send v2 fixing x86_32 of
Hi Linus,
The following changes since commit 37624b58542fb9f2d9a70e6ea006ef8a5f66c30b:
Linux 5.1-rc7 (2019-04-28 17:04:13 -0700)
are available in the Git repository at:
git://git.linaro.org/landing-teams/working/fujitsu/integration.git
tags/mailbox-v5.2
for you to fetch changes up to 8fbbf
On 19-05-10 10:42:17, Shawn Guo wrote:
> On Mon, Apr 22, 2019 at 08:48:56AM +, Leonard Crestez wrote:
> > On 4/22/2019 9:46 AM, Anson Huang wrote:
> > >> -Original Message-
> > >> From: Anson Huang
> > >>> From: Shawn Guo [mailto:shawn...@kernel.org]
> > >>> On Sun, Apr 21, 2019 at 03:4
Hi Sam, Geert,
On Fri, May 10, 2019 at 4:04 PM Sam Ravnborg wrote:
>
> Hi Geert/Masahiro.
>
> On Fri, May 10, 2019 at 08:46:35AM +0200, Geert Uytterhoeven wrote:
> > Hi Yamada-san,
> >
> > On Fri, May 10, 2019 at 8:14 AM Masahiro Yamada
> > wrote:
> > > Kconfig updates the .config when it exits
During power sequence, GPIO hardware registers could be lost if the power
supply is switched off. Each device using pinctrl API is in charge of
managing pins during suspend/resume sequences. But for pins used as gpio or
irq stm32 pinctrl driver has to save the hardware configuration.
Signed-off-by
Apply suspend/resume management for stm32mp157c MPU.
Signed-off-by: Alexandre Torgue
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32mp157.c
b/drivers/pinctrl/stm32/pinctrl-stm32mp157.c
index 320544f..2ccb99d 100644
--- a/drivers/pinctrl/stm32/pinctrl-stm32mp157.c
+++ b/drivers/pinctrl/stm32/pi
GPIOs are split between several banks (A, B, ...) and each bank can have
up to 16 lines. Those GPIOs could be used as interrupt lines thanks to
exti lines. As there are only 16 exti lines, a mux is used to select which
gpio line is connected to which exti line. Mapping is done as follow:
-A0, B0,
During power sequence, GPIO hardware registers could be lost if the power
supply is switched off. Each device using pinctrl API is in charge of
managing pins during suspend/resume sequences. But for pins used as gpio or
irq stm32 pinctrl driver has to save the hardware configuration.
Each register
Hi Mason,
Mason Yang wrote on Fri, 10 May 2019 15:41:02
+0800:
> Add a driver for Macronix NAND read retry.
"Add support for Macronix NAND read retry."? This is not a "new driver".
>
> Macronix NAND supports specfical read for data recovery and enabled
Macronix NANDs support specific read o
On 4/18/19 11:37 AM, Fabrice Gasnier wrote:
> This patch series adds power management support for STM32 LP Timer:
> - PWM driver
> - Document the pinctrl states for sleep mode
>
> It also adds device link between the PWM consumer and the PWM provider.
> This allows proper sequencing for suspend/re
On Fri, May 10, 2019 at 4:36 AM Tobin C. Harding wrote:
>
> On Wed, May 01, 2019 at 09:54:16AM +0200, Rafael J. Wysocki wrote:
> > On Wed, May 1, 2019 at 1:38 AM Tobin C. Harding wrote:
> > >
> > > Hi,
> > >
> > > Looks like I've created a bit of confusion trying to fix memleaks in
> > > calls to
Hi Joel,
On Fri, May 10, 2019 at 11:38 AM Joel Fernandes wrote:
>
> On Thu, May 09, 2019 at 01:47:54PM -0700, Linus Torvalds wrote:
> > [ Ok, this may look irrelevant to people, but I actually notice this
> > because I do quick rebuilds *all* the time, so the 30s vs 41s
> > difference is actually
On Thu, 9 May 2019 14:04:36 -0700, Florian Fainelli wrote:
> From: Kamal Dasu
>
> ARCH_BRCMSTB platforms have the BCM2835 I2C controllers, allow
> selecting the i2c-bcm2835 driver on such platforms.
>
> Signed-off-by: Kamal Dasu
> Signed-off-by: Florian Fainelli
> ---
> drivers/i2c/busses/Kc
On 08/05/2019 14:23, Michael Kao wrote:
> On Mon, 2019-05-06 at 12:43 +0200, Daniel Lezcano wrote:
>> On 03/05/2019 18:46, Matthias Kaehlcke wrote:
>>> Hi,
>>>
>>> On Fri, May 03, 2019 at 04:03:58PM +0800, Hsin-Yi Wang wrote:
On Thu, May 2, 2019 at 10:43 AM michael.kao
wrote:
>
>>
On Fri, May 10, 2019 at 7:49 AM Knut Omang wrote:
>
> On Thu, 2019-05-09 at 22:18 -0700, Frank Rowand wrote:
> > On 5/9/19 4:40 PM, Logan Gunthorpe wrote:
> > >
> > >
> > > On 2019-05-09 5:30 p.m., Theodore Ts'o wrote:
> > >> On Thu, May 09, 2019 at 04:20:05PM -0600, Logan Gunthorpe wrote:
> > >>>
Hi Kefeng,
On Fri, 10 May 2019 11:03:20 +0800, Kefeng Wang wrote:
> If ioremap fails, NULL pointer dereference will happen and
> leading to a kernel panic when access the virtual address
> in check_signature().
>
> Fix it by check the return value of ioremap.
>
> Cc: Jean Delvare
> Cc: Wolfram
add drive-strength bank regiter and bit value for G12A SoC
Signed-off-by: Guillaume La Roque
---
drivers/pinctrl/meson/pinctrl-meson-g12a.c | 36 +++---
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/drivers/pinctrl/meson/pinctrl-meson-g12a.c
b/drivers/pinctrl/m
drive-strength-microamp is a new feature needed for G12A SoC.
the default DS setting after boot is usually 500uA and it is not enough for
many functions. We need to be able to set the drive strength to reliably
enable things like MMC, I2C, etc ...
Signed-off-by: Guillaume La Roque
---
drivers/pi
Add optional drive-strength-microamp property
Signed-off-by: Guillaume La Roque
---
Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt
b/Documentation/devicetree/bindings
rework bias enable/disable part to prepare drive-strength integration
no functional changes
Signed-off-by: Guillaume La Roque
---
drivers/pinctrl/meson/pinctrl-meson.c | 85 +++
1 file changed, 49 insertions(+), 36 deletions(-)
diff --git a/drivers/pinctrl/meson/pinctrl-
The purpose of this patchset is to add drive-strength support in meson pinconf
driver. This is a new feature that was added on the g12a. It is critical for us
to support this since many functions are failing with default pad
drive-strength.
The value achievable by the SoC are 0.5mA, 2.5mA, 3mA an
This property allow drive-strength parameter in uA instead of mA.
Signed-off-by: Guillaume La Roque
---
Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
b/Document
Add drive-strength-microamp property support to allow drive strength in uA
Signed-off-by: Guillaume La Roque
---
drivers/pinctrl/pinconf-generic.c | 2 ++
include/linux/pinctrl/pinconf-generic.h | 3 +++
2 files changed, 5 insertions(+)
diff --git a/drivers/pinctrl/pinconf-generic.c
b/dr
On Fri, May 10, 2019 at 8:08 AM Kai-Heng Feng
wrote:
>
> at 06:19, wrote:
>
> >> -Original Message-
> >> From: Keith Busch
> >> Sent: Thursday, May 9, 2019 4:54 PM
> >> To: Limonciello, Mario
> >> Cc: kai.heng.f...@canonical.com; h...@lst.de; ax...@fb.com;
> >> s...@grimberg.me; raf...@
Thx Marc,
Sorry for late reply:
On Mon, Feb 18, 2019 at 02:38:23PM +, Marc Zyngier wrote:
> On Mon, 18 Feb 2019 10:04:40 +0800
> guo...@kernel.org wrote:
>
> > From: Guo Ren
> >
> > Support 4 triger types:
> > - IRQ_TYPE_LEVEL_HIGH
> > - IRQ_TYPE_LEVEL_LOW
> > - IRQ_TYPE_EDGE_RISING
> >
On Fri, 10 May 2019 at 00:16, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 4.14.118 release.
> There are 42 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Re
+ Viresh for help.
> -Original Message-
> From: Daniel Lezcano
> Sent: 2019年5月10日 15:17
> To: Andy Tang ; Shawn Guo
> Cc: Leo Li ; robh...@kernel.org;
> mark.rutl...@arm.com; linux-arm-ker...@lists.infradead.org;
> devicet...@vger.kernel.org; linux-kernel@vger.kernel.org;
> linux...@vger
Hi Qais,
On 5/5/19 1:57 PM, Qais Yousef wrote:
[...]
diff --git a/kernel/sched/sched_tracepoints.h b/kernel/sched/sched_tracepoints.h
new file mode 100644
index ..f4ded705118e
--- /dev/null
+++ b/kernel/sched/sched_tracepoints.h
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0
On (05/10/19 10:42), Petr Mladek wrote:
[..]
> Fixes: 3e5903eb9cff70730 ("vsprintf: Prevent crash when dereferencing invalid
> pointers")
> Signed-off-by: Petr Mladek
FWIW
Reviewed-by: Sergey Senozhatsky
-ss
On Fri, 2019-05-10 at 10:23 +0200, Guillaume La Roque wrote:
> The purpose of this patchset is to add drive-strength support in meson pinconf
> driver. This is a new feature that was added on the g12a. It is critical for
> us
> to support this since many functions are failing with default pad
> d
On Tue, 2019-04-16 at 21:33 +0200, H. Nikolaus Schaller wrote:
> Hi Bastien,
>
> > Am 16.04.2019 um 18:04 schrieb Bastien Nocera :
> > This can be done in user-space, reading the data from the IIO driver,
> > and using uinput to feed it back. Why is doing this at the kernel level
> > better?
>
>
On Wed, May 08, 2019 at 10:23:15PM +0530, Manivannan Sadhasivam wrote:
> Hello,
>
> This patchset adds reset controller support for Bitmain BM1880 SoC.
> BM1880 SoC has two reset controllers each controlling reset lines of
> different peripherals. And the reset-simple driver has been reused here.
On Mon, 2019-04-22 at 15:20 +0100, Jonathan Cameron wrote:
> > Different goals usually lead to different solution architectures.
>
> Indeed, but in this case we have your proposal which is a subset of
> what
> I am suggesting. One architecture can fulfil both requirements.
>
> I'll leave it for
Thx Marc,
On Mon, Feb 18, 2019 at 02:28:45PM +, Marc Zyngier wrote:
> On Mon, 18 Feb 2019 10:04:41 +0800
> guo...@kernel.org wrote:
>
> > From: Guo Ren
> >
> > Add trigger type and priority setting for csky,mpintc.
> >
> > Changelog:
> > - change #interrupt-cells to <3>
> >
> > Signed-of
On Sun, 2019-04-14 at 09:26 -0700, Roderick Colenbrander wrote:
>
> We at the time were one of the first to expose acceleration and gyro
> data through /dev/input for DualShock 4 as supported by hid-sony. We
> report acceleration in 'g' and angular velocity in 'degree / s'. We
> set the resolutio
Use gen_rtx_set instead of gen_rtx_SET. The former is a wrapper macro
that handles the difference between GCC versions implementing
the latter.
This fixes the following error on my system with g++ 5.4.0 as the host
compiler
HOSTCXX -fPIC scripts/gcc-plugins/arm_ssp_per_task_plugin.o
scripts/g
Hi Mason,
masonccy...@mxic.com.tw wrote on Fri, 10 May 2019 16:51:20 +0800:
> Hi Miquel,
>
>
> > > Add a driver for Macronix NAND read retry.
> >
> > "Add support for Macronix NAND read retry."? This is not a "new driver".
> >
> > >
> > > Macronix NAND supports specfical read for data re
On 05/10/19 10:51, Dietmar Eggemann wrote:
> Hi Qais,
>
> On 5/5/19 1:57 PM, Qais Yousef wrote:
>
> [...]
>
> > diff --git a/kernel/sched/sched_tracepoints.h
> > b/kernel/sched/sched_tracepoints.h
> > new file mode 100644
> > index ..f4ded705118e
> > --- /dev/null
> > +++ b/kernel/s
Hi Colin,
[added Bartosz to Cc:]
On Thu, 2019-05-09 at 17:00 +0100, Colin King wrote:
> From: Colin Ian King
>
> Pointer dev is being dereferenced when passed to the inlined
> functon dev_name, however, dev is later being null checked.
> Thus there is a potential null pointer dereference on a n
On Wed, 2019-05-08 at 16:22 +0300, Alexandru Ardelean wrote:
> On Wed, 2019-05-08 at 15:18 +0200, Greg KH wrote:
> >
> >
> > On Wed, May 08, 2019 at 04:11:28PM +0300, Andy Shevchenko wrote:
> > > On Wed, May 08, 2019 at 02:28:29PM +0300, Alexandru Ardelean wrote:
> > > > This change re-introduces
On 10/05/2019 10:14, Philipp Zabel wrote:
> Hi Colin,
>
> [added Bartosz to Cc:]
>
> On Thu, 2019-05-09 at 17:00 +0100, Colin King wrote:
>> From: Colin Ian King
>>
>> Pointer dev is being dereferenced when passed to the inlined
>> functon dev_name, however, dev is later being null checked.
>> T
On Thu, May 09, 2019 at 11:19:23PM +0530, Amit Kucheria wrote:
> (Adding Lorenzo and Sudeep)
>
> On Wed, May 8, 2019 at 8:26 PM Niklas Cassel wrote:
> >
> > On Wed, May 08, 2019 at 02:48:19AM +0530, Amit Kucheria wrote:
> > > On Tue, May 7, 2019 at 1:01 AM Niklas Cassel
> > > wrote:
> > > >
> >
> From: Anson Huang
> Sent: Thursday, April 11, 2019 2:49 PM
>
> i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller inside,
> the system controller is in charge of controlling power, clock and fuse etc..
>
> This patch adds i.MX system controller soc driver support, Linux kernel has
śr., 8 maj 2019 o 09:13 Richard Weinberger napisał(a):
>
> - Ursprüngliche Mail -
> >> Can you please check?
> >> This patch is already queued in -next. So we need to decide whether to
> >> revert or fix it now.
> >>
> > I am looking at it. It passed tests in my case (I did the usual round
We find the current CPU using smp_processor_id() if the event is not bound
to a CPU, to find the node for memory allocation. Use the safe
numa_node_id() instead, to avoid BUG().
BUG: using smp_processor_id() in preemptible [] code: perf/1743
caller is tmc_alloc_etr_buffer+0x1bc/0x1f0
CP
We find the current CPU using smp_processor_id() if the event is not bound
to a CPU, to find the node for memory allocation. Use the safe
numa_node_id() instead, to avoid BUG(). e.g:
BUG: using smp_processor_id() in preemptible [] code: perf/2544
caller is tmc_alloc_etf_buffer+0x5c/0x60
We have a few places where we call smp_processor_id() from preemptible
contexts during the perf buffer handling. We do this to figure out the
numa node for the allocation in case the event is not CPU bound. Use
numa_node_id() instead in such cases to avoid a splat.
Suzuki K Poulose (4):
coresi
Instead of using smp_processor_id() to figure out the node,
use the numa_node_id() for the current CPU node to avoid
splats like :
BUG: using smp_processor_id() in preemptible [] code: perf/1743
caller is alloc_etr_buf.isra.6+0x80/0xa0
CPU: 1 PID: 1743 Comm: perf Not tainted 5.1.0-rc6-1
We find the current CPU using smp_processor_id() if the event is not bound
to a CPU, to find the node for memory allocation. Use the safe
numa_node_id() instead, to avoid BUG(). e.g:
BUG: using smp_processor_id() in preemptible [] code: perf/2544
Fixes: 2997aa4063d97fdb39 ("coresight: et
On Fri, 2019-05-10 at 11:33 +0200, H. Nikolaus Schaller wrote:
> >
> It does through "Input device name:" starting with "iio-bridge:" as
> you can see in the commit message of [RFC v3]:
This makes it ABI, right?
Big fat warnings around the code that declares it would be appreciated.
On 2019/5/10 16:09, Jean Delvare wrote:
> Hi Kefeng,
>
> On Fri, 10 May 2019 11:03:20 +0800, Kefeng Wang wrote:
>> If ioremap fails, NULL pointer dereference will happen and
>> leading to a kernel panic when access the virtual address
>> in check_signature().
>>
>> Fix it by check the return valu
In commit d01f449c008a ("of_net: add NVMEM support to
of_get_mac_address") I've added `nvmem-mac-address` property which was
wrong idea as I've allocated the property with devm_kzalloc and then
added it to DT, so then 2 entities would be refcounting the allocation.
So if the driver unbinds, the buf
> Am 10.05.2019 um 10:57 schrieb Bastien Nocera :
>
> On Mon, 2019-04-22 at 15:20 +0100, Jonathan Cameron wrote:
>>> Different goals usually lead to different solution architectures.
>>
>> Indeed, but in this case we have your proposal which is a subset of
>> what
>> I am suggesting. One archi
* Cornelia Huck (coh...@redhat.com) wrote:
> On Thu, 9 May 2019 17:48:26 +0100
> "Dr. David Alan Gilbert" wrote:
>
> > * Cornelia Huck (coh...@redhat.com) wrote:
> > > On Thu, 9 May 2019 16:48:57 +0100
> > > "Dr. David Alan Gilbert" wrote:
> > >
> > > > * Cornelia Huck (coh...@redhat.com) wro
On Fri 2019-05-10 12:35:38, Tobin C. Harding wrote:
> On Wed, May 01, 2019 at 09:54:16AM +0200, Rafael J. Wysocki wrote:
> > On Wed, May 1, 2019 at 1:38 AM Tobin C. Harding wrote:
> > > TODO
> > >
> > >
> > > - Fix all the callsites to kobject_init_and_add()
> > > - Further clarify the functi
Hi Peter,
On 2019-05-10 05:10, Peter Chen wrote:
>
>> Marek Szyprowski writes:
>>> Commit 69bec7259853 ("USB: core: let USB device know device node")
>>> added support for attaching devicetree node for USB devices. The
>>> mentioned commit however identifies the given USB device node only by the
From: Colin Ian King
Pointer dev is being dereferenced when passed to the inlined
functon dev_name, however, dev is later being null checked
so at first this seems like a potential null pointer dereference.
In fact, _reset_control_get_from_lookup is only ever called from
__reset_control_get, rig
> Am 10.05.2019 um 11:35 schrieb Bastien Nocera :
>
> On Fri, 2019-05-10 at 11:33 +0200, H. Nikolaus Schaller wrote:
>>>
>
>> It does through "Input device name:" starting with "iio-bridge:" as
>> you can see in the commit message of [RFC v3]:
>
> This makes it ABI, right?
The "Input device
On 10-05-19, 08:47, Andy Tang wrote:
> + Viresh for help.
>
> > -Original Message-
> > From: Daniel Lezcano
> > Sent: 2019年5月10日 15:17
> > To: Andy Tang ; Shawn Guo
> > Cc: Leo Li ; robh...@kernel.org;
> > mark.rutl...@arm.com; linux-arm-ker...@lists.infradead.org;
> > devicet...@vger.ke
Add edma2 for i.mx7ulp by version v3, since v2 has already
been used by mcf-edma.
The big changes based on v1 are belows:
1. only one dmamux.
2. another clock dma_clk except dmamux clk.
3. 16 independent interrupts instead of only one interrupt for
all channels.
Signed-off-by: Robin Gong
More channel interrupts, one more clock, and only one
dmamux on i.mx7ulp-edma.
Signed-off-by: Robin Gong
---
Documentation/devicetree/bindings/dma/fsl-edma.txt | 44 +++---
1 file changed, 39 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/dma/fsl-ed
pt., 10 maj 2019 o 11:58 Colin King napisał(a):
>
> From: Colin Ian King
>
> Pointer dev is being dereferenced when passed to the inlined
> functon dev_name, however, dev is later being null checked
> so at first this seems like a potential null pointer dereference.
>
> In fact, _reset_control_ge
Update to 'dmamux_nr' instead of static macro DMAMUX_NR since
new version edma only has one dmamux.
Signed-off-by: Robin Gong
---
drivers/dma/fsl-edma-common.c | 2 +-
drivers/dma/mcf-edma.c| 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/fsl-edma-common.c
Add edma device node in dts.
Signed-off-by: Robin Gong
---
arch/arm/boot/dts/imx7ulp.dtsi | 28
1 file changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi
index d6b7110..b4f7adf 100644
--- a/arch/arm/boot/dts/imx7ul
Prepare for edmav2 on i.mx7ulp whose dmamux register is 32bit. No function
impacted.
Signed-off-by: Robin Gong
---
drivers/dma/fsl-edma-common.c | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/dma/fsl-edma-common.c b/drivers/dma/fsl-edma-common.c
i
Next version of edma such as edmav2 on i.mx7ulp has only one dmamux.
Add dmamux_nr instead of static macro define 'DMAMUX_NR'. No any
function change here.
Signed-off-by: Robin Gong
---
drivers/dma/fsl-edma-common.h | 1 +
drivers/dma/fsl-edma.c| 11 ++-
2 files changed, 7 inser
This patch set add new version of edma for i.mx7ulp, the main changes
are as belows:
1. only one dmamux.
2. another clock dma_clk except dmamux clk.
3. 16 independent interrupts instead of only one interrupt for
all channels.
For the first change, need modify fsl-edma-common.c and mcf-edm
From: Jan Luebbe
These defines will be used by subsequent patches to add support for the
parity check and error correction functionality in the Aurora L2 cache
controller.
Signed-off-by: Jan Luebbe
Signed-off-by: Chris Packham
---
.../include/asm/hardware/cache-aurora-l2.h| 48 +++
On 09/05/2019 19:41, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.9.175 release.
> There are 28 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses sh
From: Jan Luebbe
Add support for the ECC functionality as found in the DDR RAM and L2
cache controllers on the MV78230/MV78x60 SoCs. This driver has been
tested on the MV78460 (on a custom board with a DDR3 ECC DIMM).
Signed-off-by: Jan Luebbe
[cp use SPDX license]
Signed-off-by: Chris Packham
The aurora cache on the Marvell Armada-XP SoC supports the same tag
parity features as the other l2x0 cache implementations.
Signed-off-by: Chris Packham
[j...@pengutronix.de: use aurora specific define AURORA_ACR_PARITY_EN]
Signed-off-by: Jan Luebbe
---
arch/arm/mm/cache-l2x0.c | 7 +++
1
From: Colin Ian King
In the case where is_enable is false and lo_base_addr is non-zero the
variable ret has not been initialized and is being checked for non-zero
and potentially garbage is being returned. Fix this by not returning
ret but instead returning -EINVAL on the zero lo_base_addr case.
The aurora cache on the Marvell Armada-XP SoC supports ECC protection
for the L2 data arrays. Add a "marvell,ecc-enable" device tree property
which can be used to enable this.
Signed-off-by: Chris Packham
[j...@pengutronix.de: use aurora specific define AURORA_ACR_ECC_EN]
Signed-off-by: Jan Luebb
From: Jan Luebbe
We already have wrappers for x8 and x16, so add the missing x32 one.
Signed-off-by: Jan Luebbe
Reviewed-by: Borislav Petkov
Signed-off-by: Chris Packham
---
drivers/edac/debugfs.c | 11 +++
drivers/edac/edac_module.h | 5 +
2 files changed, 16 insertions(+)
The Reviews/Acks have been given so this should be good to go in via the ARM
tree as planned.
http://lists.infradead.org/pipermail/linux-arm-kernel/2017-August/525561.html
This series adds drivers for the L2 cache and DDR RAM ECC functionality as
found on the MV78230/MV78x60 SoCs. Jan has tested
From: Jan Luebbe
This include file will be used by the AURORA EDAC code.
Signed-off-by: Jan Luebbe
Reviewed-by: Gregory CLEMENT
Signed-off-by: Chris Packham
---
arch/arm/{mm => include/asm/hardware}/cache-aurora-l2.h | 0
arch/arm/mm/cache-l2x0.c| 2 +-
2 file
On 09/05/2019 19:41, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.19.42 release.
> There are 66 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses sh
On 09/05/2019 19:41, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.14.118 release.
> There are 42 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses s
On 09/05/2019 19:41, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 5.0.15 release.
> There are 95 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses sho
On 09/05/2019 19:42, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 5.1.1 release.
> There are 30 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses shou
From: Jan Luebbe
The macro name is too generic, so add a AURORA_ prefix.
Signed-off-by: Jan Luebbe
Reviewed-by: Gregory CLEMENT
Signed-off-by: Chris Packham
---
arch/arm/include/asm/hardware/cache-aurora-l2.h | 2 +-
arch/arm/mm/cache-l2x0.c| 4 ++--
2 files changed,
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