* Waiman Long wrote:
> On 04/11/2019 04:12 AM, Peter Zijlstra wrote:
> > On Wed, Apr 10, 2019 at 02:42:19PM -0400, Waiman Long wrote:
> >> The owner field in the rw_semaphore structure is used primarily for
> >> optimistic spinning. However, identifying the rwsem owner can also be
> >> helpful
On 04/12/19 at 02:55pm, Baoquan He wrote:
> v1->v2:
> Rewrite log of the two patches. No functionality change.
~~ Sorry, I meant no new code change.
>
> ~
> v1 background:
> The fixes for t
On Thu, 11 Apr 2019, Shuah Khan wrote:
> TEST_PROGS variable is for test shell scripts and common clean target
> in lib.mk doesn't touch them. TEST_GEN_PROGS are removed by it.
>
> Fix it to use TEST_PROGS for test shell scripts and TEST_PROGS_EXTENDED
> for common functions.sh.
>
> Signed-off-b
On Fri, Apr 12, 2019 at 09:02:09AM +0200, Ingo Molnar wrote:
>
> * Waiman Long wrote:
>
> > On 04/11/2019 04:12 AM, Peter Zijlstra wrote:
> > > On Wed, Apr 10, 2019 at 02:42:19PM -0400, Waiman Long wrote:
> > >> The owner field in the rw_semaphore structure is used primarily for
> > >> optimisti
* Peter Zijlstra wrote:
> On Fri, Apr 12, 2019 at 09:02:09AM +0200, Ingo Molnar wrote:
> >
> > * Waiman Long wrote:
> >
> > > On 04/11/2019 04:12 AM, Peter Zijlstra wrote:
> > > > On Wed, Apr 10, 2019 at 02:42:19PM -0400, Waiman Long wrote:
> > > >> The owner field in the rw_semaphore struct
On 11.04.19 23:03, Tony Krowiak wrote:
> Once an APQN is assigned to an mdev device it will remained assigned until
> it is explicitly unassigned from the mdev device. The associated AP queue
> devices, however, can come and go due to failures or deliberate actions by
> a sysadmin. For example, a s
ATENCIÓN;
Su buzón ha superado el límite de almacenamiento, que es de 5 GB definidos por
el administrador, quien actualmente está ejecutando en 10.9GB, no puede ser
capaz de enviar o recibir correo nuevo hasta que vuelva a validar su buzón de
correo electrónico. Para revalidar su buzón de corre
On Fri, 12 Apr 2019 at 08:01, Wen Yang wrote:
>
> The call to of_find_compatible_node returns a node pointer with refcount
> incremented thus it must be explicitly decremented after the last
> usage.
>
> Detected by coccinelle with the following warnings:
> ./drivers/pinctrl/samsung/pinctrl-exynos
ATENCIÓN;
Su buzón ha superado el límite de almacenamiento, que es de 5 GB definidos por
el administrador, quien actualmente está ejecutando en 10.9GB, no puede ser
capaz de enviar o recibir correo nuevo hasta que vuelva a validar su buzón de
correo electrónico. Para revalidar su buzón de corre
Hi Stephen,
On 11-04-19 19:28, Stephen Boyd wrote:
It's used by probe and that isn't an init function. Drop this so that we
don't get a section mismatch.
Reported-by: kbuild test robot
Cc: David Müller
Cc: Hans de Goede
Cc: Andy Shevchenko
Fixes: 7c2e07130090 ("clk: x86: Add system specific
On 11.04.19 15:05, Adamski, Krzysztof (Nokia - PL/Wroclaw) wrote:
> There are (embedded) cases where the kernel ring buffer is stored for> log
> inspection and all the logs that are *not* wanted there (like>
interactive debug logs, some progress bar, etc) are send specifically
to> /dev/console to
From: Erin Lo
Add a DT binding documentation of SCP for the
MT8183 SoC from Mediatek.
Signed-off-by: Erin Lo
Signed-off-by: Pi-Hsun Shih
Reviewed-by: Rob Herring
---
Changes from v7:
- No change.
Changes from v6:
- No change.
Changes from v5:
- Remove dependency on CONFIG_RPMSG_MTK_SCP.
From: Erin Lo
Provide a basic driver to control Cortex M4 co-processor
Signed-off-by: Erin Lo
Signed-off-by: Nicolas Boichat
Signed-off-by: Pi-Hsun Shih
---
Changes from v7:
- Moved the location of shared SCP buffer.
- Fix clock enable/disable sequence.
- Add more IPI ID that would be used
Add a simple rpmsg support for mt8183 SCP, that use IPI / IPC directly.
Signed-off-by: Pi-Hsun Shih
---
Changes from v7:
- No change.
Changes from v6:
- Decouple mtk_rpmsg from mtk_scp by putting all necessary informations
(name service IPI id, register/unregister/send functions) into a
Add a DT binding documentation for ChromeOS EC driver over rpmsg.
Signed-off-by: Pi-Hsun Shih
Acked-by: Rob Herring
---
Changes from v7:
- No change.
Changes from v6:
- No change.
Changes from v5:
- New patch.
---
Documentation/devicetree/bindings/mfd/cros-ec.txt | 5 -
1 file changed,
From: Erin Lo
Add memory table mapping API for other driver to lookup
reserved physical and virtual memory
Signed-off-by: Erin Lo
Signed-off-by: Pi-Hsun Shih
---
Changes from v7:
- No change.
Changes from v6:
- No change.
Changes from v5:
- No change.
Changes from v4:
- New patch.
---
Add EC host command support through rpmsg.
Signed-off-by: Pi-Hsun Shih
---
Changes from v7:
- Remove one unnecessary dev_err.
Changes from v6:
- Make data for response aligned to 4 bytes.
Changes from v5:
- Change commit title.
- Add documents for some structs, and fix all warning from
s
System Companion Processor (SCP) is Cortex M4 co-processor on some
MediaTek platform that can run EC-style firmware. Since a SCP and EC
would both exist on a system, and use the cros_ec_dev driver, we need to
differentiate between them for the userspace, or they would both be
registered at /dev/cro
On Fri, Apr 05, 2019 at 01:31:02PM +0200, Vitaly Kuznetsov wrote:
> Maya Nakamura writes:
>
> > @@ -98,18 +99,20 @@ EXPORT_SYMBOL_GPL(hyperv_pcpu_input_arg);
> > u32 hv_max_vp_index;
> > EXPORT_SYMBOL_GPL(hv_max_vp_index);
> >
> > +struct kmem_cache *cachep;
> > +EXPORT_SYMBOL_GPL(cachep);
>
Hi Gustavo,
"Gustavo A. R. Silva" wrote on Thu, 11 Apr
2019 17:20:31 -0500:
> On 4/11/19 5:10 PM, Miquel Raynal wrote:
> > Hi Gustavo,
> >
> > "Gustavo A. R. Silva" wrote on Thu, 11 Apr
> > 2019 13:30:31 -0500:
> >
> >> Hi Miquel,
> >>
> >> On 2/5/19 6:55 AM, Miquel Raynal wrote:
> >> [..]
(Re-sending)
I have observed this problem during reboot stress test on my ARM64
architecture board which is NVIDIA Tegra ARM64 CPU reference board.
The reboot stress test is to restart the system repeatedly for a long
time. The system is set with Kernel log level 8 for logging all kernel
messages
Update the entry to represent the current state of jffs2.
I'll carry fixes via the UBIFS tree, David has the last word
on anything.
New features are not planned.
Signed-off-by: Richard Weinberger
---
MAINTAINERS | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b
Calculate the divisor for the SCR (Serial Clock Rate), avoiding
that the SSP transmission rate can be greater than the device rate.
When the division between the SSP clock and the device rate generates
a reminder, we have to increment by one the divisor.
In this way the resulting SSP clock will ne
On Fri, Apr 12, 2019 at 09:17:28AM +0200, Enrico Weigelt, metux IT consult
wrote:
>On 11.04.19 15:05, Adamski, Krzysztof (Nokia - PL/Wroclaw) wrote:
>
>> There are (embedded) cases where the kernel ring buffer is stored for> log
>> inspection and all the logs that are *not* wanted there (like>
>i
This series fixes a bug and cleanup code about timer driver for
Milbeaut M10V.
Since it is difficult to separate, it is integrated into a series.
Changes from v1:
-Add "Fixes" tag.
Sugaya Taichi (3):
clocksource/drivers/timer-milbeaut: Fix to enable one-shot timer
clocksource/drivers/timer-m
Fix mlb_set_oneshot_state() to enable one-shot timer.
The function should stop and start a timer, but "start" statement was
dropped. Kick the register to start one-shot timer.
Fixes: b58f28f306db ("clocksource/drivers/timer-milbeaut: Introduce timer for
Milbeaut SoCs")
Signed-off-by: Sugaya Taich
Add a shutdown operation to support shutdown timer.
Signed-off-by: Sugaya Taichi
---
drivers/clocksource/timer-milbeaut.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/clocksource/timer-milbeaut.c
b/drivers/clocksource/timer-milbeaut.c
index 9fd5d08..f478061 100644
---
On 4/11/19 5:08 PM, Paul Walmsley wrote:
On Thu, 11 Apr 2019, Atish Patra wrote:
On 4/11/19 2:12 PM, Paul Walmsley wrote:
On Thu, 11 Apr 2019, Christoph Hellwig wrote:
On Thu, Apr 11, 2019 at 01:42:59AM -0700, Paul Walmsley wrote:
Similar to ARM64, add support for building DTB files from DT
Aggregate common register accesses into shared functions for
maintainability.
Signed-off-by: Sugaya Taichi
---
drivers/clocksource/timer-milbeaut.c | 62 +++-
1 file changed, 39 insertions(+), 23 deletions(-)
diff --git a/drivers/clocksource/timer-milbeaut.c
b/d
Hi,
I agree this approach absolutely.
Just I add some comments. Please check it.
On 19. 3. 29. 오전 12:28, Sibi Sankar wrote:
> From: Saravana Kannan
>
> Many CPU architectures have caches that can scale independent of the
> CPUs. Frequency scaling of the caches is necessary to make sure the cach
On Fri, Apr 12, 2019 at 01:47:08AM +0300, Dmitry Osipenko wrote:
> A proper External Memory Controller clock rounding and parent selection
> functionality is required by the EMC drivers. It is not available using
> the generic clock implementation, hence add a custom one. The clock rate
> rounding
> -Original Message-
> From: Daniel Lezcano
> Sent: 2019年4月12日 3:15
> To: Andy Tang ; shawn...@kernel.org
> Cc: Leo Li ; robh...@kernel.org; mark.rutl...@arm.com;
> linux-arm-ker...@lists.infradead.org; devicet...@vger.kernel.org;
> linux-kernel@vger.kernel.org; linux...@vger.kernel.org;
On Thu, Apr 11, 2019 at 1:44 PM Yurii Pavlovskyi
wrote:
> Event codes are expected to be polled from a queue on at least some
> models.
Maybe avoid the word "poll" since it suggests something else (at least to me).
> The fix flushes the old key codes out of the queue on load and after
> receivin
Maya Nakamura writes:
> On Fri, Apr 05, 2019 at 01:31:02PM +0200, Vitaly Kuznetsov wrote:
>> Maya Nakamura writes:
>>
>> > @@ -98,18 +99,20 @@ EXPORT_SYMBOL_GPL(hyperv_pcpu_input_arg);
>> > u32 hv_max_vp_index;
>> > EXPORT_SYMBOL_GPL(hv_max_vp_index);
>> >
>> > +struct kmem_cache *cachep;
>
guest xcr0 could leak into host when MCE happens in guest mode. Because
do_machine_check() could schedule out at a few places.
For example:
kvm_load_guest_xcr0
...
kvm_x86_ops->run(vcpu) {
vmx_vcpu_run
vmx_complete_atomic_exit
kvm_machine_check
do_machine_check
do_me
On Thu, 11 Apr 2019 at 22:44, Rafael J. Wysocki wrote:
>
> On Thu, Apr 11, 2019 at 8:17 PM Ulf Hansson wrote:
> >
> > After some preceding changes, PM domains managed by genpd may contain
> > CPU devices, so idle state residency values should be taken into
> > account during the state selection p
Upon reboot, the Acer TravelMate X514-51T laptop appears to complete the
shutdown process, but then it hangs in BIOS POST with a black screen.
The problem is intermittent - at some points it has appeared related to
Secure Boot settings or different kernel builds, but ultimately we have
not been ab
On Fri, Apr 12, 2019 at 02:02:21AM +0300, Dmitry Osipenko wrote:
> Add Add External Memory Controller node to the device-tree.
>
One 'Add' is enough I think :)
Peter.
> Signed-off-by: Dmitry Osipenko
> ---
> arch/arm/boot/dts/tegra30.dtsi | 11 +++
> drivers/memory/tegra/tegra30-e
On Thu, Apr 11, 2019 at 1:47 PM Yurii Pavlovskyi
wrote:
> * 0x00 - is normal,
> * 0x01 - is obviously turbo by the amount of noise, might be useful to
> avoid CPU frequency throttling on high load,
> * 0x02 - the meaning is unknown at the time as modes are not named
> in the vendor documentation,
On Fri, Apr 12, 2019 at 02:02:21AM +0300, Dmitry Osipenko wrote:
> Add Add External Memory Controller node to the device-tree.
>
> Signed-off-by: Dmitry Osipenko
> ---
..
> diff --git a/drivers/memory/tegra/tegra30-emc.c
> b/drivers/memory/tegra/tegra30-emc.c
> index 38ebdb076ccd..defdb38bde54 1
On 12/04/19 09:55, WANG Chao wrote:
> guest xcr0 could leak into host when MCE happens in guest mode. Because
> do_machine_check() could schedule out at a few places.
>
> For example:
>
> kvm_load_guest_xcr0
> ...
> kvm_x86_ops->run(vcpu) {
> vmx_vcpu_run
> vmx_complete_atomic_exit
>
Hi,
Am Freitag, 12. April 2019, 08:02:20 CEST schrieb Wen Yang:
> The call to of_parse_phandle returns a node pointer with refcount
> incremented thus it must be explicitly decremented after the last
> usage.
>
> Detected by coccinelle with the following warnings:
> ./drivers/pinctrl/pinctrl-rock
Hi Linus,
Please pull from the tag
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git \
acpi-5.1-rc5
with top-most commit c5781ffbbd4f742a58263458145fe7f0ac01d9e0
ACPICA: Namespace: remove address node from global list after method
termination
on top of commit 15ade5d2e777566
Hi all,
Changes since 20190411:
The orangefs tree lost its build failure.
The bpf-next tree gained a conflict against the jc_docs tree.
The netfilter-next tree gained a build failure for which I applied a patch.
The drm tree still had its build failure for which I disabled a driver.
The drm-m
On Fri, Apr 12, 2019 at 08:36:34AM +0800, Zhao, Yakui wrote:
> So we will leverage the X86_FEATURE_X2APIC bit from CPUID to indicate
> whether the x2apic is supported in linux guest when ACRN hypervisor is
> detected.
> Is this fine to you?
Yes, put that more precise info in the comment pls.
Thx.
hi martin,
On 4/11/19 11:38 PM, Martin Blumenstingl wrote:
> Hi Guillaume,
>
> On Thu, Apr 11, 2019 at 10:46 AM Guillaume La Roque
> wrote:
>> Add TS clock used by two temperature sensor
> thank you for working on this!
>
>> Signed-off-by: Guillaume La Roque
>> ---
>> drivers/clk/meson/g12a.c
On Fri, Apr 12, 2019 at 05:02:10PM +1200, Chris Packham wrote:
> Unfortunately recent changes have stopped my hacks from working. I've
> tried adapting cs-gpios to work with my particular hardware but I came
> to the realisation that the current cs-gpios support assumes a 1:1
> mapping of gpio to
Linus,
please pull sound fixes for v5.1-rc5 from:
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
tags/sound-5.1-rc5
The topmost commit is 9b0dcd0e5a27958b57e3e390f63c098d63a055da
sound fixes for 5.1-rc5
Well, t
On Fri, Apr 12, 2019 at 09:00:10AM +0800, Zhao, Yakui wrote:
> This is not a problem.
> I take a look at the header file of mshyperv.h and xen/events.h.
> It seems that they have no such extra conditional definition.
> To follow the same style, I will remove it.
Yes, the less ifdeffery the better.
The Amlogic G12A SoC embeds a second CEC controller with a totally
different design.
The two controller can work in the same time since the CEC line can
be set to two different pins on the two controllers.
This second CEC controller is documented as "AO-CEC-B", thus the
registers will be named "C
On Thu, Apr 11, 2019 at 07:58:33PM +, Sowjanya Komatineni wrote:
> > On Thu, Apr 04, 2019 at 05:14:10PM -0700, Sowjanya Komatineni wrote:
> > > Some SPI Master controllers support configuring Least significant byte
> > > first or Most significant byte first order for transfers. Also some
> >
On Thu 11-04-19 07:51:48, Dan Williams wrote:
> On Tue, Apr 9, 2019 at 9:09 PM Pankaj Gupta wrote:
> > + } else {
> > + if (nd_region->flush(nd_region))
> > + rc = -EIO;
>
> Given the common case wants to be fast and synchronous I think we
> should try to
On 10/04/2019 21:43:36+0800, Yue Haibing wrote:
> From: YueHaibing
>
> Fix sparse warning:
>
> drivers/rtc/rtc-sirfsoc.c:282:28: warning:
> symbol 'sysrtc_regmap_config' was not declared. Should it be static?
>
> Reported-by: Hulk Robot
> Signed-off-by: YueHaibing
> ---
> drivers/rtc/rtc-si
From: Colin Ian King
The error return path via label rel_resource checks for a non-null
skb before free'ing it. However, skb is always null at this exit
path, so the null check and the free are redundant and can be removed.
Removing this allows the original goto's to rel_resource to be cleaned
u
On 11/04/2019 02:19:48+, Anson Huang wrote:
> With calling dev_pm_set_wake_irq() to set MXC_V2 RTC as wakeup source
> for suspend, generic wake irq mechanism will automatically enable
> it as wakeup source when suspend, then the suspend/resume callback
> which are ONLY for enabling/disabling ir
On 11/04/2019 02:06:04+, Anson Huang wrote:
> With calling dev_pm_set_wake_irq() to set MXC RTC as wakeup source
> for suspend, generic wake irq mechanism will automatically enable
> it as wakeup source when suspend, then the suspend/resume callback
> which are ONLY for enabling/disabling irq w
From: Hou Zhiqiang
This patch corrects the returned error number by convention,
and removes an unnecessary error check.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V5:
- Corrected and retouched the subject and changelog.
drivers/pci/controll
From: Hou Zhiqiang
It's confused that R/W some registers by csr_readl()/csr_writel(),
while others by read_paged_register()/write_paged_register().
Actually the lower 3KB of 4KB PCIe configure space can be accessed
directly and higher 1KB is paging area. So this patch unifies the
register accesso
From: Hou Zhiqiang
It should get PCI base address from the 'ranges' property of DT node
to setup MEM/IO outbound windows instead of always using zero.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-
From: Hou Zhiqiang
Just format the code without functionality change.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
---
V5:
- Retouched the subject.
drivers/pci/controller/pcie-mobiveil.c | 261 +
1 file changed, 137 insertions(+), 124 deletions(-)
diff --g
From: Hou Zhiqiang
The current code does not support multiple MSIs, so remove
the corresponding flag from the msi_domain_info structure.
Fixes: 1e913e58335f ("PCI: mobiveil: Add MSI support")
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
---
V5:
- Corrected the subject.
drivers/pci
From: Hou Zhiqiang
As it won't delete any node during this iteration, replace
the function resource_list_for_each_entry_safe() with the
resource_list_for_each_entry().
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V5:
- Corrected and retouched t
From: Hou Zhiqiang
This patch set is to add fixes for Mobiveil PCIe Host driver.
And these patches are splited from the thread below:
http://patchwork.ozlabs.org/project/linux-pci/list/?series=96417
Hou Zhiqiang (20):
PCI: mobiveil: Unify register accessors
PCI: mobiveil: Format the code wit
From: Hou Zhiqiang
Outbound window routine:
- Remove unused var definitions and register read operations.
- Add the upper 32-bit cpu address setup of the window.
- Instead of blindly write, only change the fields specified.
- Mask the lower bits of window size in case override the
control
From: Hou Zhiqiang
In the loop block, there is not code to update the loop key,
this patch updates the loop key by re-read the INTx status
register.
This patch also add the clearing of the handled INTx status.
Note: Need MV to test this fix.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PC
From: Hou Zhiqiang
The host initialize sequence does not depend on PCIe link up,
so move it to the place just before the enumeration.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V5:
- Corrected and retouched the subject and changelog.
driver
From: Hou Zhiqiang
Allow CFG transactions to all functions of Endpoint implemented
multiple functions.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
---
V5:
- Corrected and retouched the subject and change
From: Hou Zhiqiang
Move irq_set_chained_handler_and_data() out of DT parse function.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V5:
- Corrected the subject.
drivers/pci/controller/pcie-mobiveil.c | 4 ++--
1 file changed, 2 insertions(+), 2
From: Hou Zhiqiang
Only fix up the Class Code field to PCI bridge, do not change the
Revision ID. And this patch also move the Class Code fixup to
function mobiveil_host_init().
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: Hou Zhiqiang
Reviewed-b
From: Hou Zhiqiang
The reset value of Primary, Secondary and Subordinate bus numbers is
zero, so set a workable value for these 3 bus numbers.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V5:
- Corrected and retouched the subject and changelog.
From: Hou Zhiqiang
The inbound windows have independent register set against outbound windows.
This patch change the MEM inbound window to the first one.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V5:
- Corrected and retouched the subject and
From: Hou Zhiqiang
As the .map_bus() use the WIN_NUM_0 for CFG transactions,
it's better passing WIN_NUM_0 explicitly when initialize
the CFG outbound window.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V5:
- Corrected the subject.
drivers/p
From: Hou Zhiqiang
Disable all inbound and outbound windows before set up the windows
in kernel, in case transactions match the window set by bootloader.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V5:
- No functionality change.
drivers/pci/
This patch series add support of Clock for temperature sensor
on Amlogic G12a SoC.
Guillaume
changes since v1:
- fix .width value
Guillaume La Roque (2):
dt-bindings: clk: g12a-clkc: add Temperature Sensor clock ID
clk: meson-g12a: Add Temperature Sensor clock
drivers/clk/meson/g12a.c
Add TS clock used by two temperature sensor
Signed-off-by: Guillaume La Roque
---
drivers/clk/meson/g12a.c | 31 +++
drivers/clk/meson/g12a.h | 3 ++-
2 files changed, 33 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c
i
Add clock id used by temperature sensor for G12A Socs
Signed-off-by: Guillaume La Roque
---
include/dt-bindings/clock/g12a-clkc.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/clock/g12a-clkc.h
b/include/dt-bindings/clock/g12a-clkc.h
index 30303728fe09..85cfcab10507 10
From: Hou Zhiqiang
Avoid to issue CFG transactions to link partner when the PCIe
link is not up.
Signed-off-by: Hou Zhiqiang
---
V5:
- Corrected the subject.
drivers/pci/controller/pcie-mobiveil.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/pci/controller/pcie-mobiveil.c
From: Hou Zhiqiang
There are some 8-bit and 16-bit registers in PCIe
configuration space, so add accessors for them.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V5:
- Corrected and retouched the subject and changelog.
- No functionality chang
From: Hou Zhiqiang
Sometimes there is not a PCIe Endpoint stalled in the slot,
so do not exit when the PCIe link is not up. And degrade the
print level of link up info.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V5:
- Corrected and retouched
From: Hou Zhiqiang
Change the "gpio_slave" and "apb_csr" to optional, the "gpio_slave"
is not used in current code, and "apb_csr" is not used by some platforms.
Signed-off-by: Hou Zhiqiang
Acked-by: Subrahmanya Lingappa
Acked-by: Rob Herring
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmany
On Thu, 11 Apr 2019 21:28:13 +0200,
Pierre-Louis Bossart wrote:
>
> The mechanism should be
>
> config CODEC_XYX_SDW
>depends on SOUNDWIRE
>select REGMAP_SOUNDWIRE
>
> config REGMAP_SOUNDWIRE
>depends on SOUNDWIRE
>select SOUNDWIRE_BUS
To be noted, in general you
On Fri, Apr 12, 2019 at 04:36:34PM -0400, Wang Hai wrote:
> +error_register:
> + device_del(dev);
> +error_device_add:
> + kfree_const(dev->kobj.name);
> return error;
When put_device() will be called on this it will go to double free (in case of
dynamically allocated dev->kobj.name
On Thu, Apr 11, 2019 at 11:39:46AM -0700, Guenter Roeck wrote:
> On Fri, Apr 05, 2019 at 08:32:10PM +0300, Yury Norov wrote:
> > Add tests for non-number character, empty regions, integer overflow.
> > {0, "1-31:4/4", &exp[9 * step], 32, 0},
> > {0, "0-31:1/4,32-63:2/4",
On 12/04/2019 02:32:54+, Anson Huang wrote:
> > > As i.MX SCU general irq function is picked up by Shawn, could you
> > > please also pick up below i.MX SC RTC alarm support patch ?
> > > https://patchwork.kernel.org/patch/10890525/
> > >
> >
> > No, it can't go through Alexandre's tree du
On 09/04/2019 05:00:07+, Anson Huang wrote:
> Add i.MX system controller RTC alarm support, the RTC alarm
> is implemented via SIP(silicon provider) runtime service call
> and ARM-Trusted-Firmware will communicate with system controller
> via MU(message unit) IPC to set RTC alarm. When RTC alar
On 12/04/2019 07:24, Lokesh Vutla wrote:
On 11/04/19 8:30 PM, Tony Lindgren wrote:
Hi,
* Lokesh Vutla [190410 04:15]:
+Example:
+
+The following example demonstrates both interrupt router node and the consumer
+node(main gpio) on the AM654 SoC:
+
+main_intr: interrupt-controller0 {
On Fri, Apr 12, 2019 at 10:38:19AM +0200, Takashi Iwai wrote:
> Pierre-Louis Bossart wrote:
> > config REGMAP_SOUNDWIRE
> >depends on SOUNDWIRE
> >select SOUNDWIRE_BUS
> To be noted, in general you can't do put both depends-on and select.
> The select always wins. So the depends-
On Thu 11-04-19 11:56:50, Yang Shi wrote:
[...]
> Design
> ==
> Basically, the approach is aimed to spread data from DRAM (closest to local
> CPU) down further to PMEM and disk (typically assume the lower tier storage
> is slower, larger and cheaper than the upper tier) by their hotness. The
>
On Wed, Apr 10, 2019 at 5:26 PM Heikki Krogerus
wrote:
>
> This makes it possible to support drivers that use
> fwnode_property_get_reference_args() function.
>
> Signed-off-by: Heikki Krogerus
> ---
> drivers/base/swnode.c | 56 +++
> 1 file changed, 56 i
Hi all,
On Fri, Apr 12, 2019 at 10:21:38AM +0900, Masahiro Yamada wrote:
> On Fri, Apr 12, 2019 at 3:20 AM Nick Desaulniers
> wrote:
> > On Thu, Apr 11, 2019 at 2:30 AM Masahiro Yamada
> > wrote:
> > >
> > > We use $(LD) to link vmlinux, modules, decompressors, etc.
> > >
> > > VDSO is the only
Hi Maciej,
Yes, I know, I have been ignoring this patch series for too long, mostly because
reviewing this is time consuming and because it is so easy to break existing
functionality.
But I finally have some time to do a review and I do think it is close to being
ready for merging.
Some comments
Hi Lorenzo,
On 11/04/19 8:33 PM, Lorenzo Pieralisi wrote:
> On Mon, Mar 25, 2019 at 03:09:33PM +0530, Kishon Vijay Abraham I wrote:
>> hook_fault_code is an ARM32 specific API for hooking into data abort.
>> Since pci-keystone.c will be used for AM65X platforms which is an
>> ARM64 platform,
>
>
The patch
spi: pxa2xx: use a module softdep for dw_dmac
has been applied to the spi tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-5.2
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sen
The patch
regulator: dbx500-prcmu: Remove unused fields from struct
dbx500_regulator_info
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git for-5.2
All being well this means that it will be integrated into the linux-next
tree
The patch
regulator: db8500-prcmu: Convert to use simplified DT parsing
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git for-5.2
All being well this means that it will be integrated into the linux-next
tree (usually sometime i
The patch
regulator: db8500-prcmu: Constify regulator_ops
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git for-5.2
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24
Hi Wen
On 4/12/19 8:02 AM, Wen Yang wrote:
> The call to of_get_child_by_name returns a node pointer with refcount
> incremented thus it must be explicitly decremented after the last
> usage.
>
> Detected by coccinelle with the following warnings:
> ./drivers/pinctrl/pinctrl-st.c:1188:3-9: ERROR:
Many times we use 8 for SAS address length, while we already have a macro
for this - SAS_ADDR_SIZE.
Replace instances of this with the macro. However, don't touch the
SAS address array sizes sas.h, as these are defined according to the
SAS spec.
Some missing whitespaces are also added, and whites
Currently we print expander PHY indexes in a mix of decimal and hex.
It is more consistent and also more convenient to read decimal, so
make this change.
We use width of 2 for expander and 1 for root PHYs prints.
Some lines which were needlessly spilling multiple lines are unified.
Signed-off-b
When we discover the PHY is empty in sas_rediscover_dev(), the PHY
information (like negotiated linkrate) is not updated.
As such, for a user examining sysfs for that PHY, they would see
incorrect values:
root@(none)$ cd /sys/class/sas_phy/phy-0:0:20
root@(none)$ more negotiated_linkrate
3.0 Gbit
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