Hi Linus,
Thanks for the reply! It's amusing that you're the only one (well,
besides the gentleman who sits a few feet from me and kindly provided
his Reviewed-by) to review my patch.
On Tue, Apr 9, 2019 at 7:20 PM Linus Torvalds
wrote:
> On Tue, Apr 9, 2019 at 8:49 AM Brian Norris wrote:
> > B
On 2019/4/10 0:30, Vignesh Raghavendra wrote:
> On 08/04/19 8:09 PM, Yue Haibing wrote:
>> From: YueHaibing
>>
>> When building with CONFIG_SPI_MEM is not set
>> gc warns this:
>>
>> drivers/spi/spi-zynq-qspi.o: In function `zynq_qspi_supports_op':
>> spi-zynq-qspi.c:(.text+0x1da): undefined refer
On Tue, Apr 09, 2019 at 10:43:18AM -0700, Ard Biesheuvel wrote:
> On Tue, 9 Apr 2019 at 06:53, Raphael Gault wrote:
> >
> > Hi,
> >
> > As of now, objtool only supports the x86_64 architecture but the
> > groundwork has already been done in order to add support for other
> > architecture without t
On Tue, Apr 9, 2019 at 10:48 PM Steven Rostedt wrote:
>
> On Tue, 9 Apr 2019 22:41:03 -0400
> Joel Fernandes wrote:
>
> > > Other than that, the two patches look fine to me.
> >
> > Could I add your Reviewed-by in the respin?
>
> You can add an Acked-by, as I haven't spent enough time to offer a
On 2019/4/10 10:36, Li, Aubrey wrote:
> On 2019/4/10 10:25, Andy Lutomirski wrote:
>> On Tue, Apr 9, 2019 at 7:20 PM Li, Aubrey wrote:
>>>
>>> On 2019/4/10 9:58, Andy Lutomirski wrote:
On Tue, Apr 9, 2019 at 6:55 PM Aubrey Li wrote:
>
> The architecture specific information of the ru
On Tue, Apr 9, 2019 at 5:26 PM Brian Norris wrote:
>
> So, I think the problem is still potentially present no matter when we
> request the IRQ. The "uninitialized" state of the hardware (or,
> firmware) just exposes the issue extremely clearly.
Well, I think that as long as you don't request the
On 09-04-19, 17:37, Georgi Djakov wrote:
> Hi Viresh,
>
> On 3/14/19 08:30, Viresh Kumar wrote:
> > On 13-03-19, 11:00, Georgi Djakov wrote:
> >> The OPP bindings now support bandwidth values, so add support to parse it
> >> from device tree and store it into the new dev_pm_opp_icc_bw struct, whic
On Tue, 2019-04-09 at 21:33 -0400, Martin K. Petersen wrote:
> Stephen,
>
> > > I have reverted that commit for today.
> >
> > This has now migrated to the scsi tree.
>
> I have a fix in my tree but I haven't pushed it yet.
It's upstream in both trees now.
James
On 09-04-19, 17:36, Georgi Djakov wrote:
> Hi Viresh,
>
> On 3/14/19 08:23, Viresh Kumar wrote:
> > On 13-03-19, 11:00, Georgi Djakov wrote:
> >> In addition to frequency and voltage, some devices may have bandwidth
> >> requirements for their interconnect throughput - for example a CPU
> >> or GP
On Tue, Apr 9, 2019 at 10:17 PM Palmer Dabbelt wrote:
>
> On Tue, 12 Mar 2019 15:08:16 PDT (-0700), Anup Patel wrote:
> > The setup_vm() must access kernel symbols in a position independent way
> > because it will be called from head.S with MMU off.
> >
> > If we compile kernel with cmodel=medany
Dont support 'MAP_SYNC' with non-DAX files and DAX files
with asynchronous dax_device. Virtio pmem provides
asynchronous host page cache flush mechanism. We don't
support 'MAP_SYNC' with virtio pmem and ext4.
Signed-off-by: Pankaj Gupta
---
fs/ext4/file.c | 11 ++-
1 file changed, 6 ins
This patch introduces 'daxdev_mapping_supported' helper
which checks if 'MAP_SYNC' is supported with filesystem
mapping. It also checks if corresponding dax_device is
synchronous. Virtio pmem device is asynchronous and
does not not support VM_SYNC.
Suggested-by: Jan Kara
Signed-off-by: Pankaj Gu
TISCI provides support for getting the resources(IRQ, RING etc..)
assigned to a specific device. These resources can be handled by
the client and in turn sends TISCI cmd to configure the resources.
It is very important that client should keep track on usage of these
resources.
Add support for TIS
TI AM65x SoC based on K3 architecture introduced support for Events
which are message based interrupts with minimal latency. These events
are not compatible with regular interrupts and are valid only through
an event transport lane. An Interrupt Aggregator(INTA) is introduced
to convert these event
From: Peter Ujfalusi
Add the resource mapping table for AM654 SoC as defined in
http://downloads.ti.com/tisci/esd/latest/5_soc_doc/am6x/resasg_types.html
Introduce a new compatible for AM654 "ti,am654-sci" for using
this resource map table.
Reviewed-by: Rob Herring
Signed-off-by: Peter Ujfalusi
TISCI abstracts the handling of IRQ routes where interrupt sources
are not directly connected to host interrupt controller. Add support
for the set of TISCI commands for requesting and releasing IRQs.
Signed-off-by: Lokesh Vutla
---
Changes since v5:
- None
drivers/firmware/ti_sci.c
Each resource with in the device can be uniquely identified as defined
by TISCI. Since this is generic across the devices, resource allocation
also can be made generic instead of each client driver handling the
resource. So add helper apis to manage the resource.
Signed-off-by: Lokesh Vutla
---
C
From: Grygorii Strashko
TISCI has been updated to have support for Resource management(likes
interrupts etc..). And there can be multiple device instances of a
resource type in a SoC. So every driver corresponding to a resource type
should get a TISCI handle so that it can make TISCI calls. And e
Add the DT binding documentation for Interrupt router driver.
Signed-off-by: Lokesh Vutla
---
Changes since v5:
- Introduced a new property for specifying router trigger type.
- Dropped the trigger type from interrupt cells property.
Marc,
Firmware change to not differentiate INTA interr
Texas Instruments' K3 generation SoCs has an IP Interrupt Router
that does allows for redirection of input interrupts to host
interrupt controller. Interrupt Router inputs are either from a
peripheral or from an Interrupt Aggregator which is another
interrupt controller.
Configuration of the inter
Add the DT binding documentation for Interrupt Aggregator driver.
Signed-off-by: Lokesh Vutla
---
Changes since v5:
- Dropped interrupt-cells property
- Added msi controller property
.../interrupt-controller/ti,sci-inta.txt | 66 +++
MAINTAINERS
Add a msi domain that is child to the INTA domain. Clients
uses the INTA msi bus layer to allocate irqs in this
msi domain.
Signed-off-by: Lokesh Vutla
---
Changes since v5:
- New patch. Seperated out msi domain part from the intial patch.
Marc,
I feel this is too simple to be a separate
Texas Instruments' K3 generation SoCs has an IP Interrupt Aggregator
which is an interrupt controller that does the following:
- Converts events to interrupts that can be understood by
an interrupt router.
- Allows for multiplexing of events to interrupts.
Configuration of the interrupt aggregat
Select the TISCI Interrupt Router, Aggregator drivers and all its
dependencies for AM6 SoC.
Suggested-by: Marc Zyngier
Signed-off-by: Lokesh Vutla
---
Changes since v5:
- None
drivers/soc/ti/Kconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/soc/ti/Kconfig b/drivers/soc/t
With the system coprocessor managing the range allocation of the
inputs to Interrupt Aggregator, it is difficult to represent
the device IRQs from DT.
The suggestion is to use MSI in such cases where devices wants
to allocate and group interrupts dynamically.
Create a MSI domain bus layer that al
- On Apr 9, 2019, at 9:57 PM, Andy Lutomirski l...@kernel.org wrote:
> On Tue, Apr 9, 2019 at 5:51 PM Zack Weinberg wrote:
>>
>> On Tue, Apr 9, 2019 at 4:43 PM Mathieu Desnoyers
>> wrote:
>> > - On Apr 9, 2019, at 3:32 PM, Mathieu Desnoyers
>> > mathieu.desnoy...@efficios.com wrote:
>> >
- On Apr 9, 2019, at 11:38 PM, Joel Fernandes joe...@google.com wrote:
> On Tue, Apr 9, 2019 at 10:48 PM Steven Rostedt wrote:
>>
>> On Tue, 9 Apr 2019 22:41:03 -0400
>> Joel Fernandes wrote:
>>
>> > > Other than that, the two patches look fine to me.
>> >
>> > Could I add your Reviewed-by i
On Tue, Apr 09, 2019 at 11:09:45AM -0700, Tim Chen wrote:
> Now that we have accumulated quite a number of different fixes to your orginal
> posted patches. Would you like to post a v2 of the core scheduler with the
> fixes?
One more question I'm not sure: should a task with cookie=0, i.e. tasks
This patch changes the email for Andy Gross to agr...@kernel.org.
Signed-off-by: Andy Gross
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index e17ebf7..cf39fb06 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1984,7 +1984,7 @@ W:
Hi all,
On Wed, 10 Apr 2019 06:04:19 +0200 James Bottomley
wrote:
>
> On Tue, 2019-04-09 at 21:33 -0400, Martin K. Petersen wrote:
> >
> > > > I have reverted that commit for today.
> > >
> > > This has now migrated to the scsi tree.
> >
> > I have a fix in my tree but I haven't pushed
When setting output power level called, the power level should be
checked by power amplifier level register and high power option. There
was todo about it. Add some variables for checking power level range.
The values that used for checking high power or minimum power are from
rf69 datasheets. The
Hi Vignesh,
> -Original Message-
> From: linux-spi-ow...@vger.kernel.org On
> Behalf Of
> YueHaibing
> Sent: Wednesday, April 10, 2019 9:03 AM
> To: Vignesh Raghavendra ; broo...@kernel.org; Naga
> Sureshkumar Relli
>
> Cc: linux-kernel@vger.kernel.org; linux-...@vger.kernel.org
> Subj
On 15-03-19, 17:17, Leonard Crestez wrote:
> On 3/15/19 11:31 AM, Alexandre Bailon wrote:
> >>> This series is sent as RFC mostly because the current support of i.MX SoC
> >>> won't
> >>> benefit of busfreq framework, because the clocks' driver don't support
> >>> interconnect / dram frequency sca
Hi Vignesh,
> -Original Message-
> From: linux-spi-ow...@vger.kernel.org On
> Behalf Of
> Naga Sureshkumar Relli
> Sent: Wednesday, April 10, 2019 10:53 AM
> To: YueHaibing ; Vignesh Raghavendra ;
> broo...@kernel.org
> Cc: linux-kernel@vger.kernel.org; linux-...@vger.kernel.org
> Subjec
On 28-03-19, 10:13, Quentin Perret wrote:
> +static unsigned int get_state_freq(struct cpufreq_cooling_device
> *cpufreq_cdev,
> + unsigned long state)
> +{
> + struct cpufreq_policy *policy;
> + unsigned long idx;
> +
> + /* Use the Energy Model table if avai
When building with CONFIG_SPI_MEM is not set
gc warns this:
drivers/spi/spi-zynq-qspi.o: In function `zynq_qspi_supports_op':
spi-zynq-qspi.c:(.text+0x1da): undefined reference to
`spi_mem_default_supports_op'
Fixes: 67dca5e580f1 ("spi: spi-mem: Add support for Zynq QSPI controller")
Signed-off
Hi Randy,
I have sent the patch on top of the patch sent by yuehaib...@huawei.com.
Thanks,
Naga Sureshkumar Relli
> -Original Message-
> From: Randy Dunlap
> Sent: Tuesday, April 9, 2019 8:52 PM
> To: Stephen Rothwell ; Linux Next Mailing List n...@vger.kernel.org>
> Cc: Linux Kernel M
syzbot has found a reproducer for the following crash on:
HEAD commit:cfd24a53 Add linux-next specific files for 20190409
git tree: linux-next
console output: https://syzkaller.appspot.com/x/log.txt?x=111d56af20
kernel config: https://syzkaller.appspot.com/x/.config?x
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as
system controller, the system controller is in charge of system
power, clock and thermal sensors etc. management, Linux kernel
has to communicate with system controller via MU (message unit)
IPC to get temperature from thermal sensors, th
This patch enables CONFIG_IMX_SC_THERMAL as module.
Signed-off-by: Anson Huang
---
No changes.
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 9e313f5..d4c404a 100644
--- a/arch/arm64/configs/d
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
inside, the system controller is in charge of controlling power,
clock and thermal sensors etc..
This patch adds i.MX system controller thermal driver support,
Linux kernel has to communicate with system controller via MU
(message un
Add i.MX8QXP CPU thermal zone support.
Signed-off-by: Anson Huang
---
Changes since V10:
- remove property "imx,sensor-resource-id" and put HW resource ID
inside each
thermal-sensors' phandle argument.
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 33 +++
Hi, Rui/Eduardo
I just sent out a V11 patch series following Rob's suggestion, please
help review it.
So if the HW resource ID can be as phandle's argument, then go with V11
patch series, if it MUST
be virtual ID starting from 0-N, then pick V10 patch series.
Thanks for yo
From: Christopher Lameter
Sent: 09 April 2019 21:31
To: Pankaj Suryawanshi
Cc: linux-kernel@vger.kernel.org; linux...@kvack.org
Subject: [External] Re: Basics : Memory Configuration
On Tue, 9 Apr 2019, Pankaj Suryawanshi wrote:
> I am confuse about me
On Tue, Apr 9, 2019 at 10:14 PM Palmer Dabbelt wrote:
>
> On Tue, 12 Mar 2019 15:08:12 PDT (-0700), Anup Patel wrote:
> > This patch adds rv32_defconfig for 32bit systems. The only
> > difference between rv32_defconfig and defconfig is that
> > rv32_defconfig has CONFIG_ARCH_RV32I=y.
>
> Thanks.
On 4/9/2019 6:56 PM, Bjorn Helgaas wrote:
On Tue, Apr 09, 2019 at 05:00:53PM +0530, Vidya Sagar wrote:
On 4/6/2019 12:28 AM, Bjorn Helgaas wrote:
On Fri, Apr 05, 2019 at 01:23:51AM +0530, Vidya Sagar wrote:
On 4/3/2019 11:06 PM, Bjorn Helgaas wrote:
On Wed, Apr 03, 2019 at 03:13:09PM +0530, V
Use devm_clk_get_optional() to get optional clock
Cc: Martin Blumenstingl
Signed-off-by: Chunfeng Yun
Acked-by: Martin Blumenstingl
---
v2: add Acked-by Martin Blumenstingl
---
drivers/phy/amlogic/phy-meson-gxl-usb2.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --gi
Use devm_clk_get_optional() to get optional clock
Cc: Andy Gross
Cc: David Brown
Cc: Vivek Gautam
Signed-off-by: Chunfeng Yun
---
v2: no changes
---
drivers/phy/qualcomm/phy-qcom-qusb2.c | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-q
Use devm_clk_get_optional() to get optional clock
Signed-off-by: Chunfeng Yun
---
v2: no changes
---
drivers/phy/mediatek/phy-mtk-tphy.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/phy/mediatek/phy-mtk-tphy.c
b/drivers/phy/mediatek/phy-mtk-tphy.c
index
Use devm_clk_get_optional() to get optional clock
Cc: Kunihiko Hayashi
Signed-off-by: Chunfeng Yun
Reviewed-by: Kunihiko Hayashi
---
v2: add Reviewed-by Kunihiko Hayashi
---
drivers/phy/socionext/phy-uniphier-usb3hs.c | 10 +++---
drivers/phy/socionext/phy-uniphier-usb3ss.c | 10 +++---
From: Mao Han
In trace events as tracepoints context are not able to
be retrieve with task_pt_regs. Without arch caller regs
support the pt_regs context will be all zero, perf can
not parsing the callchain and resolving the symbols
correctly, some time will even get into deadlock
while handling t
From: Guo Ren
In our stress test, we found some crash problem caused by:
if (!(vma->vm_flags & VM_EXEC))
return;
in update_mmu_cache().
Seems current update_mmu_cache implementation is wrong and we retread
to the conservative implementation.
Also the usage of kmap_atomic in update_mmu
hi,
在 2019/4/10 上午4:47, Douglas Anderson 写道:
This reverts commit 55bb6a633c33caf68ab470907ecf945289cb733d.
The clocks that were enabled by that patch are pretty questionable.
Specifically looking at what has been shipping on rk3288-veyron
Chromebooks almost all of these clocks are safely turned
On Tue, 9 Apr 2019, Ondrej Mosnacek wrote:
> diff --git a/include/linux/audit.h b/include/linux/audit.h
> index 2c62c046..1c372ad7ebe9 100644
> --- a/include/linux/audit.h
> +++ b/include/linux/audit.h
> @@ -86,6 +86,26 @@ struct audit_field {
> u32 op;
> };
>
On 29-03-19, 14:46, Andrew-sh.Cheng wrote:
> This API will get voltage as input parameter.
> Search all opp items for the item which with max frequency,
> and the voltae is smaller than provided voltage.
>
> Signed-off-by: Andrew-sh.Cheng
> ---
> drivers/opp/core.c | 55
> ++
Hi all,
Changes since 20190409:
The printk tree gained conflicts against Linus' tree.
The drm tree still had its build failure for which I disabled a driver.
The drm-misc tree still had its build failure for which I marked a driver
as BROKEN.
The scsi tree inherited a build failure for
On Tue, Apr 9, 2019 at 6:40 PM Andy Shevchenko
wrote:
>
> On Mon, Apr 08, 2019 at 01:01:51PM +0100, Jonathan Cameron wrote:
> > On Mon, 8 Apr 2019 13:34:37 +0300
> > Andy Shevchenko wrote:
> > > On Mon, Apr 08, 2019 at 11:14:39AM +0100, Jonathan Cameron wrote:
> > > > On Mon, 8 Apr 2019 13:01:21
On 09. 04. 19 19:23, Guenter Roeck wrote:
> Use device managed functions to simplify error handling, reduce
> source code size, improve readability, and reduce the likelyhood of bugs.
> Other improvements as listed below.
>
> The conversion was done automatically with coccinelle using the
> follow
hi,
在 2019/4/10 上午4:47, Douglas Anderson 写道:
Most rk3288-based boards are derived from the EVB and thus use a PWM
regulator for the logic rail. However, most rk3288-based boards don't
specify the PWM regulator in their device tree. We'll deal with that
by making it critical.
NOTE: it's import
On Tue, Apr 09, 2019 at 11:16:17AM -0500, Madhumitha Prabakaran wrote:
> diff --git a/drivers/staging/rtl8723bs/include/drv_types.h
> b/drivers/staging/rtl8723bs/include/drv_types.h
> index bafb2c30e7fb..b0623c936940 100644
> --- a/drivers/staging/rtl8723bs/include/drv_types.h
> +++ b/drivers/stag
Looks good,
Reviewed-by: Christoph Hellwig
Looks good,
Reviewed-by: Christoph Hellwig
On Tue, Apr 09, 2019 at 04:43:42PM -0400, Mathieu Desnoyers wrote:
> +/*
> + * RSEQ_SIG is used with the following privileged instructions, which trap
> in user-space:
> + * x86-32:0f 01 3d 53 30 05 53 invlpg 0x53053053
> + * x86-64:0f 01 3d 53 30 05 53 invlpg 0x53053053(%rip)
>
Use devm_clk_get_optional() to get optional clock
Cc: Ryder Lee
Cc: Honghui Zhang
Signed-off-by: Chunfeng Yun
Acked-by: Ryder Lee
Acked-by: Honghui Zhang
---
v3: add Acked-by Ryder and Honghui
---
drivers/pci/controller/pcie-mediatek.c | 50 --
1 file changed, 15 inse
On Thu, Apr 04, 2019 at 01:51:25AM -0400, Alexandre Ghiti wrote:
> - fix the case where stack randomization should not be taken into
> account.
Hmm. This sounds a bit vague. It might be better if something
considered a fix is split out to a separate patch with a good
description.
> +config AR
On Wed, Apr 10, 2019 at 01:17:19PM +1000, Alastair D'Silva wrote:
> @@ -107,7 +108,7 @@ EXPORT_SYMBOL(bin2hex);
> * string if enough space had been available.
> */
> int hex_dump_to_buffer(const void *buf, size_t len, int rowsize, int
> groupsize,
> -char *linebuf, size_t
Looks good,
Reviewed-by: Christoph Hellwig
501 - 567 of 567 matches
Mail list logo
