Rename some traceevent APIs for consistency:
tep_pid_is_registered() to tep_is_pid_registered()
tep_file_bigendian() to tep_is_file_bigendian()
to make the names and return values consistent with other tep_is_... APIs
tep_data_lat_fmt() to tep_data_latency_format()
to make the name more descr
On Tue, Mar 26, 2019 at 11:41:05AM +, Ghannam, Yazen wrote:
> They don't apply cleanly to v4.14 anymore because of the recent header change.
>
> I figured they would need to be fixed up and submitted separately to older
> stable
> versions. Is that okay?
Ah yes, right.
Thx.
--
Regards/Gru
On Tue 2019-03-26 16:30:21, Andy Shevchenko wrote:
> On Tue, Mar 26, 2019 at 04:12:43PM +0200, Sakari Ailus wrote:
> > On Tue, Mar 26, 2019 at 04:06:33PM +0200, Heikki Krogerus wrote:
> > > On Tue, Mar 26, 2019 at 03:13:53PM +0200, Andy Shevchenko wrote:
>
> > > > > > Do we support swnode here?
>
On Wed, Mar 06, 2019 at 11:08:45PM +0100, Enrico Weigelt, metux IT consult
wrote:
> Formatting of Kconfig files doesn't look so pretty, so just
> take damp cloth and clean it up.
>
> Signed-off-by: Enrico Weigelt, metux IT consult
> ---
> drivers/infiniband/hw/bnxt_re/Kconfig | 10 +-
>
On Mon, Mar 25, 2019 at 08:33:30PM +, Ghannam, Yazen wrote:
> From: Yazen Ghannam
>
> The AMD64 EDAC module current hardcodes the EDAC channel layer size
> (count) to two. Future AMD systems may have more channels than this.
>
> Set the EDAC channel layer size equal to the maximum number of
This is v1 of this patchset with various minor fixes which are listed in
the individual commits. Notably, pidfds are now O_CLOEXEC by default.
The pidctl() syscalls builds on, extends, and improves translate_pid()
[4] and serves as the natural connection between the pid-based and the
pidfd-based a
The pidctl() syscalls builds on, extends, and improves translate_pid() [4].
I quote Konstantins original patchset first that has already been acked and
picked up by Eric before and whose functionality is preserved in this
syscall:
"Each process have different pids, one for each pid namespace it be
On Tue, Mar 26, 2019 at 08:43:45AM +, He, Bo wrote:
> Hi, Paul:
> I have tried on my PC and not hit any hang issue with RCU torture test
> for one hour, the configurations are like:
> OS: ubuntu 16.04
> kenrel: 3.18.136 + 3.18 rcu patch
> CPU: Intel(R) Xeon(R) CPU E3-1225 V2 @ 3.20GHz
From: David Howells
Make the anon_inodes facility unconditional so that it can be used by core
VFS code and the pidctl() syscall.
Signed-off-by: David Howells
Signed-off-by: Al Viro
[christ...@brauner.io: adapt commit message to mention pidctl()]
Signed-off-by: Christian Brauner
---
arch/arm
This adds test cases for all three subcommands and verifies that they
succeed and fail as expected.
Additionally, the tests verify that pidctl() pidfds are correctly useable
with pidfd_send_signal().
Signed-off-by: Christian Brauner
Cc: Arnd Bergmann
Cc: "Eric W. Biederman"
Cc: Kees Cook
Cc: A
Let pidfd_send_signal() use pidfds retrieved via pidctl(). With this patch
pidfd_send_signal() becomes independent of procfs. This fullfils the
request made when we merged the pidfd_send_signal() patchset. The
pidfd_send_signal() syscall is now always available allowing for it to be
used by users w
Hi Jarkko,
On 3/25/19 7:09 AM, Jarkko Sakkinen wrote:
> It is still missing the comment I asked to add. Otherwise, it is good.
>
Sorry, I didn't see your email with the suggestion earlier.
To be honest I'm not sure if this comment adds much value, or if it is
even correct. The poll doesn't "succe
On Tue, 26 Mar 2019 16:16:54 +0100,
Timo Wischer wrote:
>
> On 3/26/19 15:23, Takashi Iwai wrote:
> > On Tue, 26 Mar 2019 12:25:37 +0100,
> > Timo Wischer wrote:
> >> On 3/26/19 09:35, Takashi Iwai wrote:
> >>
> >> On Tue, 26 Mar 2019 08:49:33 +0100,
> >> wrote:
> >> From:
On Tue, 26 Mar 2019, Qian Cai wrote:
> + if (!object) {
> + /*
> + * The tracked memory was allocated successful, if the kmemleak
> + * object failed to allocate for some reasons, it ends up with
> + * the whole kmemleak disabled, so let it su
On Tue, Mar 26, 2019 at 01:24:41PM +, David Woodhouse wrote:
> On Tue, 2019-03-26 at 12:17 +, Lorenzo Pieralisi wrote:
> > [+Zhou, Gustavo]
> >
> > On Tue, Mar 26, 2019 at 12:00:55PM +0200, Jonathan Chocron wrote:
> > > Adding support for Amazon's Annapurna Labs PCIe driver.
> > > The HW c
On Mon, Mar 25, 2019 at 06:40:17PM -0400, Joel Fernandes wrote:
> On Mon, Mar 25, 2019 at 12:42 PM Paul E. McKenney
> wrote:
> >
> > On Mon, Mar 25, 2019 at 12:33:37PM -0400, Joel Fernandes wrote:
> > > On Mon, Mar 25, 2019 at 11:02 AM Paul E. McKenney
> > > wrote:
> > > >
> > > > On Fri, Mar 2
Hi Julien,
On 2019-03-26, Julien Grall wrote:
>>> [...]
>>> [1.169151] 002: Serial: AMBA PL011 UART driver
>>> [1.254891] 002: 7ff8.uart: ttyAMA0 at MMIO 0x7ff8 (irq = 32,
>>> base_baud = 0) is a PL011 rev3
>>> [1.255007] 002: printk: console [ttyAMA0] enabled
>>
>> The ttyAM
Daniel,
On Tue, 26 Mar 2019, Daniel Lezcano wrote:
> >> +/*
> >> + * Exponential moving average computation
> >> + */
> >> +static int irq_timings_ema_new(s64 value, s64 ema_old)
> >
> > There is a mixed bag of s64/u64 all over this code. Please stay
> > consistent. We had enough sign confusion b
On Tue, Mar 26, 2019 at 11:43:38AM -0400, Qian Cai wrote:
> Unless there is a brave soul to reimplement the kmemleak to embed it's
> metadata into the tracked memory itself in a foreseeable future, this
> provides a good balance between enabling kmemleak in a low-memory
> situation and not introduc
On Tue, Mar 26, 2019 at 11:43:38AM -0400, Qian Cai wrote:
> Kmemleak could quickly fail to allocate an object structure and then
> disable itself in a low-memory situation. For example, running a mmap()
> workload triggering swapping and OOM. This is especially problematic for
> running things like
On Mon, Mar 25, 2019 at 07:18:42PM +0100, Jann Horn wrote:
> On Mon, Mar 25, 2019 at 5:21 PM Christian Brauner
> wrote:
> > The pidctl() syscalls builds on, extends, and improves translate_pid() [4].
> > I quote Konstantins original patchset first that has already been acked and
> > picked up by
On Tue, 26 Mar 2019 17:04:30 +0100,
Ard Biesheuvel wrote:
>
> On Tue, 26 Mar 2019 at 16:25, Takashi Iwai wrote:
> >
> > On Fri, 01 Mar 2019 16:27:24 +0100,
> > Takashi Iwai wrote:
> > >
> > > On Fri, 01 Mar 2019 15:57:03 +0100,
> > > Ard Biesheuvel wrote:
> > > >
> > > > On Fri, 1 Mar 2019 at 15:
On Tue, 26 Mar 2019, Oleg Nesterov wrote:
> On 03/23, Thomas Gleixner wrote:
> >
> > On Thu, 28 Feb 2019, Gustavo A. R. Silva wrote:
> >
> > > arch/x86/include/asm/syscall.h | 28
> > > 1 file changed, 28 insertions(+)
> >
> > Second thoughts. So this adds 28 /* fall
On 26/03/2019 14:24, Marc Gonzalez wrote:
> +static const struct qmp_phy_cfg msm8998_pciephy_cfg = {
> + .type = PHY_TYPE_PCIE,
> + .nlanes = 1,
> +
> + .serdes_tbl = msm8998_pcie_serdes_tbl,
> + .serdes_tbl_num = ARRAY_SIZE(msm
Commit-ID: 766460852cfaeca4042e5f3aeb9616b3689147bc
Gitweb: https://git.kernel.org/tip/766460852cfaeca4042e5f3aeb9616b3689147bc
Author: Kangjie Lu
AuthorDate: Mon, 25 Mar 2019 15:29:22 -0500
Committer: Borislav Petkov
CommitDate: Tue, 26 Mar 2019 17:01:30 +0100
x86/platform/uv: Fix mis
From: Andi Kleen
With adaptive PEBS the CPU can directly supply the LBR information,
so we don't need to read it again. But the LBRs still need to be
enabled. Add a special count to the cpuc that distinguishes these
two cases, and avoid reading the LBRs unnecessarily when PEBS is
active.
Signed-
From: Kan Liang
Icelake uses the same C-state residency events as Sandy Bridge.
Signed-off-by: Kan Liang
---
No changes since V3.
arch/x86/events/intel/cstate.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c
index 94a4b7f
From: Kan Liang
Starting from Icelake, XMM registers can be collected in PEBS record.
But current code only output the pt_regs.
Add a new struct x86_perf_regs for both pt_regs and xmm_regs.
XMM registers are 128 bit. To simplify the code, they are handled like
two different registers, which mean
From: Kan Liang
The patch series intends to add Icelake support for Linux perf.
PATCH 1-18: Kernel patches to support Icelake.
- 1-5: Support adaptive PEBS feature
- 6-7: Enable core support with some new features, e.g. 8 generic
counters, new event constraints, a new fixed counter.
- 8-11
From: Kan Liang
Add V1 event list for Icelake.
Signed-off-by: Kan Liang
---
No changes since V3.
.../pmu-events/arch/x86/icelake/cache.json| 552 +++
.../arch/x86/icelake/floating-point.json | 90 ++
.../pmu-events/arch/x86/icelake/frontend.json | 424 +
.../pmu-eve
From: Andi Kleen
Icelake has support for reporting per thread TopDown metrics.
These are reported differently than the previous TopDown support,
each metric is standalone, but scaled to pipeline "slots".
We don't need to do anything special for HyperThreading anymore.
Teach perf stat --topdown to
From: Andi Kleen
Metrics counters (hardware counters containing multiple metrics)
are modelled as separate registers for each sub-event, with an
extra reg being used for coordinating access to the underlying
register in the scheduler.
This patch adds the basic infrastructure to separate the sche
From: Kan Liang
Icelake support the same RAPL counters as Skylake.
Signed-off-by: Kan Liang
---
No changes since V3.
arch/x86/events/intel/rapl.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/events/intel/rapl.c b/arch/x86/events/intel/rapl.c
index 94dc564146ca..37ebf6fc5415
From: Andi Kleen
Export new top down events for perf that map to the sub metrics
in the metrics register, and another for the new slots fixed counter.
This makes the new fixed counters in Icelake visible to the perf
user tools.
Signed-off-by: Andi Kleen
Signed-off-by: Kan Liang
---
No changes
From: Andi Kleen
Newer kernel code can collect XMM registers in some cases.
Add support for perf script to dump them, and support
for the register parser in perf record -I ... to configure them.
For now they are just printed in hex, could potentially add
other formats too.
Signed-off-by: Andi Kl
From: Andi Kleen
Icelake supports a new CPUID 10.ECX cpu leaf to indicate some fixed
counters are not supported. This extends the previous count to a bitmap
which allows to disable even lower counters.
It's a nop on Icelake (all fixed counters are supported), but let's
implement it here. This
From: Kan Liang
To get correct PERF_METRICS value, the fixed counter 3 must start from
0. It would bring problems when sampling read slots and topdown events.
For example,
perf record -e '{slots, topdown-retiring}:S'
The slots would not overflow if it starts from 0.
Add specific validate
From: Kan Liang
Add Intel Icelake uncore support,
- The init code is based on Skylake
- Add new pci id for IMC
- New MSR address for CBOX
- Get CBOX# from CNL_UNC_CBO_CONFIG MSR directly
- Create a new PMU for fixed clocktick counter
Signed-off-by: Kan Liang
---
No changes since V3.
arc
From: Andi Kleen
The top down sub event counters are mapped to a fixed counter,
but should have the normal weight for the scheduler.
So special case this.
Signed-off-by: Andi Kleen
Signed-off-by: Kan Liang
---
No changes since V3.
arch/x86/events/intel/core.c | 9 +
1 file changed,
From: Andi Kleen
The internal counters used for the metrics can overflow. If this happens
an overflow is triggered on the SLOTS fixed counter. Add special code
that resets all the slave metric counters in this case.
Signed-off-by: Andi Kleen
Signed-off-by: Kan Liang
---
No changes since V3.
From: Andi Kleen
The TopDown events can be collected per thread/process on Icelake. To
use TopDown through RDPMC in applications, the metrics and slots MSR
values have to be saved/restored during context switching.
It is useful to have a remove transaction when the counter is
unscheduled, so that
From: Kan Liang
Intro
=
Icelake has support for measuring the four top level TopDown metrics
directly in hardware. This is implemented by an additional "metrics"
register, and a new Fixed Counter 3 that measures pipeline "slots".
Events
==
We export four metric events as separate perf
From: Kan Liang
Icelake is the same as the existing Skylake parts.
Signed-off-by: Kan Liang
---
No changes since V3.
arch/x86/events/msr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c
index a878e6286e4a..f3f4c2263501 100644
--- a/arch/x86/
From: Kan Liang
Add Icelake core PMU perf code, including constraint tables and the main
enable code.
Icelake expanded the generic counters to always 8 even with HT on, but a
range of events cannot be scheduled on the extra 4 counters.
Add new constraint ranges to describe this to the scheduler.
From: Peter Zijlstra
Icelake extended the general counters to 8, even when SMT is enabled.
However only a (large) subset of the events can be used on all 8
counters.
The events that can or cannot be used on all counters are organized
in ranges.
A lot of scheduler constraints are required to han
From: Kan Liang
The drain_pebs() could be called twice in a short period for auto-reload
event in pmu::read(). The intel_pmu_save_and_restart_reload() should be
called to update the event->count.
This case should also be handled on Icelake. Extract the codes for reuse
later.
Signed-off-by: Kan L
From: Kan Liang
Adaptive PEBS is a new way to report PEBS sampling information. Instead
of a fixed size record for all PEBS events it allows to configure the
PEBS record to only include the information needed. Events can then opt
in to use such an extended record, or stay with a basic record whic
From: Andi Kleen
Extract some code related to memory profiling from the PEBS record
parser into separate functions. It can be reused by the upcoming
adaptive PEBS parser. No functional changes.
Rename intel_hsw_weight to intel_get_tsx_weight, and
intel_hsw_transaction to intel_get_tsx_transaction
On Sun, Mar 24, 2019 at 08:05:04PM +0100, Matteo Croce wrote:
> Since commit ad67b74d2469d9b8 ("printk: hash addresses printed with %p"),
> at boot "ptrval" is printed instead of the trampoline addresses:
>
> Base memory trampoline at [(ptrval)] 99000 size 24576
>
> Remove the
On 3/26/19 10:40 AM, Joao Moreira wrote:
On 3/20/19 4:08 PM, Miroslav Benes wrote:
diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index fd03d60f6c5a..1e28ad21314c 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -247,6 +247,11 @@ cmd_gen_ksymdeps = \
$(
From: Andi Kleen
Add some documentation how to use the topdown metrics in ring 3.
Signed-off-by: Andi Kleen
Signed-off-by: Kan Liang
---
No changes since V3.
tools/perf/Documentation/topdown.txt | 223 +++
1 file changed, 223 insertions(+)
create mode 100644 tools/p
> Agreed, I also was going to say the same, about the flags.
Please review the updated version I just sent out.
Christian
Alex,
On Mon, 25 Mar 2019, 573149609 wrote:
Thanks for the report.
> I think I found a reproducible kernel bug in version 5.0.4.
> Source file: arch/x86/kernel/unwind_orc.c:505
> The KASAN output is as following:
> [ 26.095365] BUG: KASAN: stack-out-of-bounds in
> unwind_next_frame+0x1403/0x1
On Tue, 26 Mar 2019 17:09:44 +0100 (CET)
Thomas Gleixner wrote:
> > > 1) The third argument of get/set(), i.e. the argument offset, is 0 on all
> > > call sites. Do we need it at all?
> >
> > Probably "maxargs" can be removed too, Steven sent the patches a long ago,
> > see
> > https://l
Thanks for the patch.
On Tue, Mar 26, 2019 at 8:55 AM Christian Brauner wrote:
>
> The pidctl() syscalls builds on, extends, and improves translate_pid() [4].
> I quote Konstantins original patchset first that has already been acked and
> picked up by Eric before and whose functionality is preser
On Tue, 26 Mar 2019, Steven Rostedt wrote:
> On Tue, 26 Mar 2019 17:09:44 +0100 (CET)
> Thomas Gleixner wrote:
>
> > > > 1) The third argument of get/set(), i.e. the argument offset, is 0 on
> > > > all
> > > > call sites. Do we need it at all?
> > >
> > > Probably "maxargs" can be remo
On Tue, Mar 26, 2019 at 09:05:36AM -0700, Matthew Wilcox wrote:
> On Tue, Mar 26, 2019 at 11:43:38AM -0400, Qian Cai wrote:
> > Unless there is a brave soul to reimplement the kmemleak to embed it's
> > metadata into the tracked memory itself in a foreseeable future, this
> > provides a good balanc
On Tue, Mar 26, 2019 at 09:17:07AM -0700, Daniel Colascione wrote:
> Thanks for the patch.
>
> On Tue, Mar 26, 2019 at 8:55 AM Christian Brauner
> wrote:
> >
> > The pidctl() syscalls builds on, extends, and improves translate_pid() [4].
> > I quote Konstantins original patchset first that has a
On Tue, 2019-03-26 at 09:59 -0500, Denis Kenzior wrote:
> Hi James,
>
> On 03/26/2019 09:25 AM, James Bottomley wrote:
> > Looking at the contents of linux/keys/trusted.h, it looks like the
> > wrong decision to move it. The contents are way too improperly
> > named
> > and duplicative to be in a
Most architectures current have a debugfs file for dumping the kernel
page tables. Currently each architecture has to implement custom
functions for walking the page tables because the generic
walk_page_range() function is unable to walk the page tables used by the
kernel.
This series extends the
walk_page_range() is going to be allowed to walk page tables other than
those of user space. For this it needs to know when it has reached a
'leaf' entry in the page tables. This information will be provided by the
p?d_large() functions/macros.
For arm64, we already have p?d_sect() macros which we
walk_page_range() is going to be allowed to walk page tables other than
those of user space. For this it needs to know when it has reached a
'leaf' entry in the page tables. This information is provided by the
p?d_large() functions/macros.
For riscv a page is large when it has a read, write or exe
walk_page_range() is going to be allowed to walk page tables other than
those of user space. For this it needs to know when it has reached a
'leaf' entry in the page tables. This information is provided by the
p?d_large() functions/macros.
For mips, we only support large pages on 64 bit.
For 64 b
walk_page_range() is going to be allowed to walk page tables other than
those of user space. For this it needs to know when it has reached a
'leaf' entry in the page tables. This information is provided by the
p?d_large() functions/macros.
For x86 we already have static inline functions, so simply
walk_page_range() is going to be allowed to walk page tables other than
those of user space. For this it needs to know when it has reached a
'leaf' entry in the page tables. This information is provided by the
p?d_large() functions/macros.
For sparc 64 bit, pmd_large() and pud_large() are already
walk_page_range() is going to be allowed to walk page tables other than
those of user space. For this it needs to know when it has reached a
'leaf' entry in the page tables. This information is provided by the
p?d_large() functions/macros.
For s390, pud_large() and pmd_large() are already implemen
pgd_entry() and pud_entry() were removed by commit 0b1fbfe50006c410
("mm/pagewalk: remove pgd_entry() and pud_entry()") because there were
no users. We're about to add users so reintroduce them, along with
p4d_entry() as we now have 5 levels of tables.
Note that commit a00cc7d9dd93d66a ("mm, x86:
It is useful to be able to skip parts of the page table tree even when
walking without VMAs. Add test_p?d callbacks similar to test_walk but
which are called just before a table at that level is walked. If the
callback returns non-zero then the entire table is skipped.
Signed-off-by: Steven Price
Exposing the pud/pgd levels of the page tables to walk_page_range() means
we may come across the exotic large mappings that come with large areas
of contiguous memory (such as the kernel's linear map).
For architectures that don't provide p?d_large() macros, provide generic
does nothing defaults.
Since 48684a65b4e3: "mm: pagewalk: fix misbehavior of walk_page_range
for vma(VM_PFNMAP)", page_table_walk() will report any kernel area as
a hole, because it lacks a vma.
This means each arch has re-implemented page table walking when needed,
for example in the per-arch ptdump walker.
Remove the
An mm_struct is needed to enable x86 to use of the generic
walk_page_range() function.
In the case of walking the user page tables (when
CONFIG_PAGE_TABLE_ISOLATION is enabled), it is necessary to create a
fake_mm structure because there isn't an mm_struct with a pointer
to the pgd of the user pag
To enable x86 to use the generic walk_page_range() function, the
callers of ptdump_walk_pgd_level_debugfs() need to pass in the mm_struct.
This means that ptdump_walk_pgd_level_core() is now always passed a
valid pgd, so drop the support for pgd==NULL.
Signed-off-by: Steven Price
---
arch/x86/i
To enable x86 to use the generic walk_page_range() function, the
callers of ptdump_walk_pgd_level() need to pass an mm_struct rather
than the raw pgd_t pointer. Luckily since commit 7e904a91bf60
("efi: Use efi_mm in x86 as well as ARM") we now have an mm_struct
for EFI on x86.
Signed-off-by: Steve
Now walk_page_range() can walk kernel page tables, we can switch the
arm64 ptdump code over to using it, simplifying the code.
Signed-off-by: Steven Price
---
arch/arm64/mm/dump.c | 117 ++-
1 file changed, 59 insertions(+), 58 deletions(-)
diff --git a/a
Make use of the new functionality in walk_page_range to remove the
arch page walking code and use the generic code to walk the page tables.
The effective permissions are passed down the chain using new fields
in struct pg_state.
The KASAN optimisation is implemented by including test_p?d callback
mm/dump_pagetables.c passes both struct seq_file and struct pg_state
down the chain of walk_*_level() functions to be passed to note_page().
Instead place the struct seq_file in struct pg_state and access it from
struct pg_state (which is private to this file) in note_page().
Signed-off-by: Steven
For the /sys/kernel/debug/page_tables/ files, rather than outputing a
mostly empty line when a block of memory isn't present just skip the
line. This keeps the output shorter and will help with a future change
switching to using the generic page walk code as we no longer care about
the 'level' that
Hi, thanks for your comments. I'll address them in v2.
On Fri, Mar 22, 2019 at 09:31:53AM +0800, Shawn Guo wrote:
> On Tue, Mar 19, 2019 at 04:24:17PM +0100, Jonathan Neuschäfer wrote:
> > The Kobo Aura is an e-book reader released in 2013.
[...]
> > + sd2_pwrseq: pwrseq {
> > + compat
On 3/26/19 12:00 PM, Christopher Lameter wrote:
>> + */
>> +gfp = (in_atomic() || irqs_disabled()) ? GFP_ATOMIC :
>> + gfp_kmemleak_mask(gfp) | __GFP_DIRECT_RECLAIM;
>> +object = kmem_cache_alloc(object_cache, gfp);
>> +}
>> +
>> if
On Tue, Mar 26, 2019 at 4:32 PM Leon Romanovsky wrote:
>
> On Tue, Mar 26, 2019 at 04:12:27PM +0100, Rafael J. Wysocki wrote:
> > On Tue, Mar 26, 2019 at 3:41 PM Leon Romanovsky wrote:
> > >
> > > On Tue, Mar 26, 2019 at 01:29:54PM +0100, Rafael J. Wysocki wrote:
> > > > On Tue, Mar 26, 2019 at 1
On Tue, Mar 26, 2019 at 07:09:24AM +1100, Stephen Rothwell wrote:
> Hi all,
>
> In commit
>
> 167ab7e5ebbf ("btrfs: reloc: Fix NULL pointer dereference due to expanded
> reloc_root lifespan")
>
> Fixes tag
>
> Fixes: d2311e698578 ("btrfs: relocation: Delay reloc tree deletion after
> merg
On Tue, Mar 26, 2019 at 05:23:37PM +0100, Christian Brauner wrote:
> On Tue, Mar 26, 2019 at 09:17:07AM -0700, Daniel Colascione wrote:
> > Thanks for the patch.
> >
> > On Tue, Mar 26, 2019 at 8:55 AM Christian Brauner
> > wrote:
> > >
> > > The pidctl() syscalls builds on, extends, and improve
On Tue 26-03-19 16:20:41, Catalin Marinas wrote:
> On Tue, Mar 26, 2019 at 09:05:36AM -0700, Matthew Wilcox wrote:
> > On Tue, Mar 26, 2019 at 11:43:38AM -0400, Qian Cai wrote:
> > > Unless there is a brave soul to reimplement the kmemleak to embed it's
> > > metadata into the tracked memory itself
On 25/03/2019 23:32, Bjorn Helgaas wrote:
Hi John,
Hi Bjorn,
Thanks for reviewing this.
On Thu, Mar 21, 2019 at 02:14:08AM +0800, John Garry wrote:
Currently when we request an IO port region, the request is made directly
to the top resource, ioport_resource.
Let's be explicit here, e.g.
On Tue, Mar 26, 2019 at 05:31:42PM +0100, Christian Brauner wrote:
> On Tue, Mar 26, 2019 at 05:23:37PM +0100, Christian Brauner wrote:
> > On Tue, Mar 26, 2019 at 09:17:07AM -0700, Daniel Colascione wrote:
> > > Thanks for the patch.
> > >
> > > On Tue, Mar 26, 2019 at 8:55 AM Christian Brauner
On Tue, Mar 26, 2019 at 9:23 AM Christian Brauner wrote:
>
> On Tue, Mar 26, 2019 at 09:17:07AM -0700, Daniel Colascione wrote:
> > Thanks for the patch.
> >
> > On Tue, Mar 26, 2019 at 8:55 AM Christian Brauner
> > wrote:
> > >
> > > The pidctl() syscalls builds on, extends, and improves transl
On Tue, Mar 26, 2019 at 9:34 AM Christian Brauner wrote:
>
> On Tue, Mar 26, 2019 at 05:31:42PM +0100, Christian Brauner wrote:
> > On Tue, Mar 26, 2019 at 05:23:37PM +0100, Christian Brauner wrote:
> > > On Tue, Mar 26, 2019 at 09:17:07AM -0700, Daniel Colascione wrote:
> > > > Thanks for the pat
Tianyu reported a crash with SMP=y and HOTPLUG_CPU=n plus 'nosmt' on the
kernel command line.
https://lkml.kernel.org/r/1553521883-20868-1-git-send-email-tianyu@microsoft.com
The reason is a bug in the hotplug code which does not handle the fact,
that HOTPLUG_CPU=n cannot tear down a CPU c
On Tue, 26 Mar 2019 at 12:04, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 4.14.109 release.
> There are 41 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Re
Tianyu reported a crash in a CPU hotplug teardown callback when booting a
kernel which has CONFIG_HOTPLUG_CPU disabled with the 'nosmt' boot
parameter.
It turns out that the SMP=y CONFIG_HOTPLUG_CPU=n case has been broken
forever in case that a bringup callback fails. Unfortunately this issue was
The SMT disable 'nosmt' command line argument is not working properly when
CONFIG_HOTPLUG_CPU is disabled. The teardown of the sibling CPUs which are
required to be brought up due to the MCE issues, cannot work. The CPUs are
then kept in a half dead state.
As the 'nosmt' functionality has become p
On Tue, Mar 26, 2019 at 9:34 AM Christian Brauner wrote:
>
> On Tue, Mar 26, 2019 at 05:31:42PM +0100, Christian Brauner wrote:
> > On Tue, Mar 26, 2019 at 05:23:37PM +0100, Christian Brauner wrote:
> > > On Tue, Mar 26, 2019 at 09:17:07AM -0700, Daniel Colascione wrote:
> > > > Thanks for the pat
On Tue, Mar 26, 2019 at 09:38:31AM -0700, Daniel Colascione wrote:
> On Tue, Mar 26, 2019 at 9:34 AM Christian Brauner
> wrote:
> >
> > On Tue, Mar 26, 2019 at 05:31:42PM +0100, Christian Brauner wrote:
> > > On Tue, Mar 26, 2019 at 05:23:37PM +0100, Christian Brauner wrote:
> > > > On Tue, Mar 2
On Tue, Mar 26, 2019 at 09:42:59AM -0700, Andy Lutomirski wrote:
> On Tue, Mar 26, 2019 at 9:34 AM Christian Brauner
> wrote:
> >
> > On Tue, Mar 26, 2019 at 05:31:42PM +0100, Christian Brauner wrote:
> > > On Tue, Mar 26, 2019 at 05:23:37PM +0100, Christian Brauner wrote:
> > > > On Tue, Mar 26,
On Tue, Mar 26, 2019 at 9:44 AM Christian Brauner wrote:
>
> On Tue, Mar 26, 2019 at 09:38:31AM -0700, Daniel Colascione wrote:
> > On Tue, Mar 26, 2019 at 9:34 AM Christian Brauner
> > wrote:
> > >
> > > On Tue, Mar 26, 2019 at 05:31:42PM +0100, Christian Brauner wrote:
> > > > On Tue, Mar 26,
Similar to commit edfc3722cfef ("HID: quirks: Fix keyboard + touchpad on
Toshiba Click Mini not working"), the Lenovo Miix 630 has a combo
keyboard/touchpad device with vid:pid of 04F3:0400, which is shared with
Elan touchpads. The combo on the Miix 630 has an ACPI id of QTEC0001,
which is not cla
Hi Shameer,
On 26/03/2019 15:17, Shameer Kolothum wrote:
[...]
+static int smmu_pmu_apply_event_filter(struct smmu_pmu *smmu_pmu,
+ struct perf_event *event, int idx)
+{
+ u32 span, sid;
+ unsigned int num_ctrs = smmu_pmu->num_counters;
+ bo
Le 26/03/2019 à 17:26, Steven Price a écrit :
walk_page_range() is going to be allowed to walk page tables other than
those of user space. For this it needs to know when it has reached a
'leaf' entry in the page tables. This information is provided by the
p?d_large() functions/macros.
For pow
Quoting Marc Zyngier (2019-03-26 04:11:56)
> Hi Stephen,
>
> On 25/03/2019 18:10, Stephen Boyd wrote:
> > This function returns an error if a child irqchip calls
> > irq_chip_set_wake_parent() but its parent irqchip has the
> > IRQCHIP_SKIP_SET_WAKE flag set. Let's return 0 for success here instea
For very short input data (0 - 1 bytes), lzo-rle was not behaving
correctly. Fix this behaviour and update documentation accordingly.
For zero-length input, lzo v0 outputs an end-of-stream marker only,
which was misinterpreted by lzo-rle as a bitstream version number.
Ensure bitstream versions > 0
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