Hi,
On Tue, Mar 26, 2019 at 10:01:50AM +0100, Andrew Lunn wrote:
> Humm, that is unique, as far as i know. Every other MAC driver uses
> of_get_phy_mode() to get the value out of device tree. The proprietary
> delay values can then be used to fine tune the basic delay setting
> read from DT.
Prob
On Tue, Mar 26, 2019 at 05:30:57PM +0800, Baoquan He wrote:
>On 03/26/19 at 10:23am, Michal Hocko wrote:
>> On Tue 26-03-19 17:02:24, Baoquan He wrote:
>> > The code comment above sparse_add_one_section() is obsolete and
>> > incorrect, clean it up and write new one.
>> >
>> > Signed-off-by: Baoqu
On Mon, Mar 25, 2019 at 08:52:32PM +0200, Maxim Levitsky wrote:
> Hi
>
> This is first round of benchmarks.
>
> The system is Intel(R) Xeon(R) Gold 6128 CPU @ 3.40GHz
>
> The system has 2 numa nodes, but only cpus and memory from node 0 were used to
> avoid noise from numa.
>
> The SSD is Intel
On Tue, 26 Mar 2019, Dan Carpenter wrote:
> On Sat, Mar 23, 2019 at 09:06:54PM +0100, Julia Lawall wrote:
> >
> >
> > On Sat, 23 Mar 2019, Markus Elfring wrote:
> >
> > > > Don't complain about a return when this function returns "&pdev->dev".
> > >
> > > Would this information qualify to add th
i.MX8QXP contains a total of 4 EDMA controllers of which
two are primarily for audio components and the other two
are for non-audio periperhals.
This patch adds the EDMA0/EDMA1 nodes used by audio peripherals.
EDMA0 contains channels for:
* ASRC0
* ESAI0
* SPDIF0
*
First patch documents the fsl,imx8qm-edma string while the second
adds the two EDMA nodes used by Audio peripherals.
Daniel Baluta (2):
bindings: fsl-edma: Document fsl,imx8qm-edma compatbile string
arm64: dts: imx8qxp: Add EDMA0/EDMA1 nodes
.../devicetree/bindings/dma/fsl-edma.txt | 1
Add imx8qm edma support.
Signed-off-by: Daniel Baluta
---
Documentation/devicetree/bindings/dma/fsl-edma.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/dma/fsl-edma.txt
b/Documentation/devicetree/bindings/dma/fsl-edma.txt
index 97e213e07660..5294ee0943
On Tue, Mar 26, 2019 at 12:14:22PM +0900, William Breathitt Gray wrote:
> On Mon, Mar 25, 2019 at 10:38:54AM +0100, Lukas Wunner wrote:
> > On Mon, Mar 25, 2019 at 03:22:23PM +0900, William Breathitt Gray wrote:
> > > +/**
> > > + * find_next_clump8 - find next 8-bit clump with set bits in a memory
On 03/26/19 at 05:36pm, Chao Fan wrote:
> On Tue, Mar 26, 2019 at 05:30:57PM +0800, Baoquan He wrote:
> >On 03/26/19 at 10:23am, Michal Hocko wrote:
> >> On Tue 26-03-19 17:02:24, Baoquan He wrote:
> >> > The code comment above sparse_add_one_section() is obsolete and
> >> > incorrect, clean it up
On Tue, Mar 26, 2019 at 05:43:48PM +0800, Baoquan He wrote:
>On 03/26/19 at 05:36pm, Chao Fan wrote:
>> On Tue, Mar 26, 2019 at 05:30:57PM +0800, Baoquan He wrote:
>> >On 03/26/19 at 10:23am, Michal Hocko wrote:
>> >> On Tue 26-03-19 17:02:24, Baoquan He wrote:
>> >> > The code comment above sparse
On Mon, Mar 25, 2019 at 04:53:38PM +, Thomas Preston wrote:
> Add an example for the magic PRP0001 device ID which allows matching
> ACPI devices against drivers using OF Device Tree compatible property.
>
> Signed-off-by: Thomas Preston
Acked-by: Mika Westerberg
On Tue, 2019-03-26 at 09:38 +, Stefan Hajnoczi wrote:
> On Mon, Mar 25, 2019 at 08:52:32PM +0200, Maxim Levitsky wrote:
> > Hi
> >
> > This is first round of benchmarks.
> >
> > The system is Intel(R) Xeon(R) Gold 6128 CPU @ 3.40GHz
> >
> > The system has 2 numa nodes, but only cpus and memo
On 2019-03-25 10:05 p.m., Kangjie Lu wrote:
> In case alloc_workqueue fails, the fix frees memory and
> returns -ENOMEM to avoid potential NULL pointer dereference.
>
> Signed-off-by: Kangjie Lu
> ---
> v2: use radeon_crtc_destroy to properly clean up resources as
> suggested by Michel Dänzer
>
Hi Matthias,
On 2019-03-25 21:51, Matthias Kaehlcke wrote:
On Mon, Mar 25, 2019 at 05:06:39PM +0530, Harish Bandi wrote:
Added new compatible for WCN3998 and corresponding voltage
and current values to WCN3998 compatible.
Changed driver code to support WCN3998
Signed-off-by: Harish Bandi
---
On Tue, Mar 26, 2019 at 6:06 PM Markus Elfring wrote:
>
> > When I searched "Wen Yang", v6 did not show up for some reasons.
> > https://lore.kernel.org/patchwork/project/lkml/list/?series=&submitter=22638&state=*&q=&archive=&delegate=
>
> I find such a situation also interesting somehow.
> I assu
On Tue, Mar 26, 2019 at 10:43:45AM +0100, Lukas Wunner wrote:
> On Tue, Mar 26, 2019 at 12:14:22PM +0900, William Breathitt Gray wrote:
> > On Mon, Mar 25, 2019 at 10:38:54AM +0100, Lukas Wunner wrote:
> > Is this the sort of implementation you had in mind:
> >
> > offset = find_next_bit(
On Tue, Mar 26, 2019 at 10:13 AM Sugaya Taichi
wrote:
>
> diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
> index 72966bc..961519b 100644
> --- a/drivers/tty/serial/Kconfig
> +++ b/drivers/tty/serial/Kconfig
> @@ -1582,6 +1582,32 @@ config SERIAL_RDA_CONSOLE
> Say '
Commit ea837f1c0503 ("kbuild: make modpost processing configurable")
was intended to give KBUILD_MODPOST_WARN flexibility to be configurable.
Right now KBUILD_MODPOST_WARN gets just ignored when KBUILD_EXTMOD is
set which happens per default when building modules out of the tree.
This change gives
Adding support for Amazon's Annapurna Labs PCIe driver.
The HW controller is based on DesignWare's IP.
The HW doesn't support accessing the Root Port's config space via
ECAM, so we obtain its base address via an AMZN0001 device.
Furthermore, the DesignWare PCIe controller doesn't filter out
confi
Hi Matthias,
On 2019-03-25 21:59, Matthias Kaehlcke wrote:
On Mon, Mar 25, 2019 at 05:06:40PM +0530, Harish Bandi wrote:
This patch enables regulators for the Qualcomm Bluetooth WCN3998
controller.
Signed-off-by: Harish Bandi
---
Changes in V4:
- Removed new compatible WCN3998
- changed wcn39
On Tue, Mar 26, 2019 at 10:43:45AM +0100, Lukas Wunner wrote:
> On Tue, Mar 26, 2019 at 12:14:22PM +0900, William Breathitt Gray wrote:
> > On Mon, Mar 25, 2019 at 10:38:54AM +0100, Lukas Wunner wrote:
> > > On Mon, Mar 25, 2019 at 03:22:23PM +0900, William Breathitt Gray wrote:
> > > > +/**
> > >
On 03/26/19 at 10:29am, Michal Hocko wrote:
> On Tue 26-03-19 17:02:25, Baoquan He wrote:
> > Reorder the allocation of usemap and memmap since usemap allocation
> > is much simpler and easier. Otherwise hard work is done to make
> > memmap ready, then have to rollback just because of usemap alloca
On Tue, Mar 26, 2019 at 12:07:43AM +0300, Yury Norov wrote:
> bitmap_parselist() calculates length of the input string before passing
> it to the __bitmap_parselist(). But the end-of-line condition is checked
> for every character in __bitmap_parselist() anyway. So doing it in wrapper
> is a simple
On Tue, Mar 26, 2019 at 12:07:45AM +0300, Yury Norov wrote:
> The requirement for this rework is to keep the __bitmap_parselist()
> copy-less and single-pass but make it more readable and maintainable by
> splitting into logical parts and removing explicit nested cycles and
> opaque local variables
On Sun, Mar 24, 2019 at 1:04 AM Thomas Gleixner wrote:
>
> On Sat, 23 Mar 2019, syzbot wrote:
>
> > syzbot has bisected this bug to:
> >
> > commit 80eb865768703c0f85a0603762742ae1dedf21f0
> > Author: Andrea Parri
> > Date: Tue Nov 27 11:01:10 2018 +
> >
> >sched/fair: Clean up comment
On Tue, Mar 26, 2019 at 12:07:48AM +0300, Yury Norov wrote:
> Propagate existing bitmap_parselist() tests to bitmap_parselist_user().
Increasing test coverage is a good point,
Reviewed-by: Andy Shevchenko
for all test related patches
>
> Signed-off-by: Yury Norov
> ---
> lib/test_bitmap.c | 4
The devicetree bindings documentation for ad7606 should also include
the vendor prefix: ad7606.txt -> adi,ad7606.txt
Signed-off-by: Stefan Popa
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index ff2c2f2..4f81cdc 100644
--- a/MAINTA
On Tue 26-03-19 18:08:17, Baoquan He wrote:
> On 03/26/19 at 10:29am, Michal Hocko wrote:
> > On Tue 26-03-19 17:02:25, Baoquan He wrote:
> > > Reorder the allocation of usemap and memmap since usemap allocation
> > > is much simpler and easier. Otherwise hard work is done to make
> > > memmap read
On Mon, Mar 25, 2019 at 05:21:46PM -0500, Aditya Pakki wrote:
> pci_ioremap_bar could fail. The patch returns in case of failure to
> acquire IOMEM. It also releases the acquired resource in the exit path.
Thanks for an update.
One comment below.
After addressing it, take mine
Reviewed-by: Andy S
On Tue, Mar 26, 2019 at 07:08:18PM +0900, William Breathitt Gray wrote:
> On Tue, Mar 26, 2019 at 10:43:45AM +0100, Lukas Wunner wrote:
> > On Tue, Mar 26, 2019 at 12:14:22PM +0900, William Breathitt Gray wrote:
> > Why is it so complicated, does it allow passing in a start value
> > that's not a
On Tue 26-03-19 08:54:31, Sascha Hauer wrote:
> This removes all trailing whitespaces in fs/quota/.
>
> Signed-off-by: Sascha Hauer
Thanks. Applied.
Honza
> ---
> fs/quota/dquot.c| 10 +-
> fs/quota/quota_v1.c | 2 +-
Mon, Mar 25, 2019 at 06:08:03PM CET, mkube...@suse.cz wrote:
>Similar to nla_parse_strict() and nlmsg_parse_strict(), add also
>nla_parse_nested_strict() as a version of nla_parse_nested() with strict
>policy checking.
>
>Signed-off-by: Michal Kubecek
Acked-by: Jiri Pirko
Hi Ludovic
On 3/1/19 9:47 AM, Ludovic Barre wrote:
From: Ludovic Barre
This patch series adds support of sdmmc1 on:
-stm32h743i (boards: eval, disco)
-stm32mp1 (boards: ed1, dk1)
Ludovic Barre (7):
ARM: stm32: add AMBA support for stm32 family
ARM: dts: stm32: add sdmmc1 support on stm3
stable-rc/linux-4.19.y boot: 94 boots: 0 failed, 82 passed with 12 offline
(v4.19.31-45-ge47f4c0ee31a)
Full Boot Summary:
https://kernelci.org/boot/all/job/stable-rc/branch/linux-4.19.y/kernel/v4.19.31-45-ge47f4c0ee31a/
Full Build Summary:
https://kernelci.org/build/stable-rc/branch/linux-4.19.
On 2019-03-25 18:12, Steven Price wrote:
> On 25/03/2019 15:30, laurentiu.tu...@nxp.com wrote:
>> From: Laurentiu Tudor
>>
>> If the dma controller is not yet probed, defer i2c probe.
>> The error path in probe was slightly modified (no functional change)
*snip*
>> @@ -1161,19 +1162,25 @@ static
stable-rc/linux-4.14.y boot: 110 boots: 1 failed, 97 passed with 12 offline
(v4.14.108-42-g4bb6d9c67e49)
Full Boot Summary:
https://kernelci.org/boot/all/job/stable-rc/branch/linux-4.14.y/kernel/v4.14.108-42-g4bb6d9c67e49/
Full Build Summary:
https://kernelci.org/build/stable-rc/branch/linux-4.
Hi Joe,
On Mon, Mar 25, 2019 at 04:30:40PM -0700, Joe Perches wrote:
> A file pattern line in this section of the MAINTAINERS file in linux-next
> does not have a match in the linux source files.
>
> This could occur because a matching filename was never added, was deleted
> or renamed in some ot
Hi John,
On 3/25/19 10:34 AM, John Ogness wrote:
On 2019-03-25, Julien Grall wrote:
[...]
[1.169151] 002: Serial: AMBA PL011 UART driver
[1.254891] 002: 7ff8.uart: ttyAMA0 at MMIO 0x7ff8 (irq = 32,
base_baud = 0) is a PL011 rev3
[1.255007] 002: printk: console [ttyAMA0] en
On Tue, Mar 26, 2019 at 12:19:33PM +0200, Andy Shevchenko wrote:
> On Tue, Mar 26, 2019 at 07:08:18PM +0900, William Breathitt Gray wrote:
> > On Tue, Mar 26, 2019 at 10:43:45AM +0100, Lukas Wunner wrote:
> > > On Tue, Mar 26, 2019 at 12:14:22PM +0900, William Breathitt Gray wrote:
>
> > > Why is
On 26. 03. 19, 11:17, Andy Shevchenko wrote:
>> @@ -199,7 +203,10 @@ static void qrk_serial_exit_dma(struct lpss8250 *lpss)
>>
>> if (!param->dma_dev)
>> return;
>> +
>> dw_dma_remove(&lpss->dma_chip);
>> +
>> +iounmap(&lpss->dma_chip->regs);
>
> This is a bit fragile
On Sat, Mar 23, 2019 at 2:56 PM Theodore Ts'o wrote:
>
> On Sat, Mar 23, 2019 at 08:16:36AM +0100, Dmitry Vyukov wrote:
> >
> > This is a lockdep-detected bug, but it is reproduced with very low
> > probability...
> >
> > I would expect that for lockdep it's only enough to trigger each path
> > in
On Mon, 2019-02-25 at 14:51 +0800, Seiya Wang wrote:
> The cpu type of cpu2 and cpu3 should be cortex-a72, not cortex-a57.
>
> Signed-off-by: Seiya Wang
> ---
> arch/arm64/boot/dts/mediatek/mt8173.dtsi | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/b
Hi Krzysztof,
Thanks your for your valuable comments.
I will try to answer your queries to best of my knowledge.
On Mon, 25 Mar 2019 at 18:16, Krzysztof Kozlowski wrote:
>
> On Sun, 24 Mar 2019 at 09:33, Anand Moon wrote:
> >
> > Add suspend-to-mem node to regulator core to be enabled or disabl
> On Mon, Mar 18, 2019 at 1:16 PM Andy Lutomirski wrote:
> > On Mon, Mar 18, 2019 at 2:41 AM Elena Reshetova
> > wrote:
> > > Performance:
> > >
> > > 1) lmbench: ./lat_syscall -N 100 null
> > > base: Simple syscall: 0.1774 microseconds
> > > random_offset (rdtsc):
On Mon, Mar 25, 2019 at 3:24 PM Ulf Hansson wrote:
>
> On Mon, 25 Mar 2019 at 13:21, Rafael J. Wysocki wrote:
> >
> > On Wednesday, February 27, 2019 8:58:35 PM CET Ulf Hansson wrote:
> > > To be able to predict the sleep duration for a CPU that is entering idle,
> > > knowing when the next timer
Hi fabien
On 3/5/19 3:24 PM, Fabien Dessenne wrote:
STMicrolectronics STM32MP157 MPU are based on a Dual Arm Cortex-A7 core and a
Cortex-M4.
This patchset adds the support of the stm32_rproc driver allowing to control
the M4 remote processor.
Fabien Dessenne (8):
dt-bindings: stm32: add bind
On 03/21/2019 08:45 PM, Vignesh Raghavendra wrote:
> Add driver for Hyperbus memory controller on TI's AM654 SoC. Programming
> IP is pretty simple and provides direct memory mapped access to
> connected Flash devices.
>
> Add basic support for the IP without DMA. Second ChipSelect is not
> suppo
Hi Greg,
On Mon, 4 Mar 2019 at 16:59, Baolin Wang wrote:
>
> This patch set fixes the baud rate calculation formula issue, as well as
> adding power management support and DMA mode support for the Spreadtrum
> serial controller.
>
> Changes from v1:
> - The patch 1 of V1 was applied, so remove t
On Mon, Mar 25, 2019 at 9:39 PM Al Viro wrote:
>
> free the symlink body after the same RCU delay we have for freeing the
> struct inode itself, so that traversal during RCU pathwalk wouldn't step
> into freed memory.
>
> Signed-off-by: Al Viro
> ---
> diff --git a/fs/ceph/inode.c b/fs/ceph/inode
Fix headers to make way for adding helper functions.
Add onfi helper structure.
Add helper functions in raw NAND core, which later will be used during
ONFI detection.
Signed-off-by: Shivamurthy Shastri
---
drivers/mtd/nand/raw/internals.h | 6 +-
drivers/mtd/nand/raw/nand_base.c | 236 ++
Current support to ONFI parameter page is only for raw NAND, this patch
series turn ONFI support into generic. So that, other NAND devices like SPI
NAND can use this.
Support to detect parameter page is enabled in SPI NAND core.
Turned Micron SPI NAND driver to use parameter page.
>From SPI NAND
Move generic ONFI code to nand/ directory, which can be used by SPI
NAND layer.
Signed-off-by: Shivamurthy Shastri
---
drivers/mtd/nand/Makefile| 2 +-
drivers/mtd/nand/{raw/nand_onfi.c => onfi.c} | 0
drivers/mtd/nand/raw/Makefile| 1 -
3 files changed, 1 ins
Driver is redesigned using parameter page to support Micron SPI NAND
flashes.
Support for selecting die is enabled for multi-die flashes.
Turn OOB layout generic.
Fixup some of the parameter page data as per Micron datasheet.
Signed-off-by: Shivamurthy Shastri
---
drivers/mtd/nand/spi/micron.c
Some of the SPI NAND devices has parameter page which is similar to ONFI
table.
But, it may not be self sufficient to propagate all the required
parameters. Fixup function has been added in struct manufacturer to
accommodate this.
Signed-off-by: Shivamurthy Shastri
---
drivers/mtd/nand/spi/core
Hello,
On Tue, Mar 26, 2019 at 10:06:31AM +0100, Neil Armstrong wrote:
> On 25/03/2019 18:41, Martin Blumenstingl wrote:
> > On Mon, Mar 25, 2019 at 9:41 AM Uwe Kleine-König
> > wrote:
> >> On Sun, Mar 24, 2019 at 11:02:16PM +0100, Martin Blumenstingl wrote:
> >>> Back in January a "BUG: scheduli
The following changes since commit 8c2ffd9174779014c3fe1f96d9dc3641d9175f00:
Linux 5.1-rc2 (2019-03-24 14:02:26 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/jlayton/linux.git
tags/locks-v5.1
for you to fetch changes up to 945ab8f6de94430c23a8
On Tue, 26 Mar 2019 at 11:35, Anand Moon wrote:
(...)
> > This is third or fourth submission but you marked it as v1. This makes
> > it very difficult to discuss and reference previous versions.
> >
> > The commit message did not change since beginning (first version). I
> > asked twice that you
The devicetree bindings documentation for ad7606 should also include
the vendor prefix: ad7606.txt -> adi,ad7606.txt
Fixes: 6e33a125df66 ("dt-bindings: iio: adc: Add docs for AD7606 ADC")
Signed-off-by: Stefan Popa
---
Changes in v2:
- Added Fixes tag
MAINTAINERS | 2 +-
1 file changed,
These patches fix the following error message in dra7xx boards:
[4.833198] mmc1: Got data interrupt 0x0002 even though no data
operation was in progress.
Tested with 100 times boot tests on dra71x-evm, dra72x-evm and
dra7xx-evm.
v4:
Fixed commit description for patch 1.
Added SDHCI_INT_TIMEO
commit 5b0d62108b46 ("mmc: sdhci-omap: Add platform specific reset
callback") skips data resets during tuning operation. Because of this,
a data error or data finish interrupt might still arrive after a command
error has been handled and the mrq ended. This ends up with a "mmc0: Got
data interrupt
Make sdhci_finish_command() public so that it can be called from platform
drivers.
Signed-off-by: Faiz Abbas
---
drivers/mmc/host/sdhci.c | 3 ++-
drivers/mmc/host/sdhci.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
ind
Hi Stephen,
On 25/03/2019 18:10, Stephen Boyd wrote:
> This function returns an error if a child irqchip calls
> irq_chip_set_wake_parent() but its parent irqchip has the
> IRQCHIP_SKIP_SET_WAKE flag set. Let's return 0 for success here instead
> because there isn't anything to do.
>
> This keeps
From: Paresh Chaudhary
This patch added device tree binding info for MAX31856 driver.
Signed-off-by: Paresh Chaudhary
Signed-off-by: Matt Weber
Signed-off-by: Patrick Havelange
Reviewed-by: Rob Herring
---
Changes
v1 -> v2
[Matt
- Removed comment block and added possibilities of
thermoco
Hi Fabien
On 3/1/19 10:18 AM, Fabien Dessenne wrote:
Support IPCC mailbox on STM32MP157c-ed1 and STM32MP157a-dk1 boards.
Fabien Dessenne (3):
ARM: dts: stm32: add IPCC mailbox support on STM32MP157c
ARM: dts: stm32: enable IPCC mailbox support on STM32MP157c-ed1
ARM: dts: stm32: enable
From: Paresh Chaudhary
This patch adds support for Maxim MAX31856 thermocouple
temperature sensor support.
More information can be found in:
https://www.maximintegrated.com/en/ds/MAX31856.pdf
NOTE: Driver support only Comparator Mode.
Signed-off-by: Paresh Chaudhary
Signed-off-by: Matt Weber
This patch introduces common thermocouple types used by various
temperature sensors. Also a brief documentation explaining this
"thermocouple-type" property.
Signed-off-by: Patrick Havelange
---
Changes v7
- Merge header and doc in same patch
- Doc:add it's a single cell entry
- Doc:removed no
From: Rafael J. Wysocki
While the cpuinfo.max_freq value doesn't really matter for
intel_pstate in the active mode, in the passive mode it is used by
governors as the maximum physical frequency of the CPU and the
results of governor computations generally depend on it. Also it
is made available
From: Rafael J. Wysocki
It sometimes is necessary to find a cpufreq policy for a given CPU
and acquire its rwsem (for writing) immediately after that, so
introduce cpufreq_cpu_acquire() as a helper for that and the
complementary cpufreq_cpu_release().
Make cpufreq_update_policy() use the new fun
Hi All,
This is a new version of the following with one patch added:
> This is a follow-up to the RFT patch set posted previously:
> https://lore.kernel.org/lkml/9956076.f4luudm...@aspire.rjw.lan/
>
> Patch [1/3] causes intel_pstate to update all policies if it gets a _PPC
> change notification
From: Rafael J. Wysocki
In some cases, the platform firmware disables or enables turbo
frequencies for all CPUs globally before triggering a _PPC change
notification for one of them. Obviously, that global change affects
all CPUs, not just the notified one, and it needs to be acted upon by
cpufr
From: Rafael J. Wysocki
There is not reason for the minimum iowait boost value in the
schedutil cpufreq governor to depend on the available range of CPU
frequencies. In fact, that dependency is generally confusing,
because it causes the iowait boost to behave somewhat differently
on CPUs with th
Hi Fabrice
On 12/12/18 9:48 AM, Fabrice Gasnier wrote:
STM32 syscfg needs a clock to access registers.
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32mp157c.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b/arch/arm/boot/dts/stm32mp157
The recently added uart mux options had a few typos. Fix them.
Fixes: 43d0fe112585 ("ARM: dts: sun7i: add pinctrl for missing uart mux
options")
Reported-by: Werner Böllmann
Signed-off-by: Mans Rullgard
---
arch/arm/boot/dts/sun7i-a20.dtsi | 8
1 file changed, 4 insertions(+), 4 dele
On Tue, 26 Mar 2019 at 11:36, Rafael J. Wysocki wrote:
>
> On Mon, Mar 25, 2019 at 3:24 PM Ulf Hansson wrote:
> >
> > On Mon, 25 Mar 2019 at 13:21, Rafael J. Wysocki wrote:
> > >
> > > On Wednesday, February 27, 2019 8:58:35 PM CET Ulf Hansson wrote:
> > > > To be able to predict the sleep durat
Hi Kevin,
On Fri, 2019-03-22 at 15:53 -0700, Kevin Hilman wrote:
[...]
> Could ou make a immtable tag for this in your tree? This is needed for
> some upcoming DT users we'd like to queue for the next cycle.
I have just sent a reset/fixes pull request including this patch.
Once that gets merged,
In clocksource_enqueue(), it is unnecessary to do
entry = &tmp->list
in every loop,do it once in the last loop is enough.
Signed-off-by: Yongkai Wu
---
kernel/time/clocksource.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/kernel/time/clocksource.c b/kernel/time/clo
On 25/03/2019 20:48, Kangjie Lu wrote:
> Thanks for Steven Price's review of this patch. In the current code,
There's no need to include a "thanks" message in the commit message -
the "Reviewed-by" tag is sufficient. Please also remember to include an
appropriate version tag in the subject - this
Hi Mickael,
On Mon, Mar 25, 2019 at 12:22:17PM +, Mickael GUENE wrote:
...
> >> + /* register it for later use */
> >> + bridge->rx = ep;
> >> + bridge->rx.link_frequencies = ep.nr_of_link_frequencies == 1 ?
> >> + &bridge->link_frequency : NULL;
> >
> > I think you need to simply
On Tue, Mar 26, 2019 at 2:39 AM Al Viro wrote:
>
> free the symlink body after the same RCU delay we have for freeing the
> struct inode itself, so that traversal during RCU pathwalk wouldn't step
> into freed memory.
>
> Signed-off-by: Al Viro
> ---
> diff --git a/fs/ceph/inode.c b/fs/ceph/inode
Mimi,
Can you fix this and I can ack and send PR through my tree?
/Jarkko
On Mon, Mar 25, 2019 at 02:27:05PM -0700, Joe Perches wrote:
> A file pattern line in this section of the MAINTAINERS file in linux-next
> does not have a match in the linux source files.
>
> This could occur because a ma
On Tue, Mar 26, 2019 at 08:34:20AM +, Pankaj Suryawanshi wrote:
> Hello,
>
> 1. Is there any way to print whole physical and virtual memory map in
> kernel/user space ?
>
> 2. Is there any way to print map of cma area reserved memory and movable
> pages of cma area.
>
> 3. Is there any way
On Monday, March 25, 2019 5:04:38 PM CET Srinivas Pandruvada wrote:
> The base_frequency display in cpufreq sysfs for intel_pstate gets the
> guaranteed ratio by reading CPPC guaranteed performance register as a
> first preference before falling back to x86 MSR for Hardware P-state
> Capabilities.
On 25/03/2019 22:19, Kangjie Lu wrote:
> If __get_free_pages() fails, the patch returns -ENOMEM to avoid
As Bjorn suggested s/the patch returns/return/ would suffice and is
slightly easier to read. But I'm happy either way.
> NULL pointer dereference.
>
> Signed-off-by: Kangjie Lu
Reviewed-by:
> -Original Message-
> From: linux-edac-ow...@vger.kernel.org On
> Behalf Of Borislav Petkov
> Sent: Tuesday, March 26, 2019 2:57 AM
> To: Ghannam, Yazen
> Cc: linux-e...@vger.kernel.org; linux-kernel@vger.kernel.org;
> tony.l...@intel.com; x...@kernel.org; ra...@milecki.pl;
> cle...@gm
On Tue, 26 Mar 2019 at 12:01, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 4.9.166 release.
> There are 30 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Res
On Tue, Mar 26, 2019 at 11:54:59AM +0900, William Breathitt Gray wrote:
> On Mon, Mar 25, 2019 at 03:12:36PM +0200, Andy Shevchenko wrote:
> > On Mon, Mar 25, 2019 at 03:22:23PM +0900, William Breathitt Gray wrote:
> > > This macro iterates for each 8-bit group of bits (clump) with set bits,
> > >
On Fri, 11 Jan 2019 at 14:22, Łukasz Stelmach wrote:
>
> Add binding documentation for the True Random Number Generator
> found on Samsung Exynos 5250+ SoCs.
>
> Acked-by: Rob Herring
> Reviewed-by: Krzysztof Kozlowski
> Signed-off-by: Łukasz Stelmach
> ---
Rob,
Could you apply this directly?
On Mon, 25 Mar 2019 at 22:29, Joe Perches wrote:
>
> A file pattern line in this section of the MAINTAINERS file in linux-next
> does not have a match in the linux source files.
Thanks for reminder, the patch adding file is pending.
Best regards,
Krzysztof
On Tue, Mar 26, 2019 at 05:02:27PM +0800, Baoquan He wrote:
> The input parameter 'phys_index' of memory_block_action() is actually
> the section number, but not the phys_index of memory_block. Fix it.
> static int
> -memory_block_action(unsigned long phys_index, unsigned long action, int
> onli
This patch series we add support for WCN3998 BT chip set. This new chip set
is based from the WCN3990 with minimal power numbers. So here in this patch
The major difference between wcn3990 and WCN3998 is only power numbers.
where as init process and fw download is same with wcn3990.
So we add new c
Added new compatible for WCN3998 and corresponding voltage
and current values to WCN3998 compatible.
Changed driver code to support WCN3998
Signed-off-by: Harish Bandi
---
Changes in V5:
- changed is_qca_soc_type_wcn399x_family to
- qca_is_wcn399x helper function
- moved the qca_is_wcn399x funct
This patch enables regulators for the Qualcomm Bluetooth WCN3998
controller.
Signed-off-by: Harish Bandi
---
Changes in V5:
- modified the DT document for wcn399x to make inline
- in function call with driver code
---
Documentation/devicetree/bindings/net/qualcomm-bluetooth.txt | 5 +++--
1 fil
On 25/03/2019 12:34, Heiko Stuebner wrote:
Am Donnerstag, 21. März 2019, 17:22:44 CET schrieb Katsuhiro Suzuki:
Add UART dma channels as specified by the rk3399 TRM.
Refer:
RK3399 TRM V1.4: Chapter 12 DMA Controller
Signed-off-by: Katsuhiro Suzuki
applied for 5.2
As a heads-up, I did mana
On Fri, Mar 01, 2019 at 08:17:27AM +0100, Greg KH wrote:
> On Thu, Feb 28, 2019 at 11:37:45PM -0600, Parav Pandit wrote:
> > Introduce a new subdev bus which holds sub devices created from a
> > primary device. These devices are named as 'subdev'.
> > A subdev is identified similarly to pci device
On Mon, Mar 25, 2019 at 02:33:38PM -0700, Dan Williams wrote:
> On Mon, Mar 25, 2019 at 7:48 AM Jarkko Sakkinen
> wrote:
> >
> > Allow trusted.ko to initialize w/o a TPM. This commit adds checks to the
> > key type callbacks and exported functions to fail when a TPM is not
> > available.
> >
> > C
Hi Steve,
Thanks for the review! Few comments inline.
On 25.03.2019 19:12, Steven Price wrote:
> On 25/03/2019 15:30, laurentiu.tu...@nxp.com wrote:
>> From: Laurentiu Tudor
>>
>> If the dma controller is not yet probed, defer i2c probe.
>> The error path in probe was slightly modified (no funct
On 26/03/2019 08:45, Kishon Vijay Abraham I wrote:
> On 22/03/19 9:42 PM, Marc Gonzalez wrote:
>
>> Copy init sequence from downstream:
>> https://source.codeaurora.org/quic/la/kernel/msm-4.4/tree/arch/arm/boot/dts/qcom/msm8998-v2.dtsi?h=LE.UM.1.3.r3.25#n372
>
> Can't we instead have reference t
On Mon, Mar 25, 2019 at 04:47:35PM +0200, Jarkko Sakkinen wrote:
> Allow trusted.ko to initialize w/o a TPM. This commit adds checks to the
> key type callbacks and exported functions to fail when a TPM is not
> available.
>
> Cc: Dan Williams
> Cc: sta...@vger.kernel.org
> Fixes: 240730437deb ("
On Sat, Mar 23, 2019 at 10:08:35PM +0800, qiaozhou wrote:
> From: Qiao Zhou
>
> add clock driver support for ASR AquilaC SoC.
>
> We add clk-gate, clk-mix, and clk-pll drivers:
> 1. clk-gate driver is for regisers which have different enable/disable bits
> to control gating.
> 2. clk-mix driver
On 26/03/2019 07:23, Mukesh Ojha wrote:
>
> On 3/25/2019 11:07 PM, Steven Price wrote:
>> of_parse_phandle_with_args() requires the caller to call of_node_put() on
>> the returned args->np pointer. Otherwise the reference count will remain
>> incremented.
>>
>> However, in this case, since we don'
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