Hi Takashi,
FYI, the error/warning still remains.
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 12ad143e1b803e541e48b8ba40f550250259ecdd
commit: c97617a81a7616d49bc3700959e08c6c6f447093 ALSA: hda/ca0132 - Fix build
error without CONFIG_PCI
date: 5 w
The patch adds a new option to limit the output file size, then based
on it, we can create a wrapper of the perf command that uses the option
to avoid exhausting the disk space by the unconscious user.
Testing it:
# ./perf record -a --max-size 100M
Couldn't synthesize bpf events.
WARNING: T
i.MX7ULP EVK board has MIPI-DSI display, its backlight is supplied
by TPM PWM module, this patch set enables i.MX7ULP TPM PWM driver
support and also add backlight support for MIPI-DSI display.
Anson Huang (5):
dt-bindings: pwm: Add i.MX TPM PWM binding
pwm: Add i.MX TPM PWM driver support
A
This patch adds i.MX7ULP EVK board MIPI-DSI backlight
support.
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx7ulp-evk.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/imx7ulp-evk.dts
b/arch/arm/boot/dts/imx7ulp-evk.dts
index 002b0c5..f5b9828 100644
--- a/a
i.MX7ULP has TPM(Low Power Timer/Pulse Width Modulation Module)
inside, add TPM PWM driver support.
Signed-off-by: Anson Huang
---
drivers/pwm/Kconfig | 9 ++
drivers/pwm/Makefile | 1 +
drivers/pwm/pwm-imx-tpm.c | 277 ++
3 files change
Add i.MX7ULP EVK board PWM0 support.
Signed-off-by: Anson Huang
---
arch/arm/boot/dts/imx7ulp-evk.dts | 12
arch/arm/boot/dts/imx7ulp.dtsi| 11 +++
2 files changed, 23 insertions(+)
diff --git a/arch/arm/boot/dts/imx7ulp-evk.dts
b/arch/arm/boot/dts/imx7ulp-evk.dts
inde
Select CONFIG_PWM_IMX_TPM by default to support i.MX7ULP
TPM PWM.
Signed-off-by: Anson Huang
---
arch/arm/configs/imx_v6_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/imx_v6_v7_defconfig
b/arch/arm/configs/imx_v6_v7_defconfig
index 5586a50..57862c6 100644
---
Add i.MX TPM(Low Power Timer/Pulse Width Modulation Module) PWM binding.
Signed-off-by: Anson Huang
---
.../devicetree/bindings/pwm/imx-tpm-pwm.txt| 23 ++
1 file changed, 23 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pwm/imx-tpm-pwm.txt
diff
On Fri, Mar 08, 2019 at 10:23:10PM +0800, Mao Wenan wrote:
> Add the missing uart_unregister_driver() before return
> from sci_probe_single() in the error handling case.
>
> Signed-off-by: Mao Wenan
> ---
> drivers/tty/serial/sh-sci.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
On 11.03.2019 0:52, Linus Torvalds wrote:
On Sun, Mar 10, 2019 at 2:06 PM Rasmus Villemoes
wrote:
IIRC, this has been attempted before, causing a userspace regression
because some sysfs/procfs file matched with %u or %x, and somebody wrote
-1 to get 0x .
.. which is correct anyway. T
On Fri, Mar 8, 2019 at 10:59 PM Nicolin Chen wrote:
>
> On Fri, Mar 08, 2019 at 05:39:30PM +, Daniel Baluta wrote:
>
> > @@ -542,6 +544,11 @@ static int fsl_sai_trigger(struct snd_pcm_substream
> > *substream, int cmd,
> > case SNDRV_PCM_TRIGGER_START:
> > case SNDRV_PCM_TRIGGER_R
Add ls1028a compatible to bindings documentation.
Signed-off-by: Peng Ma
---
depends on:
- http://patchwork.ozlabs.org/patch/1045217/
.../devicetree/bindings/ata/ahci-fsl-qoriq.txt |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/Documentation/devicetree/bi
Ls1028a is a new introduced soc which supports ATA3.0
Signed-off-by: Peng Ma
---
depends on:
- http://patchwork.ozlabs.org/patch/1045218/
drivers/ata/ahci_qoriq.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/ata/ahci_qoriq.c b/drivers/ata/ahci_qoriq
Ls1028a SATA ecc address with more than 32 bit, so we should corrrect the
address.
Signed-off-by: Peng Ma
---
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
b/arch/arm64/boot
Ping...
Best Regards!
Anson Huang
> -Original Message-
> From: Anson Huang [mailto:anson.hu...@nxp.com]
> Sent: 2019年2月12日 20:40
> To: jassisinghb...@gmail.com; shawn...@kernel.org;
> s.ha...@pengutronix.de; ker...@pengutronix.de; feste...@gmail.com;
> linux-kernel@vger.kernel.org; linux-
Hi Kangjie,
On Mon, Mar 11, 2019 at 8:01 AM Kangjie Lu wrote:
> In case of_get_phy_mode fails, the fix returns NULL to avoid
> the NULL pointer dereference.
>
> Signed-off-by: Kangjie Lu
Thanks for your patch!
> --- a/drivers/net/ethernet/renesas/sh_eth.c
> +++ b/drivers/net/ethernet/renesas/s
Hello Yu,
We had some disagreements over this series last time around after which I had
posted the following series [1] which tried to enable
ARCH_ENABLE_SPLIT_PMD_PTLOCK
after doing some pgtable accounting changes. After some thoughts and
deliberations
I figure that its better not to do pgtable
On Sat, Mar 09, 2019 at 10:50:37AM +0800, Mao Wenan wrote:
> Add the missing uart_unregister_driver() and i2c_del_driver() before return
> from sc16is7xx_init() in the error handling case.
>
> Reviewed-by: Vladimir Zapolskiy
> Signed-off-by: Mao Wenan
> ---
> v1->v2: fix compile warning if CONF
On Fri, Mar 8, 2019 at 11:30 AM Rajat Jain wrote:
>
> On Fri, Mar 8, 2019 at 12:57 AM Hans de Goede wrote:
> >
> > Hi,
> >
> > On 08-03-19 01:04, Srinivas Pandruvada wrote:
> > > On Thu, 2019-03-07 at 15:07 -0800, Rajat Jain wrote:
> > >> Hello,
> > >>
> > >> On Thu, Mar 7, 2019 at 12:37 PM Hans
The IRQ mapping was changed to not being created in the rtc-mt6397
driver, so the irq_dispose_mapping is no longer needed.
Also the dev_id passed to free_irq should be the same as the last
argument passed to request_threaded_irq.
This prevents a "Trying to free already-free IRQ 274" warning when
un
The function argument for the ISC_D0 on PC9 was incorrect. According to
the documentation it should be 'C' aka 3.
Signed-off-by: David Engraf
---
arch/arm/boot/dts/sama5d2-pinfunc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sama5d2-pinfunc.h
b/arch/ar
On Sun, Mar 10, 2019 at 11:23 PM Karen Palacio
wrote:
>
> Add spaces around minus operator to fix readibility.
>
> Signed-off-by: Karen Palacio
> ---
> drivers/staging/iio/adc/ad7192.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/staging/iio/adc/ad7192.c
> b/
Hello Oleksij,
On Thu, 10 Jan 2019 11:12:30 +0100
Oleksij Rempel wrote:
> From: Steven Walter
>
> Preparation for converting to kthread_worker
>
> Signed-off-by: Steven Walter
> Tested-by: Oleksij Rempel
Tested-by: Alexander Sverdlin
> ---
> drivers/tty/tty_buffer.c | 12 +---
>
On 2019-03-11 11:46:00 [+0900], Sergey Senozhatsky wrote:
> On (03/08/19 15:02), Sebastian Andrzej Siewior wrote:
> > On 2019-02-12 15:30:03 [+0100], John Ogness wrote:
> >
> > you removed the whole `irq_work' thing. You can also remove the include
> > for linux/irq_work.h.
>
> It may be too earl
On 07.03.2019 11:29, Alexey Budankov wrote:
>
> On 05.03.2019 15:26, Jiri Olsa wrote:
>> On Fri, Mar 01, 2019 at 06:43:28PM +0300, Alexey Budankov wrote:
>>>
>>> Define bytes_transferred and bytes_compressed metrics to calculate
>>> comp_ratio=transferred/compressed in the end of the data collecti
On Mon, Mar 11, 2019 at 11:48 AM Hsin-Hsiung Wang
wrote:
>
> This adds support for the MediaTek MT6358 PMIC. This is a
> multifunction device with the following sub modules:
>
> - Regulator
> - RTC
> - Codec
> - Interrupt
>
> It is interfaced to the host controller using SPI interface
> by a propr
Hello Oleksij,
On Thu, 10 Jan 2019 11:12:31 +0100
Oleksij Rempel wrote:
> From: Steven Walter
>
> Use kthread_worker instead of workqueues. For now there is only a
> single workqueue, but the intention is to bring back the "low_latency"
> tty option, along with a second high-priority kthread
Hello Oleksij,
On Thu, 10 Jan 2019 11:12:32 +0100
Oleksij Rempel wrote:
> sched_priority = 1 is enough to dramatically reduce latency
> on have system load produced by tasks with default user space prio.
>
> Signed-off-by: Oleksij Rempel
Tested-by: Alexander Sverdlin
> ---
> drivers/tty/tt
Hi Kangjie,
Thank you for the patch.
On Mon, Mar 11, 2019 at 12:53:33AM -0500, Kangjie Lu wrote:
> In case spi_sync_locked fails, the fix reports the error and
> returns the error code upstream.
>
> Signed-off-by: Kangjie Lu
Reviewed-by: Laurent Pinchart
> ---
> drivers/mmc/host/mmc_spi.c |
On 03/10/2019 06:49 AM, Yu Zhao wrote:
> Switch from per mm_struct to per pmd page table lock by enabling
> ARCH_ENABLE_SPLIT_PMD_PTLOCK. This provides better granularity for
> large system.
>
> I'm not sure if there is contention on mm->page_table_lock. Given
> the option comes at no cost (apart
On Mon, Mar 11, 2019 at 1:41 PM Qii Wang wrote:
>
> When two i2c controllers are internally connected to the same
> GPIO pins, the arb clock is needed to ensure that the waveforms
> do not interfere with each other. And we also need to enable
> the interrupt to find arb lost, old i2c controllers a
On 08/03/2019 23:43, Tony Krowiak wrote:
On 2/22/19 10:29 AM, Pierre Morel wrote:
When the device is remove, we must make sure to
clear the interruption and reset the AP device.
We also need to clear the CRYCB of the guest.
Signed-off-by: Pierre Morel
---
drivers/s390/crypto/vfio_ap_drv.c
On Mon, Mar 11, 2019 at 10:12:48AM +0200, Alexandru Ardelean wrote:
> On Sun, Mar 10, 2019 at 11:23 PM Karen Palacio
> wrote:
> >
> > Add spaces around minus operator to fix readibility.
> >
> > Signed-off-by: Karen Palacio
> > ---
> > drivers/staging/iio/adc/ad7192.c | 2 +-
> > 1 file changed,
Hi Mimi,
> On Thu, 2019-02-28 at 23:00 +0100, Petr Vorel wrote:
> > > + local keypair1="$2"
> > > + local keypair2="$3"
> > > +
> > > + mount_securityfs
> > > +
> > > + local ima_policy=$SECURITYFS/ima/policy
> > > + if [ ! -e $ima_policy ]; then
> > > + log_fail "$ima_policy not found"
>
On Mon, Mar 11, 2019 at 1:41 PM Qii Wang wrote:
>
> Add i2c compatible for MT8183. Compare to MT2712 i2c controller,
> MT8183 has different register offsets. Ltiming_reg is added to
> adjust low width of SCL. Arb clock and dma_sync are needed.
>
> Signed-off-by: Qii Wang
LTIMING support could be
On Mon, Mar 11, 2019 at 1:41 PM Qii Wang wrote:
>
> This patch adds nodes for I2C controller.
>
> Signed-off-by: Qii Wang
> ---
This applies on top of some other uncommitted series, right? This is
fine, but please say which one.
> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 190
>
Hi Arnd,
On Wed, Feb 13, 2019 at 3:22 PM Arnd Bergmann wrote:
> On Wed, Feb 13, 2019 at 6:22 AM Stephen Rothwell
> wrote:
> > On Tue, 22 Jan 2019 14:10:27 +1100 Stephen Rothwell
> > wrote:
> > > Today's linux-next merge of the pidfd tree got conflicts in:
> > >
> > > arch/x86/entry/syscalls
On Fri 01-03-19 15:38:54, Yafang Shao wrote:
> If we want to know the zone type, we have to check whether
> CONFIG_ZONE_DMA, CONFIG_ZONE_DMA32 and CONFIG_HIGHMEM are set or not,
> that's not so convenient.
>
> We'd better show the zone type directly.
I do agree that zone number is quite PITA to p
On Tue 05-03-19 23:08:45, Stefan Agner wrote:
> Hi Michal,
>
> On 06.04.2018 11:56, Michal Hocko wrote:
> > On Fri 25-08-17 08:45:40, Michal Hocko wrote:
> >> On Thu 24-08-17 17:17:41, Russell King - ARM Linux wrote:
> >> > On Fri, Aug 18, 2017 at 01:24:02PM +0200, Michal Hocko wrote:
> >> > > Hi
From: Ben Ho
Add basic chip support for Mediatek 8183, include
uart node with correct uart clocks, pwrap device
Add clock controller nodes, include topckgen, infracfg,
apmixedsys and subsystem.
Signed-off-by: Ben Ho
Signed-off-by: Erin Lo
Signed-off-by: Seiya Wang
Signed-off-by: Weiyi Lu
Si
MT8183 is a SoC based on 64bit ARMv8 architecture.
It contains 4 CA53 and 4 CA73 cores.
MT8183 share many HW IP with MT65xx series.
This patchset was tested on MT8183 evaluation board and use correct clock to
shell.
This series contains document bindings, device tree including interrupt, uart,
c
This adds dt-binding documentation of uart for Mediatek MT8183 SoC
Platform.
Signed-off-by: Erin Lo
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/serial/mtk-uart.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt
b/Docume
On Sun, Mar 10, 2019 at 7:47 PM Marcelo Schmitt
wrote:
>
> Add an ABI documentation for the ad5933 driver.
There's already an ABI documentation for this driver.
See:
https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio.git/tree/drivers/staging/iio/Documentation/sysfs-bus-iio-impedance-analyz
* Linus Torvalds wrote:
> On Sun, Mar 10, 2019 at 4:33 AM Thomas Gleixner wrote:
> >
> > A small set of fixes for the scheduler:
>
> What? No.
>
> This is completely broken, and even warns loudly about it.
>
> kernel/sched/cpufreq_schedutil.c: In function ‘sugov_iowait_boost’:
> ./inclu
Hi Arnd,
On Thu, Mar 7, 2019 at 4:55 PM Arnd Bergmann wrote:
> Clang-8 evaluates both sides of a ?: expression to check for
> valid arithmetic even in the side that is never taken. This
> results in a build warning:
>
> drivers/spi/spi-sh-msiof.c:1052:24: error: shift count >= width of type
> [-
On 3/11/2019 8:32 AM, Kangjie Lu wrote:
In case kmemdup fails, the fix returns -ENOMEM to avoid NULL
pointer dereferences.
Hi Kangjie Lu,
Are you fixing any reported issue with this? If you looked further you
would see that this function is called in two places and the return
value is not ch
On 07/03/2019 16:13, Neil Armstrong wrote:
> From: Jerome Brunet
>
> Add the always on UART pinctrl setting to the g12a soc DT and
> use it for the u200 reference design
>
> Signed-off-by: Jerome Brunet
> Signed-off-by: Neil Armstrong
> ---
> .../arm64/boot/dts/amlogic/meson-g12a-u200.dts |
> Il giorno 11 mar 2019, alle ore 10:08, Holger Hoffstätte
> ha scritto:
>
> Hi,
>
> Guess what - more problems ;-)
The curse of the print SHARED :)
Thank you very much Holger for testing what I guiltily did not. I'll
send a v3 as Francesco fixes this too.
Paolo
> This time when buildin
Hi Finn,
On Thu, Mar 7, 2019 at 10:42 PM Finn Thain wrote:
> On Thu, 7 Mar 2019, Geert Uytterhoeven wrote:
> > On Thu, Mar 7, 2019 at 3:59 AM Finn Thain
> > wrote:
> > > On Tue, 5 Mar 2019, Andreas Schwab wrote:
> > > > On Mar 05 2019, Finn Thain wrote:
> > > >
> > > > > interesting that the k
On Fri, 8 Mar 2019 11:39:26 -0300
Arnaldo Carvalho de Melo wrote:
> Em Mon, Mar 04, 2019 at 03:13:21PM +0200, Adrian Hunter escreveu:
> > Since commit 4d99e4136580 ("perf machine: Workaround missing maps for x86
> > PTI entry trampolines"), perf tools has been creating more than one kernel
> > ma
On Mon, Mar 11, 2019 at 05:12:03PM +0800, maowenan wrote:
>
>
> On 2019/3/11 15:46, Dan Carpenter wrote:
> > On Sat, Mar 09, 2019 at 10:50:37AM +0800, Mao Wenan wrote:
> >> Add the missing uart_unregister_driver() and i2c_del_driver() before return
> >> from sc16is7xx_init() in the error handling
Hello,
On Mon, Mar 11, 2019 at 07:16:16AM +, Anson Huang wrote:
> i.MX7ULP has TPM(Low Power Timer/Pulse Width Modulation Module)
> inside, add TPM PWM driver support.
>
> Signed-off-by: Anson Huang
> ---
> drivers/pwm/Kconfig | 9 ++
> drivers/pwm/Makefile | 1 +
> drivers/p
Add the missing uart_unregister_driver() and i2c_del_driver() before
return from sc16is7xx_init() in the error handling case.
Signed-off-by: Mao Wenan
Reviewed-by: Vladimir Zapolskiy
---
v1->v2: fix compile warning if CONFIG_SERIAL_SC16IS7XX_SPI is not exist.
v2->v3: create functions for i2c a
> -Original Message-
> From: Tony Jones [mailto:to...@suse.de]
> Sent: Saturday, March 9, 2019 2:05 AM
> To: linux-kernel@vger.kernel.org
> Cc: linux-perf-us...@vger.kernel.org; a...@kernel.org; Tony Jones
> ; Hunter, Adrian ; Arnaldo
> Carvalho de Melo ; Seeteena Thoufeek
>
> Subject: [PA
On 10.03.19 11:01, Jonathan Cameron wrote:
Hi,
> Now all we need to do is to check new stuff more carefully so
> we don't need to do this again in a few months.
>
> Hmm. Probably over optimistic, but like a hair cut, we can
> look good for at least a week or two :)
Maybe we should extend checkp
On 2019-03-11, at 11:31:59 +0300, Dan Carpenter wrote:
> On Mon, Mar 11, 2019 at 10:12:48AM +0200, Alexandru Ardelean wrote:
> > On Sun, Mar 10, 2019 at 11:23 PM Karen Palacio
> > wrote:
> > >
> > > Add spaces around minus operator to fix readibility.
> > >
> > > Signed-off-by: Karen Palacio
> >
From: Hou Zhiqiang
This patch set is aim to refactor the Mobiveil driver and add
PCIe support for NXP Layerscape series SoCs integrated Mobiveil's
PCIe Gen4 controller.
Hou Zhiqiang (28):
PCI: mobiveil: uniform the register accessors
PCI: mobiveil: format the code without function change
P
From: Hou Zhiqiang
It's confused that R/W some registers by csr_readl()/csr_writel(),
while others by read_paged_register()/write_paged_register().
Actually the low 3KB of 4KB PCIe configure space can be accessed
directly and high 1KB is paging area. So this patch uniformed the
register accessors
From: Hou Zhiqiang
This patch corrected the returned error number by convention,
and removed a unnecessary error check.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V4:
- no change
drivers/pci/controller/pcie-mobiveil.c | 8 +++-
1 file c
From: Hou Zhiqiang
Just format the code without functionality change.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
---
V4:
- no change
drivers/pci/controller/pcie-mobiveil.c | 261 +
1 file changed, 137 insertions(+), 124 deletions(-)
diff --git a/drivers/
From: Hou Zhiqiang
The current code does not support multiple MSIs, so remove
the corresponding flag from the msi_domain_info structure.
Fixes: 1e913e58335f ("PCI: mobiveil: Add MSI support")
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
---
V4:
- no change
drivers/pci/controller/p
From: Hou Zhiqiang
Fix up the Class Code to PCI bridge, do not change the Revision ID.
And move the fixup to mobiveil_host_init function.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge
IP driver")
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahman
From: Hou Zhiqiang
Outbound window routine:
- Removed unused var definition and register read operations.
- Added the upper 32-bit cpu address setup of the window.
- Instead of blindly write, only change the fields specified.
- Masked the lower bits of window size in case override the
cont
From: Hou Zhiqiang
As the .map_bus() use the WIN_NUM_0 for CFG transactions,
it's better passing WIN_NUM_0 explicitly when initialize
the CFG outbound window.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V4:
- no change
drivers/pci/controller
From: Hou Zhiqiang
It should get PCI base address from the DT node property 'ranges'
to setup MEM/IO outbound windows instead of always zero.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge
IP driver")
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subra
From: Hou Zhiqiang
In the loop block, there is not code change the loop key,
this patch updated the loop key by re-read the INTx status
register.
This patch also change to clear the handled INTx status.
Note: Need MV to test this fix.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host
From: Hou Zhiqiang
The inbound windows have different register set with outbound windows.
This patch change the MEM inbound window to the first one.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V4:
- no change
drivers/pci/controller/pcie-mobi
From: Hou Zhiqiang
As it won't delete any node in this iteration, replaced
the function resource_list_for_each_entry_safe() with
the resource_list_for_each_entry().
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V4:
- no change
drivers/pci/cont
sob., 9 mar 2019 o 05:08 Kangjie Lu napisał(a):
>
> ida_simple_get may fail and return a negative error number.
> The fix checks its return value; if it fails, go to err_destroy.
>
> Signed-off-by: Kangjie Lu
> ---
> drivers/gpio/gpio-exar.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --g
From: Hou Zhiqiang
Move irq_set_chained_handler_and_data() out of DT parse function.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V4:
- no change
drivers/pci/controller/pcie-mobiveil.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
From: Hou Zhiqiang
Host initial sequence does not depend on PCIe link up, so move it
to the place just before the enumeration.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V4:
- no change
drivers/pci/controller/pcie-mobiveil.c | 15 +++---
From: Hou Zhiqiang
Allow CFG transactions to all functions of Endpoint implemented
multiple functions.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host
Bridge IP driver")
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
---
V4:
- Split the link up check to the 18th patch
dr
From: Hou Zhiqiang
The reset value is all zero, so set a workable value for Primary,
Secondary and Subordinate bus numbers.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V4:
- no change
drivers/pci/controller/pcie-mobiveil.c | 6 ++
1 file
From: Hou Zhiqiang
Avoid to issue CFG transactions to link partner when the PCIe
link is not up.
Signed-off-by: Hou Zhiqiang
---
V4:
- Splited from the 17th patch
drivers/pci/controller/mobiveil/pcie-mobiveil-host.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/pci/controll
From: Hou Zhiqiang
Change the "gpio_slave" and "apb_csr" to optional, the "gpio_slave"
is not used in current code, and "apb_csr" is not used by some
platforms.
Signed-off-by: Hou Zhiqiang
Acked-by: Subrahmanya Lingappa
Acked-by: Rob Herring
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmany
From: Hou Zhiqiang
As the Mobiveil PCIe controller support RC&EP DAUL mode, and to
make platforms which integrated the Mobiveil PCIe IP more easy
to add their drivers, this patch moved the Mobiveil driver to
a new directory 'drivers/pci/controller/mobiveil' and refactored
it according to the abst
From: Hou Zhiqiang
Disabled all inbound and outbound windows before set up the windows
in kernel, in case transactions match the window set by bootloader.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V4:
- no change
.../controller/mobiveil/pc
From: Hou Zhiqiang
As there are some Byte and Half-Work width registers in PCIe
configuration space, add Byte and Half-Word width register
accessors.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V4:
- no change
.../pci/controller/mobiveil/pci
Hi Linus,
here is the big pull request for the pin control subsystem updates
for the v5.1 kernel cycle.
Note that this had pulled in an immutable branch for Qualcomm
hierarchical IRQ domains, affecting a bunch of subsystems such
as SPMI, MFD and the ARM architecture. You already have this
in your
From: Hou Zhiqiang
Make the mobiveil_host_init function can be used to re-init
host controller's PAB and GPEX CSR register block, as NXP
integrated Mobiveil IP has to reset and then re-init the PAB
and GPEX CSR registers upon Hot-reset.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Subrahmanya Linga
From: Hou Zhiqiang
Add PCIe Gen4 controller DT bindings of NXP Layerscape SoCs.
Signed-off-by: Hou Zhiqiang
---
V4:
- no change
.../bindings/pci/layerscape-pci-gen4.txt | 52 +++
MAINTAINERS | 8 +++
2 files changed, 60 insertions(+)
c
From: Hou Zhiqiang
When LX2 PCIe controller is sending multiple split completions and
ACK latency expires indicating that ACK should be send at priority.
But because of large number of split completions and FC update DLLP,
the controller does not give priority to ACK transmission. This
results in
From: Hou Zhiqiang
PCIe configuration access to non-existent function triggered
SERROR interrupt exception.
Workaround:
Disable error reporting on AXI bus during the Vendor ID read
transactions in enumeration.
This ERRATA is only for LX2160A Rev1.0, and it will be fixed
in Rev2.0.
Signed-off-b
From: Hou Zhiqiang
This PCIe controller is based on the Mobiveil GPEX IP, which is
compatible with the PCI Express™ Base Specification, Revision 4.0.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
---
V4:
- no change
drivers/pci/controller/mobiveil/Kconfig | 10 +
drivers/pci
From: Hou Zhiqiang
Sometimes there is not a PCIe Endpoint in the PCIe slot, so do
not exit when the PCIe link is not up. And degrade the print
level of link up info.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V4:
- no change
drivers/pci/con
From: Hou Zhiqiang
The LX2160A integrated 6 PCIe Gen4 controllers.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
---
V4:
- no change
.../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 163 ++
1 file changed, 163 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale
On 2019/3/11 15:22, Dan Carpenter wrote:
> On Fri, Mar 08, 2019 at 10:23:10PM +0800, Mao Wenan wrote:
>> Add the missing uart_unregister_driver() before return
>> from sci_probe_single() in the error handling case.
>>
>> Signed-off-by: Mao Wenan
>> ---
>> drivers/tty/serial/sh-sci.c | 4 +++-
>
On 3/9/19 11:50 AM, Wolfram Sang wrote:
> On Sat, Mar 09, 2019 at 11:13:40AM +0100, Wolfram Sang wrote:
>> On Wed, Mar 06, 2019 at 03:12:16PM +, Bich HEMON wrote:
>>> From: Nicolas Le Bayon
>>>
>>> It conforms with Reference Manual I2C timing section.
>>>
>>> Signed-off-by: Nicolas Le Bayon
>
From: Hou Zhiqiang
Enable the PCIe Gen4 controller driver for Layerscape SoCs.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
---
V4:
- no change
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defcon
Apply the unprivileged_userfaultfd check when doing userfaultfd
syscall. We didn't check it in other paths of userfaultfd (e.g., the
ioctl() path) because we don't want to drag down the fast path of
userfaultfd, as suggested by Andrea.
Suggested-by: Andrea Arcangeli
Suggested-by: Mike Rapoport
Introduce a new sysctl called "vm.unprivileged_userfaultfd" that can
be used to decide whether userfaultfd syscalls are allowed by
unprivileged users. It'll allow three modes:
- disabled: disallow unprivileged users to use uffd
- enabled: allow unprivileged users to use uffd
- kvm:
Hi Laurent,
On Mon, Mar 11, 2019 at 2:49 AM Laurent Pinchart
wrote:
>
> Hi Jacob,
>
> A few more comments on the code this time.
>
> First of all, this has bit-rotten a bit and doesn't compile. The
> following patch fixes it. Feel free to squash it into this patch (no
> need to credit me or add m
Hi,
(The idea comes from Andrea, and following discussions with Mike and
other people)
This patchset introduces a new sysctl flag to allow the admin to
forbid users from using userfaultfd:
$ cat /proc/sys/vm/unprivileged_userfaultfd
[disabled] enabled kvm
- When set to "disabled", all un
Introduce a new MMF_USERFAULTFD_ALLOW flag and tag it upon the process
memory address space as long as the process opened the /dev/kvm once.
It'll be dropped automatically when fork() by MMF_INIT_TASK to reset
the userfaultfd permission.
Detecting the flag gives us a chance to open the green light
Add the missing uart_unregister_driver() before return
from sci_probe_single() in the error handling case.
Signed-off-by: Mao Wenan
---
v1->v2: add uart_unregister_driver() if mctrl_gpio_init is failed.
drivers/tty/serial/sh-sci.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
d
czw., 7 mar 2019 o 11:39 Arnd Bergmann napisał(a):
>
> clang warns about a tentative array definition in the gpio-omap driver:
>
> drivers/gpio/gpio-omap.c:1282:34: error: tentative array definition assumed
> to have one element [-Werror]
> static const struct of_device_id omap_gpio_match[];
>
>
On Mon, 2019-03-11 at 16:36 +0800, Nicolas Boichat wrote:
> On Mon, Mar 11, 2019 at 1:41 PM Qii Wang wrote:
> >
> > This patch adds nodes for I2C controller.
> >
> > Signed-off-by: Qii Wang
> > ---
>
> This applies on top of some other uncommitted series, right? This is
> fine, but please say wh
Inertial sensor data collection and processing can be controlled by
configuring one of the DIOx lines as an external clock input. This
option is available for all devices supported by this driver. However,
only adis1649x devices support different modes for the external clock.
Sync mode is supporte
Add documentation for optional use of external clock. All devices
supported by this driver can work with an external clock in sync mode.
Another mode, called Pulse Per Second (PPS) is supported only by adis1649x
devices. The mode is selected by using the "clock-names" property.
The pin which is us
The Xilinx MIPI CSI-2 Rx Subsystem soft IP is used to capture images
from MIPI CSI-2 camera sensors and output AXI4-Stream video data ready
for image processing. Please refer to PG232 for details.
The driver is used to set the number of active lanes, if enabled
in hardware. The CSI2 Rx controller
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