show the gfp flag names instead of the gfp_mask could make the trace
more convenient.
Signed-off-by: Yafang Shao
---
include/trace/events/compaction.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/trace/events/compaction.h
b/include/trace/events/compaction.h
in
Only mm_compaction_isolate_{free, migrate}pages may be used when
CONFIG_COMPACTION is not set.
All others are used only when CONFIG_COMPACTION is set.
Signed-off-by: Yafang Shao
---
include/trace/events/compaction.h | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/includ
As per the Host Controller Standard Specification Version 4.20,
limitation of tuning iteration count is removed as PLL locking
time can be longer than UHS-1 tuning due to larger PVT fluctuation
and it will result in increase of tuning iteration to complete the
tuning.
This patch creates a hook get
This patch adds support for post tuning process needed for some hosts
to perform after successful completion of HW tuning.
Signed-off-by: Sowjanya Komatineni
---
drivers/mmc/host/sdhci.c | 6 +-
drivers/mmc/host/sdhci.h | 1 +
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/dri
Default tap and trim values are incorrect for Tegra186 SDMMC4.
This patch fixes it.
Signed-off-by: Sowjanya Komatineni
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
b/arch/arm64/boot/
ddr_signaling is set to true for DDR50 and DDR52 modes but is
not set back to false for other modes. This programs incorrect
host clock when mode change happens from DDR52/DDR50 to other
SDR or HS modes like incase of mmc_retune where it switches
from HS400 to HS DDR and then from HS DDR to HS mode
This patch includes below HW tuning related fixes.
- configures tuning parameters as per Tegra TRM
- WAR fix for manual tap change
- HW auto-tuning post process
As per Tegra TRM, SDR50 mode tuning execution takes upto maximum
of 256 tuning iterations and SDR104/HS200/HS400 modes tuning
execution t
This patch adds a quirk for setting CMD_TIMING to 1 in descriptor
for DCMD with R1B response type to allow the command to be sent to
device during data activity or busy time.
Tegra186 CQHCI host has bug where it selects DATA_PRESENT_SELECT
to 1 by CQHCI controller for DCMDs with R1B response type
SDHCI controller of Tegra194 is similar to SDHCI controller in Tegra186.
This patch documents Tegra194 sdhci compatible string.
Signed-off-by: Sowjanya Komatineni
---
Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/
This patch enables command queue support for Tegra186 SDMMC4.
Signed-off-by: Sowjanya Komatineni
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 472f55fe948
Tegra186 design has a known bug where CQE does not generated task
complete interrupt for data transfer tasks issued after DCMD task
with R1b response type and results in timeout.
SW WAR is to set CMD_TIMING to 1 in task descriptor for DCMDs with
R1b response type. This bug and SW WAR is applicable
This patch adds define for CBC field mask of the register
CQHCI_SSC1.
Signed-off-by: Sowjanya Komatineni
---
drivers/mmc/host/cqhci.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/mmc/host/cqhci.h b/drivers/mmc/host/cqhci.h
index f96d8565cc07..f1dc48c7436f 100644
--- a/drivers/mmc/
Tegra CQHCI/SDHCI design prevents write access to SDHCI block size
register when CQE is enabled and unhalted.
CQHCI driver enabled CQE prior to invoking sdhci_cqe_enable which
violates this Tegra specific host requirement.
This patch fixes this by configuring sdhci block registers prior
to CQE un
From: Florian Fainelli
Date: Wed, 27 Feb 2019 16:29:16 -0800
> There are no more in tree users of the
> switchdev_trans_item_{dequeue,enqueue} or switchdev_trans_item structure
> in the kernel since commit 00fc0c51e35b ("rocker: Change world_ops API
> and implementation to be switchdev independan
I tested this vs. Samba a few minutes ago with test 208 - looks like
it works. Thank you!
Now just need some additional reviews as this can be a complex area of code.
On Fri, Mar 1, 2019 at 9:04 PM Long Li wrote:
>
> From: Long Li
>
> When sending a wdata, transport may return -EAGAIN. In thi
On 2019/3/1 19:07, Jean-Philippe Brucker wrote:
> Hi Leizhen,
>
> On 01/03/2019 04:44, Leizhen (ThunderTown) wrote:
>>
>>
>> On 2019/2/26 20:36, Hanjun Guo wrote:
>>> Hi Jean,
>>>
>>> On 2019/1/31 22:55, Jean-Philippe Brucker wrote:
Hi,
On 31/01/2019 13:52, Zhen Lei wrote:
>
Hello,
syzbot found the following crash on:
HEAD commit:7d762d69145a afs: Fix manually set volume location server ..
git tree: upstream
console output: https://syzkaller.appspot.com/x/log.txt?x=13044284c0
kernel config: https://syzkaller.appspot.com/x/.config?x=b76ec970784287c
das
Hello,
syzbot found the following crash on:
HEAD commit:42fd8df9d1d9 Add linux-next specific files for 20190228
git tree: linux-next
console output: https://syzkaller.appspot.com/x/log.txt?x=16c3cd5cc0
kernel config: https://syzkaller.appspot.com/x/.config?x=c0f38652d28b522f
dashb
Hello,
syzbot found the following crash on:
HEAD commit:c63e9e91a254 Add linux-next specific files for 20190301
git tree: linux-next
console output: https://syzkaller.appspot.com/x/log.txt?x=16a559b2c0
kernel config: https://syzkaller.appspot.com/x/.config?x=f5875f9dc6e009b2
Hello,
syzbot found the following crash on:
HEAD commit:c63e9e91a254 Add linux-next specific files for 20190301
git tree: linux-next
console output: https://syzkaller.appspot.com/x/log.txt?x=160f18ecc0
kernel config: https://syzkaller.appspot.com/x/.config?x=f5875f9dc6e009b2
From: Flavio Suligoi
Date: Thu, 28 Feb 2019 10:20:35 +0100
> Sometimes, in some embedded systems boards (i.e. ARM boards),
> the NVM eeprom is not mounted, to save cost and space.
>
> In this case it is necessary to bypass the NVM management
> and directly force the MAC address using a kernel co
From: Antoine Tenart
Date: Fri, 1 Mar 2019 11:52:02 +0100
> This series aims to improve the Marvell PPv2 driver and to fix various
> issues we encountered while testing the ports in many different
> configurations. The series is based on top of Russell PPv2 phylink
> rework and improvement.
...
On Fri, Mar 01, 2019 at 03:06:06PM -0800, Todd Kjos wrote:
> An munmap() on a binder device causes binder_vma_close() to be called
> which clears the alloc->vma pointer.
>
> If direct reclaim causes binder_alloc_free_page() to be called, there
> is a race where alloc->vma is read into a local vma
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