Add the TCAN4x5x SPI CAN driver. This device uses the
Bosch MCAN IP core along with a SPI interface map.
Register to the MCAN common core code to manage the MCAN IP.
This device has a special method to indicate a write/read
operation on the data payload.
Signed-off-by: Dan Murphy
---
v6 - Upda
ACPI 6.3 bumps the PPTT table revision and adds a LEAF_NODE flag.
This allows us to avoid a second pass through the table to assure
that the node in question is a leaf.
Signed-off-by: Jeremy Linton
---
drivers/acpi/pptt.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/acpi/pptt.c
The Banana Pi M2 Zero board has an AP6212 BT+Wifi combo chip
with broadcom internals attached to UART1 and some gpios.
This addition is in line with similar boards
Signed-off-by: Andreas Kemnade
---
changes in v2: remove pinctrl things
arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts | 15 ++
On Wed 27 Feb 21:48 PST 2019, Dan Carpenter wrote:
> The memremap() function doesn't return error pointers, it returns NULL.
> This code is returning "ret = PTR_ERR(NULL);" which is success, but it
> should return -ENOMEM.
>
> Fixes: 312416d9171a ("drivers: qcom: add command DB driver")
> Signed-
On Sun 24 Feb 22:50 PST 2019, Vaishali Thakkar wrote:
> From: Vinod Koul
>
> Qcom Socinfo driver can be built as a module, so
> export these two APIs.
>
> Signed-off-by: Vinod Koul
> Signed-off-by: Vaishali Thakkar
> Reviewed-by: Greg Kroah-Hartman
Reviewed-by: Bjorn Andersson
Regards,
Bj
On Fri, 2019-03-01 at 16:09 +0800, Yue Haibing wrote:
> From: YueHaibing
>
> drivers/net/dsa/mt7530.c:649:3-4: Unneeded semicolon
> drivers/net/ethernet/cisco/enic/enic_clsf.c:35:2-3: Unneeded semicolon
> drivers/net/ethernet/faraday/ftgmac100.c:1640:2-3: Unneeded semicolon
> drivers/net/ethernet
On Fri, Feb 15, 2019 at 2:25 PM Matthew Wilcox wrote:
>
> Transparent Huge Pages are currently stored in i_pages as pointers to
> consecutive subpages. This patch changes that to storing consecutive
> pointers to the head page in preparation for storing huge pages more
> efficiently in i_pages.
>
There are two methods for signaling the host: the monitor page mechanism
and hypercalls. The monitor page mechanism is used by performance
critical channels (storage, networking, etc.) because it provides
improved throughput. However, latency is increased. Monitor pages are
allocated to these chann
Hi,
On Fri, Feb 15, 2019 at 2:37 PM Rob Clark wrote:
>
> On Thu, Feb 14, 2019 at 7:40 PM Doug Anderson wrote:
> >
> > Hi,
> >
> > On Thu, Feb 14, 2019 at 1:32 PM Robin Murphy wrote:
> > >
> > > Hi Doug,
> > >
> > > On 2019-02-14 8:44 pm, Douglas Anderson wrote:
> > > > Right now the only way to
If you're bisecting why your peripherals stopped working, it's
probably this CL. Specifically if you see this in your dmesg:
Unexpected global fault, this could be serious
...then it's almost certainly this CL.
Running your IOMMU-enabled peripherals with the IOMMU in bypass mode
is insecure and
From: Claudiu Manoil
Date: Tue, 26 Feb 2019 15:42:19 +0200
> This is the missing part to enable PCI probing of the ENETC ethernet
> ports on the LS1028A SoC and external traffic on the LS1028A RDB board.
> It's one of the first items on the TODO list for the recently merged
> ENETC ethernet drive
On chromebooks, power_manager daemon normally shutsdown(S5) the device
when the battery charge falls below 4% threshold. ChromeOS EC then
normally spends an hour in S5 before hibernating. If the battery charge
falls below critical threshold in the mean time, EC does a battery cutoff
instead of hibe
On Sun 24 Feb 22:50 PST 2019, Vaishali Thakkar wrote:
[..]
> diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile
> index f25b54cd6cf8..c817da4f4140 100644
> --- a/drivers/soc/qcom/Makefile
> +++ b/drivers/soc/qcom/Makefile
> @@ -14,6 +14,7 @@ qcom_rpmh-y += rpmh-rsc.
On Fri, 1 Mar 2019 09:54:01 +0100
Petr Mladek wrote:
I'll put my $0.02 in, and say I like the idea of the patch too.
> > > Thoughts:
> > >
> > > - why do the suppression in vprintk_emit()? Doing it right at entry
> > > to printk() seems cleaner, more explicit?
> >
> > Yes, I put it in pr
On Thu, 2019-02-28 at 13:15 -0500, Alexandre Ghiti wrote:
> By matching only current line starting with '+', we miss the case
> when deleting code makes consecutive blank lines appear: this patch
> then makes it possible to detect this case by also matching current
> line starting with ' ', which i
Hi Jeremy,
> Jeremy Linton hat am 27. Februar 2019 um 02:05
> geschrieben:
>
>
> Arm64 machines should be displaying a human readable
> vulnerability status to speculative execution attacks in
> /sys/devices/system/cpu/vulnerabilities
>
> This series enables that behavior by providing the ex
On Fri, 2019-03-01 at 00:55 -0800, Andrey Smirnov wrote:
> The clock in question is not present on i.MX7, so move the code
> requesting it into i.MX8MQ-only path.
>
> Fixes: eeb61c4e8530 ("PCI: imx6: Add code to request/control
> "pcie_aux" clock for i.MX8MQ")
> Reported-by: Trent Piepho
> Signed
An upcoming change to arm-smmu will add auxiliary domains that will allow
a leaf driver to create and map additional pagetables for device
specific uses. By definition aux arm-smmu domains will not be allowed
to touch the hardware directly so allow for the TLB operations for
a given pagetable confi
Add support for a split pagetable (TTBR0/TTBR1) scheme for
arm-smmu-v2. If split pagetables are enabled, create a
pagetable for TTBR1 and set up the sign extension bit so
that all IOVAs with that bit set are mapped and translated
from the TTBR1 pagetable.
Signed-off-by: Jordan Crouse
---
driver
Add a new domain attribute to enable split pagetable support for devices
devices that support it.
Signed-off-by: Jordan Crouse
---
include/linux/iommu.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/iommu.h b/include/linux/iommu.h
index e90da6b..3f2250b 100644
--- a/include/
Pass the index of the MMU domain in struct msm_file_private instead
of assuming gpu->id throughout the submit path. This clears the way
to change ctx->aspace to a per-instance pagetable.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/msm_drv.c| 2 ++
drivers/gpu/drm/msm/msm_drv.h
When we move to 64 bit addressing for a5xx and a6xx targets we will start
seeing pagefaults at larger addresses so format them appropriately in the
log message for easier debugging.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/msm_iommu.c | 2 +-
1 file changed, 1 insertion(+), 1 deleti
Support the new auxiliary domain API for arm-smmuv2 to initialize and
support multiple pagetables for a SMMU device. Since the smmu-v2 hardware
doesn't have any built in support for switching the pagetable base it is
left as an exercise to the caller to actually use the pagetable; aux
domains in th
Add support for creating a auxiliary domain from the IOMMU device to
implement per-instance pagetables. Also add a helper function to
return the pagetable base address (ttbr) and asid to the caller so
that the GPU target code can set up the pagetable switch.
Signed-off-by: Jordan Crouse
---
dri
Add a helper function to create a GEM address space attached to
an iommu auxiliary domain for a per-instance pagetable.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/msm_drv.h | 4 +++
drivers/gpu/drm/msm/msm_gem_vma.c | 53 +++
2 files changed, 3
This is the latest incarnation of per-instance pagetable support for the MSM GPU
driver. Some of these have been seen before, most recently [1].
Per-instance pagetables allow the target GPU driver to create and manage
an individual pagetable for each file descriptor instance and switch
between the
Add an attribute to return the base address of the pagetable. This is used
by auxiliary domains from arm-smmu to return the address of the pagetable
to the leaf driver so that it can set the appropriate pagetable through
it's own means.
Signed-off-by: Jordan Crouse
---
include/linux/iommu.h | 1
A5XX and newer GPUs can be run in either 32 or 64 bit mode. The GPU
registers and the microcode use 64 bit virtual addressing in either
case but the upper 32 bits are ignored if the GPU is in 32 bit mode.
There is no performance disadvantage to remaining in 64 bit mode even
if we are only generatin
Add support for per-instance pagetables for a6xx targets. Add support
to handle split pagetables and create a new instance if the needed
IOMMU support exists and insert the necessary PM4 commands to trigger
a pagetable switch at the beginning of a user command.
Signed-off-by: Jordan Crouse
---
Move the address space steup code out of the generic msm GPU code to
to the individual GPU targets. This allows us to do target specific
setup such as gpummu for a2xx or split pagetables and per-instance
pagetables for newer a5xx and a6xx targets. All this is at the
expense of duplicated code in so
Targets that support per-instance pagetable switching will have to keep
track of which pagetable belongs to each instance to be able to recover
for preemption.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/msm_ringbuffer.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/d
Add support for per-instance pagetables for 5XX targets. Create a support
buffer for preemption to hold the SMMU pagetable information for a
preempted ring, enable TTBR1 to support split pagetables and add the
necessary PM4 commands to trigger a pagetable switch at the beginning
of a user command.
Add support to create a GPU target specific address space for
a context. For those targets that support per-instance
pagetables they will return a new address space set up for
the instance if possible otherwise just use the global
device pagetable.
Signed-off-by: Jordan Crouse
---
drivers/gpu/d
On Sun 24 Feb 22:50 PST 2019, Vaishali Thakkar wrote:
> +#ifdef CONFIG_DEBUG_FS
> +/* pmic model info */
Please drop this comment and make "pmic_model" plural.
> +static const char *const pmic_model[] = {
> + [0] = "Unknown PMIC model",
> + [9] = "PM8994",
> + [11] = "PM8916",
> +
On 3/1/19 8:49 PM, Johannes Weiner wrote:
> Hello Andrey,
>
> On Fri, Mar 01, 2019 at 01:38:26PM +0300, Andrey Ryabinin wrote:
>> On 2/26/19 3:50 PM, Andrey Ryabinin wrote:
>>> On 2/22/19 10:15 PM, Johannes Weiner wrote:
On Fri, Feb 22, 2019 at 08:58:25PM +0300, Andrey Ryabinin wrote:
On Sun 24 Feb 22:50 PST 2019, Vaishali Thakkar wrote:
> +#define IMAGE_SHOW_OEM(attr) \
> +static int show_ ##attr## _oem(struct seq_file *seq, void *p)
> \
> +{ \
> + s
On Fri, Mar 01, 2019 at 10:18:32AM -0800, Nick Desaulniers wrote:
> On Thu, Feb 28, 2019 at 8:38 PM Joe Perches wrote:
> >
> > This static inline is unnecessary and can be removed
> > by using the vsprintf %ph extension.
> >
> > This reduces overall object size by more than 2K.
> >
> > Signed-off-
This code allows architectures to use a generic builtin command line.
The state of the builtin command line options across architecture is
diverse. On x86 and mips they have pretty much the same code and the
code prepends the builtin command line onto the boot loader provided
one. On powerpc there
This updates the powerpc code to use the CONFIG_GENERIC_CMDLINE
option.
[maksym.kok...@globallogic.com: add strlcat to prom_init_check.sh
whitelist]
Cc: Daniel Walker
Cc: Daniel Walker
Cc: xe-linux-exter...@cisco.com
Signed-off-by: Daniel Walker
Signed-off-by: Maksym Kokhan
---
arch/powerpc/K
This is a scripted mass convert of the config files to use
the new generic cmdline. There is a bit of a trim effect here.
It would seems that some of the config haven't been trimmed in
a while.
The script used to convert is as follows,
if [[ -z "$1" || -z "$2" ]]; then
echo "Two arguments
The "mtd: " prefix is still missing. Should be "mtd: cfi: ". If you
send a new version, please fix that.
Thanks,
Boris
On Tue, 26 Feb 2019 22:00:48 +0800
Liu Jian wrote:
> In function do_write_buffer(), in the for loop, there is a case
> chip_ready() returns 1 while chip_good() returns 0, so i
On 3/1/19 2:51 AM, Andrey Ryabinin wrote:
>
>
> On 3/1/19 12:44 AM, John Hubbard wrote:
>> On 2/28/19 12:33 AM, Andrey Ryabinin wrote:
>>> We have common pattern to access lru_lock from a page pointer:
>>> zone_lru_lock(page_zone(page))
>>>
>>> Which is silly, because it unfolds to this:
>>>
> On Feb 28, 2019, at 4:18 PM, Steve Muckle wrote:
>
> Since 4.17 registers r8-r11 are not clobbered/zeroed by a 64-bit kernel
> handling a 32-bit syscall and this behavior is enforced by the
> test_syscall_vdso testcase. See commit 8bb2610bc496
> ("x86/entry/64/compat: Preserve r8-r11 in int $0x8
The ARM64 implements the save_stack_trace_regs function, but it is
unusable for any diagnostic tooling compiled as a kernel module due
the missing EXPORT_SYMBOL_GPL for the function. Export
save_stack_trace_regs() to align with other architectures such as
s390, openrisc, and powerpc. This is simil
On Thu, 28 Feb 2019 23:37:44 -0600, Parav Pandit wrote:
> Use case:
> -
> A user wants to create/delete hardware linked sub devices without
> using SR-IOV.
> These devices for a pci device can be netdev (optional rdma device)
> or other devices. Such sub devices share some of the PCI device
get_ds() is a legacy name for KERNEL_DS; all architectures #define it to
KERNEL_DS, and almost every user of set_fs() uses the name KERNEL_DS.
Let the VFS also use KERNEL_DS so that we can get rid of get_ds() at some
point.
Signed-off-by: Jann Horn
---
fs/read_write.c | 6 +++---
fs/splice.c
get_ds() is a legacy name for KERNEL_DS; all architectures #define it to
KERNEL_DS, and almost every user of set_fs() uses the name KERNEL_DS.
Let the integrity subsystem also use KERNEL_DS so that we can get rid of
get_ds() at some point.
Signed-off-by: Jann Horn
---
security/integrity/iint.c
Replace the manual call to f_op->read() under KERNEL_DS with kernel_read().
This also reduces the number of users of the legacy alias get_ds() for
KERNEL_DS.
Signed-off-by: Jann Horn
---
.../staging/rtl8723bs/os_dep/osdep_service.c | 23 ++-
1 file changed, 7 insertions(+), 16 d
Hi Paul.
Good to see work migrating fbdev => drm.
Following comments is based on experience while working on migrating
another driver from fbdev => drm.
On Thu, Feb 28, 2019 at 07:07:54PM -0300, Paul Cercueil wrote:
> Add documentation for the devicetree bindings of the DRM driver for the
> JZ47
When onlining a memory block with DEBUG_PAGEALLOC, it unmaps the pages
in the block from kernel, However, it does not map those pages while
offlining at the beginning. As the result, it triggers a panic below
while onlining on ppc64le as it checks if the pages are mapped before
unmapping. However,
On Fri, Mar 1, 2019 at 2:39 PM Jordan Crouse wrote:
>
> Add support for per-instance pagetables for 5XX targets. Create a support
> buffer for preemption to hold the SMMU pagetable information for a
> preempted ring, enable TTBR1 to support split pagetables and add the
> necessary PM4 commands to
On Fri, Mar 1, 2019 at 2:38 PM Jordan Crouse wrote:
>
> Add support for a split pagetable (TTBR0/TTBR1) scheme for
> arm-smmu-v2. If split pagetables are enabled, create a
> pagetable for TTBR1 and set up the sign extension bit so
> that all IOVAs with that bit set are mapped and translated
> from
On Fri, 1 Mar 2019 14:52:07 +0200 Jani Nikula wrote:
> While is_power_of_2() is an inline function and likely gets optimized
> for compile time constant arguments, it still doesn't produce an integer
> constant expression that could be used in, say, static data
> initialization or case labels.
Hi Barret,
On Fri, Mar 01, 2019 at 01:30:15PM -0500, Barret Rhoden wrote:
> Hi -
>
> On 01/21/2019 06:47 AM, Eial Czerwacki wrote:
> >
>
> Your main issue was that you only sent this patch to LKML, but not the
> maintainers of the file. If you don't, your patch might get lost. To get
> the app
On Fri, 1 Mar 2019 09:25:24 +0100 Guillaume Tucker
wrote:
> >>> Michal had asked if the free space accounting fix up addressed this
> >>> boot regression? I was awaiting word on that.
> >>
> >> hm, does b...@kernelci.org actually read emails? Let's try info@ as well..
>
> b...@kernelci.org is
From: Florian Fainelli
Date: Fri, 1 Mar 2019 09:54:07 -0800
> David, please discard this version, I will submit a version that
> properly emulates the prepare/commit phase such that no assumptions are
> broken, this will take care of both issues at once. Thanks!
Ok.
On Fri, Mar 01, 2019 at 10:28:35AM -0800, Nick Desaulniers wrote:
> On Fri, Feb 8, 2019 at 6:34 AM Michal Kubecek wrote:
> >
> > On Thu, Feb 07, 2019 at 10:09:21PM -0700, Nathan Chancellor wrote:
> > > Hi all,
> > >
> > > After commit 8c5ad0dae93c ("igc: Add ethtool support"), Clang warns:
> > >
>
In preparation to enabling -Wimplicit-fallthrough, mark switch
cases where we are expecting to fall through.
This patch fixes the following warning:
In file included from sound/soc/codecs/ab8500-codec.c:24:
sound/soc/codecs/ab8500-codec.c: In function ‘ab8500_codec_set_dai_fmt’:
./include/linux/d
On Fri, 1 Mar 2019 15:19:50 -0500 Qian Cai wrote:
> When onlining a memory block with DEBUG_PAGEALLOC, it unmaps the pages
> in the block from kernel, However, it does not map those pages while
> offlining at the beginning. As the result, it triggers a panic below
> while onlining on ppc64le as
In preparation to enabling -Wimplicit-fallthrough, mark switch
cases where we are expecting to fall through.
This patch fixes the following warning:
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c: In function
‘gfx_v8_0_tiling_mode_table_init’:
./include/linux/device.h:1487:2: warning: this statement may
Hi Paul.
Driver looks good and is a very nice piece of work.
In the following a number of minor issues.
One area that jumped at me was framedesc and the use of dma_alloc_coherent()
I hope someone that knows the memory handling better can give some advice here.
To me it looks like something drm sh
t;> master branch is concerned, KernelCI boot tests are passing fine
>> on that platform.
>
> They would, because I dropped
> mm-shuffle-default-enable-all-shuffling.patch, so your tests presumably
> now have shuffling disabled.
>
> Is it possible to add the below to linux-ne
Dear Friend,
I am Mrs Alice Johnson.am sending you this brief letter to solicit your
partnership to transfer $23.5 million US Dollars.I shall send you more
information and procedures when I receive positive response from you.
please send me a message in my Email box (mrsalicejohns...@gmail.com)
as
On Thu, 28 Feb 2019 19:49:03 -0500 Qian Cai wrote:
> The commit a00cc7d9dd93 ("mm, x86: add support for PUD-sized transparent
> hugepages") introduced pudp_huge_get_and_clear_full() but no one uses
> its return code, so just make it void.
>
> mm/huge_memory.c: In function 'zap_huge_pud':
> mm/hu
On Fri, 01 Mar 2019 06:03:41 PST (-0800), Will Deacon wrote:
In a bid to kill off explicit mmiowb() usage in driver code, hook up
the asm-generic mmiowb() tracking code for riscv, so that an mmiowb()
is automatically issued from spin_unlock() if an I/O write was performed
in the critical section.
Yes, why wouldn't they be real bugs? I was simply pointing out the irrational
conclusion if the C standard is strictly applied to kernel code.
I think the spirit of the C standard is that one shouldn't rely on the
assumption that the value of a freed pointer does not change, even though in
pra
Hi -
On 03/01/2019 03:34 PM, Dennis Zhou wrote:
Hi Barret,
On Fri, Mar 01, 2019 at 01:30:15PM -0500, Barret Rhoden wrote:
Hi -
On 01/21/2019 06:47 AM, Eial Czerwacki wrote:
Your main issue was that you only sent this patch to LKML, but not the
maintainers of the file. If you don't, your
Add missing break statement in order to prevent the code from falling
through to case SMU_Discrete_DpmTable.
This bug was found thanks to the ongoing efforts to enable
-Wimplicit-fallthrough.
Fixes: 34a564eaf528 ("drm/amd/powerplay: implement fw image related smum
interface for Polaris.")
Cc: st
Hi all,
Friendly ping:
Who can take this, please?
Thanks
--
Gustavo
On 2/8/19 11:49 AM, Gustavo A. R. Silva wrote:
> In preparation to enabling -Wimplicit-fallthrough, mark switch
> cases where we are expecting to fall through.
>
> This patch fixes the following warning:
>
> drivers/mtd/nand/
On Fri, Mar 01, 2019 at 01:09:51PM -0800, Andrew Morton wrote:
> On Thu, 28 Feb 2019 19:49:03 -0500 Qian Cai wrote:
>
> > The commit a00cc7d9dd93 ("mm, x86: add support for PUD-sized transparent
> > hugepages") introduced pudp_huge_get_and_clear_full() but no one uses
> > its return code, so just
On Wed, Feb 27, 2019 at 05:05:37PM +, Steven Price wrote:
> walk_page_range() is going to be allowed to walk page tables other than
> those of user space. For this it needs to know when it has reached a
> 'leaf' entry in the page tables. This information will be provided by the
> p?d_large() fu
On Wed, Feb 27, 2019 at 05:05:39PM +, Steven Price wrote:
> walk_page_range() is going to be allowed to walk page tables other than
> those of user space. For this it needs to know when it has reached a
> 'leaf' entry in the page tables. This information is provided by the
> p?d_large() functio
On Wed, Feb 27, 2019 at 05:05:40PM +, Steven Price wrote:
> walk_page_range() is going to be allowed to walk page tables other than
> those of user space. For this it needs to know when it has reached a
> 'leaf' entry in the page tables. This information is provided by the
> p?d_large() functio
On Fri, 1 Mar 2019, Barret Rhoden wrote:
> I'm not familiar with VSMP - how bad is it to use L1 cache alignment instead
> of 4K page alignment? Maybe some structures can use the smaller alignment?
> Or maybe have VSMP require SRCU-using modules to be built-in?
It is very expensive. VMSP exchange
Change "execuing" into "executing" and "guarnateed" into "guaranteed".
Cc: Lai Jiangshan
Signed-off-by: Bart Van Assche
---
kernel/workqueue.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/kernel/workqueue.c b/kernel/workqueue.c
index fc5d23d752a5..57ad76486a9a 100644
On Wed, Feb 27, 2019 at 05:05:42PM +, Steven Price wrote:
> walk_page_range() is going to be allowed to walk page tables other than
> those of user space. For this it needs to know when it has reached a
> 'leaf' entry in the page tables. This information is provided by the
> p?d_large() functio
On Fri, 1 Mar 2019 16:49:46 +0800
Feng Tang wrote:
> When kernel panic happens, it will first print the panic call stack,
> then the ending msg like:
>
> [ 35.743249] ---[ end Kernel panic - not syncing: Fatal exception
> [ 35.749975] [ cut here ]
>
> The above mess
On Fri, 1 Mar 2019 16:57:52 -0500 Steven Rostedt wrote:
> Looks good to me.
>
> Acked-by: Steven Rostedt (VMware)
>
> Andrew, you want to take this patch?
Yup.
l_init+0x1c/0x150
[<1019601c>] ret_from_kernel_thread+0x1c/0x24
Kernel Fault: Code=18 (Data memory protection/unaligned access trap) at addr
10193fd0
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.0.0-rc8-next-20190301 #1
Hardware name: 9000/778/B160L
YZrvWESTHLNXBCVMcbcbcbcbOGFRQPDI
PSW:
When onlining a memory block with DEBUG_PAGEALLOC, it unmaps the pages
in the block from kernel, However, it does not map those pages while
offlining at the beginning. As the result, it triggers a panic below
while onlining on ppc64le as it checks if the pages are mapped before
unmapping. However,
On Wed, Feb 27, 2019 at 07:54:22PM +0100, Helge Deller wrote:
> On 27.02.19 18:05, Steven Price wrote:
> > walk_page_range() is going to be allowed to walk page tables other than
> > those of user space. For this it needs to know when it has reached a
> > 'leaf' entry in the page tables. This infor
On Thu, 2019-02-28 at 23:37 -0600, Parav Pandit wrote:
> Add a subdev driver to probe the subdev devices and create fake
> netdevice for it.
>
> Signed-off-by: Parav Pandit
> ---
> drivers/net/ethernet/mellanox/mlx5/core/Makefile | 2 +-
> drivers/net/ethernet/mellanox/mlx5/core/main.c |
Hi Will,
On Fri, Mar 01, 2019 at 02:03:38PM +, Will Deacon wrote:
> The mmiowb() macro is horribly difficult to use and drivers will continue
> to work most of the time if they omit a call when it is required.
>
> Rather than rely on driver authors getting this right, push mmiowb() into
> arc
On 03/01/2019 02:03 PM, Guenter Roeck wrote:
> Hi,
>
> On Mon, Feb 25, 2019 at 02:28:39PM -0800, Alexei Starovoitov wrote:
>> JITed BPF programs are indistinguishable from kernel functions, but unlike
>> kernel code BPF code can be changed often.
>> Typical approach of "perf record" + "perf rep
On 03/01/2019 02:03 PM, Guenter Roeck wrote:
> Hi,
>
> On Mon, Feb 25, 2019 at 02:28:39PM -0800, Alexei Starovoitov wrote:
>> JITed BPF programs are indistinguishable from kernel functions, but unlike
>> kernel code BPF code can be changed often.
>> Typical approach of "perf record" + "perf rep
The commit a00cc7d9dd93 ("mm, x86: add support for PUD-sized transparent
hugepages") introduced pudp_huge_get_and_clear_full() but no one uses
its return code. In order to not diverge from
pmdp_huge_get_and_clear_full(), just change zap_huge_pud() to not assign
the return value from pudp_huge_get_a
On Fri, Mar 01, 2019 at 10:46:34PM +0300, Andrey Ryabinin wrote:
> On 3/1/19 8:49 PM, Johannes Weiner wrote:
> > On Fri, Mar 01, 2019 at 01:38:26PM +0300, Andrey Ryabinin wrote:
> >> On 2/26/19 3:50 PM, Andrey Ryabinin wrote:
> >>> On 2/22/19 10:15 PM, Johannes Weiner wrote:
> On Fri, Feb 22,
On Fri, Mar 1, 2019 at 11:12 AM Song Liu wrote:
>
> On Fri, Feb 15, 2019 at 2:25 PM Matthew Wilcox wrote:
> >
> > Transparent Huge Pages are currently stored in i_pages as pointers to
> > consecutive subpages. This patch changes that to storing consecutive
> > pointers to the head page in prepar
On Thu, 2019-02-28 at 11:36 +, Matthias Maennich wrote:
> According to Documentation/core-api/printk-formats.rst, size_t should be
> printed with %zu, rather than %Zu.
>
> In addition, using %Zu triggers a warning on clang (-Wformat-extra-args):
[]
> diff --git a/net/sctp/chunk.c b/net/sctp/ch
Hi Paul.
On Thu, Feb 28, 2019 at 03:58:52PM -0300, Paul Cercueil wrote:
> The Sharp LS020B1DD01D is a simple 2.0" 240x160 16-bit TFT panel.
>
> Signed-off-by: Paul Cercueil
> Tested-by: Artur Rojek
> ---
> drivers/gpu/drm/panel/panel-simple.c | 28
> 1 file changed
Larry,
Thanks for the response and detailed instructions, which allowed me to
build and install the rtw88 kernel module. I cannot however seem to get
my system to actually use the module. Just to recap this is an HP Omen
laptop with secure boot disabled. Upon boot-up both the new rtw88 and
old
On Wed, 2019-02-27 at 10:55 +0900, Jiada Wang wrote:
> Hi Trent
>
> Thanks for reporting
Thanks for the information, it was very helpful!
>
> in the commit message of commit ("spi: imx: Add support for SPI Slave
> mode"), it mentions
>
> "The stale data in RXFIFO will be dropped when the Slav
On Fri, Mar 01, 2019 at 02:17:40PM -0800, Eric Dumazet wrote:
>
>
> On 03/01/2019 02:03 PM, Guenter Roeck wrote:
> > Hi,
> >
> > On Mon, Feb 25, 2019 at 02:28:39PM -0800, Alexei Starovoitov wrote:
> >> JITed BPF programs are indistinguishable from kernel functions, but unlike
> >> kernel code BP
Am Freitag, 1. März 2019, 22:38:18 CET schrieb Gustavo A. R. Silva:
> Hi all,
>
> Friendly ping:
>
> Who can take this, please?
/me points to Miquel. :)
Thanks,
//richard
Hi Guido.
Thanks for addressing review comments in first round.
Just a few nits in this follow-up.
With these nits addressed:
Reviewed-by: Sam Ravnborg
On Fri, Mar 01, 2019 at 02:02:04PM +0100, Guido Günther wrote:
> +#include
This include file is, as far as I could tell, no longer used and ca
Hi Sam, thanks for the feedback.
Le ven. 1 mars 2019 à 17:16, Sam Ravnborg a écrit :
Hi Paul.
Good to see work migrating fbdev => drm.
Following comments is based on experience while working on migrating
another driver from fbdev => drm.
On Thu, Feb 28, 2019 at 07:07:54PM -0300, Paul Cercuei
Hi,
Le ven. 1 mars 2019 à 19:24, Sam Ravnborg a écrit :
Hi Paul.
On Thu, Feb 28, 2019 at 03:58:52PM -0300, Paul Cercueil wrote:
The Sharp LS020B1DD01D is a simple 2.0" 240x160 16-bit TFT panel.
Signed-off-by: Paul Cercueil
Tested-by: Artur Rojek
---
drivers/gpu/drm/panel/panel-simple
The MIPS eBPF JIT calls flush_icache_range() in order to ensure the
icache observes the code that we just wrote. Unfortunately it gets the
end address calculation wrong due to some bad pointer arithmetic.
The struct jit_ctx target field is of type pointer to u32, and as such
adding one to it will
Finally got around to testing it. Verified the issue was still
present. Then install Jiri's fix. Cleared the issue out. So at least
from the standpoint of fixing the hang, the change is good.
Dave
On 2/28/19 1:50 AM, Masami Hiramatsu wrote:
On Wed, 27 Feb 2019 14:33:09 +0100
Jiri Olsa wr
There is an error in the a2xx part of this patch: 0xfff in adreno_gpu.c
became 0xff in a2xx_gpu.c
On 3/1/19 2:38 PM, Jordan Crouse wrote:
Move the address space steup code out of the generic msm GPU code to
to the individual GPU targets. This allows us to do target specific
setup such as gpummu
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