Quoting Manivannan Sadhasivam (2019-01-14 19:33:36)
> From: Edgar Bernardi Righi
>
> Add devicetree bindings for Actions Semi S500 Clock Management Unit.
>
> Signed-off-by: Edgar Bernardi Righi
> [Mani: Documented S500 CMU compatible]
> Signed-off-by: Manivannan Sadhasivam
> Reviewed-by: Rob H
Quoting Manivannan Sadhasivam (2019-02-15 20:15:41)
> Hi Stephen,
>
> On Fri, Feb 01, 2019 at 09:23:43AM +0530, Manivannan Sadhasivam wrote:
> > Hi Stephen,
> >
> > On Tue, Jan 15, 2019 at 09:03:34AM +0530, Manivannan Sadhasivam wrote:
> > > Hello,
> > >
> > > This patchset adds common clock sup
Quoting Manivannan Sadhasivam (2019-01-14 19:33:35)
> S500 SoC requires configurable delay for different PLLs. Hence, add
> a separate macro for declaring a PLL with configurable delay and also
> modify the existing OWL_PLL_NO_PARENT macro to use default delay so
> that no need to modify the existi
Quoting Manivannan Sadhasivam (2019-01-14 19:33:39)
> Add common clock driver for Actions Semi S500 SoC.
>
> Signed-off-by: Edgar Bernardi Righi
> [Mani: cleaned up the driver]
> Signed-off-by: Manivannan Sadhasivam
> ---
Applied to clk-next
> -Original Message-
> From: Horia Geantă
> Sent: Thursday, February 21, 2019 6:38 PM
> To: Leo Li
> Cc: Y.b. Lu ; linuxppc-...@lists.ozlabs.org;
> linux-arm-ker...@lists.infradead.org; linux-kernel@vger.kernel.org
> Subject: [PATCH] soc: fsl: guts: make fsl_guts_get_svr() static
>
> T
Quoting Jeffrey Hugo (2019-02-10 12:14:05)
> Several clock controller drivers define a list of clk_hw devices, and then
> register those devices in probe() before using common code to process the
> rest of initialization. Extend the common code to accept a list of clk_hw
> devices to process, thus
Hi,
On Wed, Feb 20, 2019 at 7:02 AM Sumit Garg wrote:
>
> Add check for valid ctx pointer and then only dereference ctx to
> configure supp_nowait flag.
>
> Fixes: 42bf4152d8a7 ("tee: add supp_nowait flag in tee_context struct")
> Reported-by: Dan Carpenter
> Signed-off-by: Sumit Garg
> ---
>
This patch contains two minor cleanups: firstly it puts exported symbol
for kvm_io_bus_write() by following the function definition; secondly it
removes a redundant blank line.
Signed-off-by: Leo Yan
---
virt/kvm/kvm_main.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/vi
On 21/02/2019 14:35, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.4.176 release.
> There are 20 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses sh
Quoting Katsuhiro Suzuki (2019-02-10 07:38:06)
> Custom approximation of fractional-divider may not need parent clock
> rate checking. For example Rockchip SoCs work fine using grand parent
> clock rate even if target rate is greater than parent.
>
> This patch checks parent clock rate only if CLK
On 21/02/2019 14:35, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.9.160 release.
> There are 20 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses sh
On 21/02/2019 14:35, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.14.103 release.
> There are 23 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses s
On Thu, 21 Feb 2019 20:50:39 +
Paul Burton wrote:
> I don't appear to have received patches 7 or 9 but I see from archives
> there'll be a v3 of patch 9 at least.
I'm still fighting with git send-email to do proper collecting of addresses...
And the mails to your @mips.com address bounced ye
On 21/02/2019 14:35, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.19.25 release.
> There are 30 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses sh
Hi Linus,
can you please pull one fix and one documentation update for parisc for kernel
5.0:
git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux.git
parisc-5.0-1
Fix ptrace syscall number modification which has been broken since kernel v4.5
and provide alternative email addres
Hello Xiang
On 2/16/19 8:37 PM, Xiang Xiao wrote:
> From: Yanlin Zhu
>
> which could redirect clk API from remote to the kernel
>
> Signed-off-by: Yanlin Zhu
> ---
> drivers/rpmsg/Kconfig | 10 ++
> drivers/rpmsg/Makefile| 1 +
> drivers/rpmsg/rpmsg_clk.c | 284
> +
On 21/02/2019 22:43, David Abdurachmanov wrote:
> On Thu, Feb 21, 2019 at 9:48 PM Daniel Lezcano
> wrote:
>>
>> On 21/02/2019 17:06, David Abdurachmanov wrote:
>>> Resending to incl. a proper mailing list and maintainers (not suggested
>>> by scripts/get_maintainer.pl)
>>>
>>> This is only used on
Use macro for ID_AA64MMFR1_EL1.VH bits shift instead of 8 directly.
Signed-off-by: Leo Yan
---
arch/arm64/kernel/head.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 4471f570a295..3ac377e9fd28 100644
--- a/arch/arm64
Since commit f7bec68d2fae ("arm/arm64: KVM: Prune unused #defines"), the
macro HYP_PAGE_OFFSET has been removed, but it's kept in the comment for
the function create_hyp_mappings().
This patch uses PAGE_OFFSET to replace HYP_PAGE_OFFSET and this is
consistent with what is doing in the function.
S
Define macro TCR_EL2_T0SZ_MASK as TCR_T0SZ_MASK, so can remove the hard
number 0x3f.
Signed-off-by: Leo Yan
---
arch/arm64/include/asm/kvm_arm.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index 6f602af52
The function kvm_vgic_inject_irq() is not only used by PPIs but also can
be used to inject interrupt for SPIs; this patch improves comment for
argument @cpuid to reflect support SPIs as well.
Signed-off-by: Leo Yan
---
virt/kvm/arm/vgic/vgic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-
When I read KVM/ARM64 related code I cannot find any issue or something
could be improved for performance; so this patch series is only for
minor cleaning up and refactoring code.
Hope this is helpful and can be picked up into mainline kernel,
otherwise it's also fine for me if the maintainer or m
On Fri, Feb 22, 2019 at 08:14:05AM +, Jon Hunter wrote:
>
> On 21/02/2019 14:35, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 4.19.25 release.
> > There are 30 patches in this series, all will be posted as a response
> > to this one. If anyone has any iss
On Fri, Feb 22, 2019 at 2:55 PM Guenter Roeck wrote:
>
> On 2/21/19 7:23 PM, Masahiro Yamada wrote:
> > I thought header search paths to tools/include(/uapi) were unneeded,
> > but it looks like a build error occurs depending on the compiler.
> >
> > Commit 303a339f30a9 ("bpfilter: remove extra he
On Thu, Feb 21, 2019 at 02:12:19PM -0800, Mike Kravetz wrote:
> I suspect the reason for the check is that it was there before the ability
> to migrate gigantic pages was added, and nobody thought to remove it. As
> you say, the likelihood of finding a gigantic page after running for some
> time i
On Thu, 21 Feb 2019 at 16:38, Daniel Borkmann wrote:
>
> On 02/21/2019 09:44 AM, Anders Roxell wrote:
> > When running test seccomp_bpf the following splat occurs:
> >
> > [ RUN ]
> > global.secseccomp_bpf.c:2136:global.detect_seccomp_filter_flags:Expected 22
> > (22) == (*__errno_location
On Sat, Feb 16, 2019 at 11:21:51PM -0800, Dmitry Torokhov wrote:
> On Chrome OS we want to use USBguard to potentially limit access to USB
> devices based on policy. We however to do not want to wait for userspace to
> come up before initializing fixed USB devices to not regress our boot
> times.
>
Hi Steve,
On Wed, 20 Feb 2019 09:49:26 -0500
Steven Rostedt wrote:
> On Wed, 20 Feb 2019 17:10:19 +0900
> Masami Hiramatsu wrote:
>
> > Let me ensure what you want. So you want to access a "string" in user-space,
> > not a data structure? In that case, it is very easy to me. It is enough to
>
Update glue codes to be compatible with MCU family.
Signed-off-by: Christophe Roullier
---
drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c | 51 ++-
1 file changed, 41 insertions(+), 10 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
b/drivers/
Baolu:
The reproduction depends on devices. HW passthrough PCIe devices with default
identity map could have the issue. Make sure that messages like following came
out in dmesg and their mapping does not change after booting:
[ 10.167809] DMAR: Hardware identity mapping for device :30:00.0
This patch add syscfg clock support for Ethernet of the STM32F429 SoC.
Needed if bootloader do not manage it.
Signed-off-by: Christophe Roullier
---
arch/arm/boot/dts/stm32f429.dtsi | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/
Need syscfg clock for MCU family in case bootloader does not
activate it.
Signed-off-by: Christophe Roullier
---
Documentation/devicetree/bindings/net/stm32-dwmac.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.txt
b/
Update glue codes to support all PHY config on stm32mp157c
PHY_MODE (MII,GMII, RMII, RGMII) and in normal, PHY wo crystal (25Mhz),
PHY wo crystal (50Mhz), No 125Mhz from PHY config.
Signed-off-by: Christophe Roullier
---
drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c | 105
Synopsys GMAC 4.10 is used. And Phy mode for eval and disco is RMII
with PHY SMSC LAN8742
Signed-off-by: Christophe Roullier
---
arch/arm/boot/dts/stm32h743-pinctrl.dtsi | 15 +++
arch/arm/boot/dts/stm32h743.dtsi | 19 +++
arch/arm/boot/dts/stm32h743i-disco.dt
Add glue codes to support magic packet on stm32mp157c
Signed-off-by: Christophe Roullier
---
drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c | 30 ++-
1 file changed, 29 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
b/drivers/
In Documentation stmmac.txt there is possibility to
fixed CSR Clock range selection with property clk_csr.
This patch add the management of this property
For example to use it, add in your ethernet node DT:
clk_csr = <3>;
Signed-off-by: Christophe Roullier
---
drivers/net/ethernet/stmicr
For common stmmac:
- Add support to set CSR Clock range selection in DT
For stm32mpu:
- Glue codes to support magic packet
- Glue codes to support all PHY config :
PHY_MODE (MII,GMII, RMII, RGMII) and in normal,
PHY wo crystal (25Mhz),
On Fri, Feb 22, 2019 at 07:25:50AM +0100, Greg Kroah-Hartman wrote:
> On Thu, Feb 21, 2019 at 07:17:11PM -0500, Mathieu Desnoyers wrote:
> > - On Feb 21, 2019, at 7:10 PM, Russell King, ARM Linux
> > li...@armlinux.org.uk wrote:
> >
> > > On Thu, Feb 21, 2019 at 03:02:57PM -0500, Mathieu Desn
Add properties to support all Phy config
PHY_MODE (MII,GMII, RMII, RGMII) and in normal, PHY wo crystal (25Mhz),
PHY wo crystal (50Mhz), No 125Mhz from PHY config.
Signed-off-by: Christophe Roullier
---
Documentation/devicetree/bindings/net/stm32-dwmac.txt | 6 +++---
1 file changed, 3 i
From: Jiada Wang
Currently each SSI unit 's busif dma address is calculated by
following calculation formulation:
0xec54 + 0x1000 * id + busif / 4 * 0xA000 + busif % 4 * 0x400
But according to user manual 41.1.4 Register Configuration
ssi9 4/5/6/7 busif data register address
(SSI9_4_BUSIF/SS
On Fri, 22 Feb 2019 17:27:45 +0900
Masami Hiramatsu wrote:
> Hi Steve,
>
> On Wed, 20 Feb 2019 09:49:26 -0500
> Steven Rostedt wrote:
>
> > On Wed, 20 Feb 2019 17:10:19 +0900
> > Masami Hiramatsu wrote:
> >
> > > Let me ensure what you want. So you want to access a "string" in
> > > user-sp
On Fri, Feb 22, 2019 at 4:19 PM Arnaud Pouliquen
wrote:
>
> Hello Xiang
>
> On 2/16/19 8:37 PM, Xiang Xiao wrote:
> > From: Yanlin Zhu
> >
> > which could redirect clk API from remote to the kernel
> >
> > Signed-off-by: Yanlin Zhu
> > ---
> > drivers/rpmsg/Kconfig | 10 ++
> > drivers/rpm
Hello,
On Thu, 21 Feb 2019 14:05:09 -0800
Stephen Boyd wrote:
> Quoting Stephen Boyd (2019-02-13 09:14:22)
> >
> > static?
>
> Ok I marked it static and applied to clk-next.
Thanks, and sorry for not getting back with a v2 in a timely fashion. I
had several patch series in-flight for this pro
On Fri, 22 Feb 2019 16:23:24 +0800
Leo Yan wrote:
> The function kvm_vgic_inject_irq() is not only used by PPIs but also can
> be used to inject interrupt for SPIs; this patch improves comment for
> argument @cpuid to reflect support SPIs as well.
>
> Signed-off-by: Leo Yan
> ---
> virt/kvm/ar
Re-use the "tps65218_pmic_*_current_limit()" functions of LS3
and calculate the different required bit-shift by counting the
trailing 0s in "struct regulator_desc.csel_mask"
Signed-off-by: Christian Hohnstaedt
---
Somehow the header changes got lost in the first patch, Sorry.
drivers/regulator
On Fri, Feb 22, 2019 at 10:11:01AM +0800, Dave Young wrote:
> In case people have a lot of devices need more swiotlb, then he manually
> set the ,high with ,low together.
The option to specify the high and low values for the crashkernel are
important for certain machines. The point is that swiotlb
On 21/02/2019 08:21, Joseph Lo wrote:
> Add support for the Tegra210 timer that runs at oscillator clock
> (TMR10-TMR13). We need these timers to work as clock event device and to
> replace the ARMv8 architected timer due to it can't survive across the
> power cycle of the CPU core or CPUPORESET si
On Thu, Feb 21, 2019 at 01:04:24PM -0500, Jerome Glisse wrote:
> On Tue, Feb 12, 2019 at 10:56:20AM +0800, Peter Xu wrote:
> > This allows uffd-wp to support write-protected pages for COW.
> >
> > For example, the uffd write-protected PTE could also be write-protected
> > by other usages like COW
When running BPF test suite the following splat occurs:
[ 415.930950] test_bpf: #0 TAX jited:0
[ 415.931067] BUG: assuming atomic context at lib/test_bpf.c:6674
[ 415.946169] in_atomic(): 0, irqs_disabled(): 0, pid: 11556, name: modprobe
[ 415.953176] INFO: lockdep is turned off.
[ 415.957207
On Fri, Feb 22, 2019 at 1:14 AM Nick Desaulniers
wrote:
> On Thu, Feb 21, 2019 at 12:08 AM Nathan Chancellor
> wrote:
> One thing I'm curious about, is "why does do_div exist?" When should I
> use do_div vs div_u64 (not div_s64 as is used in this patch)?
I think do_div() is mostly historic, we
Hi Marc,
On Fri, Feb 22, 2019 at 08:37:56AM +, Marc Zyngier wrote:
> On Fri, 22 Feb 2019 16:23:24 +0800
> Leo Yan wrote:
>
> > The function kvm_vgic_inject_irq() is not only used by PPIs but also can
> > be used to inject interrupt for SPIs; this patch improves comment for
> > argument @cpui
On Thu, 21 Feb 2019 10:47:03 -0800
Stephen Boyd wrote:
> Quoting Brian Masney (2019-02-15 16:23:59)
> > On Fri, Feb 15, 2019 at 01:28:02PM -0800, Stephen Boyd wrote:
> > > Quoting Brian Masney (2019-02-15 05:47:33)
> > > > On Thu, Feb 14, 2019 at 09:51:26PM -0800, Stephen Boyd wrote:
> > >
czw., 21 lut 2019 o 20:56 Andy Shevchenko
napisał(a):
>
> On Thu, Feb 21, 2019 at 9:55 PM Andy Shevchenko
> wrote:
> >
> > On Thu, Feb 21, 2019 at 6:27 PM Bartosz Golaszewski wrote:
> > >
> > > From: Bartosz Golaszewski
> > >
> > > We only build devm_ioremap_resource() if HAS_IOMEM is selected,
On Thu, Feb 21, 2019 at 8:34 PM wrote:
>
> From: Enrico Granata
>
> ACPI 5 added support for GpioInt resources as a way to provide
> information about interrupts mediated via a GPIO controller.
>
> Several device buses (e.g. SPI, I2C) have support for retrieving
> an IRQ specified via this type o
On 2/22/19 4:43 PM, Daniel Lezcano wrote:
On 21/02/2019 08:21, Joseph Lo wrote:
Add support for the Tegra210 timer that runs at oscillator clock
(TMR10-TMR13). We need these timers to work as clock event device and to
replace the ARMv8 architected timer due to it can't survive across the
powe
On Thu, 21 Feb 2019 at 20:12, Greg Kroah-Hartman
wrote:
>
> This is the start of the stable review cycle for the 4.19.25 release.
> There are 30 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Res
On Fri, Feb 22, 2019 at 9:57 AM Marc Zyngier wrote:
> To be honest, I'd like to make progress on that too, if only to put
> something in core code so that individual drivers don't have to play
> that kind of game.
I am trying to pull hierarchical IRQ into the gpiolib core by refactoring
based on
On 21.02.2019 22:45, Uwe Kleine-König wrote:
> On Tue, Feb 19, 2019 at 10:09:00AM +, claudiu.bez...@microchip.com wrote:
>> From: Claudiu Beznea
>>
>> Add support for SAM9X60's PWM controller.
>>
>> Signed-off-by: Claudiu Beznea
>> ---
>> drivers/pwm/pwm-atmel.c | 19 +++
>>
On Thu, Feb 21, 2019 at 01:06:31PM -0500, Jerome Glisse wrote:
> On Tue, Feb 12, 2019 at 10:56:21AM +0800, Peter Xu wrote:
> > UFFD_EVENT_FORK support for uffd-wp should be already there, except
> > that we should clean the uffd-wp bit if uffd fork event is not
> > enabled. Detect that to avoid _P
Current code always return error, fix it.
Signed-off-by: Axel Lin
---
drivers/regulator/max77650-regulator.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/regulator/max77650-regulator.c
b/drivers/regulator/max77650-regulator.c
index 411912d5278b..a1af414db751
The recent addition of colored output introduced some non-POSIX-compliant
constructs. Fix that.
Juerg Haefliger (2):
selftests/ftrace: Replace echo -e with printf
selftests/ftrace: Replace \e with \033
tools/testing/selftests/ftrace/ftracetest | 17 +++--
1 file changed, 11 inser
echo -e is not POSIX. Depending on what /bin/sh is, we can get
incorrect output like:
$ -e -n [1] Basic trace file check
$ -e[PASS]
Fix that by using printf instead.
Signed-off-by: Juerg Haefliger
---
tools/testing/selftests/ftrace/ftracetest | 9 +++--
1 file changed, 7 insertions(+),
On 21.02.2019 22:42, Uwe Kleine-König wrote:
> Hello,
>
> On Tue, Feb 19, 2019 at 10:08:57AM +, claudiu.bez...@microchip.com wrote:
>> From: Claudiu Beznea
>>
>> New SAM9X60's PWM controller use 32 bits counters thus it could generate
>> signals with higher period and duty cycles than the o
The \e sequence character is not POSIX. Fix that by using \033 instead.
Signed-off-by: Juerg Haefliger
---
tools/testing/selftests/ftrace/ftracetest | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/tools/testing/selftests/ftrace/ftracetest
b/tools/testing/selftests/ft
Tested-by: Yang Yingliang
[ 128.069528] ipmi_si: IPMI System Interface driver
[ 128.069556] ipmi_si dmi-ipmi-si.0: ipmi_platform: probing via SMBIOS
[ 128.069559] ipmi_platform: ipmi_si: SMBIOS: io 0xe4 regsize 1 spacing
1 irq 0
[ 128.069561] ipmi_si: Adding SMBIOS-specified bt state machi
On Thu, Feb 21, 2019 at 10:33 PM Shravan Kumar Ramani
wrote:
> Regarding the suggested use of the generic MMIO library, I noticed that
> bgpio_init only allows for either dirin or dirout to be set, never both.
> But since our controller has 2 separate registers, using bgpio_init
> might not be po
On Thu, Feb 21, 2019 at 12:29 PM Mans Rullgard wrote:
>
> If the provided fwnode is an OF node, set dev.of_node as well.
>
> Also add an of_node_reused flag to struct platform_device_info and copy
> this to the new device. This is needed to avoid pinctrl settings being
> requested twice. See 4e7
On 22/02/2019 10:06, Joseph Lo wrote:
>
>
> On 2/22/19 4:43 PM, Daniel Lezcano wrote:
>> On 21/02/2019 08:21, Joseph Lo wrote:
>>> Add support for the Tegra210 timer that runs at oscillator clock
>>> (TMR10-TMR13). We need these timers to work as clock event device and to
>>> replace the ARMv8 ar
pt., 22 lut 2019 o 10:09 Axel Lin napisał(a):
>
> Current code always return error, fix it.
>
> Signed-off-by: Axel Lin
> ---
> drivers/regulator/max77650-regulator.c | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/regulator/max77650-regulator.c
> b/driver
Hi,
On 20-02-19 22:24, Yauhen Kharuzhy wrote:
ср, 20 февр. 2019 г. в 18:53, Hans de Goede :
Hi,
On 2/19/19 10:24 PM, Yauhen Kharuzhy wrote:
In some configuration external charger "#charge enable" signal is
connected to PMIC. Enable it at device probing to allow charging.
Save CHGRCTRL0 and
On 21/02/19 18:15, Sean Christopherson wrote:
> This bug exists only in the 4.4.y backport; upstream, 4.9.y and 4.14.y
> all had the correct code from the get-go. And there is already a KVM
> unit test that *should* hit this, albeit somewhat indirectly. I'll
> verify the tests that touch the TPR
From: Jiada Wang
Currently each SSI unit 's busif mode/adinr/dalign address is
registered by: (in busif4 case)
RSND_GEN_M_REG(SSI_BUSIF4_MODE, 0x500, 0x80)
RSND_GEN_M_REG(SSI_BUSIF4_ADINR,0x504, 0x80)
RSND_GEN_M_REG(SSI_BUSIF4_DALIGN, 0x508, 0x80)
But according to user manual 41.1.4 Register Con
From: Juergen Fitschen
Slave mode driver is based on the concept of i2c-designware driver.
Signed-off-by: Juergen Fitschen
[ludovic.desroc...@microchip.com: rework Kconfig and replace IS_ENABLED
by defined]
Signed-off-by: Ludovic Desroches
---
drivers/i2c/busses/Kconfig | 13 +++
dr
[Ludovic Desroches: see Changes section]
Based on the discussion we had on the i2c-linux list [1], I wrote a patch for
AT91 hardware and tried to fulfill the Linux I2C slave interface description
[2] as good as possible. This enables aforementioned hardware to act as an I2C
slave that can be acces
From: Juergen Fitschen
The single file i2c-at91.c has been split into core code (i2c-at91-core.c)
and master mode specific code (i2c-at91-master.c). This should enhance
maintainability and reduce ifdeffery for slave mode related code.
The code itself hasn't been touched. Shared functions only ha
From: Juergen Fitschen
In order to implement slave mode support for the at91 hardware we have to
segregate all master mode specific function parts from the general parts.
The upcoming slave mode patch will call its sepcific probe resp. init
function instead of the master mode functions after the
Hello,
On Fri, Feb 22, 2019 at 09:07:57AM +, claudiu.bez...@microchip.com wrote:
> On 21.02.2019 22:45, Uwe Kleine-König wrote:
> > On Tue, Feb 19, 2019 at 10:09:00AM +, claudiu.bez...@microchip.com
> > wrote:
> > I wonder how the naming of the defines is chosen given that pwm_data_v3
> >
From: Jiada Wang
commit 78bc93b3ffb2 ("arm64: dts: renesas: r8a7796: Add address
properties to rcar_sound port nodes") added missing #address-cells
and #size-cells for sound ports.
But, these are based on platform, not on SoC. This patch cleanups it.
Signed-off-by: Jiada Wang
Signed-off-by: Tim
On Friday, February 22, 2019 5:58:24 AM CET Bjorn Helgaas wrote:
> On Mon, Feb 11, 2019 at 04:55:33PM -0600, Bjorn Helgaas wrote:
> > These are to fix a couple LTR-related issues found while investigating
> > https://bugzilla.kernel.org/show_bug.cgi?id=201469
> >
> > I don't claim that these fix t
Hello Dan,
what kernel version is that patch series for. I have problems to apply it!
Wolfgang.
Am 21.02.19 um 17:41 schrieb Wolfgang Grandegger:
> Hello Dan,
>
> I will have a closer look end of this week!
>
> Wolfgang.
>
> Am 21.02.19 um 17:24 schrieb Dan Murphy:
>> Bump
>>
>> On 2/14/19 12
On Fri, 22 Feb 2019 16:54:39 +0800
Leo Yan wrote:
> Hi Marc,
>
> On Fri, Feb 22, 2019 at 08:37:56AM +, Marc Zyngier wrote:
> > On Fri, 22 Feb 2019 16:23:24 +0800
> > Leo Yan wrote:
> >
> > > The function kvm_vgic_inject_irq() is not only used by PPIs but also can
> > > be used to inject
>
> Refactor the code in charge of looking up the USB PHY when no platdata is
> provided. Attempt to get a generic USB PHY first, then look for a legacy USB
> PHY
> through device-tree and finally get any registered PHY with the correct type.
>
> This way, only a single USB PHY is obtained and
Hi Linus,
Please pull from the tag
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git \
pm-5.0
with top-most commit 5b317cbf2bcb85a1e96ce87717cb991ecab1dd4d
Merge branch 'pm-cpufreq-fixes'
on top of commit a3b22b9f11d9fbc48b0291ea92259a5a810e9438
Linux 5.0-rc7
to receive p
i.MX8MQ has clock gate for each GPIO bank, add clock info
to GPIO node for clock management.
Signed-off-by: Anson Huang
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
b/arch/arm64/boot/dts/freescal
i.MX8MQ has clock gate for each GPIO bank, add them
into clock tree for GPIO driver to manage.
Signed-off-by: Anson Huang
---
drivers/clk/imx/clk-imx8mq.c | 5 +
include/dt-bindings/clock/imx8mq-clock.h | 8 +++-
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/
From: YueHaibing
KASAN report this:
BUG: KASAN: use-after-free in kobject_uevent_env+0xedb/0xf20
lib/kobject_uevent.c:474
Read of size 8 at addr 8881e52d5dc0 by task kworker/0:2/1066
CPU: 0 PID: 1066 Comm: kworker/0:2 Not tainted 5.0.0-rc7+ #45
Hardware name: QEMU Standard PC (i440FX + PII
Currently on i.MX8MQ platform, clock driver is probed
later than GPIO driver, and GPIO driver does NOT have
defer probe mechanism since the GPIO clock is optional,
some platforms have GPIO clocks and some are NOT. So
it is an issue that on i.MX8MQ platform, there are GPIO
clocks defined, but due to
On Mon, Jan 07, 2019 at 08:15:52PM +0800, wangbo wrote:
> Replace kmalloc_node and memset with kzalloc_node
>
> Signed-off-by: wangbo
Thanks, applied to my kvm-ppc-next tree.
Paul.
On Wed, 20 Feb 2019 16:13:23 +0100,
Sameer Pujar wrote:
>
> "nvidia,model" property is added to pass custom name for hda sound card.
> This is parsed in hda driver and used for card name. This aligns with the
> way with which sound cards are named in general.
>
> This patch populates above for je
On Wed, 20 Feb 2019 16:13:22 +0100,
Sameer Pujar wrote:
>
> An optional property "nvidia,model" is introduced for hda to pass custom
> name for the sound card. The suffix "-hda" in the name passed is useful
> to distinguish between multiple cards available for a platform.
> When the property is no
On Wed, 20 Feb 2019 16:13:24 +0100,
Sameer Pujar wrote:
>
> A platform can have multiple sound cards for different audio paths.
> Following is the print seen duirng device boot for jetson-xavier,
> ALSA device list:
> #0: nvidia,p2972- at 0x3518000 irq 17
> By looking at above, it is not
On Wed, 2019-02-13 at 07:01:02 UTC, Christoph Hellwig wrote:
> The pasemi driver never set a DMA mask, and given that the powerpc
> DMA mapping routines never check it this worked ok so far. But the
> generic dma-direct code which I plan to switch on for powerpc checks
> the DMA mask and fails uns
On Thu, 2019-01-31 at 10:10:31 UTC, Christophe Leroy wrote:
> 40x/booke have another path to reach 3f from transfer_to_handler,
> make sure it also calls ACCOUNT_CPU_USER_ENTRY() when
> CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is selected.
>
> Signed-off-by: Christophe Leroy
Applied to powerpc next, th
On Tue, 2019-01-22 at 13:52:04 UTC, Christophe Leroy wrote:
> MSR[RI] has already been cleared a few lines above.
>
> Signed-off-by: Christophe Leroy
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/ab44840df1dcd1a10c514aa2938c47f5
cheers
On Tue, 2019-01-22 at 14:11:24 UTC, Christophe Leroy wrote:
> Looks like book3s/32 doesn't set RI on machine check, so
> checking RI before calling die() will always be fatal
> allthought this is not an issue in most cases.
>
> Fixes: b96672dd840f ("powerpc: Machine check interrupt is a non-maskab
On Mon, 2019-02-18 at 12:28:36 UTC, Christophe Leroy wrote:
> This patch moves the files related to page table dump in a
> dedicated subdirectory.
>
> The purpose is to clean a bit arch/powerpc/mm by regrouping
> multiple files handling a dedicated function.
>
> Signed-off-by: Christophe Leroy
On Fri, 2019-02-08 at 14:33:19 UTC, Mark Cave-Ayland wrote:
> Commit 8792468da5e1 "powerpc: Add the ability to save FPU without giving it
> up"
> unexpectedly removed the MSR_FE0 and MSR_FE1 bits from the bitmask used to
> update the MSR of the previous thread in __giveup_fpu() causing a KVM-PR Ma
On Thu, 2019-01-31 at 10:30:22 UTC, Peter Xu wrote:
> The change_pte() notifier was designed to use as a quick path to
> update secondary MMU PTEs on write permission changes or PFN changes.
> For KVM, it could reduce the vm-exits when vcpu faults on the pages
> that was touched up by KSM. It's no
On Mon, 2019-02-18 at 12:25:20 UTC, Christophe Leroy wrote:
> When using KASAN, there are parts of the shadow area where all
> pages are mapped to the kasan_early_shadow_page. It is pointless
> to dump one line for each of those pages (in the example below there
> are 7168 entries pointing to the s
On Tue, 2019-01-22 at 13:54:57 UTC, Christophe Leroy wrote:
> All callers of mftb() expect 'unsigned long', and the function itself
> only returns lower part of the TB so it really is 'unsigned long'
> not 'unsigned long long'
>
> Signed-off-by: Christophe Leroy
Applied to powerpc next, thanks.
1 - 100 of 856 matches
Mail list logo