Hi all,
This small patch series remove reference of TIF_USEDFPU on nds32, arm and
arm64 as the flag is not inuse.
Cheers,
Cc: Greentime Hu
Cc: Vincent Chen
Cc: Russell King
Cc: Catalin Marinas
Cc: Will Deacon
Cc: linux-arm-ker...@lists.infradead.org
Julien Grall (3):
nds32: Removed unuse
TIF_USEDFPU is not defined as thread flags for Arm. So drop it from
the documentation.
Signed-off-by: Julien Grall
Cc: Russell King
Cc: linux-arm-ker...@lists.infradead.org
---
arch/arm/include/asm/thread_info.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/include/asm/thread_info
On Fri, Feb 08, 2019 at 05:12:01PM +0100, Federico Vaga wrote:
> Miscellaneous style fixes from checkpatch
>
> Signed-off-by: Federico Vaga
Reviewed-by: Andrew Lunn
Andrew
When the kernel is compiled with CONFIG_KERNEL_MODE_NEON, some part of
the kernel may be able to use FPSIMD/SVE. This is for instance the case
for crypto code.
Any use of FPSIMD/SVE in the kernel are clearly marked by using the
function kernel_neon_{begin, end}. Furthermore, this can only be used
Hi Alexandre,
[snip]
>
> The series should probably go through the chrome tree. The only possible
> conflict would be in drivers/rtc/Makefile and it should be easy enough
> for Linus to solve.
>
Perfect, I will pick also the RTC patch then.
[snip]
I'm reporting a bug in linux-4.19.19: "UBSAN: Undefined behaviour in
fs/xfs/xfs_ioctl.c"
kernel config: https://kt0755.github.io/etc/config_4.19.19
repro: https://kt0755.github.io/etc/repro.8d35e.c (xfs is mounted on
/mnt/xfs/)
Integer overflow arose in xfs_ioc_space() when bf->l_start + bf->l_le
TIF_USEDFPU is not defined as thread flags for Arm64. So drop it from
the documentation.
Signed-off-by: Julien Grall
Cc: Catalin Marinas
Cc: Will Deacon
Cc: linux-arm-ker...@lists.infradead.org
---
arch/arm64/include/asm/thread_info.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm
> I'm still also suggesting to squash "fix maximum transfer size" into this
> patch because it is really part of DMA-support enabling.
Max transfer length limits apply to PIO also but for DMA its more needed to
prevent crash.
So had this as patch before DMA as its applicable for both DMA & PIO.
On 01/16/2019 04:14 PM, Lubomir Rintel wrote:
> provides olpc_has_dcon() stub for CONFIG_OLPC=n, compiler
> should just optimize the unneeded bits away.
>
> Signed-off-by: Lubomir Rintel
Patch queued for v5.1, thanks.
Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Sa
On 01/14/2019 10:50 PM, Gustavo A. R. Silva wrote:
>
>
> On 1/14/19 2:40 PM, Mathieu Malaterre wrote:
>> There is a plan to build the kernel with -Wimplicit-fallthrough and
>> these places in the code produced warnings (W=1). Fix them up.
>>
>> This commit remove the following warnings:
>>
>>
On Mon, Feb 04, 2019 at 05:09:50PM -0500, Sven Van Asbroeck wrote:
> In modules which extensively use devm_ resource management, it is often
> easy to overlook (delayed) work that is left pending or running after the
> module is unloaded. This could introduce user-after-free issues.
>
> Nudge kern
On 1/18/19 6:51 PM, Mel Gorman wrote:
> The migration scanner is a linear scan of a zone with a potentiall large
> search space. Furthermore, many pageblocks are unusable such as those
> filled with reserved pages or partially filled with pages that cannot
> migrate. These still get scanned in the
On Fri, 2019-02-08 at 16:23 +0100, Petr Mladek wrote:
> Move the code from the long pointer() function. We are going to improve
> error handling that will make it more complicated.
>
> This patch does not change the existing behavior.
But doesn't this increase stack use?
%pV is recursive and incr
Hey Miquel,
On 2/5/19 6:55 AM, Miquel Raynal wrote:
> Hi Gustavo,
>
> "Gustavo A. R. Silva" wrote on Mon, 28 Jan
> 2019 12:15:20 -0600:
>
>> In preparation to enabling -Wimplicit-fallthrough, mark switch
>> cases where we are expecting to fall through.
>>
>> This patch fixes the following warni
This patch adds basic driver model for Qualcomm FastRPC driver which
implements an IPC (Inter-Processor Communication) mechanism that
allows for clients to transparently make remote method invocations
across processor boundaries.
Each DSP rpmsg channel is represented as fastrpc channel context and
This patch adds support to compute context invoke method on the
remote processor (DSP).
This involves setting up the functions input and output arguments,
input and output handles and mapping the dmabuf fd for the
argument/handle buffers.
The below diagram depicts invocation of a single method whe
This patch adds support to create or attach remote shell process.
The shell process called fastrpc_shell_0 is usually loaded on the DSP
when a user process is spawned.
Most of the work is derived from various downstream Qualcomm kernels.
Credits to various Qualcomm authors who have contributed to
The FastRPC driver implements an IPC (Inter-Processor Communication)
mechanism that allows for clients to transparently make remote method
invocations across DSP and APPS boundaries. This enables developers
to offload tasks to the DSP and free up the application processor for
other tasks.
Co-devel
Thanks for reviewing the v6 here is new version addressing the
comments from v7.
This patchset adds support to Qualcomm FastRPC driver which implements
an IPC (Inter-Processor Communication) mechanism that allows for clients
to transparently make remote method invocations across processor boundarie
User process can involve dealing with big buffer sizes, and also passing
buffers from one compute context bank to other compute context bank for
complex dsp algorithms.
This patch adds support to fastrpc to make it a proper dmabuf exporter
to avoid making copies of buffers.
Co-developed-by: Thier
Hi, Tutor
Thanks. unfortunately, it doesn't work on my side. Problem is on our email
server side, not my local setting.
I followed your configuration, then git-email failed.
Please just change my S-o-b to 'Bean Huo (beanhuo) ' in my
patch to please checkpacth.pl. It is not huge change.
Thanks,
Hi Nick,
Missatge de Nick Crews del dia dv., 8 de febr.
2019 a les 17:10:
>
> Hi Enric and Alexandre,
>
> On Fri, Feb 8, 2019 at 5:18 AM Enric Balletbo i Serra
> wrote:
> >
> > Hi,
> >
> > On 8/2/19 2:23, Nick Crews wrote:
> > > This Embedded Controller has an internal RTC that is exposed
> > > a
On 2019-02-08 17:12, Federico Vaga wrote:
> It adds the SPDX tag and it removes the old text about the GPLv2.
>
> Signed-off-by: Federico Vaga
> ---
> drivers/i2c/busses/i2c-ocores.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-ocores.c b
Hi Nick,
Missatge de Nick Crews del dia dv., 8 de febr.
2019 a les 2:24:
>
> Add a debugfs attribute that allows sending raw commands to the EC.
> This is useful for development and debug but should not be enabled
> in a production environment.
>
> To test:
> Get the EC firmware build date
> First
Hi Daniel,
Le 08/02/2019 à 17:18, Daniel Axtens a écrit :
Hi Christophe,
I've been attempting to port this to 64-bit Book3e nohash (e6500),
although I think I've ended up with an approach more similar to Aneesh's
much earlier (2015) series for book3s.
Part of this is just due to the changes be
Consumers may have use cases with different bandwidth requirements based
on the system or driver state. The consumer driver can append a specific
tag to the path and pass this information to the interconnect platform
driver to do the aggregation based on this state.
Introduce icc_set_tag() functio
From: David Dai
Add support for wake and sleep commands by using a tag to indicate
whether or not the aggregate and set requests are active only or
dual context for a particular path.
Signed-off-by: David Dai
Signed-off-by: Georgi Djakov
---
drivers/interconnect/qcom/sdm845.c | 101 ++
08.02.2019 20:06, Sowjanya Komatineni пишет:
>
>> I'm still also suggesting to squash "fix maximum transfer size" into this
>> patch because it is really part of DMA-support enabling.
>
> Max transfer length limits apply to PIO also but for DMA its more needed to
> prevent crash.
> So had this
SoCs that have multiple coexisting CPUs and DSPs, may have shared
interconnect buses between them. In such cases, each CPU/DSP may have
different bandwidth needs, depending on whether it is active or sleeping.
This means that we have to keep different bandwidth configurations for
the CPU (active/sl
On Fri, Feb 08, 2019 at 04:23:08PM +0100, Petr Mladek wrote:
> There are few printk formats that make sense only with two or more
> specifiers. Also some specifiers make sense only when a kernel feature
> is enabled.
>
> The handling of unknown specifiers is inconsistent and not helpful.
> Using W
On 01/22/2019 04:21 PM, Greg Kroah-Hartman wrote:
> When calling debugfs functions, there is no need to ever check the
> return value. The function can work or not, but the code logic should
> never do something different based on this.
>
> Cc: Bartlomiej Zolnierkiewicz
> Cc: Mauro Carvalho Ch
On Thu, Feb 7, 2019 at 9:51 PM Nathan Chancellor
wrote:
>
> On Thu, Feb 07, 2019 at 02:01:51PM -0800, ndesaulni...@google.com wrote:
> > This is needed because clang doesn't select which linker to use based on
> > $LD but rather -fuse-ld=$(LD). This is problematic especially for
> > cc-ldoption, w
Linus Walleij writes:
> On Mon, Jan 21, 2019 at 4:36 PM Jerome Brunet wrote:
>> On Mon, 2019-01-21 at 14:53 +0100, Linus Walleij wrote:
>> > On Thu, Jan 17, 2019 at 11:23 AM Jerome Brunet
>> > wrote:
>> >
>> > > This patchset fixes the initial pinctrl support added for th g12a SoC
>> > > famil
On Fri, Feb 08, 2019 at 04:23:10PM +0100, Petr Mladek wrote:
> We are able to detect invalid values handled by %p[iI] printk specifier.
> The current error message is "invalid address". It might cause confusion
> against "(efault)" reported by the generic valid_pointer_address() check.
>
> Let's u
On 01/22/2019 04:21 PM, Greg Kroah-Hartman wrote:
> There is no need to keep the dentries around for the individual debugfs
> files, just delete the whole directory all at once at shutdown instead.
>
> This also fixes a tiny memory leak where the memory for the pointers to
> the file dentries wa
On Fri, Feb 08, 2019 at 04:23:04PM +0100, Petr Mladek wrote:
> We are going to check the address using probe_kernel_address(). It will
> be more expensive and it does not make sense for well known address.
>
> This patch splits the string() function. The variant without the check
> is then used on
> >
> >> I'm still also suggesting to squash "fix maximum transfer size" into this
> >> patch because it is really part of DMA-support enabling.
> >
> > Max transfer length limits apply to PIO also but for DMA its more needed to
> > prevent crash.
> > So had this as patch before DMA as its app
08.02.2019 20:29, Sowjanya Komatineni пишет:
>
>>>
I'm still also suggesting to squash "fix maximum transfer size" into this
patch because it is really part of DMA-support enabling.
>>>
>>> Max transfer length limits apply to PIO also but for DMA its more needed to
>>> prevent crash.
>
Jerome Brunet writes:
> Enable the g12a clock controller for ARCH_MESON
>
> Signed-off-by: Jerome Brunet
> ---
> arch/arm64/Kconfig.platforms | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
> index 819e74ae9
From: Bartosz Golaszewski
In preparation for moving the driver to drivers/irqchip do some
cleanup: use a common prefix for all symbols.
Signed-off-by: Bartosz Golaszewski
Reviewed-by: David Lechner
---
arch/arm/mach-davinci/dm355.c | 2 +-
arch/arm/mach-davinci/dm365.c
From: Bartosz Golaszewski
The aintc driver has now been cleaned up. Move it to drivers/irqchip
where it belongs. There's no device-tree support for any dm* board so
there's no IRQCHIP_OF_DECLARE() - there's only the exported init
function called from machine code.
Signed-off-by: Bartosz Golaszew
From: Bartosz Golaszewski
Everything is in place now for SPARSE_IRQ. Select it and set
DAVINCI_INTC_START to NR_IRQS.
We now need to include mach/irqs.h in a couple places as it is no
longer indirectly included after selecting SPARSE_IRQ.
Signed-off-by: Bartosz Golaszewski
Reviewed-by: David L
In cases where the next unique ID or file/directory count of the
in-core Logical Volume Integrity Descriptor have been updated,
a sync() causes a (corrupt) LVID with a stale CRC to be written to disk.
Ordinarily, this is corrected by an update of the on-disk LVID that occurs
when the filesystem is
From: Bartosz Golaszewski
davinci_intc_base is defined globally in common.c. Define separate
local variables for the aintc and cp-intc drivers and remove the
global one.
Signed-off-by: Bartosz Golaszewski
Reviewed-by: David Lechner
---
arch/arm/mach-davinci/common.c | 2 --
arch/
The patch
dt-bindings: regulator: update fixed-regulator example
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24
From: Bartosz Golaszewski
In order to support SPARSE_IRQ we first need to make davinci use the
generic irq handler for ARM. Translate the legacy assembly to C and
put the irq handlers into their respective drivers (aintc and cp-intc).
Signed-off-by: Bartosz Golaszewski
---
arch/arm/Kconfig
From: Bartosz Golaszewski
The cp-intc driver has now been cleaned up. Move it to drivers/irqchip
where it belongs.
Signed-off-by: Bartosz Golaszewski
Reviewed-by: David Lechner
---
arch/arm/mach-davinci/Kconfig | 8 ++--
arch/arm/mach-davinci/Makefile
From: Bartosz Golaszewski
We need to create an irq domain if we want to select SPARSE_IRQ. The
cp-intc driver already supports it, but aintc doesn't. Use the helpers
provided by the generic irq chip abstraction.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/mach-davinci/irq.c | 35 ++
From: Bartosz Golaszewski
Use lowercase letters in hexadecimal numbers in the cp-intc driver as
is done in most of the kernel code base.
Signed-off-by: Bartosz Golaszewski
Reviewed-by: David Lechner
---
arch/arm/mach-davinci/cp_intc.c | 8
1 file changed, 4 insertions(+), 4 deletions
Hi Linus,
Please pull these two arm64 fixes for -rc6. They resolve a kernel NULL
dereference in kexec and bogus kernel page table dumping when userspace
is configured for 52-bit virtual addressing.
Cheers,
Will
--->8
The following changes since commit 8834f5600cf3c8db365e18a3d5cac2c2780c81e5:
From: Bartosz Golaszewski
Raplace all calls to __raw_readl() & __raw_writel() with readl_relaxed()
and writel_relaxed() respectively. It's safe to do as there's no
endianness conversion being done in the code.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/mach-davinci/irq.c | 4 ++--
1 file
From: Bartosz Golaszewski
The fields related to the two davinci interrupt controllers are no
longer used. Remove them.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/mach-davinci/da830.c | 98 --
arch/arm/mach-davinci/da850.c | 108
From: Bartosz Golaszewski
Modify the cp-intc driver to take all its configuration from the new
config structure. Stop referencing davinci_soc_info in any way.
Move the declaration for davinci_cp_intc_init() to
irq-davinci-cp-intc.h and make it take the new config structure as
parameter. Convert a
From: Bartosz Golaszewski
We don't need comments explaining what functions with obvious names do.
Signed-off-by: Bartosz Golaszewski
Reviewed-by: David Lechner
---
arch/arm/mach-davinci/cp_intc.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/
From: Bartosz Golaszewski
In preparation for moving the driver to drivers/irqchip do some
cleanup: use a common prefix for all symbols.
Signed-off-by: Bartosz Golaszewski
Reviewed-by: David Lechner
---
arch/arm/mach-davinci/cp_intc.c | 144 ++--
arch/arm/mach-davin
From: Bartosz Golaszewski
Replace the GPLv2 license boilerplate with an SPDX identifier and add
myself as a second author.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/mach-davinci/cp_intc.c | 18 --
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mac
From: Bartosz Golaszewski
Use WARN_ON() on eny error in cp-intc initialization and drop all
custom error messages.
Signed-off-by: Bartosz Golaszewski
Reviewed-by: David Lechner
---
arch/arm/mach-davinci/cp_intc.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/a
From: Bartosz Golaszewski
Raplace all calls to __raw_readl() & __raw_writel() with readl_relaxed()
and writel_relaxed() respectively. It's safe to do as there's no
endianness conversion being done in the code.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/mach-davinci/cp_intc.c | 4 ++--
1 f
From: Bartosz Golaszewski
Drop tabs from variable initialization. Arrange variables in reverse
christmas-tree order. Add a newline before a return.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/mach-davinci/cp_intc.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff -
From: Bartosz Golaszewski
Add a config structure that will be used by cp-intc-based platforms.
It contains the register range resource and the number of interrupts.
Signed-off-by: Bartosz Golaszewski
---
include/linux/irqchip/irq-davinci-cp-intc.h | 23 +
1 file changed, 23
From: Bartosz Golaszewski
Add the new-style config structures for da8xx SoCs. They will be used
once we make the cp-intc driver stop using davinci_soc_info.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/mach-davinci/da830.c | 10 ++
arch/arm/mach-davinci/da850.c | 10 ++
2 fi
From: Bartosz Golaszewski
There's no need to have a local header for cp-intc. Move the only
declaration for a public function to common.h. Move all register
offsets into the driver source file and drop all unused defines.
Make cp_intc_of_init() static.
Signed-off-by: Bartosz Golaszewski
Reviewe
From: Bartosz Golaszewski
We're going to extend the cp_intc_init() function with a config
structure so we can drop the intc-related fields from davinci_soc_info.
Once we do it, we won't be able to use this routine directly as the
init_irq callback. Wrap the calls in additional helpers that don't
From: Bartosz Golaszewski
These includes are no longer required. Remove them.
Signed-off-by: Bartosz Golaszewski
Reviewed-by: David Lechner
---
arch/arm/mach-davinci/irq.c | 4
1 file changed, 4 deletions(-)
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
index 0f
08.02.2019 20:34, Dmitry Osipenko пишет:
> 08.02.2019 20:29, Sowjanya Komatineni пишет:
>>
> I'm still also suggesting to squash "fix maximum transfer size" into this
> patch because it is really part of DMA-support enabling.
Max transfer length limits apply to PIO also but
pt., 8 lut 2019 o 18:35 Bartosz Golaszewski napisał(a):
>
> From: Bartosz Golaszewski
>
> This series ports the davinci platform to using SPARSE_IRQ, cleans up
> the irqchip drivers and moves them over to drivers/irqchip.
>
> The series can be logically split into four parts. The first (1-8) aims
Make sure the CRC and tag checksum of the Logical Volume Integrity
Descriptor are valid before the structure is written out to disk.
Otherwise, unless the filesystem is unmounted gracefully, the on-disk
LVID will be invalid - which is unnecessary filesystem damage.
Signed-off-by: Steven J. Magnani
Centralize timestamping and CRC/checksum updating of the in-core
Logical Volume Integrity Descriptor, in preparation for adding
a third site where this functionality is needed.
Signed-off-by: Steven J. Magnani
---
--- a/fs/udf/super.c2019-02-08 10:30:00.397978609 -0600
+++ b/fs/udf/super.c
From: Bartosz Golaszewski
Add the new-style config structures for dm* SoCs. They will be used
once we make the aintc driver stop using davinci_soc_info.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/mach-davinci/dm355.c | 11 +++
arch/arm/mach-davinci/dm365.c | 11 +++
arch
From: Bartosz Golaszewski
I've been unable to figure out exactly why, but it seems that the
IRQ_TINT1_TINT34 interrupt for timer 1 needs to be handled as a
level irq, not edge like all others.
Let's move the handler setup out of the aintc driver where it's lived
since the beginning and into the
From: Bartosz Golaszewski
Modify the aintc driver to take all its configuration from the new
config structure. Stop referencing davinci_soc_info in any way.
Move the declaration for davinci_aintc_init() to irq-davinci-aintc.h
and make it take the new config structure as parameter. Convert all
use
From: Bartosz Golaszewski
We now use the generic ARM irq handler on davinci. There are no more
users that check davinci_intc_type. Remove the variable and all its
references.
Signed-off-by: Bartosz Golaszewski
Reviewed-by: David Lechner
---
arch/arm/mach-davinci/common.c | 1 -
a
From: Bartosz Golaszewski
Since no offset goes past 0xff - let's drop the 00 prefix for better
readability. While we're at it: convert all hex numbers to lower-case.
Signed-off-by: Bartosz Golaszewski
Reviewed-by: David Lechner
---
arch/arm/mach-davinci/irq.c | 22 +++---
1 fi
From: Bartosz Golaszewski
Add a config structure that will be used by aintc-based platforms.
It contains the register range resource, number of interrupts and
a list of priorities.
Signed-off-by: Bartosz Golaszewski
---
include/linux/irqchip/irq-davinci-aintc.h | 25 +++
1
From: Bartosz Golaszewski
We're going to extend the davinci_irq_init() function with a config
structure so we can drop the intc-related fields from davinci_soc_info.
Once we do it, we won't be able to use this routine directly as the
init_irq callback. Wrap the calls in additional helpers that d
From: Bartosz Golaszewski
Once we select SPARSE_IRQ, the interrupt numbers defined in mach/irqs.h
will only signify the hardware interrupt offsets, not the interrupt
numbers seen by linux. Introduce a wrapper macro that translates the
hwirq number to virtual numbers. For now it's just a dummy. Us
From: Bartosz Golaszewski
Replace the GPLv2 or later license boilerplate with an SPDX identifier.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/mach-davinci/irq.c | 26 ++
1 file changed, 6 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-davinci/irq.c b/arc
From: Bartosz Golaszewski
The existence of irqs.h in mach-davinci/include/mach only makes sense
without SPARSE_IRQ as it's then expected to define NR_IRQS and is
included from asm/irq.h. As we now support SPARSE_IRQ, this header can
be moved to mach-davinci and used as the source of HW interrupt
The patch
regulator: lm363x: Check return value of gpiod_get_index_optional
has been applied to the regulator tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in t
From: Bartosz Golaszewski
The intc_host_map field in struct davinci_soc_info is not used by any
board. Remove it as part of the interrupt support cleanup.
Signed-off-by: Bartosz Golaszewski
Reviewed-by: David Lechner
---
arch/arm/mach-davinci/cp_intc.c | 5 -
arch/arm/mach-dav
On Fri, Feb 8, 2019 at 6:17 PM Christophe Leroy wrote:
>
> Hi Daniel,
>
> Le 08/02/2019 à 17:18, Daniel Axtens a écrit :
> > Hi Christophe,
> >
> > I've been attempting to port this to 64-bit Book3e nohash (e6500),
> > although I think I've ended up with an approach more similar to Aneesh's
> > mu
On 08/02/2019 13:48, Thomas Gleixner wrote:
> Waiman reported that on large systems with a large amount of interrupts the
> readout of /proc/stat takes a long time to sum up the interrupt
> statistics. In principle this is not a problem. but for unknown reasons
> some enterprise quality software re
On 01/28/2019 11:04 AM, Martin Kepplinger wrote:
> From: Manfred Schlaegl
>
> There is no clipping on the x or y axis for logos larger that the framebuffer
> size. Therefore: a logo bigger than screen size leads to invalid memory
> access:
>
> [1.254664] Backtrace:
> [1.254728] [] (cf
On Fri, Feb 08, 2019 at 01:04:18PM +0100, Marek Szyprowski wrote:
> Hi Sudeep,
>
> On 2019-02-08 12:51, Sudeep Holla wrote:
> > On Fri, Feb 08, 2019 at 12:47:06PM +0100, Marek Szyprowski wrote:
> >> On 2019-02-08 12:00, Sudeep Holla wrote:
> >>> On Thu, Feb 07, 2019 at 01:22:25PM +0100, Marek Szyp
Jerome Brunet writes:
> Add the peripheral clock controller to the g12a SoC DT
>
> Signed-off-by: Jerome Brunet
Queued for v5.1 (branch: v5.1/dt64)
Kevin
On Fri, Feb 08, 2019 at 08:14:45AM -0500, Prarit Bhargava wrote:
>
> Yes, that's exactly the case. During early boot we initialize the boot cpu's
> stack canary at arch/x86/include/asm/stackprotector.h:75 which is well before
> the random driver is initialized. The same code is called for all ot
On Fri, Feb 08, 2019 at 09:27:19AM -0800, Nick Desaulniers wrote:
> On Thu, Feb 7, 2019 at 9:51 PM Nathan Chancellor
> wrote:
> >
> > On Thu, Feb 07, 2019 at 02:01:51PM -0800, ndesaulni...@google.com wrote:
> > > This is needed because clang doesn't select which linker to use based on
> > > $LD bu
On Fri, 2019-02-08 at 15:25 +0100, Linus Walleij wrote:
> > +/*
> > + * GPIO driver for the AMD G series FCH (eg. GX-412TC)
> > + *
> > + * Copyright (C) 2018 metux IT consult
> > + * Author: Enrico Weigelt
> > + *
> > + * SPDX-License-Identifier: GPL+
> > + */
>
> I think checkpatch will complai
Hi Bean,
On Fri, 8 Feb 2019 17:13:52 +
"Bean Huo (beanhuo)" wrote:
> Hi, Tutor
> Thanks. unfortunately, it doesn't work on my side. Problem is on our email
> server side, not my local setting.
> I followed your configuration, then git-email failed.
Can you paste the output of git send-emai
Update documentation relating to HPWDT_NMI_DECODING to reflect its
current usage.
Signed-off-by: Jerry Hoemann
---
drivers/watchdog/Kconfig | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 57f017d..846dd07 1006
This patch sorts all the include headers alphabetically for the
I2C Tegra driver.
Acked-by: Thierry Reding
Reviewed-by: Dmitry Osipenko
Signed-off-by: Sowjanya Komatineni
---
[V9/V10/V11/V12/V13/V14/V15/V16/V17] : Rebased to 5.0-rc4
[V3/V4/V5/V7/V8] : Removed unsued headers in tegra I2C
[V2]
Tegra194 allows max of 64K bytes and Tegra186 and prior allows
max of 4K bytes of transfer per packet.
one sec timeout is not enough for transfers more than 10K bytes
at STD bus rate.
This patch updates I2C transfer timeout based on the transfer size
and I2C bus rate to allow enough time during m
Bus clear feature of Tegra I2C controller helps to recover from
bus hang when I2C master loses the bus arbitration due to the
slave device holding SDA LOW continuously for some unknown reasons.
Per I2C specification, the device that held the bus LOW should
release it within 9 clock pulses.
During
In preparation to enabling -Wimplicit-fallthrough, mark switch
cases where we are expecting to fall through.
This patch fixes the following warning:
drivers/mtd/nand/raw/diskonchip.c: In function ‘doc_probe’:
./include/linux/printk.h:303:2: warning: this statement may fall through
[-Wimplicit-fa
This patch adds DMA support for Tegra I2C.
Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
transfer size of the max FIFO depth and DMA mode is used for
transfer size higher than max FIFO depth to save CPU overhead.
PIO mode needs full intervention of CPU to fill or empty FIFO's
an
On February 8, 2019 11:51, Jeff King wrote:
> On Fri, Feb 08, 2019 at 06:08:33AM -0500, Randall S. Becker wrote:
>
> > t5318 is rather problematic and I have no good way to fix this. There
> > is no /dev/zero on the platform, and the corrupt_graph_and_verify
> > hard-codes if=/dev/zero, which is a
This patch adds I2C interface timing registers support for
proper bus rate configuration along with meeting the I2C spec
setup and hold times based on the tuning performed on Tegra210,
Tegra186 and Tegra194 platforms.
I2C_INTERFACE_TIMING_0 register contains TLOW and THIGH field
and Tegra I2C cont
Tegra194 supports maximum 64K bytes transfer per packet.
Tegra186 and prior supports maximum 4K bytes transfer per packet.
This includes 12 bytes of packet header and this limit is
applicable irrespective of PIO or DMA mode transfers.
This patch fixes max write length to account for packet header
>
> > I'm still also suggesting to squash "fix maximum transfer size" into
> > this patch because it is really part of DMA-support enabling.
>
> Max transfer length limits apply to PIO also but for DMA its more needed
> to prevent crash.
> So had this as patch bef
On 2/7/19 11:20 AM, Luis Chamberlain wrote:
On Wed, Dec 5, 2018 at 2:43 PM Dan Rue wrote:
On Thu, Nov 29, 2018 at 06:37:32PM -0800, Luis Chamberlain wrote:
On Mon, Nov 26, 2018 at 09:12:15PM -0600, Dan Rue wrote:
diff -Z is used to trim the trailing whitespace when comparing the
loaded firmw
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