On Tue, Feb 05, 2019 at 11:42:24PM +0800, Chen-Yu Tsai wrote:
> The MMC device tree bindings include properties used to signal various
> signalling speed modes. Until now the sunxi driver was accepting them
> without any further filtering, while the sunxi device trees were not
> actually using them
On Thu, 24 Jan 2019 16:07:22 -0700
Keith Busch wrote:
> System memory may have side caches to help improve access speed to
> frequently requested address ranges. While the system provided cache is
> transparent to the software accessing these memory ranges, applications
> can optimize their own a
On Thu, 24 Jan 2019 16:07:21 -0700
Keith Busch wrote:
> Register the local attached performace access attributes with the memory's
performance
> node if HMAT provides the locality table. While HMAT does make it possible
> to know performance for all possible initiator-target pairings, we export
Hi Kishon,
On Wed, Feb 06, 2019 at 05:43:12PM +0530, Kishon Vijay Abraham I wrote:
> On 05/02/19 2:16 PM, Daniel Vetter wrote:
> > On Mon, Feb 04, 2019 at 03:33:31PM +0530, Kishon Vijay Abraham I wrote:
> >>
> >>
> >> On 21/01/19 9:15 PM, Maxime Ripard wrote:
> >>> Hi,
> >>>
> >>> Here is a set of
From: Beniamin Bia
Frequency attribute is added with a standard type from iio framework
instead of custom attribute. This is a small step towards removing any
unnecessary custom attribute.
Signed-off-by: Beniamin Bia
---
drivers/staging/iio/frequency/ad9834.c | 97 +-
1
On Thu, 24 Jan 2019 16:07:19 -0700
Keith Busch wrote:
> If the HMAT Subsystem Address Range provides a valid processor proximity
> domain for a memory domain, or a processor domain matches the performance
> access of the valid processor proximity domain, register the memory
> target with that ini
From: Beniamin Bia
The custom phase and scale attributes were moved to standard iio types.
Signed-off-by: Beniamin Bia
---
drivers/staging/iio/frequency/ad9834.c | 54 +++---
1 file changed, 32 insertions(+), 22 deletions(-)
diff --git a/drivers/staging/iio/frequency/ad983
On Thu, 24 Jan 2019 16:07:18 -0700
Keith Busch wrote:
> Systems may be constructed with various specialized nodes. Some nodes
> may provide memory, some provide compute devices that access and use
> that memory, and others may provide both. Nodes that provide memory are
> referred to as memory ta
On Thu, 24 Jan 2019 16:07:17 -0700
Keith Busch wrote:
> Systems may provide different memory types and export this information
> in the ACPI Heterogeneous Memory Attribute Table (HMAT). Parse these
> tables provided by the platform and report the memory access and caching
> attributes to the kern
From: Thierry Reding
If the system was booted using a device tree and if the device tree
contains a MAC address, use it instead of reading one from the EEPROM.
This is useful in situations where the EEPROM isn't properly programmed
or where the firmware wants to override the existing MAC address.
From: Thierry Reding
Read MAC address 32-bit at a time and manually extract the individual
bytes. This avoids pointer aliasing and gives the compiler a better
chance of optimizing the operation.
Suggested-by: Andrew Lunn
Signed-off-by: Thierry Reding
---
Applies to net-next.
I tested this on
On Thu, 24 Jan 2019 16:07:14 -0700
Keith Busch wrote:
> == Changes since v4 ==
>
> All public interfaces have kernel docs.
>
> Renamed "class" to "access", docs and changed logs updated
> accordingly. (Rafael)
>
> The sysfs hierarchy is altered to put initiators and targets in their
>
The memblock API provides dedicated helpers to set or clear a flag on a
memory region, e.g. memblock_{mark,clear}_hotplug().
The memblock_{set,clear}_region_flags() functions are used only by the
memblock internal function that adjusts the region flags.
Drop these functions and use open-coded impl
Hi,
On 06/02/19 5:55 PM, Maxime Ripard wrote:
> Hi Kishon,
>
> On Wed, Feb 06, 2019 at 05:43:12PM +0530, Kishon Vijay Abraham I wrote:
>> On 05/02/19 2:16 PM, Daniel Vetter wrote:
>>> On Mon, Feb 04, 2019 at 03:33:31PM +0530, Kishon Vijay Abraham I wrote:
On 21/01/19 9:15 PM, Maxim
On Wed, Feb 06, 2019 at 01:30:17PM +0100, Thierry Reding wrote:
> From: Thierry Reding
>
> If the system was booted using a device tree and if the device tree
> contains a MAC address, use it instead of reading one from the EEPROM.
> This is useful in situations where the EEPROM isn't properly pr
On Wed, Feb 06, 2019 at 01:30:18PM +0100, Thierry Reding wrote:
> From: Thierry Reding
>
> Read MAC address 32-bit at a time and manually extract the individual
> bytes. This avoids pointer aliasing and gives the compiler a better
> chance of optimizing the operation.
>
> Suggested-by: Andrew Lu
Em Wed, Jan 09, 2019 at 11:18:33AM +0200, Adrian Hunter escreveu:
> The compiler might optimize a call/ret combination by making it a jmp.
> However the thread-stack does not presently cater for that, so that such
> control flow is not visible in the call graph. Make it visible by recording
> on th
06.02.2019 1:46, Sowjanya Komatineni пишет:
> This patch adds DMA support for Tegra I2C.
>
> Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
> transfer size of the max FIFO depth and DMA mode is used for
> transfer size higher than max FIFO depth to save CPU overhead.
>
> PIO mode
On Wed, Feb 06, 2019 at 12:07:30PM +0100, Uwe Kleine-König wrote:
> On Wed, Feb 06, 2019 at 04:18:47PM +0530, Yash Shah wrote:
> > On Wed, Jan 30, 2019 at 1:44 PM Uwe Kleine-König
> > wrote:
> > >
> > > On Tue, Jan 29, 2019 at 05:13:18PM +0530, Yash Shah wrote:
> > > > DT documentation for PWM con
On 31/01/19 7:08 PM, Bartosz Golaszewski wrote:
> diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
> index 67805ca74ff8..b9aec3c48a6a 100644
> --- a/arch/arm/mach-davinci/cp_intc.c
> +++ b/arch/arm/mach-davinci/cp_intc.c
> @@ -19,6 +19,7 @@
> #include
> #include
>
Hi,
On 04/02/19 11:40 PM, Jeffrey Hugo wrote:
> On 2/4/2019 10:39 AM, Marc Gonzalez wrote:
>> Use same init sequence as sdm845.
>>
>> Signed-off-by: Marc Gonzalez
>> ---
>
> Reviewed-by: Jeffrey Hugo
I don't seem to have the dt-binding patch in my inbox. Can you resend them
please?
Thanks
Ki
On Tue, Feb 05, 2019 at 10:57:19PM +0200, Jarkko Sakkinen wrote:
> On Tue, Feb 05, 2019 at 02:56:02PM +, Winkler, Tomas wrote:
> >
> >
> > > -Original Message-
> > > From: Jarkko Sakkinen [mailto:jarkko.sakki...@linux.intel.com]
> > > Sent: Tuesday, February 05, 2019 16:36
> > > To: W
On Tue, Jan 29, 2019 at 05:13:19PM +0530, Yash Shah wrote:
[...]
> diff --git a/drivers/pwm/pwm-sifive.c b/drivers/pwm/pwm-sifive.c
[...]
> +static void pwm_sifive_update_clock(struct pwm_sifive_ddata *pwm,
> + unsigned long rate)
> +{
> + /* (1 << (16+scale)) *
On Wed, Feb 06, 2019 at 03:40:52PM +0300, Dmitry Osipenko wrote:
> 06.02.2019 1:46, Sowjanya Komatineni пишет:
> > This patch adds DMA support for Tegra I2C.
> >
> > Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
> > transfer size of the max FIFO depth and DMA mode is used for
> >
> TEGRA_I2C_TIMEOUT);
> > tegra_i2c_mask_irq(i2c_dev, int_mask); @@ -814,6 +1133,7 @@ static
> > int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
> > time_left, completion_done(&i2c_dev->msg_complete),
> > i2c_dev->msg_err);
> >
> > + i2c_dev->is
Borislav Petkov writes:
>> @@ -213,7 +213,7 @@ static void mem_avoid_memmap(char *str)
>> i++;
>> }
>>
>> -/* More than 4 memmaps, fail kaslr */
>> +/* Can't store all regions, fail kaslr */
>> if ((i >= MAX_MEMMAP_REGIONS) && str)
>> memmap_too_large
Hi Lorenzo,
On 04/02/19 10:10 PM, Lorenzo Pieralisi wrote:
> On Mon, Jan 14, 2019 at 06:54:00PM +0530, Kishon Vijay Abraham I wrote:
>> Add PCIe RC support for TI's AM654 SoC. The PCIe controller in AM654
>> uses Synopsys core revision 4.90a and uses the same TI wrapper as used
>> in keystone2 wit
On 06/02/2019 13:39, Kishon Vijay Abraham I wrote:
> I don't seem to have the dt-binding patch in my inbox. Can you resend them
> please?
Jeffrey pointed out a few deficiencies in the series.
I'll CC you on the entire upcoming v4 series.
Regards.
The bug manifests by mdX_raid1 and other related tasks being blocked.
It is triggered by LVM RAID, but is not caused by it. I have also
triggered it by LVM + mdraid, but only once. It is more frequent by
LVM RAID.
It does not occur in the master branch, but it does in 4.20.y, 4.19.y,
4.18.y.
Paolo Bonzini writes:
> Alternatively, it is probably a good time to switch the default to split
> irqchip
> in QEMU. Split irqchip was introduced in kernel 4.5, which was released about
> three years ago.
I totally agree. At some point, the in-kernel PIT/PIC emulation should
also be removed,
On Wed, Feb 06, 2019 at 09:54:05AM +0100, Uwe Kleine-König wrote:
> On Wed, Feb 06, 2019 at 09:42:48AM +0100, Fabrice Gasnier wrote:
> > If you agree with the current approach, I can send a V2 with Tomasz's
> > suggestion to remove the ifdefs and use __maybe_unused instead.
>
> I think the suspend
()
>
> On Tue, Feb 05, 2019 at 10:57:19PM +0200, Jarkko Sakkinen wrote:
> > On Tue, Feb 05, 2019 at 02:56:02PM +, Winkler, Tomas wrote:
> > >
> > >
> > > > -Original Message-
> > > > From: Jarkko Sakkinen [mailto:jarkko.sakki...@linux.intel.com]
> > > > Sent: Tuesday, February 05, 2
On 2/5/19 3:49 PM, Michael S. Tsirkin wrote:
> On Mon, Feb 04, 2019 at 03:18:52PM -0500, Nitesh Narayan Lal wrote:
>> This patch enables the caller to expose a single buffers to the
>> other end using vring descriptor. It also allows the caller to
>> perform this action in synchornous manner by us
On Wed, Feb 06, 2019 at 11:57:18AM +0100, Roberto Sassu wrote:
> Update
>
> This version of the patch set includes three additional patches (5-7/7)
> that allow users of the TPM driver to provide a digest for each PCR bank to
> tpm_pcr_extend(). The new patches have been included to facilitate the
06.02.2019 14:55, Dmitry Osipenko пишет:
> 06.02.2019 1:46, Sowjanya Komatineni пишет:
>> This patch adds DMA support for Tegra I2C.
>>
>> Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
>> transfer size of the max FIFO depth and DMA mode is used for
>> transfer size higher than max
06.02.2019 15:48, Thierry Reding пишет:
> On Wed, Feb 06, 2019 at 03:40:52PM +0300, Dmitry Osipenko wrote:
>> 06.02.2019 1:46, Sowjanya Komatineni пишет:
>>> This patch adds DMA support for Tegra I2C.
>>>
>>> Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
>>> transfer size of the m
On Wed, 6 Feb 2019 at 13:10, Rafael J. Wysocki wrote:
>
> On Wed, Feb 6, 2019 at 12:24 PM Ulf Hansson wrote:
> >
> > On Wed, 6 Feb 2019 at 10:56, Rafael J. Wysocki wrote:
> > >
> > > On Tue, Feb 5, 2019 at 12:27 PM Rafael J. Wysocki
> > > wrote:
> > > >
> > > > On Tuesday, February 5, 2019 9:1
Wed, Feb 06, 2019 at 12:53:15AM CET, f.faine...@gmail.com wrote:
>In preparation for getting rid of switchdev_ops, create a dedicated NDO
>operation for getting the port's parent identifier. There are
>essentially two classes of drivers that need to implement getting the
>port's parent ID which are
Vaibhav,
> Martin, should I resend the patch with this fixed ?
No need, I fixed it up yesterday.
--
Martin K. Petersen Oracle Linux Engineering
On 05/02/19 3:51 AM, David Lechner wrote:
> On 1/31/19 7:38 AM, Bartosz Golaszewski wrote:
>> From: Bartosz Golaszewski
>>
>> In order to select SPARSE_IRQ we need to make the interrupt numbers
>> dynamic (at least at build-time for the top-level controller). The
>> interrupt numbers are used as a
> BTW, I'm seeing "atmel_mxt_ts 0-004c: Warning: Info CRC error -
> device=0xF436DC file=0x00" whithout making any modifications to the
> original patch as well and it shall not happen, hence there is bug somewhere.
> Probably FIFO triggers are still not set up correctly... ?
>
>
In snippet
06.02.2019 16:03, Sowjanya Komatineni пишет:
>> BTW, I'm seeing "atmel_mxt_ts 0-004c: Warning: Info CRC error -
>> device=0xF436DC file=0x00" whithout making any modifications to the
>> original patch as well and it shall not happen, hence there is bug
>> somewhere. Probably FIFO triggers ar
06.02.2019 15:49, Sowjanya Komatineni пишет:
>
>> TEGRA_I2C_TIMEOUT);
>>> tegra_i2c_mask_irq(i2c_dev, int_mask); @@ -814,6 +1133,7 @@ static
>>> int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev,
>>> time_left, completion_done(&i2c_dev->msg_complete),
>>>
On 2/6/2019 1:57 PM, Jarkko Sakkinen wrote:
On Wed, Feb 06, 2019 at 11:57:18AM +0100, Roberto Sassu wrote:
Update
This version of the patch set includes three additional patches (5-7/7)
that allow users of the TPM driver to provide a digest for each PCR bank to
tpm_pcr_extend(). The new patches
Hi Brian!
I found one more bug in this patch, still not the last bug but I'm still
digging around:
On Fri, Jan 25, 2019 at 5:23 PM Brian Masney wrote:
> +struct pm_irq_data {
> + int num_irqs;
> + struct irq_chip *irq_chip;
> + void (*irq_handler)(struct irq_desc *desc);
> +};
On Wed, Feb 06, 2019 at 02:55:01PM +0300, Dmitry Osipenko wrote:
> 06.02.2019 1:46, Sowjanya Komatineni пишет:
> > This patch adds DMA support for Tegra I2C.
> >
> > Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
> > transfer size of the max FIFO depth and DMA mode is used for
> >
Wed, Feb 06, 2019 at 12:53:16AM CET, f.faine...@gmail.com wrote:
>BNXT only supports SWITCHDEV_ATTR_ID_PORT_PARENT_ID, which makes it a
>great candidate to be converted to use the ndo_get_port_parent_id() NDO
>instead of implementing switchdev_port_attr_get(). The conversion is
>straight forward he
On Wed, Feb 6, 2019 at 2:06 PM Stefan Mavrodiev wrote:
>
>
> On 2/5/19 6:16 PM, Chen-Yu Tsai wrote:
> > On Thu, Jan 31, 2019 at 4:25 PM Stefan Mavrodiev wrote:
> >> Add dt node for axp20x-led driver controlling CHGLED.
> >> Default status is disabled, since it may be not used.
> >>
> >> Signed-of
On Wed, Feb 06, 2019 at 02:09:09PM +0100, Thierry Reding wrote:
> On Wed, Feb 06, 2019 at 02:55:01PM +0300, Dmitry Osipenko wrote:
[...]
> > Sowjanya, I tried to enforce DMA transferring + setting DMA burst to a one
> > word and this combination doesn't work well while it should, if I'm not
> > m
On Wed, 6 Feb 2019 07:56:37 -0500
Nitesh Narayan Lal wrote:
> On 2/5/19 3:49 PM, Michael S. Tsirkin wrote:
> > On Mon, Feb 04, 2019 at 03:18:52PM -0500, Nitesh Narayan Lal wrote:
> >> This patch enables the caller to expose a single buffers to the
> >> other end using vring descriptor. It also
Light Ridge has an issue where reading the next capability pointer
location in port config space the read data is not cleared. It is fine
to read capabilities each after another so only thing we need to do is
to make sure we issue dummy read after tb_port_find_cap() is finished to
avoid the issue i
Currently the software connection manager (tb.c) has only supported
creating a single PCIe tunnel, no PCIe device daisy chaining has been
supported so far. This updates the software connection manager so that
it now can create PCIe tunnels for full chain of six devices.
Signed-off-by: Mika Westerb
In order to tunnel non-PCIe traffic as well rename tunnel_pci.[ch] to
tunnel.[ch] to reflect this fact. No functional changes.
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/Makefile | 2 +-
drivers/thunderbolt/tb.c | 2 +-
drivers/thunderbolt/{tun
The XDomain protocol messages may start as soon as Thunderbolt control
channel is started. This means that if the other host starts sending
ThunderboltIP packets early enough they will be passed to the network
driver which then gets confused because its resume hook is not called
yet.
Fix this by u
Replace the license boiler plate with a SPDX license identifier.
Signed-off-by: Paul E. McKenney
---
kernel/rcu/sync.c | 15 +--
1 file changed, 1 insertion(+), 14 deletions(-)
diff --git a/kernel/rcu/sync.c b/kernel/rcu/sync.c
index be10036fa621..a8304d90573f 100644
--- a/kernel/rc
Display Port tunnels are somewhat more complex than PCIe tunnels as it
requires 3 tunnels (AUX Rx/Tx and Video). In addition we are not
supposed to create the tunnels immediately when a DP OUT is enumerated.
Instead we need to wait until we get hotplug event to that adapter port
or check if the por
Currently ICM has been handling XDomain UUID exchange so there was no
need to have it in the driver yet. However, since now we are going to
add the same capabilities to the software connection manager it needs to
be handled properly.
For this reason modify the driver XDomain protocol handling so t
Two domains (hosts) can be connected through a Thunderbolt cable and in
that case they can start software services such as networking over the
high-speed DMA paths. Now that we have all the basic building blocks in
place to create DMA tunnels over the Thunderbolt fabric we can add this
support to t
Replace the license boiler plate with a SPDX license identifier.
Signed-off-by: Paul E. McKenney
---
include/linux/rcu_sync.h | 15 +--
1 file changed, 1 insertion(+), 14 deletions(-)
diff --git a/include/linux/rcu_sync.h b/include/linux/rcu_sync.h
index ece7ed9a4a70..5890da7a38b8 1
> >> BTW, I'm seeing "atmel_mxt_ts 0-004c: Warning: Info CRC error -
> >> device=0xF436DC file=0x00" whithout making any modifications to the
> >> original patch as well and it shall not happen, hence there is bug
> >> somewhere. Probably FIFO triggers are still not set up correctly... ?
>
Now that the driver can handle every possible tunnel types there is no
point to log everything as info level so turn these to happen at debug
level instead.
While at it remove duplicated tunnel activation log message
(tb_tunnel_activate() calls tb_tunnel_restart() which print the same
message).
S
We will be needing these routines to find Display Port adapters as well
so modify them to take port type as the second parameter.
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/switch.c | 16
drivers/thunderbolt/tb.c | 35 +--
drivers/
In order to detect possible connections to other domains we need to be
able to find out why tb_switch_alloc() fails so make it return ERR_PTR()
instead. This allows the caller to differentiate between errors such as
-ENOMEM which comes from the kernel and for instance -EIO which comes
from the hard
In Apple Macs the boot firmware (EFI) connects all devices automatically
when the system is started, before it hands over to the OS. Instead of
ignoring we discover all those PCIe tunnels and record them using our
internal structures, just like we do when a device is connected after
the OS is alrea
In addition to PCIe and Display Port tunnels it is also possible to
create tunnels that forward DMA traffic from the host interface adapter
(NHI) to a NULL port that is connected to another domain through a
Thunderbolt cable. These tunnels can be used to carry software messages
such as networking p
Titan Ridge flow to start the firmware is the same as Alpine Ridge so we
can do the same on Titan Ridge based Apple systems.
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/icm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/thunderbolt/icm.c b/drivers/thunderbolt/icm.c
in
We can't be sure the paths are actually properly deactivated when a
tunnel is restarted after resume. So instead of marking all paths as
inactive we go ahead and deactivate them explicitly.
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/tunnel.c | 9 -
1 file changed, 8 insertion
NFC (non flow control) credits is actually 20-bit field so update
tb_port_add_nfc_credits() to handle this properly. This allows us to set
NFC credits for Display Port path in subsequent patches.
Also make sure the function does not update the hardware if the
underlying switch is already unplugged
06.02.2019 16:13, Thierry Reding пишет:
[snip]
>> That's odd because it suggests that DMA actually completed, but the
>> message didn't.
>>
>> I'm not sure I understand how that could happen.
>>
>> What's also weird above is that there doesn't seem to be a DMA that
>> is started for that particul
The only way to expand Thunderbolt topology is through the NULL adapter
ports (typically ports 1, 2, 3 and 4). There is no point handling
Thunderbolt hotplug events on any other port.
Add a helper function (tb_port_is_null()) that can be used to determine
if the port is NULL port, and use it in so
On Wed, Feb 06, 2019 at 12:55:55PM +, Winkler, Tomas wrote:
> > Fixed comments and applied the patch, thank you. Do I amend your acked-by?
>
> Please, do.
> Thanks
> Tomas
Great, thank you.
/Jarkko
Thunderbolt 2 devices and beyond need to have additional bits set in
link controller specific registers. This includes two bits in LC_SX_CTRL
that tell the link controller which lane is connected and whether it is
upstream facing or not.
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/lc.
Maximum depth in Thunderbolt topology is 6 so make sure it is not
possible to allocate switches that exceed the depth limit.
While at it update tb_switch_alloc() to use upper/lower_32_bits()
following tb_switch_alloc_safe_mode().
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/icm.c|
Wed, Feb 06, 2019 at 12:53:17AM CET, f.faine...@gmail.com wrote:
>Liquidio only supports SWITCHDEV_ATTR_ID_PORT_PARENT_ID, which makes it
>a great candidate to be converted to use the ndo_get_port_parent_id()
>NDO instead of implementing switchdev_port_attr_get().
>
>Signed-off-by: Florian Fainelli
Replace the license boiler plate with a SPDX license identifier.
While in the area, update an email address.
Signed-off-by: Paul E. McKenney
---
include/linux/srcu.h | 17 ++---
include/linux/srcutiny.h | 17 ++---
include/linux/srcutree.h | 17 ++---
3 fi
Replace the license boiler plate with a SPDX license identifier.
While in the area, update an email address.
Signed-off-by: Paul E. McKenney
---
include/linux/rcu_node_tree.h | 17 ++---
1 file changed, 2 insertions(+), 15 deletions(-)
diff --git a/include/linux/rcu_node_tree.h b/in
Thunderbolt 2 devices and beyond link controller needs to be notified
when a switch is going to be suspended by setting bit 31 in LC_SX_CTRL
register. Add this functionality to the software connection manager.
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/lc.c | 44
Replace the license boiler plate with a SPDX license identifier.
While in the area, update an email address.
Signed-off-by: Paul E. McKenney
---
kernel/locking/locktorture.c | 19 +++
1 file changed, 3 insertions(+), 16 deletions(-)
diff --git a/kernel/locking/locktorture.c b/ke
Wed, Feb 06, 2019 at 12:53:18AM CET, f.faine...@gmail.com wrote:
>mlx5e only supports SWITCHDEV_ATTR_ID_PORT_PARENT_ID, which makes it a
>great candidate to be converted to use the ndo_get_port_parent_id() NDO
>instead of implementing switchdev_port_attr_get().
>
>Since mlx5e makes use of switchdev
Replace the license boiler plate with a SPDX license identifier.
While in the area, update an email address.
Signed-off-by: Paul E. McKenney
---
kernel/rcu/srcutiny.c | 17 ++---
kernel/rcu/srcutree.c | 17 ++---
2 files changed, 4 insertions(+), 30 deletions(-)
diff --g
Replace the license boiler plate with a SPDX license identifier.
While in the area, update an email address.
Signed-off-by: Paul E. McKenney
---
kernel/rcu/rcu.h | 17 ++---
1 file changed, 2 insertions(+), 15 deletions(-)
diff --git a/kernel/rcu/rcu.h b/kernel/rcu/rcu.h
index 75787
We run all XDomain requests during discovery in tb->wq and since it only
runs one work at the time it means that sending back reply to the other
domain may be delayed too much depending whether there is an active
XDomain discovery request running.
To make sure we can send reply to the other domain
Replace the license boiler plate with a SPDX license identifier.
While in the area, update an email address.
Signed-off-by: Paul E. McKenney
---
kernel/rcu/rcuperf.c | 19 +++
1 file changed, 3 insertions(+), 16 deletions(-)
diff --git a/kernel/rcu/rcuperf.c b/kernel/rcu/rcuperf
Replace the license boiler plate with a SPDX license identifier.
While in the area, update an email address.
Signed-off-by: Paul E. McKenney
---
include/linux/rcutree.h | 19 +++
1 file changed, 3 insertions(+), 16 deletions(-)
diff --git a/include/linux/rcutree.h b/include/linu
We need to be able to walk from one port to another when we are creating
paths where there are multiple switches between two ports. For this
reason introduce a new function tb_port_get_next() and a new macro
tb_for_each_port().
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/switch.c | 60
The adapter specific capability either is there or not if the port does
not hold an adapter. Instead of always finding it on-demand we read the
offset just once when the port is initialized.
While there we update the struct port documentation to follow kernel-doc
format.
Signed-off-by: Mika Weste
Hello!
This series makes SPDX and email-address changes to RCU source files.
Thanx, Paul
include/linux/rcu_node_tree.h | 17 ++---
include/linux/rcu_se
Replace the license boiler plate with a SPDX license identifier.
While in the area, update an email address.
Signed-off-by: Paul E. McKenney
---
include/linux/torture.h | 17 ++---
1 file changed, 2 insertions(+), 15 deletions(-)
diff --git a/include/linux/torture.h b/include/linux/
Replace the license boiler plate with a SPDX license identifier.
While in the area, update an email address.
Signed-off-by: Paul E. McKenney
---
include/linux/rcu_segcblist.h | 17 ++---
1 file changed, 2 insertions(+), 15 deletions(-)
diff --git a/include/linux/rcu_segcblist.h b/in
To be able to tunnel non-PCIe traffic, separate tunnel functionality
into generic and PCIe specific parts. Rename struct tb_pci_tunnel to
tb_tunnel, and make it hold an array of paths instead of just two.
Update all the tunneling functions to take this structure as parameter.
We also move tb_pci_p
Light Ridge and Eagle Ridge both need to have TMU access enabled before
port space can be fully accessed so make sure it happens on those. This
allows us to get rid of the offset quirk in tb_port_find_cap().
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/cap.c | 74 ++
Replace the license boiler plate with a SPDX license identifier.
While in the area, update an email address.
Signed-off-by: Paul E. McKenney
---
kernel/torture.c | 19 +++
1 file changed, 3 insertions(+), 16 deletions(-)
diff --git a/kernel/torture.c b/kernel/torture.c
index bbf
Each port has a separate path configuration space that is used for
finding the next hop (switch) in the path. Hop ID is an index to this
configuration space and hop IDs 0 - 7 are reserved.
In order to get next available hop ID for each direction we provide two
pairs of helper functions that can be
Now that we can allocate hop IDs per port on a path, we can take
advantage of this and create tunnels covering longer paths than just
between two adjacent switches. PCIe actually does not need this as it is
always a daisy chain between two adjacent switches but this way we do
not need to hard-code
Replace the license boiler plate with a SPDX license identifier.
While in the area, update an email address.
Signed-off-by: Paul E. McKenney
---
include/linux/rcutiny.h | 17 ++---
1 file changed, 2 insertions(+), 15 deletions(-)
diff --git a/include/linux/rcutiny.h b/include/linux/
We will be adding more link controller functionality in subsequent
patches and it does not make sense to keep all that in switch.c, so
separate LC functionality into its own file.
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/Makefile | 2 +-
drivers/thunderbolt/lc.c | 21 +++
We need to wait until all buffers have been drained before the path can
be considered disabled. Do this for every hop in a path. Also if the
switch is physically disconnected, do not bother disabling it anymore
(it is not present anyway).
This adds another bit field to struct tb_regs_hop even if w
Replace the license boiler plate with a SPDX license identifier.
While in the area, update an email address.
Signed-off-by: Paul E. McKenney
---
kernel/rcu/update.c | 17 ++---
1 file changed, 2 insertions(+), 15 deletions(-)
diff --git a/kernel/rcu/update.c b/kernel/rcu/update.c
in
Replace the license boiler plate with a SPDX license identifier.
While in the area, update an email address.
Signed-off-by: Paul E. McKenney
---
kernel/rcu/rcutorture.c | 19 +++
1 file changed, 3 insertions(+), 16 deletions(-)
diff --git a/kernel/rcu/rcutorture.c b/kernel/rcu/r
Replace the license boiler plate with a SPDX license identifier.
While in the area, update an email address.
Signed-off-by: Paul E. McKenney
---
kernel/rcu/tree.c| 19 +++
kernel/rcu/tree.h| 17 ++---
kernel/rcu/tree_exp.h| 17 ++---
ke
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