From: Matt Sealey
LZO leaves some performance on the table by not realising that arm64 can
optimize count-trailing-zeros bit operations.
Add CONFIG_ARM64 to the checked definitions alongside CONFIG_X86_64 to
enable the use of rbit/clz instructions on full 64-bit quantities.
Link: http://lkml.ke
Modify the ifdefs in lzodefs.h to be more consistent with normal kernel
macros (e.g., change __aarch64__ to CONFIG_ARM64).
Signed-off-by: Dave Rodgman
Cc: Herbert Xu
Cc: David S. Miller
Cc: Nitin Gupta
Cc: Richard Purdie
Cc: Markus F.X.J. Oberhumer
Cc: Minchan Kim
Cc: Sergey Senozhatsky
Cc
05.02.2019 11:56, Sowjanya Komatineni пишет:
> This patch adds DMA support for Tegra I2C.
>
> Tegra I2C TX and RX FIFO depth is 8 words. PIO mode is used for
> transfer size of the max FIFO depth and DMA mode is used for
> transfer size higher than max FIFO depth to save CPU overhead.
>
> PIO mod
On Tue, Feb 5, 2019 at 3:27 AM Dmitry Torokhov
wrote:
>
> Are there many more instances of this?
Unfortunately I think so.
A simple grep brings up a couple of candidates, but I'm sure there are more:
drivers/regulator/arizona-micsupp.c
drivers/nfc/port100.c
drivers/power/supply/max14656_charger_
05.02.2019 11:56, Sowjanya Komatineni пишет:
> This patch adds I2C interface timing registers support for
> proper bus rate configuration along with meeting the i2c spec
> setup and hold times based on the tuning performed on Tegra210,
> Tegra186 and Tegra194 platforms.
>
> I2C_INTERFACE_TIMING_0
On Tue, Feb 05, 2019 at 11:07:16AM +, Winkler, Tomas wrote:
> > The current approach to read first 6 bytes from the response and then tail
> > of
> > the response, can cause the 2nd memcpy_fromio() to do an unaligned read
> > (e.g. read 32-bit word from address aligned to a 16-bits), depending
With lazy-FPU support the (now named variable) ->initialized was set to true if
the CPU's FPU registers were holding the a valid state of the FPU registers for
the active process. If it was set to false then the FPU state was saved in
fpu->state and the FPU was deactivated.
With lazy-FPU gone, ->in
Hi Wen,
Wen Yang wrote on Tue, 5 Feb 2019
14:32:41 +:
> of_find_device_by_node() takes a reference to the struct device
> when it finds a match via get_device, there is no need to call
> get_device() twice.
> We also should make sure to drop the reference to the device
> taken by of_find_dev
On Tue, Feb 05, 2019 at 09:56:05PM +0900, Takao Indoh wrote:
> On Fri, Feb 01, 2019 at 07:54:14AM -0700, Keith Busch wrote:
> > On Fri, Feb 01, 2019 at 09:46:15PM +0900, Takao Indoh wrote:
> > > From: Takao Indoh
> > >
> > > Fujitsu A64FX processor has a feature to accelerate data transfer of
> >
On Tue, Feb 05, 2019 at 05:54:45AM -0800, Guenter Roeck wrote:
> On 2/5/19 12:46 AM, Greg Kroah-Hartman wrote:
> > On Mon, Feb 04, 2019 at 01:44:44PM -0800, Guenter Roeck wrote:
> > > On Mon, Feb 04, 2019 at 11:36:15AM +0100, Greg Kroah-Hartman wrote:
> > > > This is the start of the stable review
On Mon, Feb 04, 2019 at 02:48:17PM -0800, Guenter Roeck wrote:
> On Mon, Feb 04, 2019 at 11:35:53AM +0100, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 4.4.173 release.
> > There are 65 patches in this series, all will be posted as a response
> > to this one.
On Tue, Feb 05, 2019 at 10:20:50AM +, Jon Hunter wrote:
>
> On 04/02/2019 10:36, Greg Kroah-Hartman wrote:
> > This is the start of the stable review cycle for the 4.14.98 release.
> > There are 46 patches in this series, all will be posted as a response
> > to this one. If anyone has any iss
On Tue, Feb 05, 2019 at 11:50:57AM +0530, Naresh Kamboju wrote:
> On Mon, 4 Feb 2019 at 16:20, Greg Kroah-Hartman
> wrote:
> >
> > This is the start of the stable review cycle for the 4.20.7 release.
> > There are 80 patches in this series, all will be posted as a response
> > to this one. If any
On Wed, Jan 30, 2019 at 05:40:03PM +0100, Julian Stecklina wrote:
> From: Julian Stecklina
>
> The boot code has a limit of 4 "non-standard" regions to avoid for
> KASLR. This limit is easy to reach when supplying memmap= parameters to
> the kernel. In this case, KASLR would be disabled.
>
> Inc
On 07.01.2019 19:57, Konstantin Khlebnikov wrote:
I've got couple of these for 4.14.
Maybe related but this happened with THP tmpfs.
<1>[220723.475439] huge_memory: total_mapcount: 63, page_count(): 576
<0>[220723.475474] page:ea0024ee8000 count:576 mapcount:0
mapping:881813235550 ind
On Tue, Feb 05, 2019 at 04:33:27AM -0800, Rafael J. Wysocki wrote:
> On Fri, Jan 25, 2019 at 12:08 AM Keith Busch wrote:
> > +/**
> > + * struct node_access_nodes - Access class device to hold user visible
> > + * relationships to other nodes.
> > + * @dev: Device f
On Tue, Feb 5, 2019 at 2:17 PM Eric W. Biederman wrote:
>
>
> Since 2.5.34 the code has had the potential to not allocate siginfo
> for SIGSTOP signals. Except for ptrace this is perfectly fine as only
> ptrace can use PTRACE_PEEK_SIGINFO and see what the contents of
> the delivered siginfo are.
On Tue, Feb 05, 2019 at 01:33:27PM +0100, Rafael J. Wysocki wrote:
> > +/**
> > + * struct node_access_nodes - Access class device to hold user visible
> > + * relationships to other nodes.
> > + * @dev: Device for this memory access class
> > + * @list_node: List el
On Tue, Feb 05, 2019 at 05:24:11AM -0800, John Garry wrote:
> On 04/02/2019 07:12, Hannes Reinecke wrote:
>
> Hi Hannes,
>
> >
> > So, as the user then has to wait for the system to declars 'ready for
> > CPU remove', why can't we just disable the SQ and wait for all I/O to
> > complete?
> > We c
> -Original Message-
> From: Jarkko Sakkinen [mailto:jarkko.sakki...@linux.intel.com]
> Sent: Tuesday, February 05, 2019 16:36
> To: Winkler, Tomas
> Cc: linux-integr...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-
> security-mod...@vger.kernel.org; sta...@vger.kernel.org; Jame
[ + Catalin, Will ]
Hi Julien,
On Thu, 31 Jan 2019 14:53:57 +,
Julien Thierry wrote:
>
> Hi,
>
> This patch series provides a way for irqchips to define some IRQs as NMIs.
>
> Updating this series as it is needed for the arm64 pseudo-NMI which we
> are considering to merge (I'll post a ne
On Mon, Feb 4, 2019 at 10:09 PM Sven Van Asbroeck wrote:
>
> I think there _might_ be potential use-after-free issues on module unload.
>
> They are hard to trigger, but I think I've seen them bring the whole
> kernel down when they do occur. Can be triggered by doing an insmod of
> a vulnerable m
On Thu, 31 Jan 2019 at 03:01, Bjorn Andersson
wrote:
>
> On the Qualcomm SDM845 platform the apb_pclk is controlled as part of
> the QDSS power/clock domain. Handle this by allowing amba to operate
> without direct apb_pclk control, when a powerdomain is attached and no
> clock is described.
>
> S
On Mon, Feb 04, 2019 at 03:19:56PM -0500, Dennis Zhou wrote:
> Hi everyone,
>
> V2 had only a handful of changes outside of minor feedback.
> 0001:
> - use functions over macros
> 0003:
> - BTRFS_NR_WORKSPACE_MANAGERS is added instead of overriding
> BTRFS_COMPRESS_TYPES
> 0011 (new):
> - addres
On the Bananapi M3 and Cubietruck Plus, the DC input jacks are wired to
the ACIN pins, which is represented by the AC power supply. Both boards
have connectors for LiPo batteries, which are represented by the battery
power supply.
The H8 Homlet is a set-top box design. The DC input jack is wired t
On these A64 devices, the DC input jacks are wired to the ACIN pins of
the PMIC, which is represented by the AC power supply. With the
exception of the Nanopi A64, all devices include LiPo batteries or have
connectors for them, which are represented by the battery power supply.
Enable these power
On 14/01/2019 09:41, Christoph Hellwig wrote:
The current iommu_dma_mmap code does not properly handle memory from the
page allocator that hasn't been remapped, which can happen in the rare
case of allocations for a coherent device that aren't allowed to block.
Fix this by replacing iommu_dma_mm
On Mon, Feb 4, 2019 at 9:52 PM Mathieu Desnoyers
wrote:
>
> commit e46daee53bb5 "ARM: 8806/1: kprobes: Fix false positive with
> FORTIFY_SOURCE"
> introduced a regression in optimized kprobes. It triggers "invalid
> instruction" oopses when using kprobes instrumentation through lttng and
> perf.
Hi Boris and all,
On Sun, Nov 11, 2018 at 08:45:57AM -0500, Masayoshi Mizuma wrote:
> On Sat, Nov 10, 2018 at 11:54:22AM +0100, Borislav Petkov wrote:
> > On Thu, Nov 08, 2018 at 11:51:29AM +0100, Borislav Petkov wrote:
> > > A global definition which doesn't need allocation?
> > >
> > > Maybe hp
This patch corrects the style for SPDX license Identifier in mac.h
by using "/* */" in place of "//" as per Linux kernel licensing rules.
Issue found by checkpatch.
Signed-off-by: Nishad Kamdar
---
drivers/staging/vt6656/mac.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
On Mon, Feb 4, 2019 at 7:15 PM Mathieu Desnoyers
wrote:
>
> Hi,
>
> I notice this commit as a possible culprit of the illegal instructions my
> lttng
> users are noticing on arm32 when using kprobes on a v4.19.13 Linux kernel
> in a Yocto environment [1]. They were able to reproduce the issue wit
Hi Roger,
On 02/05/2019 04:39 AM, Roger Quadros wrote:
Hi Tony & Suman,
On 04/02/19 18:33, Tony Lindgren wrote:
Hi,
* Roger Quadros [190204 14:23]:
From: Suman Anna
...
+Example:
+
+1. /* AM33xx PRU-ICSS */
+
+ pruss: pruss@0 {
+ compatible = "ti,am3356-pr
e Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git
tags/perf-urgent-for-mingo-5.0-20190205
for you to fetch changes up to 8f2f350cbdb2c2fbff654cb778139144b48a59ba:
perf script python: Add Python3 support to tests/attr.py (2019-02-05 10:31:08
From: Arnaldo Carvalho de Melo
Those aren't present in Alpine Linux 3.4 to edge, so provide fallback
defines to get the next patch building there keeping the build
bisectable.
Cc: Adrian Hunter
Cc: Alexander Shishkin
Cc: Jiri Olsa
Cc: Masami Hiramatsu
Cc: Michael Petlan
Cc: Namhyung Kim
Cc
From: "Gustavo A. R. Silva"
Notice that the use of the bitwise OR operator '|' always leads to true
in this particular case, which seems a bit suspicious due to the context
in which this expression is being used.
Fix this by using bitwise AND operator '&' instead.
This bug was detected with the
From: Ravi Bangoria
PowerPC hardware does not have a builtin latency filter (--ldlat) for
the "mem-load" event and perf_mem_events by default includes
"/ldlat=30/" which is causing a failure on PowerPC. Refactor the code to
support "perf mem/c2c" on PowerPC.
This patch depends on kernel side cha
From: Arnaldo Carvalho de Melo
It prevents copy elision, generating this warning when building with
fedora:rawhide's clang:
clang version 7.0.1 (Fedora 7.0.1-2.fc30)
Target: x86_64-unknown-linux-gnu
Thread model: posix
InstalledDir: /usr/bin
Found candidate GCC installation: /usr/bin/.
From: Arnaldo Carvalho de Melo
To get the changes in this cset:
f275ee0fa3a0 ("IN_BADCLASS: fix macro to actually work")
The macros changed in this cset are not used in tools/, so this is just
to silence this perf tools build warning:
Warning: Kernel ABI header at 'tools/include/uapi/linux
From: Jiri Olsa
When perf is built with the annobin plugin (RHEL8 build) extra symbols
are added to its binary:
# nm perf | grep annobin | head -10
00241100 t .annobin_annotate.c
00326490 t .annobin_annotate.c
00249255 t .annobin_annotate.c_end
003283a8
From: Tony Jones
Support both Python 2 and Python 3 in tests/attr.py
The use of "except as" syntax implies the minimum supported Python2 version is
now v2.6
Committer testing:
$ make -C tools/perf PYTHON3=python install-bin
Before:
# perf test attr
16: Setup struct perf_event_attr
From: Arnaldo Carvalho de Melo
With a suitably defined "probe:vfs_getname" probe, 'perf trace' can
"beautify" its output, so syscalls like open() or openat() can print the
"filename" argument instead of just its hex address, like:
$ perf trace -e open -- touch /dev/null
[...]
0.590 (
On Sun, Feb 3, 2019 at 8:07 AM Christopher Diaz Riveros
wrote:
>
> Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
Maxime's reply to the patch "drm/sun4i: hdmi: Use PTR_ERR_OR_ZERO
in sun4i_tmds_create()" [1] probably applies to this one as well:
"""
While this is technically correct (
On Thu, Jan 31, 2019 at 1:03 PM Abel Vesa wrote:
>
> Add RTC support for i.MX8MQ.
>
> Signed-off-by: Abel Vesa
Reviewed-by: Fabio Estevam
On 05/02/2019 14:52, Keith Busch wrote:
On Tue, Feb 05, 2019 at 05:24:11AM -0800, John Garry wrote:
On 04/02/2019 07:12, Hannes Reinecke wrote:
Hi Hannes,
So, as the user then has to wait for the system to declars 'ready for
CPU remove', why can't we just disable the SQ and wait for all I/O
On 2/5/19 3:52 PM, Keith Busch wrote:
On Tue, Feb 05, 2019 at 05:24:11AM -0800, John Garry wrote:
On 04/02/2019 07:12, Hannes Reinecke wrote:
Hi Hannes,
So, as the user then has to wait for the system to declars 'ready for
CPU remove', why can't we just disable the SQ and wait for all I/O to
On Tue, Feb 05, 2019 at 03:09:28PM +, John Garry wrote:
> On 05/02/2019 14:52, Keith Busch wrote:
> > On Tue, Feb 05, 2019 at 05:24:11AM -0800, John Garry wrote:
> > > On 04/02/2019 07:12, Hannes Reinecke wrote:
> > >
> > > Hi Hannes,
> > >
> > > >
> > > > So, as the user then has to wait fo
On 2/5/19 6:42 AM, Greg Kroah-Hartman wrote:
On Mon, Feb 04, 2019 at 02:48:17PM -0800, Guenter Roeck wrote:
On Mon, Feb 04, 2019 at 11:35:53AM +0100, Greg Kroah-Hartman wrote:
This is the start of the stable review cycle for the 4.4.173 release.
There are 65 patches in this series, all will be
On 2/5/19 1:09 AM, Matti Vaittinen wrote:
Initial support for watchdog block included in ROHM BD70528
power management IC.
Configurations for low power states are still to be checked.
Signed-off-by: Matti Vaittinen
Acked-by: Guenter Roeck
---
Please note that I translated following comment:
On 2/5/19 4:09 PM, John Garry wrote:
On 05/02/2019 14:52, Keith Busch wrote:
On Tue, Feb 05, 2019 at 05:24:11AM -0800, John Garry wrote:
On 04/02/2019 07:12, Hannes Reinecke wrote:
Hi Hannes,
So, as the user then has to wait for the system to declars 'ready for
CPU remove', why can't we jus
Em Mon, Feb 04, 2019 at 10:47:03PM +0300, Alexey Budankov escreveu:
>
> On 04.02.2019 22:29, Arnaldo Carvalho de Melo wrote:
> > Em Tue, Jan 22, 2019 at 08:48:54PM +0300, Alexey Budankov escreveu:
> >>
> >> Allocate and bind AIO user space buffers to the memory nodes
> >> that mmap kernel buffers
On Tue, Feb 05, 2019 at 04:10:47PM +0100, Hannes Reinecke wrote:
> On 2/5/19 3:52 PM, Keith Busch wrote:
> > Whichever layer dispatched the IO to a CPU specific context should
> > be the one to wait for its completion. That should be blk-mq for most
> > block drivers.
> >
> Indeed.
> But we don't
On Tue, Feb 5, 2019 at 3:52 PM Greg Kroah-Hartman
wrote:
>
> On Tue, Feb 05, 2019 at 01:33:27PM +0100, Rafael J. Wysocki wrote:
> > > +/**
> > > + * struct node_access_nodes - Access class device to hold user visible
> > > + * relationships to other nodes.
> > > + * @dev:
On Thu, Jan 31, 2019 at 02:18:59PM -0500, Mimi Zohar wrote:
> Require signed kernel modules on systems with secure boot mode enabled.
>
> To coordinate between appended kernel module signatures and IMA
> signatures, only define an IMA MODULE_CHECK policy rule if
> CONFIG_MODULE_SIG is not enabled.
On 2/5/19 12:48 AM, Peter Zijlstra wrote:
> On Mon, Feb 04, 2019 at 12:46:30PM -0800, Dave Hansen wrote:
>> So, the compromise we reached in this case is that Intel will fully
>> document the future silicon architecture, and then write the kernel
>> implementation to _that_. Then, for the weirdo d
On 2/5/19 12:51 AM, Peter Zijlstra wrote:
> On Mon, Feb 04, 2019 at 01:09:12PM -0800, Fenghua Yu wrote:
>
>> Intel SDM published TODAY does have IA32_CORE_CAPABILITY MSR enumerateion
>> bit CPUID.0x7.0:EDX[30] now. Please check today's SDM for the bit:
>> https://software.intel.com/en-us/download/
On Tue, Feb 5, 2019 at 11:00 AM Miquel Raynal wrote:
>
> Hi Martin,
>
> Martin Kepplinger wrote on Tue, 29 Jan 2019
> 16:37:00 +0100:
>
> > From: Martin Kepplinger
> >
> > Disable BCH soft reset according to MX23 erratum #2847 ("BCH soft
> > reset may cause bus master lock up") for MX28 too. It
On 2/5/19 8:33 AM, Borislav Petkov wrote:
> On Mon, Feb 04, 2019 at 08:58:56PM +0100, Daniel Bristot de Oliveira wrote:
>> Move the check of the current code, before updating an entry, to specialized
>> functions. No changes in the method, only code relocation.
>>
>> Signed-off-by: Daniel Bristot d
On Tue, Feb 5, 2019 at 9:57 AM Kees Cook wrote:
>
>
> Can a Coccinelle script get written to find module-use of the non-devm
> work init?
My thoughts exactly ! But sadly I'm not a Coccinelle expert. I did
look briefly at
its syntax, but I didn't immediately "get" how Cocci could find this class o
Make platform data optional and add DT id table.
Switch to dynamically mapped GPIOs and IRQs if not provided
via platform data.
Signed-off-by: Nikolaus Voss
---
drivers/gpio/gpio-adp5588.c | 151
1 file changed, 68 insertions(+), 83 deletions(-)
diff --git a
Interupts were generated using GPIN interrupts of
ADP5588. These interrupts have two important limitations:
1. Interrupts can only be generated for either rising or
falling edges but not both.
2. Interrupts are reasserted as long as the interrupt condition
persists (i.e. high or low level on
Recently syzkaller was able to create unkillablle processes by
creating a timer that is delivered as a thread local signal on SIGHUP,
and receiving SIGHUP SA_NODEFERER. Ultimately causing a loop
failing to deliver SIGHUP but always trying.
Upon examination it turns out part of the problem is ac
On 05/02/2019 15:15, Hannes Reinecke wrote:
On 2/5/19 4:09 PM, John Garry wrote:
On 05/02/2019 14:52, Keith Busch wrote:
On Tue, Feb 05, 2019 at 05:24:11AM -0800, John Garry wrote:
On 04/02/2019 07:12, Hannes Reinecke wrote:
Hi Hannes,
So, as the user then has to wait for the system to dec
- On Feb 5, 2019, at 10:04 AM, Kees Cook keesc...@chromium.org wrote:
> On Mon, Feb 4, 2019 at 9:52 PM Mathieu Desnoyers
> wrote:
>>
>> commit e46daee53bb5 "ARM: 8806/1: kprobes: Fix false positive with
>> FORTIFY_SOURCE"
>> introduced a regression in optimized kprobes. It triggers "invalid
>
commit e46daee53bb5 ("ARM: 8806/1: kprobes: Fix false positive with
FORTIFY_SOURCE") introduced a regression in optimized kprobes. It
triggers "invalid instruction" oopses when using kprobes instrumentation
through lttng and perf. This commit was introduced in kernel v4.20, and
has been backported
On Tue, 5 Feb 2019, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> In order to drop the hard-coded GPIO base values from the davinci GPIO
> driver's platform data, we first need to get rid of all calls to the
> legacy GPIO functions.
>
> This series moves the GPIO logic related to d
On Sun, Feb 3, 2019 at 11:23 AM wrote:
> >> QEMU community requires additional PCI devices to simulate PVPANIC
> >> devices so that some architectures can not occupy precious less than 4G
> >> of memory space.
> >> Previously, I added PCI driver directly to the original version of the
> >> driver
On Tue, Feb 5, 2019 at 4:21 PM Life is hard, and then you die
wrote:
> > > +config KEYBOARD_APPLESPI
> > > + tristate "Apple SPI keyboard and trackpad"
> >
> > > + depends on (X86 && ACPI && SPI) || COMPILE_TEST
> >
> > COMPILE_TEST more or less makes sense in conjunction with architecture
>
On 05.02.2019 18:15, Arnaldo Carvalho de Melo wrote:
> Em Mon, Feb 04, 2019 at 10:47:03PM +0300, Alexey Budankov escreveu:
>>
>> On 04.02.2019 22:29, Arnaldo Carvalho de Melo wrote:
>>> Em Tue, Jan 22, 2019 at 08:48:54PM +0300, Alexey Budankov escreveu:
Allocate and bind AIO user space
On Tue, Feb 05, 2019 at 07:21:59AM -0800, Dave Hansen wrote:
> On 2/5/19 12:51 AM, Peter Zijlstra wrote:
> > On Mon, Feb 04, 2019 at 01:09:12PM -0800, Fenghua Yu wrote:
> >
> >> Intel SDM published TODAY does have IA32_CORE_CAPABILITY MSR enumerateion
> >> bit CPUID.0x7.0:EDX[30] now. Please check
On Fri, Feb 01, 2019 at 05:40:05PM +, Lorenzo Pieralisi wrote:
> On Tue, Dec 18, 2018 at 12:02:42PM +, Fabrizio Castro wrote:
> > Add PCIe support for the RZ/G2E (a.k.a. R8A774C0).
> >
> > Signed-off-by: Fabrizio Castro
> > Reviewed-by: Geert Uytterhoeven
> > ---
> > v1->v2:
> > * Droppe
commit e46daee53bb5 ("ARM: 8806/1: kprobes: Fix false positive with
FORTIFY_SOURCE") introduced a regression in optimized kprobes. It
triggers "invalid instruction" oopses when using kprobes instrumentation
through lttng and perf. This commit was introduced in kernel v4.20, and
has been backported
On Tue, 5 Feb 2019, Artem Savkov wrote:
> On Mon, Feb 04, 2019 at 12:42:50PM -0800, Hugh Dickins wrote:
> > On Mon, 4 Feb 2019, Artem Savkov wrote:
> >
> > > Hi Hugh,
> > >
> > > Your recent patch 9a1ea439b16b "mm: put_and_wait_on_page_locked() while
> > > page is migrated" seems to have introduc
The Libre Computer ALL-H3-CC H5 is one of the few boards that can have
its eMMC run at HS-DDR speed mode. Mark it as such.
Signed-off-by: Chen-Yu Tsai
---
.../boot/dts/allwinner/sun50i-h5-libretech-all-h3-cc.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/all
On 05.02.19 16:22, Fabio Estevam wrote:
On Tue, Feb 5, 2019 at 11:00 AM Miquel Raynal wrote:
Hi Martin,
Martin Kepplinger wrote on Tue, 29 Jan 2019
16:37:00 +0100:
From: Martin Kepplinger
Disable BCH soft reset according to MX23 erratum #2847 ("BCH soft
reset may cause bus master lock up
Some H5 boards seem to not have proper trace lengths for eMMC to be able
to use the default setting for the delay chains under HS-DDR mode. These
include the Bananapi M2+ H5 and NanoPi NEO Core2. However the Libre
Computer ALL-H3-CC-H5 works just fine.
For the H5 (at least for now), default to not
Hi everyone,
This is v2 of my H5 eMMC fix series. Changes since v1:
- Don't block HS200 and UHS modes, since these have been tested
Original cover letter:
Since the HS-DDR mode was enabled for the A64 eMMC controller, there
have been reports of eMMC failing to work on some H5 boards. It seems
The MMC device tree bindings include properties used to signal various
signalling speed modes. Until now the sunxi driver was accepting them
without any further filtering, while the sunxi device trees were not
actually using them.
Since some of the H5 boards can not run at higher speed modes stabl
Murali,
On 05/02/19 17:08, Murali Karicheri wrote:
> Hi Roger,
>
> On 02/05/2019 04:39 AM, Roger Quadros wrote:
>> Hi Tony & Suman,
>>
>> On 04/02/19 18:33, Tony Lindgren wrote:
>>> Hi,
>>>
>>> * Roger Quadros [190204 14:23]:
From: Suman Anna
>>> ...
+Example:
+
+1.
From: Tudor Ambarus
Patches from 1 to 11 are minor fixes or cosmetics.
Patches 12 and 13 introduce the sam9x60 qspi controller.
sam9x60 qspi controller tested with sst26vf064b jedec,spi-nor flash.
Backward compatibility test done on sama5d2 qspi controller and
mx25l25635e jedec,spi-nor flash.
T
From: Tudor Ambarus
Set the controller by default in Serial Memory Mode (SMM) at probe.
Cache Mode Register (MR) value to avoid write access when setting
the controller in serial memory mode at exec_op().
Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
---
v5: collect R-b
v4: s/smm/m
On Tue, Feb 05, 2019 at 10:49:35AM -0300, Arnaldo Carvalho de Melo wrote:
> Em Mon, Feb 04, 2019 at 09:37:38PM +0100, Jiri Olsa escreveu:
> > On Mon, Feb 04, 2019 at 12:10:42PM -0300, Arnaldo Carvalho de Melo wrote:
> > > Noticed this now when building with PYTHON=python3, can you take a look?
> >
On Tue, Feb 05, 2019 at 07:19:16AM -0800, Dave Hansen wrote:
> This is one of the few times that we're pretty confident that folks will
> use this. The reason we're going to this trouble is that the split lock
> detection is wanted by actual customers, and they want it before it's
> implemented on
From: Tudor Ambarus
Let general names to core drivers.
Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
---
v5: no changes
v4: collect R-b
v3: no change
v2: update after the removing of iomem access wrappers
drivers/spi/atmel-quadspi.c | 16
1 file changed, 8 insert
From: Tudor Ambarus
The wrappers hid that the accesses are relaxed. Drop them.
Suggested-by: Boris Brezillon
Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
---
v5: no changes
v4:
- drop local variable that kept aq->regs, the compiler should be
smart enough to store it in a regist
From: Tudor Ambarus
Return -ENOTSUPP when atmel_qspi_find_mode() fails. Propagate
the error in atmel_qspi_exec_op().
Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
---
v5: no change
v4: no change
v3: no change
v2: collect R-b
drivers/spi/atmel-quadspi.c | 4 ++--
1 file changed, 2
From: Tudor Ambarus
The cast is done implicitly.
Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
---
v5: no changes
v4: no changes
v3: no changes
v2: collect R-b
drivers/spi/atmel-quadspi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/atmel-quadsp
From: Tudor Ambarus
Cosmetic change, no functional change.
Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
---
v5: no change
v4: no change
v3: no change
v2: collect R-b
drivers/spi/atmel-quadspi.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/
From: Tudor Ambarus
Adopt the SPDX license identifiers to ease license compliance
management.
Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
---
v5: no change
v4: no change
v3: no change
v2: collect R-b
drivers/spi/atmel-quadspi.c | 13 +
1 file changed, 1 insertion(+)
From: Tudor Ambarus
Naming clocks is a good practice. Make "pclk" madatory even if
we support unnamed clock in the driver, to be backward compatible
with old DTs.
Suggested-by: Boris Brezillon
Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
---
v5: no change
v4: add missing semicolo
From: Tudor Ambarus
Introduced in:
commit b60557876849 ("ARM: dts: at91: sama5d2: switch to new clock binding")
Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
---
v5: no change
v4: no change
v3: new patch
Documentation/devicetree/bindings/spi/atmel-quadspi.txt | 2 +-
1 file chang
From: Tudor Ambarus
Split the TFRTYP_TRSFR_ bitfields in 2: one bit encoding the
mem/reg transfer type and one bit encoding the direction of
the transfer (read/write).
Remove NOP when setting read transfer type. Remove useless
setting of write transfer type when
op->data.dir == SPI_MEM_DATA_IN &
From: Tudor Ambarus
The sam9x60 qspi controller uses 2 clocks, one for the peripheral register
access, the other for the qspi core and phy. Both are mandatory. It uses
different transfer type bits in IFR register. It has dedicated registers
to specify a read or a write instruction: Read Instructi
From: Tudor Ambarus
The sam9x60 qspi controller uses 2 clocks, one for the peripheral register
access, the other for the qspi core and phy. Both are mandatory.
Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezillon
---
v5: no change
v4: collect R-b
v3: "pclk" was made mandatory in previous
From: Tudor Ambarus
Naming clocks is a good practice. Keep supporting unnamed
peripheral clock, to be backward compatible with old DTs.
While here, rename clk to pclk, to indicate that it is a
peripheral clock.
Suggested-by: Boris Brezillon
Signed-off-by: Tudor Ambarus
Reviewed-by: Boris Brezi
Hi Martin,
On Tue, Feb 5, 2019 at 1:42 PM Martin Kepplinger
wrote:
> Actually I rebased this from our 4.14 stable tree, so yes, I just forgot
> about that and I guess it would be
>
> Fixes: 6f2a6a52560a ("mtd: nand: gpmi: reset BCH earlier, too, to avoid
> NAND startup problems")
>
> Do you want
On Sun, Feb 3, 2019 at 9:04 PM Mattias Jacobsson <2...@mok.nu> wrote:
> On 2019-01-30, Andy Shevchenko wrote:
> > On Wed, Jan 30, 2019 at 5:15 PM Mattias Jacobsson <2...@mok.nu> wrote:
> > > + if (len < 0 || len >= 500) {
> >
> > Would it even possible to get a negative number here?
> > Same
Hello Simon, hello Lorenzo
> From: Simon Horman
> Sent: 05 February 2019 15:37
> Subject: Re: [PATCH v2] dt-bindings: PCI: rcar: Add device tree support for
> r8a774c0
>
> On Fri, Feb 01, 2019 at 05:40:05PM +, Lorenzo Pieralisi wrote:
> > On Tue, Dec 18, 2018 at 12:02:42PM +, Fabrizio Ca
Disable BCH soft reset according to MX23 erratum #2847 ("BCH soft
reset may cause bus master lock up") for MX28 too. It has the same
problem.
Observed problem: once per 100,000+ MX28 reboots NAND read failed on
DMA timeout errors:
[1.770823] UBI: attaching mtd3 to ubi0
[2.768088] gpmi_nand
On Thu, Dec 20, 2018 at 11:22 PM Hans de Goede wrote:
>
> Add touchscreen info for the Point of View Wintab P1006w (v1.0) tablet.
>
Pushed to my review and testing queue, thanks!
> Signed-off-by: Hans de Goede
> ---
> drivers/platform/x86/touchscreen_dmi.c | 29 ++
> 1
Hi Wen,
Wen Yang wrote on Tue, 5 Feb 2019
15:07:21 +:
> of_find_device_by_node() takes a reference to the struct device
> when it finds a match via get_device, there is no need to call
> get_device() twice.
> We also should make sure to drop the reference to the device
> taken by of_find_dev
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