Propagate the change of adding the owner parameter to several internal
core functions, as well as the ib_umem_odp_get() kernel interface
function. The mm of the address space that owns the memory region is
saved in the per_mm struct, which is then used by
ib_umem_odp_map_dma_pages() when resolving
Add a new parameter 'owner' to the reg_user_mr function. The owner
parameter specifies the owning process of the memory for which the
MR is being registered. Until now, the function assumed that the
process calling the function is also the owner. This patch relaxes
that assumption, and allows for t
Add a new handler for new uverb reg_remote_mr. The purpose is to register
a memory region in a different address space (i.e. process) than the
caller.
The main use case which motivated this change is post-copy container
migration. When a migration manager (i.e. CRIU) starts a migration, it
must ha
As discussed at LPC'18, there is a need to be able to register a memory
region (MR) on behalf of another process. One example is the case of
post-copy container migration, in which CRIU is responsible for setting
up the migration, but the contents of the memory are from the migrating
process. In th
On Thu, 24 Jan 2019 13:59:39 +0100
Michael Mueller wrote:
> By initializing the GIB, it will be used by the kvm host.
>
> Signed-off-by: Michael Mueller
> Reviewed-by: Pierre Morel
Reviewed-by: Halil Pasic
From: Anson Huang
Add i.MX8MQ PSCI GPC virtual driver support.
Signed-off-by: Anson Huang
Signed-off-by: Bai Ping
Signed-off-by: Abel Vesa
---
drivers/soc/imx/Makefile | 1 +
drivers/soc/imx/gpc-psci.c | 423 +
include/soc/imx/fsl_sip.h | 31
On Tue, Jan 29, 2019 at 02:54:24PM +0200, Georgi Djakov wrote:
> On 1/29/19 13:36, Greg Kroah-Hartman wrote:
> > 4.9-stable review patch. If anyone has any objections, please let me know.
> >
> > --
> >
> > commit 99d570da309813f67e9c741edeff55bafc6c1d5e upstream.
> >
> > Enable
On 29/01/19 10:32, Kang, Luwei wrote:
>>> However, you should at least change the comment in vcpu_enter_guest to
>>> mention "before reading PIR" instead of "before reading PIR.ON".
>>
>> Will do that. I think the "checking PIR.ON" should be PID.ON. I will fix it.
>>
> Hi Paolo,
> I reconsidere
On 29.01.19 14:09, Cornelia Huck wrote:
On Thu, 24 Jan 2019 13:59:37 +0100
Michael Mueller wrote:
Add the Interruption Alert Mask (IAM) to the architecture specific
kvm struct. This mask in the GISA is used to define for which ISC
a GIB alert will be issued.
The functions kvm_s390_gisc_reg
On Tue, Jan 29, 2019 at 06:14:30PM +0530, Deepa Dinamani wrote:
> There was another bug here that Arnd pointed out. It is fixed by
> https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1904961.html
>
> You need this patch also.
Thanks, now queued up for 4.19.y and 4.20.y.
greg k-h
It does, see this article
https://blog.quendi.moe/2018/07/03/en-debugging-nintendo-switch-linux-power-management-battery-desync-edition/
On Tue, Jan 29, 2019 at 9:03 AM Mark Zhang wrote:
>
> On 1/29/2019 3:36 PM, Billy Laws wrote:
> > Sure, that's fine with me, will send then this gets accepted.
From: Bartosz Golaszewski
This series adds support for max77650 ultra low-power PMIC. It provides
the core mfd driver and a set of five sub-drivers for the regulator,
power supply, gpio, leds and input subsystems.
Patches 1-6 add the DT binding documents. Patches 7-12 add all drivers.
Last patch
From: Bartosz Golaszewski
Add the DT binding document for the GPIO module of max77650.
Signed-off-by: Bartosz Golaszewski
Reviewed-by: Linus Walleij
---
.../bindings/gpio/gpio-max77650.txt | 34 +++
1 file changed, 34 insertions(+)
create mode 100644 Documentation/d
From: Bartosz Golaszewski
Add the core mfd driver for max77650 PMIC. We define five sub-devices
for which the drivers will be added in subsequent patches.
Signed-off-by: Bartosz Golaszewski
---
drivers/mfd/Kconfig | 11 ++
drivers/mfd/Makefile | 1 +
drivers/mfd/max77650.c
From: Bartosz Golaszewski
Add regulator support for max77650. We support all four variants of this
PMIC including non-linear voltage table for max77651 SBB1 rail.
Signed-off-by: Bartosz Golaszewski
---
drivers/regulator/Kconfig | 8 +
drivers/regulator/Makefile | 1
From: Bartosz Golaszewski
This adds basic support for LEDs for the max77650 PMIC. The device has
three current sinks for driving LEDs.
Signed-off-by: Bartosz Golaszewski
---
drivers/leds/Kconfig | 6 ++
drivers/leds/Makefile| 1 +
drivers/leds/leds-max77650.c | 152
On Tue, Jan 29, 2019 at 09:25:28PM +0800, Leo Yan wrote:
> On Tue, Jan 29, 2019 at 12:44:03AM +0530, Sai Prakash Ranjan wrote:
> > Add UCI table and a helper macro for coresight CPU debug
> > module. This patch adds the UCI entries for Krypo CPUs
> > found on MSM8996 which shares the same PIDs as E
From: Bartosz Golaszewski
Add the DT binding document for the onkey module of max77650.
Signed-off-by: Bartosz Golaszewski
---
.../bindings/input/max77650-onkey.txt | 26 +++
1 file changed, 26 insertions(+)
create mode 100644 Documentation/devicetree/bindings/input/ma
From: Bartosz Golaszewski
I plan on extending this set of drivers so add myself as maintainer.
Signed-off-by: Bartosz Golaszewski
---
MAINTAINERS | 14 ++
1 file changed, 14 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9f64f8d3740e..d4032d94c275 100644
--- a/MAINTAIN
From: Bartosz Golaszewski
Add basic support for the battery charger for max77650 PMIC.
Signed-off-by: Bartosz Golaszewski
---
drivers/power/supply/Kconfig| 7 +
drivers/power/supply/Makefile | 1 +
drivers/power/supply/max77650-charger.c | 355
From: Bartosz Golaszewski
Add GPIO support for max77650 mfd device. This PMIC exposes a single
GPIO line.
Signed-off-by: Bartosz Golaszewski
---
drivers/gpio/Kconfig | 7 ++
drivers/gpio/Makefile| 1 +
drivers/gpio/gpio-max77650.c | 189 +++
From: Bartosz Golaszewski
Add support for the push- and slide-button events for max77650.
Signed-off-by: Bartosz Golaszewski
---
drivers/input/misc/Kconfig | 9 ++
drivers/input/misc/Makefile | 1 +
drivers/input/misc/max77650-onkey.c | 127
3
From: Bartosz Golaszewski
Add the DT binding document for max77650 regulators.
Signed-off-by: Bartosz Golaszewski
---
.../bindings/regulator/max77650-regulator.txt | 41 +++
1 file changed, 41 insertions(+)
create mode 100644
Documentation/devicetree/bindings/regulator/max776
From: Bartosz Golaszewski
Add the DT binding document for the battery charger module of max77650.
Signed-off-by: Bartosz Golaszewski
---
.../power/supply/max77650-charger.txt | 27 +++
1 file changed, 27 insertions(+)
create mode 100644
Documentation/devicetree/bindin
From: Bartosz Golaszewski
Add the DT binding document for the LEDs module of max77650.
Signed-off-by: Bartosz Golaszewski
---
.../bindings/leds/leds-max77650.txt | 57 +++
1 file changed, 57 insertions(+)
create mode 100644 Documentation/devicetree/bindings/leds/leds
Hi Thierry,
Am Dienstag, 13. November 2018, 13:42:05 CET schrieb Heiko Stuebner:
> From: Heiko Stuebner
>
> This is a panel handled through the generic lvds-panel binding,
> so only needs its additional compatible specified.
>
> Signed-off-by: Heiko Stuebner
just pulling this pending patch ou
From: Bartosz Golaszewski
Add a DT binding document for max77650 ultra-low power PMIC. This
describes the core mfd device.
Signed-off-by: Bartosz Golaszewski
---
.../devicetree/bindings/mfd/max77650.txt | 28 +++
1 file changed, 28 insertions(+)
create mode 100644 Documen
From: Bartosz Golaszewski
---
arch/arm/boot/dts/am335x-bone-common.dtsi | 4 +
drivers/gpio/gpio-max77650.c | 138 +-
2 files changed, 136 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi
b/arch/arm/boot/dts/am335x-bone-com
> On Mon, Jan 28, 2019 at 03:29:10PM +0100, Andrea Parri wrote:
>
> > > diff --git a/arch/x86/include/asm/refcount.h
> > > b/arch/x86/include/asm/refcount.h
> > > index dbaed55..ab8f584 100644
> > > --- a/arch/x86/include/asm/refcount.h
> > > +++ b/arch/x86/include/asm/refcount.h
> > > @@ -67,1
wt., 29 sty 2019 o 14:35 Bartosz Golaszewski napisał(a):
>
> From: Bartosz Golaszewski
>
> ---
> arch/arm/boot/dts/am335x-bone-common.dtsi | 4 +
> drivers/gpio/gpio-max77650.c | 138 +-
> 2 files changed, 136 insertions(+), 6 deletions(-)
>
> diff --git a/arch
Hi Wei,
Thanks testing the series.
On 29/01/2019 13:12, Wei Li wrote:
> In some exception handlers, the interrupt is not reenabled by daifclr at
> first.
> The later process may call local_irq_enable() to enable the interrupt, like
> gic_handle_irq(). As we known, function local_irq_enable() jus
On Tue, Jan 29, 2019 at 06:54:12PM +0530, Ravi Bangoria wrote:
> Powerpc hw does not have inbuilt latency filter (--ldlat) for mem-load
> event and, perf_mem_events by default includes ldlat=30 which is
> causing failure on powerpc. Refactor code to support perf mem/c2c on
> powerpc.
>
> This patc
On Tue 29-01-19 14:14:47, Gerald Schaefer wrote:
> On Mon, 28 Jan 2019 15:45:04 +0100
> Michal Hocko wrote:
>
> > Hi,
> > Mikhail has posted fixes for the two bugs quite some time ago [1]. I
> > have pushed back on those fixes because I believed that it is much
> > better to plug the problem at t
Fix a typo in ext2_get_blocks comment.
Signed-off-by: Liu Xiang
---
fs/ext2/inode.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/ext2/inode.c b/fs/ext2/inode.c
index e4bb938..11da3fb 100644
--- a/fs/ext2/inode.c
+++ b/fs/ext2/inode.c
@@ -717,7 +717,7 @@ static int ext2_
Hi Tomasz,
Some comments below. Nothing major, so I think a v4 should be ready to be
merged.
On 1/24/19 11:04 AM, Tomasz Figa wrote:
> Due to complexity of the video encoding process, the V4L2 drivers of
> stateful encoder hardware require specific sequences of V4L2 API calls
> to be followed. Th
> On Mon, Jan 28, 2019 at 02:27:26PM +0200, Elena Reshetova wrote:
> > diff --git a/kernel/events/core.c b/kernel/events/core.c
> > index 3cd13a3..a1e87d2 100644
> > --- a/kernel/events/core.c
> > +++ b/kernel/events/core.c
> > @@ -1171,7 +1171,7 @@ static void perf_event_ctx_deactivate(struct
> pe
On Thu, 24 Jan 2019 13:59:29 +0100
Michael Mueller wrote:
> The vcpu idle_mask state is used by but not specific
> to the emulated floating interruptions. The state is
> relevant to gisa related interruptions as well.
>
> Signed-off-by: Michael Mueller
> ---
> arch/s390/include/asm/kvm_host.h
Jacek
On 1/24/19 3:55 PM, Jacek Anaszewski wrote:
> Dan
>
> On 1/24/19 10:00 PM, Dan Murphy wrote:
>> Jacek
>>
>> On 1/23/19 3:52 PM, Jacek Anaszewski wrote:
>>> Dan,
>>>
>>> On 1/22/19 11:44 PM, Dan Murphy wrote:
Jacek
On 1/22/19 3:39 PM, Jacek Anaszewski wrote:
> Hi all,
The RN5T618 family of PMICs can be used as system management
controllers, in which case they handle poweroff and restart. Document
this capability by referring to the corresponding generic DT binding.
Signed-off-by: Jonathan Neuschäfer
---
Documentation/devicetree/bindings/mfd/rn5t618.txt | 5 ++
On Mon, Oct 22, 2018 at 8:38 PM Al Viro wrote:
>
> On Mon, Oct 22, 2018 at 03:19:12AM -0700, Metztli Information Technology
> wrote:
> > I installed reiser4 -enhanced Linux kernel 4.17.19-1 --thus replacing the
> > prior hung reiser4 -patched kernel 4.18.15-1 in the Google Compute Engine
> >
On Mon, Jan 28, 2019 at 1:10 PM Elena Reshetova
wrote:
>
> This adds an smp_acquire__after_ctrl_dep() barrier on successful
> decrease of refcounter value from 1 to 0 for refcount_dec(sub)_and_test
> variants and therefore gives stronger memory ordering guarantees than
> prior versions of these fu
BUG_ON(x) should raise an error if x is true, but assert(x) raises an
error if x is false. Remove this bogus definition of BUG_ON(), which
isn't used anyway.
Signed-off-by: Jonathan Neuschäfer
---
tools/virtio/ringtest/ptr_ring.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/tools/virtio/ri
On Tue, 29 Jan 2019 14:49:20 +0100
Michal Hocko wrote:
> On Tue 29-01-19 14:14:47, Gerald Schaefer wrote:
> > On Mon, 28 Jan 2019 15:45:04 +0100
> > Michal Hocko wrote:
> >
> > > Hi,
> > > Mikhail has posted fixes for the two bugs quite some time ago [1]. I
> > > have pushed back on those fixes
On Tue, 29 Jan 2019, Jessica Yu wrote:
> +++ Thomas Gleixner [28/01/19 23:38 +0100]:
> > +"GPL"Module is licensed under GPL version 2. This
> > + does not express any distinction between
> > + GPL-2.0-only or GPL-2.0-or
On Tue, 29 Jan 2019 11:17:00 +1100
Stephen Rothwell wrote:
> Hi all,
>
> Today's linux-next merge of the mtd tree got a conflict in:
>
> drivers/mtd/mtdpart.c
>
> between commit:
>
> 2b6f0090a333 ("mtd: Check add_mtd_device() ret code")
>
> from Linus' tree and commit:
>
> 2c24c9af0f3
On Mon, 28 Jan 2019, Jason Gunthorpe wrote:
.. and I'm looking at some of the other conversions here.. *most
likely* any caller that is manipulating rlimit for get_user_pages
should really be calling get_user_pages_longterm, so they should not
be converted to use _fast?
Yeah this was something
Em Tue, Jan 29, 2019 at 02:42:36PM +0100, Jiri Olsa escreveu:
> On Tue, Jan 29, 2019 at 06:54:12PM +0530, Ravi Bangoria wrote:
> > Powerpc hw does not have inbuilt latency filter (--ldlat) for mem-load
> > event and, perf_mem_events by default includes ldlat=30 which is
> > causing failure on power
Am Dienstag, den 29.01.2019, 15:41 +0300 schrieb Eugeniy Paltsev:
> HSDK board has built-in Vivante GPU IP which works perfectly fine
> with Etnaviv driver, so let's use it.
>
> > Signed-off-by: Eugeniy Paltsev
> ---
> NOTE:
> * this patch has prerequisite:
> https://patchwork.kernel.org/patc
On 29/01/2019 at 09:38, Jonas Bonn wrote:
> If the SPI slave requires an inter-word delay, configure the DLYBCT
> register accordingly.
>
> Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference
> board).
>
> Signed-off-by: Jonas Bonn
> CC: Nicolas Ferre
> CC: Mark Brown
> CC: Alex
Recently, Free Electrons was renamed to Bootlin[1]. Less recently, the
Linux Cross Reference (LXR) at lxr.free-electrons.com was replaced by
Elixir[2], and lxr.free-electrons.com redirected first to
elixir.free-electrons.com and now to elixir.bootlin.com.
[1]: https://bootlin.com/blog/free-electro
On Thu, 6 Dec 2018 at 16:13, Ludovic Barre wrote:
>
> From: Ludovic Barre
>
> The current approach with sending a CMD12 (STOP_TRANSMISSION) to
> complete a data transfer request, either because of using the open
> ended transmission type or because of receiving an error during a data
> transfer,
Make the entire combination of plls to be one single clock. The parents used
for bypasses are specified each as an index in the parents list.
The determine_rate does a lookup throughout all the possible combinations
for all the divs and returns the best possible 'setup' which in turn is used
by set
On Tue, Jan 29, 2019 at 1:38 AM Enric Balletbo i Serra
wrote:
>
> Adopt the SPDX license identifier headers to ease license compliance
> management. Also fix the module license mismatch and change the
> description for a more descriptive phrase.
>
> Signed-off-by: Enric Balletbo i Serra
Reviewed
On Mon 28-01-19 09:49:05, Tejun Heo wrote:
> Hello, Michal.
>
> On Mon, Jan 28, 2019 at 06:05:26PM +0100, Michal Hocko wrote:
> > Yeah, that is quite clear. But it also assumes that the hierarchy is
> > pretty stable but cgroups might go away at any time. I am not saying
> > that the aggregated ev
On Tue, Jan 29, 2019 at 1:38 AM Enric Balletbo i Serra
wrote:
>
> Adopt the SPDX license identifier headers to ease license compliance
> management. Also change the description for one more appropriate.
>
> Signed-off-by: Enric Balletbo i Serra
Reviewed-by: Guenter Roeck
> ---
>
> Changes in v
There's no need to use an external link when the file is already here.
Signed-off-by: Jonathan Neuschäfer
---
Alternatively, I could change the link to https://elixir.bootlin.com
(the successor of lxr.free-electrons.com), but this solution seemed
simpler.
---
arch/arm/boot/dts/omap3-gta04a5.dts
On 1/29/2019 2:56 PM, Suzuki K Poulose wrote:
Reviewed-by: Suzuki K Poulose
Thanks Suzuki.
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
On 1/24/19 5:02 PM, Julien Grall wrote:
>
>
> On 24/01/2019 14:34, Oleksandr Andrushchenko wrote:
>> Hello, Julien!
>
> Hi,
>
>> On 1/22/19 1:44 PM, Julien Grall wrote:
>>>
>>>
>>> On 1/22/19 10:28 AM, Oleksandr Andrushchenko wrote:
Hello, Julien!
>>>
>>> Hi,
>>>
On 1/21/19 7:09 PM, Julie
On Mon, 28 Jan 2019 at 20:21, Lukasz Luba wrote:
>
> The patch adds description for DT binding for a new Exynos5 Dynamic Memory
> Controller device.
> It also contains needed MAINTAINERS file updates.
>
> CC: MyungJoo Ham
> CC: Kyungmin Park
> CC: Chanwoo Choi
> CC: Rob Herring
> CC: Mark Rutl
* Keerthy [190129 03:39]:
> On 28/01/19 10:04 PM, Tony Lindgren wrote:
> > Hi,
> >
> > * Randy Dunlap [190126 06:54]:
> >> Hi,
> >>
> >> FYI, I'm seeing this Kconfig warning in 5.0-rc3:
> >
> > Thanks for reporting it.
> >
> >> WARNING: unmet direct dependencies detected for TI_SOC_THERMAL
> >
On Thu, Jan 24, 2019 at 08:03:28PM +0200, Andy Shevchenko wrote:
> We now using a common macro for PM operations in Intel LPSS driver,
> and, since that macro relies on the definition and macro from linux/pm.h
> header file, it's logical to include it directly in intel-lpss.h.
> Otherwise it's a bi
On 1/29/2019 6:55 PM, Leo Yan wrote:
Looks good to me and tested on my Hikey board (though I cannot test
for a device with UCI ID):
Reviewed-and-tested-by: Leo Yan
Thanks Leo.
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The L
On Tue, Jan 29, 2019 at 10:01:17AM +0100, Miquel Raynal wrote:
> Hi Andrew,
>
> Andrew Lunn wrote on Mon, 28 Jan 2019 18:42:46 +0100:
>
> > On Mon, Jan 28, 2019 at 04:57:49PM +0100, Miquel Raynal wrote:
> > > Hi Andrew,
> > >
> > > Thanks for helping!
> > >
> > > Andrew Lunn wrote on Mon, 28
Hello,
On Tue, Jan 29, 2019 at 03:43:06PM +0100, Michal Hocko wrote:
> All memcg events are represented non-hierarchical AFAICS
> memcg_memory_event() simply accounts at the level when it happens. Or do
> I miss something? Or are you talking about .events files for other
> controllers?
Yeah, cgro
Hi Leo,
On 1/29/2019 7:06 PM, Leo Yan wrote:
I just now found if apply this patch onto coresight next branch [1],
it will conflict with patch 'coresight: cpu-debug: Support for CA73
CPUs' [2]. Sorry if introduce regression by this.
This patch depends on UCI support which is being discussed
Hi,
On 29/01/2019 15:27, nicolas.fe...@microchip.com wrote:
On 29/01/2019 at 09:38, Jonas Bonn wrote:
+ /* DLYBCT adds delays between words. This is useful for slow devices
+* that need a bit of time to setup the next transfer.
+*/
+ if (spi->word_delay_us) {
Wel
Von: linux-input-ow...@vger.kernel.org [linux-input-ow...@vger.kernel.org] im
Auftrag von Jonathan Neuschäfer [j.neuschae...@gmx.net]
Gesendet: Dienstag, 29. Jänner 2019 15:29
An: linux-...@vger.kernel.org
Cc: Jonathan Neuschäfer; Dmitry Torokhov; Jonathan
In order to detect possible connections to other domains we need to be
able to find out why tb_switch_alloc() fails so make it return ERR_PTR()
instead. This allows the caller to differentiate between errors such as
-ENOMEM which comes from the kernel and for instance -EIO which comes
from the hard
The only way to expand Thunderbolt topology is through the NULL adapter
ports (typically ports 1, 2, 3 and 4). There is no point handling
Thunderbolt hotplug events on any other port.
Add a helper function (tb_port_is_null()) that can be used to determine
if the port is NULL port, and use it in so
We run all XDomain requests during discovery in tb->wq and since it only
runs one work at the time it means that sending back reply to the other
domain may be delayed too much depending whether there is an active
XDomain discovery request running.
To make sure we can send reply to the other domain
Titan Ridge flow to start the firmware is the same as Alpine Ridge so we
can do the same on Titan Ridge based Apple systems.
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/icm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/thunderbolt/icm.c b/drivers/thunderbolt/icm.c
in
Now that the driver can handle every possible tunnel types there is no
point to log everything as info level so turn these to happen at debug
level instead.
While at it remove duplicated tunnel activation log message
(tb_tunnel_activate() calls tb_tunnel_restart() which print the same
message).
S
Currently ICM has been handling XDomain UUID exchange so there was no
need to have it in the driver yet. However, since now we are going to
add the same capabilities to the software connection manager it needs to
be handled properly.
For this reason modify the driver XDomain protocol handling so t
To be able to tunnel non-PCIe traffic, separate tunnel functionality
into generic and PCIe specific parts. Rename struct tb_pci_tunnel to
tb_tunnel, and make it hold an array of paths instead of just two.
Update all the tunneling functions to take this structure as parameter.
We also move tb_pci_p
In addition to PCIe and Display Port tunnels it is also possible to
create tunnels that forward DMA traffic from the host interface adapter
(NHI) to a NULL port that is connected to another domain through a
Thunderbolt cable. These tunnels can be used to carry software messages
such as networking p
We need to wait until all buffers have been drained before the path can
be considered disabled. Do this for every hop in a path. Also if the
switch is physically disconnected, do not bother disabling it anymore
(it is not present anyway).
This adds another bit field to struct tb_regs_hop even if w
Currently the software connection manager (tb.c) has only supported
creating a single PCIe tunnel, no PCIe device daisy chaining has been
supported so far. This updates the software connection manager so that
it now can create PCIe tunnels for full chain of six devices.
Signed-off-by: Mika Westerb
(+ Bjorn)
On Mon, 28 Jan 2019 at 12:27, Vivek Gautam wrote:
>
> Hi Ard,
>
> On Thu, Jan 24, 2019 at 1:25 PM Ard Biesheuvel
> wrote:
> >
> > On Thu, 24 Jan 2019 at 07:58, Vivek Gautam
> > wrote:
> > >
> > > On Mon, Jan 21, 2019 at 7:55 PM Ard Biesheuvel
> > > wrote:
> > > >
> > > > On Mon, 21
Display Port tunnels are somewhat more complex than PCIe tunnels as it
requires 3 tunnels (AUX Rx/Tx and Video). In addition we are not
supposed to create the tunnels immediately when a DP OUT is enumerated.
Instead we need to wait until we get hotplug event to that adapter port
or check if the por
Hi Christoph,
I compiled kernels for the X5000 and X1000 from your new branch
'powerpc-dma.6-debug.2' today. The kernels boot and the P.A. Semi
Ethernet works!
Cheers,
Christian
On 28 January 2019 at 5:52PM, Christian Zigotzky wrote:
Thanks a lot! I will test it tomorrow.
— Christian
Sen
Two domains (hosts) can be connected through a Thunderbolt cable and in
that case they can start software services such as networking over the
high-speed DMA paths. Now that we have all the basic building blocks in
place to create DMA tunnels over the Thunderbolt fabric we can add this
support to t
On Mon, 28 Jan 2019 at 20:21, Lukasz Luba wrote:
>
> This patch adds driver for Exynos5422 Dynamic Memory Controller.
> The driver provides support for Dynamic Frequency and Voltage scaling for
> DMC and DRAM. It supports changing timings of DRAM running with different
> frequency.
> The patch als
> On 29 Jan 2019, at 13.49, Hans Holmberg wrote:
>
> On Tue, Jan 29, 2019 at 12:19 PM Javier González wrote:
>>> On 29 Jan 2019, at 09.47, h...@owltronix.com wrote:
>>>
>>> From: Hans Holmberg
>>>
>>> pblk stripes writes of minimal write size across all non-offline chunks
>>> in a line, which
We will be needing these routines to find Display Port adapters as well
so modify them to take port type as the second parameter.
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/switch.c | 16
drivers/thunderbolt/tb.c | 35 +--
drivers/
Thunderbolt 2 devices and beyond link controller needs to be notified
when a switch is going to be suspended by setting bit 31 in LC_SX_CTRL
register. Add this functionality to the software connection manager.
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/lc.c | 44
NFC (non flow control) credits is actually 20-bit field so update
tb_port_add_nfc_credits() to handle this properly. This allows us to set
NFC credits for Display Port path in subsequent patches.
Also make sure the function does not update the hardware if the
underlying switch is already unplugged
In order to tunnel non-PCIe traffic as well rename tunnel_pci.[ch] to
tunnel.[ch] to reflect this fact. No functional changes.
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/Makefile | 2 +-
drivers/thunderbolt/tb.c | 2 +-
drivers/thunderbolt/{tun
From: Oleksandr Andrushchenko
When GEM backing storage is allocated those are normal pages,
so there is no point using pgprot_writecombine while mmaping.
This fixes mismatch of buffer pages' memory attributes between
the frontend and backend which may cause screen artifacts.
Fixes: c575b7eeb89f
Now that we can allocate hop IDs per port on a path, we can take
advantage of this and create tunnels covering longer paths than just
between two adjacent switches. PCIe actually does not need this as it is
always a daisy chain between two adjacent switches but this way we do
not need to hard-code
Maximum depth in Thunderbolt topology is 6 so make sure it is not
possible to allocate switches that exceed the depth limit.
While at it update tb_switch_alloc() to use upper/lower_32_bits()
following tb_switch_alloc_safe_mode().
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/icm.c|
We need to be able to walk from one port to another when we are creating
paths where there are multiple switches between two ports. For this
reason introduce a new function tb_port_get_next() and a new macro
tb_for_each_port().
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/switch.c | 60
In Apple Macs the boot firmware (EFI) connects all devices automatically
when the system is started, before it hands over to the OS. Instead of
ignoring we discover all those PCIe tunnels and record them using our
internal structures, just like we do when a device is connected after
the OS is alrea
This should be fixed by c878a628e0c483ec36fa70f4590e4a58e34a6e49
BR,
-R
On Tue, Jan 29, 2019 at 3:29 AM Rasmus Villemoes
wrote:
>
> ping
>
> On 15/01/2019 16.46, Rasmus Villemoes wrote:
> > With CONFIG_DEV_COREDUMP=y and CONFIG_DEBUG_FS=n, building fails:
> >
> > drivers/gpu/drm/msm/adreno/a2xx_
We can't be sure the paths are actually properly deactivated when a
tunnel is restarted after resume. So instead of marking all paths as
inactive we go ahead and deactivate them explicitly.
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/tunnel.c | 9 -
1 file changed, 8 insertion
Each port has a separate path configuration space that is used for
finding the next hop (switch) in the path. Hop ID is an index to this
configuration space and hop IDs 0 - 7 are reserved.
In order to get next available hop ID for each direction we provide two
pairs of helper functions that can be
The adapter specific capability either is there or not if the port does
not hold an adapter. Instead of always finding it on-demand we read the
offset just once when the port is initialized.
While there we update the struct port documentation to follow kernel-doc
format.
Signed-off-by: Mika Weste
Light Ridge and Eagle Ridge both need to have TMU access enabled before
port space can be fully accessed so make sure it happens on those. This
allows us to get rid of the offset quirk in tb_port_find_cap().
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/cap.c | 73 ++
Hi,
On 29/01/2019 15:56:31+0100, Jonas Bonn wrote:
> On 29/01/2019 15:27, nicolas.fe...@microchip.com wrote:
> > On 29/01/2019 at 09:38, Jonas Bonn wrote:
> > >
> > > + /* DLYBCT adds delays between words. This is useful for slow devices
> > > + * that need a bit of time to setup the next trans
We will be adding more link controller functionality in subsequent
patches and it does not make sense to keep all that in switch.c, so
separate LC functionality into its own file.
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/Makefile | 2 +-
drivers/thunderbolt/lc.c | 21 +++
Thunderbolt 2 devices and beyond need to have additional bits set in
link controller specific registers. This includes two bits in LC_SX_CTRL
that tell the link controller which lane is connected and whether it is
upstream facing or not.
Signed-off-by: Mika Westerberg
---
drivers/thunderbolt/lc.
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