On 07/12/2018 17:05, Christoph Hellwig wrote:
So I'd really prefer if we had a separate dummy.c file, like in
my take on your previous patch here:
http://git.infradead.org/users/hch/misc.git/commitdiff/e01adddc1733fa414dc16cd22e8f58be9b64a025
http://git.infradead.org/users/hch/misc.git/commitdi
On Tue, Dec 04, 2018 at 07:38:24PM -0800, Douglas Anderson wrote:
> Douglas Anderson (4):
> kgdb: Remove irq flags from roundup
> kgdb: Fix kgdb_roundup_cpus() for arches who used smp_call_function()
> kgdb: Don't round up a CPU that failed rounding up before
> kdb: Don't back trace on a cp
This patch implements CONFIG_DEBUG_VIRTUAL to warn about
incorrect use of virt_to_phys() and page_to_phys()
Below is the result of test_debug_virtual:
[1.438746] WARNING: CPU: 0 PID: 1 at ./arch/powerpc/include/asm/io.h:808
test_debug_virtual_init+0x3c/0xd4
[1.448156] CPU: 0 PID: 1 Comm:
Add devicetree binding for HI3670 UFS controller. HI3760 SoC is very
similar to HI3660 SoC with almost same IPs. Only major difference interms
of UFS is the PHY. HI3670 has 10nm PHY.
Signed-off-by: Manivannan Sadhasivam
---
Documentation/devicetree/bindings/ufs/ufs-hisi.txt | 4 +++-
1 file chan
Add UFS controller support for HiSilicon HI3670 SoC.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
i
Hello,
This patchset adds UFS controller support for HiSilicon HI3670 SoC.
HI3760 SoC is very similar to HI3660 SoC with almost same IPs, hence
the same driver is extended to provide UFS support. Only major difference
is the PHY. HI3670 has 10nm PHY, hence that parameter is used to
distinguish the
Add HI3670 SoC UFS driver support by extending the common ufs-hisi
driver. One major difference between HI3660 ad HI3670 SoCs interms of
UFS is the PHY. HI3670 has a 10nm variant PHY and hence this parameter is
used to distinguish the configuration.
Signed-off-by: Manivannan Sadhasivam
---
drive
If link is disabled, media_entity_remote_pad returns NULL, causing a
NULL pointer deference.
Ignore links that are not enabled instead.
Signed-off-by: Helen Koike
---
drivers/media/platform/vimc/vimc-common.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/media/platform/vimc/vim
On Fri, Dec 07, 2018 at 04:48:41PM +0800, Tiwei Bie wrote:
> Introduce VIRTIO_RING_NO_LEGACY to support disabling legacy
> macros and layout definitions.
>
> Suggested-by: Michael S. Tsirkin
> Signed-off-by: Tiwei Bie
> ---
> VRING_AVAIL_ALIGN_SIZE, VRING_USED_ALIGN_SIZE and VRING_DESC_ALIGN_SIZ
On Fri, Dec 07, 2018 at 10:06:56AM -0700, Jordan Crouse wrote:
> Try to get the interconnect path for the GPU and vote for the maximum
> bandwidth to support all frequencies. This is needed for performance.
> Later we will want to scale the bandwidth based on the frequency to
> also optimize for po
On Fri, Dec 07, 2018 at 04:48:42PM +0800, Tiwei Bie wrote:
> Switch to using the _SPLIT_ and _PACKED_ variants of vring flags
> in split ring and packed ring respectively.
>
> Signed-off-by: Tiwei Bie
> ---
> @@ -502,7 +505,8 @@ static inline int virtqueue_add_split(struct virtqueue
> *_vq,
>
Kent Overstreet had a patch set to completely remove flex arrays:
20180907165635.8469-7-kent.overstr...@gmail.com
I wonder where that set went.
On Fri, Dec 07, 2018 at 04:48:39PM +0800, Tiwei Bie wrote:
> This is a follow up of the discussion in this thread:
> https://patchwork.ozlabs.org/patch/1001015/#2042353
How was this tested? I'd suggest building virtio
before and after the changes, stripped binary
should be exactly the same.
> Ti
On 02/12/2018 20:23, Mesih Kilinc wrote:
> This is the sixth version of patchset for Allwinner ARMv5 F1C100s
> SoC. Addressed comments from Stephen Boyd, added signatures.
I've queued the 4 irqchip patches for 4.21.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
Hello!
I'd already started the v2 driver review before you posted v3, so here
goes...
On 12/03/2018 12:18 PM, Mason Yang wrote:
> Add a driver for Renesas R-Car Gen3 RPC SPI controller.
>
> Signed-off-by: Mason Yang
[...]
> diff --git a/drivers/spi/spi-renesas-rpc.c b/drivers/spi/spi-renes
Add API to allow userspace to create any type of topology in vimc using
basic system calls such as mkdir/rmdir/read/write.
Signed-off-by: Helen Koike
---
Hi,
This patch introduces the configufs API for configuring the topology in
vimc while it removes the hardcoded topology, so now, when you lo
On 12/7/2018 7:14 AM, Paolo Bonzini wrote:
On 07/12/18 14:58, Juergen Gross wrote:
On 07/12/2018 14:52, Paolo Bonzini wrote:
On 07/12/18 14:50, Juergen Gross wrote:
The PVH boot entry is in the same bzImage binary as the normal one.
Its just another entry, similar to the Xen PV boot entry. So
Next step: 13c1fdec5682b6e13257277fa16aa31f342d167d (powerpc/dma: move
pci_dma_dev_setup_swiotlb to fsl_pci.c)
git checkout 13c1fdec5682b6e13257277fa16aa31f342d167d
Result: The PASEMI onboard ethernet works and the X5000 boots.
— Christian
Sent from my iPhone
> On 7. Dec 2018, at 14:45, Chris
On Thu, Dec 06, 2018 at 12:32:47PM +, Kieran Bingham wrote:
> Oh - although, yes - there are some good concepts there - but I'm a bit
> weary of how easy it would be to 'run' the said test against multiple
> kernel version libraries... there would be a lot of possible ABI
> conflicts perhaps.
>
Hi,
This series adds support for the ARMv8.3 pointer authentication extension,
enabling userspace return address protection with GCC 7 and above.
(The previous version also had in-kernel pointer authentication patches
as RFC; these will be updated and sent at a later time.)
Changes since v5 [1]:
To make it clear which exceptions can't be taken to EL1 or EL2, add
comments next to the ESR_ELx_EC_* macro definitions.
Signed-off-by: Kristina Martsenko
---
arch/arm64/include/asm/esr.h | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/include/asm/es
From: Mark Rutland
The ARMv8.3 pointer authentication extension adds:
* New fields in ID_AA64ISAR1 to report the presence of pointer
authentication functionality.
* New control bits in SCTLR_ELx to enable this functionality.
* New system registers to hold the keys necessary for this
functi
From: Mark Rutland
In subsequent patches we're going to expose ptrauth to the host kernel
and userspace, but things are a bit trickier for guest kernels. For the
time being, let's hide ptrauth from KVM guests.
Regardless of how well-behaved the guest kernel is, guest userspace
could attempt to u
From: Mark Rutland
To allow EL0 (and/or EL1) to use pointer authentication functionality,
we must ensure that pointer authentication instructions and accesses to
pointer authentication keys are not trapped to EL2.
This patch ensures that HCR_EL2 is configured appropriately when the
kernel is boo
From: Mark Rutland
In KVM we define the configuration of HCR_EL2 for a VHE HOST in
HCR_HOST_VHE_FLAGS, but we don't have a similar definition for the
non-VHE host flags, and open-code HCR_RW. Further, in head.S we
open-code the flags for VHE and non-VHE configurations.
In future, we're going to
From: Mark Rutland
This patch adds basic support for pointer authentication, allowing
userspace to make use of APIAKey, APIBKey, APDAKey, APDBKey, and
APGAKey. The kernel maintains key values for each process (shared by all
threads within), which are initialised to random values at exec() time.
From: Mark Rutland
When pointer authentication is in use, data/instruction pointers have a
number of PAC bits inserted into them. The number and position of these
bits depends on the configured TCR_ELx.TxSZ and whether tagging is
enabled. ARMv8.3 allows tagging to differ for instruction and data
From: Mark Rutland
So that we can dynamically handle the presence of pointer authentication
functionality, wire up probing code in cpufeature.c.
>From ARMv8.3 onwards, ID_AA64ISAR1 is no longer entirely RES0, and now
has four fields describing the presence of pointer authentication
functionality
Add an arm64-specific prctl to allow a thread to reinitialize its
pointer authentication keys to random values. This can be useful when
exec() is not used for starting new processes, to ensure that different
processes still have different keys.
Signed-off-by: Kristina Martsenko
---
arch/arm64/in
From: Mark Rutland
When the kernel is unwinding userspace callchains, we can't expect that
the userspace consumer of these callchains has the data necessary to
strip the PAC from the stored LR.
This patch has the kernel strip the PAC from user stackframes when the
in-kernel unwinder is used. Thi
From: Mark Rutland
Now that we've added code to support pointer authentication, add some
documentation so that people can figure out if/how to use it.
Signed-off-by: Mark Rutland
Signed-off-by: Kristina Martsenko
Reviewed-by: Ramana Radhakrishnan
Cc: Andrew Jones
Cc: Catalin Marinas
Cc: Ram
From: Mark Rutland
Now that all the necessary bits are in place for userspace, add the
necessary Kconfig logic to allow this to be enabled.
Signed-off-by: Mark Rutland
Signed-off-by: Kristina Martsenko
Cc: Catalin Marinas
Cc: Will Deacon
---
arch/arm64/Kconfig | 23 +++
Hi,
On Fri, Dec 7, 2018 at 9:42 AM Catalin Marinas wrote:
>
> On Tue, Dec 04, 2018 at 07:38:24PM -0800, Douglas Anderson wrote:
> > Douglas Anderson (4):
> > kgdb: Remove irq flags from roundup
> > kgdb: Fix kgdb_roundup_cpus() for arches who used smp_call_function()
> > kgdb: Don't round u
Add two new ptrace regsets, which can be used to request and change the
pointer authentication keys of a thread. NT_ARM_PACA_KEYS gives access
to the instruction/data address keys, and NT_ARM_PACG_KEYS to the
generic authentication key.
The regsets are only exposed if the kernel is compiled with
C
On Fri, Dec 07, 2018 at 05:34:10PM +0100, Oleg Nesterov wrote:
> On 12/07, Dmitry V. Levin wrote:
> > On Fri, Dec 07, 2018 at 10:12:49PM +1100, Michael Ellerman wrote:
> >
> > > > Sorry, this patch does not work, please ignore it.
> > >
> > > Hmm OK. Why exactly?
> >
> > Unfortunately, I have no id
From: Elvira Khabirova
Arch code should use tracehook_*() helpers, as documented
in include/linux/tracehook.h,
ptrace_report_syscall() is not expected to be used outside that file.
Co-authored-by: Dmitry V. Levin
Fixes: 5521eb4bca2d ("powerpc/ptrace: Add support for PTRACE_SYSEMU")
Cc: Michael
Instead of providing a special dma_mark_clean hook just for ia64, switch
ia64 to use the normal arch_sync_dma_for_cpu hooks instead.
This means that we now also set the PG_arch_1 bit for pages in the
swiotlb buffer, which isn't stricly needed as we will never execute code
out of the swiotlb buffer
Hi all,
a while ago Jesper reported major performance regressions due to the
spectre v2 mitigations in his XDP forwarding workloads. A large part
of that is due to the DMA mapping API indirect calls.
It turns out that the most common implementation of the DMA API is the
direct mapping case, and
We can use DMA_MAPPING_ERROR instead, which already maps to the same
value.
Signed-off-by: Christoph Hellwig
---
drivers/xen/swiotlb-xen.c | 4 ++--
include/linux/swiotlb.h | 3 ---
kernel/dma/swiotlb.c | 4 ++--
3 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/xen/s
No need to duplicate the mapping logic.
Signed-off-by: Christoph Hellwig
---
kernel/dma/direct.c | 14 +-
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/kernel/dma/direct.c b/kernel/dma/direct.c
index edb24f94ea1e..d45306473c90 100644
--- a/kernel/dma/direct.c
+++ b/ke
Only report report a DMA addressability report once to avoid spewing the
kernel log with repeated message. Also provide a stack trace to make it
easy to find the actual caller that caused the problem.
Last but not least move the actual check into the fast path and only
leave the error reporting i
The two functions are exactly the same, so don't bother implementing
them twice.
Signed-off-by: Christoph Hellwig
---
include/linux/dma-mapping.h | 19 ++-
1 file changed, 6 insertions(+), 13 deletions(-)
diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
ind
There is no need to have all setup and coherent allocation / freeing
routines inline. Move them out of line to keep the implemeation
nicely encapsulated and save some kernel text size.
Signed-off-by: Christoph Hellwig
---
arch/powerpc/include/asm/dma-mapping.h | 1 -
include/linux/dma-mapping
dma_get_required_mask should really be with the rest of the DMA mapping
implementation instead of in drivers/base as a lone outlier.
Signed-off-by: Christoph Hellwig
---
drivers/base/platform.c | 31 ---
kernel/dma/mapping.c| 34 +-
We can just call the regular calls after adding offset the the address instead
of reimplementing them.
Signed-off-by: Christoph Hellwig
---
include/linux/dma-debug.h | 27
include/linux/dma-mapping.h | 34 +-
kernel/dma/debug.c | 42
While the dma-direct code is (relatively) clean and simple we actually
have to use the swiotlb ops for the mapping on many architectures due
to devices with addressing limits. Instead of keeping two
implementations around this commit allows the dma-direct
implementation to call the swiotlb bounce
From: Robin Murphy
Rather than checking the DMA attribute at each callsite, just pass it
through for acpi_dma_configure() to handle directly. That can then deal
with the relatively exceptional DEV_DMA_NOT_SUPPORTED case by explicitly
installing dummy DMA ops instead of just skipping setup entirel
From: Robin Murphy
The dummy DMA ops are currently used by arm64 for any device which has
an invalid ACPI description and is thus barred from using DMA due to not
knowing whether is is cache-coherent or not. Factor these out into
general dma-mapping code so that they can be referenced from other
This isn't exactly a slow path routine, but it is not super critical
either, and moving it out of line will help to keep the include chain
clean for the following DMA indirection bypass work.
Signed-off-by: Christoph Hellwig
---
include/linux/dma-mapping.h | 12 ++--
kernel/dma/mapping.c
With the bypass support for the direct mapping we might not always have
methods to call, so use the proper APIs instead. The only downside is
that we will create two dma-debug entries for each mapping if
CONFIG_DMA_DEBUG is enabled.
Signed-off-by: Christoph Hellwig
---
drivers/pci/controller/vm
Avoid expensive indirect calls in the fast path DMA mapping
operations by directly calling the dma_direct_* ops if we are using
the directly mapped DMA operations.
Signed-off-by: Christoph Hellwig
---
arch/alpha/include/asm/dma-mapping.h | 2 +-
arch/arc/mm/cache.c | 2 +-
a
All architectures except for sparc64 use the dma-direct code in some
form, and even for sparc64 we had the discussion of a direct mapping
mode a while ago. In preparation for directly calling the direct
mapping code don't bother having it optionally but always build the
code in. This is a minor h
The name of the struct is configfs_bin_attribute instead of
configfs_attribute
Signed-off-by: Helen Koike
---
Documentation/filesystems/configfs/configfs.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/filesystems/configfs/configfs.txt
b/Documentation/fil
The entity->dependency can go away completely once we've called
drm_sched_entity_add_dependency_cb() (if the cb is called before we
get around to tracing). The tracepoint is more useful if we trace
every dependency instead of just ones that get callbacks installed,
anyway, so just do that.
Fixes
On Fri, Dec 07, 2018 at 11:07:54AM -0500, Boris Ostrovsky wrote:
> Can this be considered as an ACK from you?
I'll look at v9 next week and add tags, assuming v9 is going to be the
final one, of course.
--
Regards/Gruss,
Boris.
SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham N
On Fri, Dec 7, 2018 at 10:41 PM Matthew Wilcox wrote:
>
> On Fri, Dec 07, 2018 at 03:34:56PM +, Robin Murphy wrote:
> > > +int vm_insert_range(struct vm_area_struct *vma, unsigned long addr,
> > > + struct page **pages, unsigned long page_count)
> > > +{
> > > + unsigned lo
On Fri, Dec 7, 2018 at 1:07 PM Jordan Crouse wrote:
>
> On Fri, Dec 07, 2018 at 10:06:56AM -0700, Jordan Crouse wrote:
> > Try to get the interconnect path for the GPU and vote for the maximum
> > bandwidth to support all frequencies. This is needed for performance.
> > Later we will want to scale
Am 07.12.18 um 20:16 schrieb Eric Anholt:
> The entity->dependency can go away completely once we've called
> drm_sched_entity_add_dependency_cb() (if the cb is called before we
> get around to tracing). The tracepoint is more useful if we trace
> every dependency instead of just ones that get cal
qla2x00_disable_board_on_pci_error and pcie error handlers may run
in parallel. Specifically, I observed qla2xxx_pci_slot_reset running
at around the same moment as qla2x00_disable_board_on_pci_error.
If scsi_qla_host_t or qla_hw_data structs are removed before an error
handler completes, the handl
Hi Philipp, can you review this patch and give it your ack?
Thanks,
Steve
On 10/16/18 5:00 PM, Steve Longerbeam wrote:
The function ipu_csi_init_interface() was inverting the F-bit for
NTSC case, in the CCIR_CODE_1/2 registers. The result being that
for NTSC bottom-top field order, the CSI wou
Describe cgroup v2 freezer interface in the cgroup v2 admin guide.
Signed-off-by: Roman Gushchin
Reviewed-by: Mike Rapoport
Cc: Tejun Heo
Cc: linux-...@vger.kernel.org
Cc: kernel-t...@fb.com
---
Documentation/admin-guide/cgroup-v2.rst | 27 +
1 file changed, 27 insertio
Freezer.c will contain an implementation of cgroup v2 freezer,
so let's rename the v1 freezer to avoid naming conflicts.
Signed-off-by: Roman Gushchin
Cc: Tejun Heo
Cc: kernel-t...@fb.com
---
kernel/cgroup/Makefile| 2 +-
kernel/cgroup/{freezer.c => legacy_freezer.c} | 0
If the cgroup destruction races with an exit() of a belonging
process(es), cg_kill_all() may fail. It's not a good reason to make
cg_destroy() fail and leave the cgroup in place, potentially causing
next test runs to fail.
Signed-off-by: Roman Gushchin
Cc: Shuah Khan
Cc: Tejun Heo
Cc: kernel-t.
This patch implements six tests for the freezer controller for
cgroup v2:
1) a simple test, which aims to freeze and unfreeze a cgroup with 100
processes
2) a more complicated tree test, which creates a hierarchy of cgroups,
puts some processes in some cgroups, and tries to freeze and unfreeze
diff
The number of descendant cgroups and the number of dying
descendant cgroups are currently synchronized using the cgroup_mutex.
The number of descendant cgroups will be required by the cgroup v2
freezer, which will use it to determine if a cgroup is frozen
(depending on total number of descendants
This patchset implements freezer for cgroup v2.
It provides similar functionality as v1 freezer, but the interface
conforms to the cgroup v2 interface design principles, and it
provides a better user experience: tasks can be killed, ptrace works,
there is no separate controller, which has to be en
The helper is identical to the existing cgroup_task_count()
except it doesn't take the css_set_lock by itself, assuming
that the caller does.
Also, move cgroup_task_count() implementation into
kernel/cgroup/cgroup.c, as there is nothing specific to cgroup v1.
Signed-off-by: Roman Gushchin
Cc: Te
On Fri, 7 Dec 2018 at 18:33, Christophe Leroy wrote:
>
> [2.364486] WARNING: CPU: 0 PID: 60 at ./arch/powerpc/include/asm/io.h:837
> dma_nommu_map_page+0x44/0xd4
> [2.373579] CPU: 0 PID: 60 Comm: cryptomgr_test Tainted: GW
> 4.20.0-rc5-00560-g6bfb52e23a00-dirty #531
> [
On Fri, Dec 7, 2018 at 8:20 PM Robin Murphy wrote:
>
> On 06/12/2018 18:42, Souptick Joarder wrote:
> > Convert to use vm_insert_range() to map range of kernel
> > memory to user vma.
> >
> > Signed-off-by: Souptick Joarder
> > Tested-by: Heiko Stuebner
> > Acked-by: Heiko Stuebner
> > ---
> >
Hi,
On Thu, 2018-12-06 at 22:28 -0800, David Miller wrote:
> From: David Miller
> Date: Thu, 06 Dec 2018 22:24:09 -0800 (PST)
>
> > Series applied, thanks!
>
> Erm... actually reverted. Please fix these build failures:
oops ...
I'm sorry for the late reply. I'm travelling and I will not able
On Fri, Dec 7, 2018 at 7:17 PM Robin Murphy wrote:
>
> On 06/12/2018 18:43, Souptick Joarder wrote:
> > Convert to use vm_insert_range() to map range of kernel
> > memory to user vma.
> >
> > Signed-off-by: Souptick Joarder
> > Reviewed-by: Matthew Wilcox
> > ---
> > drivers/iommu/dma-iommu.c
From: Tarick Bedeir
Date: Fri, 7 Dec 2018 00:30:26 -0800
> rx_ppp and tx_ppp can be set between 0 and 255, so don't clamp to 1.
>
> Fixes: 6e8814ceb7e8 ("net/mlx4_en: Fix mixed PFC and Global pause user
> control requests")
> Signed-off-by: Tarick Bedeir
Tariq and co., please review.
Quoting Geert Uytterhoeven (2018-12-07 00:27:11)
> Hi Stephen,
>
> On Thu, Dec 6, 2018 at 10:59 PM Stephen Boyd wrote:
> > This flag doesn't look to be used by any code, just set in various clk
> > init structures and then never tested again. Remove it from these
> > drivers as it doesn't provide
On Fri, 2018-12-07 at 09:46 +, David Woodhouse wrote:
> On Wed, 2018-12-05 at 19:13 +0100, Paolo Abeni wrote:
> > +/*
> > + * We can use INDIRECT_CALL_$NR for ipv6 related functions only if ipv6 is
> > + * builtin, this macro simplify dealing with indirect calls with only
> > ipv4/ipv6
> > + *
From: Paolo Abeni
Date: Fri, 07 Dec 2018 21:29:20 +0100
> Are you building with CONFIG_IPV6=m ?
I always build allmodconfig
From: Shiju Jose
1.The command interface for queryng and clearing hw errors is
changed, which requires the new process error functions to be added.
This patch removes all the current process error functions and
associated definitions. The new functions to handle ras errors
would be added
This patch set primarily does following addtions and optimizations
related to error handling in HNS3 Ethernet driver:
1. Name changes for enable and process functions and minor loop
optimizations. [PATCH 1-6]
2. Modify query and clearing of RAS errors using new set of commands
because mo
From: Shiju Jose
1. This patch adds minor loop optimization in the
hclge_hw_error_set_state function.
2. Adds logging module's name if it fails to configure the
error interrupts.
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_er
From: Shiju Jose
This patch renames process_hw_error function to
handle_hw_ras_error function to match the purpose
of the function. This is because hw errors reported through
ras and msix interrupts will be handled separately.
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
drivers/n
From: Shiju Jose
This patch handles PF hw errors of PPP(Programmable Packet Processor).
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/
From: Shiju Jose
1. This patch adds handling of hw ras errors using new set of
common commands.
2. Updated the error message tables to match the register's name and
error status returned by the commands.
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
.../net/ethernet/hisilicon
From: Shiju Jose
This patch deletes unnecessary setting of the descriptor data
to 0 for disabling error interrupts because
it is already done by the hclge_cmd_setup_basic_desc function.
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
From: Shiju Jose
This patch enables and handles hw errors of the Storage Switch Unit(SSU).
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 2 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 187 +
.../n
From: Shiju Jose
This patch handles the RDMA RAS errors.
1. Enable RAS interrupt, print error detail info and clear error status.
2. Do CORE reset to recovery when these non-fatal errors happened.
Signed-off-by: Xiaofei Tan
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
.../net/eth
From: Shiju Jose
This patch adds calling hclge_hw_error_set_state function
to re-enable the error interrupts those will be disabled on
the hw reset.
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 2 +-
drivers/net/ethernet/h
From: Shiju Jose
This patch enables and handles hw RAS and MSIx errors of PPU(RCB).
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 3 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 162 +
.../net/ethe
On 2018-12-07 7:28 pm, Souptick Joarder wrote:
On Fri, Dec 7, 2018 at 10:41 PM Matthew Wilcox wrote:
On Fri, Dec 07, 2018 at 03:34:56PM +, Robin Murphy wrote:
+int vm_insert_range(struct vm_area_struct *vma, unsigned long addr,
+ struct page **pages, unsigned long page_c
This patch adds handling for HNS3 hardware errors(non-standard)
which are reported through MSIX interrupts and not through
PCIe AER channel.
These MSIX reported hardware errors are handled using common
misc. interrupt handler. Hardware error related registers
cannot be cleared in context to the in
From: Shiju Jose
This patch
- renames the enable error interrupt functions.
The reason is that these functions
are used for both enable and disable error interrupts.
- removes redundant logs from the enable error interrupt functions.
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
--
From: Shiju Jose
This patch deletes logging 1 bit errors for the following reasons.
1. AER does not notify 1 bit errors to the device drivers.
However AER reports 1 bit errors to the userspace through the
trace_aer_event for logging in the rasdaemon.
2. Firmware clears the status of 1 bit e
From: Shiju Jose
This patch adds enable and handling of hw errors of
the MAC block.
Signed-off-by: Shiju Jose
Signed-off-by: Salil Mehta
---
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 1 +
.../net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c | 48 ++
.../net/ether
Now that 32-bit architectures have two variants of sys_rt_sigtimedwaid()
for 32-bit and 64-bit time_t, we also need to have a second compat system
call entry point on the corresponding 64-bit architectures.
The traditional system call keeps getting handled
by compat_sys_rt_sigtimedwait(), and this
This is another set of system call changes that were intended to get
merged much earlier. I've rebased the patches on top of the latest kernel
and Deepa's poll/select/io_pgetevents series now, and applied it to the
same y2038 branch for inclusion in 4.21.
This is just a continuation of the earlier
recvmmsg() takes two arguments to pointers of structures that differ
between 32-bit and 64-bit architectures: mmsghdr and timespec.
For y2038 compatbility, we are changing the native system call from
timespec to __kernel_timespec with a 64-bit time_t (in another patch),
and use the existing compat
This prepares sys_futex for y2038 safe calling: the native
syscall is changed to receive a __kernel_timespec argument, which
will be switched to 64-bit time_t in the future. All the internal
time handling gets changed to timespec64, and the compat_sys_futex
entry point is moved under the CONFIG_COM
We are going to share the compat_sys_futex() handler between 64-bit
architectures and 32-bit architectures that need to deal with both 32-bit
and 64-bit time_t, and this is easier if both entry points are in the
same file.
In fact, most other system call handlers do the same thing these days, so
l
Once sys_rt_sigtimedwait() gets changed to a 64-bit time_t, we have
to provide compatibility support for existing binaries.
An earlier version of this patch reused the compat_sys_rt_sigtimedwait
entry point to avoid code duplication, but this newer approach
duplicates the existing native entry poi
On 2018-12-07 8:30 pm, Souptick Joarder wrote:
On Fri, Dec 7, 2018 at 8:20 PM Robin Murphy wrote:
On 06/12/2018 18:42, Souptick Joarder wrote:
Convert to use vm_insert_range() to map range of kernel
memory to user vma.
Signed-off-by: Souptick Joarder
Tested-by: Heiko Stuebner
Acked-by: Hei
Hi!
Dne sreda, 05. december 2018 ob 10:24:44 CET je Paul Kocialkowski napisal(a):
> This adds the Video Engine node for the A64. Since it can map the whole
> DRAM range, there is no particular need for a reserved memory node
> (unlike platforms preceding the A33).
>
> Signed-off-by: Paul Kocialko
On Sat, Dec 8, 2018 at 2:40 AM Robin Murphy wrote:
>
> On 2018-12-07 7:28 pm, Souptick Joarder wrote:
> > On Fri, Dec 7, 2018 at 10:41 PM Matthew Wilcox wrote:
> >>
> >> On Fri, Dec 07, 2018 at 03:34:56PM +, Robin Murphy wrote:
> +int vm_insert_range(struct vm_area_struct *vma, unsigned
701 - 800 of 837 matches
Mail list logo
