In gmane.comp.file-systems.ext4 Guenter Roeck wrote:
> [trying again, this time with correct kernel.org address]
> Hi,
> I have seen the following and similar problems several times,
> with both v4.19.3 and v4.19.4:
> Nov 23 04:32:25 mars kernel: [112668.673671] EXT4-fs error (device sdb1):
>
On Tue, Nov 27, 2018 at 3:21 PM, Tycho Andersen wrote:
> On Mon, Nov 12, 2018 at 12:24:43PM -0700, Tycho Andersen wrote:
>> On Mon, Nov 12, 2018 at 11:55:38AM -0700, Tycho Andersen wrote:
>> > I haven't manage to reproduce it on stock v4.20-rc2, unfortunately.
>>
>> Ok, now I have,
>>
>> seccomp_b
Hi,
On Tue, Nov 27, 2018 at 3:23 PM Derek Basehore wrote:
>
> This adds the 32k clock to the RK3399 Gru board file. Even though it's
> not directly used, muxes will end up traversing the entire clk tree on
> calls to determine_rate if it doesn't exist. This is because the 32k
> clk is listed as a
On Tue, 2018-11-27 at 17:52 +0200, Andy Shevchenko wrote:
> On Tue, Nov 27, 2018 at 1:02 PM Takashi Iwai wrote:
> > On Tue, 27 Nov 2018 03:57:48 +0100,
> > Ayman Bagabas wrote:
> > > + handle = ACPI_HANDLE(&inputdev->dev);
> > > + args[0].type = args[1].type = args[2].type =
> > > ACPI_TYP
Quoting Taniya Das (2018-11-24 20:36:07)
> From: Amit Nischal
>
> Add device tree bindings for graphics clock controller for
> Qualcomm Technology Inc's SDM845 SoCs.
>
> Signed-off-by: Amit Nischal
You could have added your sign off here, but I don't think this is
really different from the ori
The kernel test robot reported two performance regressions
caused by recent patches.
Both appear to related to the global spinlock blocked_lock_lock
being taken more often.
This patch avoids taking that lock in the cases tested.
Reported-by: kernel test robot
Signed-off-by: NeilBrown
---
Hi J
Quoting Taniya Das (2018-11-24 20:36:08)
> From: Amit Nischal
>
> Add support for the graphics clock controller found on SDM845
> based devices. This would allow graphics drivers to probe and
> control their clocks.
>
> Signed-off-by: Amit Nischal
> Signed-off-by: Taniya Das
> ---
Applied to
[Resend for wrong reply HTML format mail]
Great check for making kcs_bmc module be more stable and handle things
gracefully.
My tag if needed.
Reviewed-by: Haiyue Wang
在 2018-11-27 21:36, Corey Minyard 写道:
On 11/21/18 9:08 AM, Nicholas Mc Guire wrote:
devm_kasprintf() may return NULL if
The function sis_find_family drops lpc_bridge reference via pci_dev_put,
however, after that, field lpc_bridge->revision is read. This may result
in a use after free bug. The patch moves the put operation after the
condition check.
Signed-off-by: Pan Bian
---
drivers/ide/sis5513.c | 3 ++-
1 fil
On Tue, Nov 20, 2018 at 9:43 AM Stefan Agner wrote:
>
> Define the length of the DBI registers. This makes sure that
> the kernel does not access registers beyond that point, avoiding
> the following abort on a i.MX 6Quad:
> # cat /sys/devices/soc0/soc/1ffc000.pcie/pci\:00/\:00\:00.0/con
On Wed, Nov 28, 2018 at 6:50 AM Kees Cook wrote:
>
> On Mon, Nov 19, 2018 at 9:06 AM, Dave Hansen wrote:
> > On 11/19/18 7:43 AM, Yangtao Li wrote:
> >> -static const struct file_operations ptdump_curusr_fops = {
> >> - .owner = THIS_MODULE,
> >> - .open = ptdump_open_c
>
> On Wed, Nov 28, 2018 at 4:37 AM Sean Wang wrote:
> >
> > Weiyi Lu 於 2018年11月26日 週一 下午7:45寫道：
> > >
> > > From: Owen Chen
> > >
> > > PLLs with tuner_en bit, such as APLL1, need to disable
> > > tuner_en before apply new frequency settings, or the new frequency
> > > settings (pcw) will not b
On Tue, 2018-11-27 at 10:45 +0100, Takashi Iwai wrote:
> On Tue, 27 Nov 2018 03:57:48 +0100,
> Ayman Bagabas wrote:
> > +static const struct key_entry huawei_wmi_keymap[] __initconst = {
> > + { KE_KEY,0x281, { KEY_BRIGHTNESSDOWN } },
> > + { KE_KEY,0x282, { KEY_BRIGHTNE
> Do you use from git?
Yes.
My version is v0.5.2-853-g06a4545
I only see './include/linux/slab.h:332:43: warning: dubious: x & !y'
in linux-next.
The warning in slab.h is already on the way in mm subsystem.
masahiro@pug:~/ref/linux-next$ git log --oneline -1
9d52999
Hi Andrey,
On Tue, Nov 27, 2018 at 10:57 PM Andrey Smirnov
wrote:
> Could this be a regression? Prior to 415b6185c541 ("PCI: imx6: Fix
> config read timeout handling") all of the imprecise aborts were caught
> and handled via no-op handler. I did an experiment on i.MX6Q board
> that I have (ZII
On Tue, Nov 27, 2018 at 4:38 PM, Kees Cook wrote:
> On Tue, Nov 27, 2018 at 3:21 PM, Tycho Andersen wrote:
>> On Mon, Nov 12, 2018 at 12:24:43PM -0700, Tycho Andersen wrote:
>>> On Mon, Nov 12, 2018 at 11:55:38AM -0700, Tycho Andersen wrote:
>>> > I haven't manage to reproduce it on stock v4.20-r
On Tue, Nov 27, 2018 at 10:16:56AM -0500, Steven Sistare wrote:
> On 11/9/2018 7:50 AM, Steve Sistare wrote:
> > From: Steve Sistare
> >
> > Provide struct sparsemask and functions to manipulate it. A sparsemask is
> > a sparse bitmap. It reduces cache contention vs the usual bitmap when many
>
On Tue, Nov 27, 2018 at 03:58:49PM -0500, J. Bruce Fields wrote:
> On Sun, Nov 25, 2018 at 09:17:10AM +0300, Anatoly Trosinenko wrote:
> > When manually exploring the kernel NFSd feature, I have stumbled upon
> > a NULL-dereference when writing to v4_end_grace when server is not yet
> > started.
>
On Tue, Nov 27, 2018 at 3:36 PM Andi Kleen wrote:
>
> > It does seem that FREEZE_PERFMON_ON_PMI (misnamed as it is) is of
> > rather limited use (or even negative, in our case) to a counter that's
> > already restricted to ring 3.
>
> It's much faster. The PMI cost goes down dramatically.
>
> I st
On Tue, Nov 27, 2018 at 4:20 PM Stephen Boyd wrote:
>
> Quoting Ryan Case (2018-11-26 18:25:36)
> > Transfers were being divided into device FIFO sized (64 byte max)
> > operations which would poll for completion within a spin_lock_irqsave /
> > spin_unlock_irqrestore block. This both made things
On Tue, Oct 30, 2018 at 04:06:24PM -0700, Evan Green wrote:
> If the backing device for a loop device is a block device,
> then mirror the discard properties of the underlying block
> device into the loop device. While in there, differentiate
> between REQ_OP_DISCARD and REQ_OP_WRITE_ZEROES, which
On Tue, Nov 27, 2018 at 5:12 PM Fabio Estevam wrote:
>
> Hi Andrey,
>
> On Tue, Nov 27, 2018 at 10:57 PM Andrey Smirnov
> wrote:
>
> > Could this be a regression? Prior to 415b6185c541 ("PCI: imx6: Fix
> > config read timeout handling") all of the imprecise aborts were caught
> > and handled via
On 11/21/2018 5:06 PM, John Hubbard wrote:
On 11/21/18 8:49 AM, Tom Talpey wrote:
On 11/21/2018 1:09 AM, John Hubbard wrote:
On 11/19/18 10:57 AM, Tom Talpey wrote:
~14000 4KB read IOPS is really, really low for an NVMe disk.
Yes, but Jan Kara's original config file for fio is *intended* to
On Mon, Nov 26, 2018 at 11:26:03AM -0500, Steven Rostedt wrote:
> On Tue, 27 Nov 2018 01:07:55 +0900
> Masami Hiramatsu wrote:
>
> > > > --- a/include/linux/sched.h
> > > > +++ b/include/linux/sched.h
> > > > @@ -1119,7 +1119,7 @@ struct task_struct {
> > > > int
On Wed, Oct 24 2018, David Howells wrote:
> Use accessor functions to access an iterator's type and direction. This
> allows for the possibility of using some other method of determining the
> type of iterator than if-chains with bitwise-AND conditions.
>
> Signed-off-by: David Howells
> ---
...
pci_device->revision is read after dropping pci_device reference via
pci_dev_put, which may result in use-after-free bugs. To fix this, the
patch reads ->revision before dropping reference.
Signed-off-by: Pan Bian
---
drivers/ata/pata_sis.c | 4 +++-
drivers/ata/pata_sl82c105.c | 4 +++-
2
On 11/28/2018 2:33 AM, Andi Kleen wrote:
On Tue, Nov 27, 2018 at 08:09:48PM +0800, Jin Yao wrote:
Support displaying the average IPC and IPC coverage for symbol
in perf report TUI browser. We create a new sort-key 'ipc' for
that.
Another thing that would be nice would be to automatically en
> On Nov 27, 2018, at 10:48 AM, Roman Kagan wrote:
>
> On Tue, Nov 27, 2018 at 02:10:49PM +0100, Vitaly Kuznetsov wrote:
>> Roman Kagan writes:
>>> On Mon, Nov 26, 2018 at 04:47:29PM +0100, Vitaly Kuznetsov wrote:
>>> I personally tend to prefer masks over bitfields, so I'd rather do the
>>> con
On 11/27/2018 02:36 PM, Thomas Gleixner wrote:
>>
>> We need this special handling only if the next task has TIF_SPEC_UPDATE
>> set, which is one-off event globally (when seccomp marks all its threads
>> so due to seccomp filter change), and once all the TIF_SPEC_UPDATE tasks
>> schedule at lea
On Mon, 2018-11-26 at 09:33 +0800, Miles Chen wrote:
> On Sat, 2018-11-24 at 14:56 -0600, Rob Herring wrote:
> > On Wed, Nov 21, 2018 at 8:51 PM Miles Chen wrote:
> > >
> > > On Wed, 2018-11-21 at 10:39 -0600, Rob Herring wrote:
> > > > On Wed, Nov 21, 2018 at 2:11 AM wrote:
> > > > >
> > > > > F
On Tue, Nov 27, 2018 at 01:22:55PM -0800, Guenter Roeck wrote:
> On Tue, Nov 27, 2018 at 07:55:01PM +0100, Rainer Fiebig wrote:
> > Am Dienstag, 27. November 2018, 15:48:19 schrieb Marek Habersack:
> > > On 27/11/2018 15:32, Guenter Roeck wrote:
> > > Hi,
> > >
> > > You might try to see if you ha
Quoting Sugaya Taichi (2018-11-18 17:01:07)
> Add DT bindings document for Milbeaut trampoline.
>
> Signed-off-by: Sugaya Taichi
> ---
> .../devicetree/bindings/soc/socionext/socionext,m10v.txt | 12
>
> 1 file changed, 12 insertions(+)
> create mode 100644
> Documentation/de
Quoting Ryan Case (2018-11-27 17:24:44)
> On Tue, Nov 27, 2018 at 4:20 PM Stephen Boyd wrote:
> >
> > Quoting Ryan Case (2018-11-26 18:25:36)
> > > Transfers were being divided into device FIFO sized (64 byte max)
> > > operations which would poll for completion within a spin_lock_irqsave /
> > >
On Tue, Nov 27, 2018 at 04:04:01PM +0100, Jan Tuerk wrote:
> Adding the label cpu0 allows the adjustment of cpu-parameters
> by reference in overlaying dtsi files in the same way as it
> is possible for imx6q devices.
>
> Signed-off-by: Jan Tuerk
> Reviewed-by: Andreas Färber
Applied all, thank
On Tue, 27 Nov 2018 15:27:14 -0500
Joe Lawrence wrote:
> Gentle ping... I took a dive through the rhkl-archives and found a few
> older discussions:
Thanks for the reminder, my INBOX is totally out of control with
Plumbers followed by Turkey Day.
>
> [PATCH] scripts/recordmcount.pl: Support
Hi Tom,
On Tue, 27 Nov 2018 16:53:45 -0600
Tom Zanussi wrote:
> > > +ping $LOCALHOST -c 3
> > > +nice -n 1 ping $LOCALHOST -c 3
> > > +
> > > +echo 0 > /sys/kernel/debug/tracing/events/sched/enable
> >
> > Shouldn't we stop tracing instead of disabling the event?
> >
>
> This is just reversin
Hi Masami San,
Thanks for the patch it solved the problem.
On Tue, 27 Nov 2018 at 21:41, Masami Hiramatsu
wrote:
>
> Hi,
>
> I found that the commit 4378a7d4be30 ("arm64: implement syscall
> wrappers") changed
> the syscall wrapper function names by adding __arm64_ prefix. So arm64
> kernel shou
Hello!
I have very bad news for you.
03/08/2018 - on this day I hacked your OS and got full access to your account
linux-kernel@vger.kernel.org
On this day your account linux-kernel@vger.kernel.org has password: qwerty
So, you can change the password, yes.. But my malware intercepts it every tim
Quoting Bjorn Andersson (2018-11-21 23:04:12)
> On Mon 19 Nov 11:42 PST 2018, Stephen Boyd wrote:
> >
> > A workaround for this somewhat rare case would be to specify
> > /delete-property/ on those nodes that aren't used. Unless that can't
> > even work because the phandle is parsed before propert
On Tue, Nov 27, 2018 at 6:04 PM Stephen Boyd wrote:
>
> Quoting Ryan Case (2018-11-27 17:24:44)
> > On Tue, Nov 27, 2018 at 4:20 PM Stephen Boyd wrote:
> > >
> > > Quoting Ryan Case (2018-11-26 18:25:36)
> > > > Transfers were being divided into device FIFO sized (64 byte max)
> > > > operations
On Thu, Nov 01, 2018 at 03:43:26PM +, Vokáč Michal wrote:
...
> +&usdhc3 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc3>;
> + bus-width = <4>;
> + cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
> + wp-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
> + no-1-8-v;
> +
Add MIO-DMAC (Media IO DMA Controller) nodes, and use them as
the DMA engine of SD/eMMC controllers.
Signed-off-by: Masahiro Yamada
---
arch/arm/boot/dts/uniphier-ld4.dtsi | 14 ++
arch/arm/boot/dts/uniphier-pro4.dtsi | 16
arch/arm/boot/dts/uniphier-sld8.dtsi | 14
Hi Tomeu,
On 2018-11-27 9:07 am, Tomeu Vizoso wrote:
This adds a device tree for the NanoPC-T4 SBC, which is based on the
Rockchip RK3399 SoC and marketed by FriendlyELEC.
I'm happy to see this, as mine's been sat waiting until I could find
time to wrangle a mainline DT for it :)
Known wor
On Fri, Nov 16, 2018 at 03:31:11PM +0530, Viresh Kumar wrote:
> Each CPU can (and does) participate in cooling down the system but the
> DT only captures a handful of them, normally CPU0, in the cooling maps.
> Things work by chance currently as under normal circumstances its the
> first CPU of eac
On Fri, Nov 16, 2018 at 03:34:26PM +0530, Viresh Kumar wrote:
> Each CPU can (and does) participate in cooling down the system but the
> DT only captures a handful of them, normally CPU0, in the cooling maps.
> Things work by chance currently as under normal circumstances its the
> first CPU of eac
Since we continue to find tons of new variants [0,1,2,3,4,5,6] that
need the PDP quirk, let's just quirk all devices from PDP.
[0]: https://github.com/paroj/xpad/pull/104
[1]: https://github.com/paroj/xpad/pull/105
[2]: https://github.com/paroj/xpad/pull/108
[3]: https://github.com/paroj/xpad/pull
On 11/27/18 5:21 PM, Tom Talpey wrote:
> On 11/21/2018 5:06 PM, John Hubbard wrote:
>> On 11/21/18 8:49 AM, Tom Talpey wrote:
>>> On 11/21/2018 1:09 AM, John Hubbard wrote:
On 11/19/18 10:57 AM, Tom Talpey wrote:
[...]
>>>
>>> What I'd really like to see is to go back to the original fio param
The MTD device reference is dropped via put_mtd_device, however its
field ->index is read and passed to ubi_msg. To fix this, the patch
moves the reference dropping after calling ubi_msg.
Signed-off-by: Pan Bian
---
drivers/mtd/ubi/build.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
d
On Mon, Nov 19, 2018 at 11:25:28AM +0100, Philippe Schenker wrote:
> From: Philippe Schenker
>
> Activate the stmpe-adc driver as found on Apalis/Colibri iMX6/T30 modules
iMX6 and T30 changes need to be separate patches.
Shawn
>
> Signed-off-by: Philippe Schenker
> ---
>
> Changes in v2:
>
The code execute on my system performance improves from
# time ./old
real0m6.645s
user0m6.644s
sys 0m0.001s
to
# time ./new
real0m5.565s
user0m5.565s
sys 0m0.000s
> Improve the performance of the crc32() asm routines by getting rid of most of
> the branches and small
Enable the UniPhier MIO DMAC driver. This is used as the DMA engine
for accelerating the SD/eMMC controller drivers.
Signed-off-by: Masahiro Yamada
---
The insertion context was decided by savedefconfig on next-20181127.
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion
Andrea Arcangeli writes:
> Hi Linus,
>
> On Tue, Nov 27, 2018 at 09:08:50AM -0800, Linus Torvalds wrote:
>> On Mon, Nov 26, 2018 at 10:24 PM kernel test robot
>> wrote:
>> >
>> > FYI, we noticed a -61.3% regression of vm-scalability.throughput due
>> > to commit ac5b2c18911f ("mm: thp: relax __G
Signed-off-by: Ryan Lee
---
Changes since v1 : Removed unusual repeat for amp software reset and
verification.
Amp software reset will be performed once and it repeats
verification maximum 3 times if it is failed.
Wait 10ms before every verification trial. M
The UBI device reference is dropped but then the device is used as a
parameter of ubi_err. The bug is introduced in changing ubi_err's
behavior. The old ubi_err does not require a UBI device as its first
parameter, but the new one does.
Fixes: 32608703310 ("UBI: Extend UBI layer debug/messaging
Originally submitted by Shelby Jueden (GitHub: AkBKukU) to paroj/xpad:
https://github.com/paroj/xpad/pull/97
Minor change to the location of the new entries done by me.
Cc: Shelby Jueden
Cc: sta...@vger.kernel.org
Signed-off-by: Cameron Gutman
---
drivers/input/joystick/xpad.c | 2 ++
1 file c
Hi Andrei.Stefanescu,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on regulator/for-next]
[also build test ERROR on v4.20-rc4 next-20181127]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https
Hi Steven,
On Tue, Nov 27, 2018 at 01:23:18PM -0500, Steven Rostedt wrote:
> On Tue, 27 Nov 2018 15:15:20 +0800
> Feng Tang wrote:
>
> > Kernel panic issues are always painful to debug, partially
> > because it's not easy to get enough information of the
> > context when panic happens.
> >
> >
From: Harry Cutts
There are three features used by various Logitech mice for
high-resolution scrolling: the scrolling acceleration bit in HID++ 1.0,
and the x2120 and x2121 features in HID++ 2.0 and above. This patch
supports all three, and uses the multiplier reported by the mouse for
the HID++
Linus,
While rewriting the function graph tracer, I discovered a design flaw that
was introduced by a patch that tried to fix one bug, but by doing so created
another bug. As both bugs corrupt the output (but they do not crash the
kernel), I decided to fix the design such that it could have both
Windows uses a magic number of 120 for a wheel click. High-resolution
scroll wheels are supposed to use a fraction of 120 to signal smaller
scroll steps. This is implemented by the Resolution Multiplier in the
device itself.
If the multiplier is present in the report descriptor, set it to the
logi
On Wed, Nov 21, 2018 at 03:16:20PM -0500, Lyude Paul wrote:
> Noticed the other day the trackpoint felt different on my P50, then
> realized it was because rmi4 wasn't loading for this machine
> automatically. Suspend/resume, hibernate, and everything else seem to
> work perfectly fine on here.
>
On 11/26/18 8:25 PM, Stephen Rothwell wrote:
> Hi all,
>
> Changes since 20181126:
>
as reported for linux-next-20181109:
(see
https://lore.kernel.org/lkml/499e91d0-7349-641f-9826-753571317...@infradead.org/)
when CONFIG_PROC_FS is not enabled:
ld: net/ipv4/af_inet.o: in function `inet_init':
On 11/27/2018 07:28 PM, Cameron Gutman wrote:
> Originally submitted by Shelby Jueden (GitHub: AkBKukU) to paroj/xpad:
> https://github.com/paroj/xpad/pull/97
>
> Minor change to the location of the new entries done by me.
>
> Cc: Shelby Jueden
> Cc: sta...@vger.kernel.org
> Signed-off-by: Ca
From: kbuild test robot
drivers/regulator/mcp16502.c:530:3-8: No need to set .owner here. The core will
do it.
Remove .owner field if calls are used which set it automatically
Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
Fixes: 9199c277faeb ("regulator: mcp16502: add regu
Hi Andrei.Stefanescu,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on regulator/for-next]
[also build test WARNING on v4.20-rc4 next-20181127]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https
This series adds PCIe host controller driver for Socionext UniPhier SoCs.
This controller is based on the DesignWare PCIe core. This driver
supports LD20 and PXs3 SoCs.
v3: https://www.spinics.net/lists/linux-pci/msg77224.html
About legacy IRQ, it might be necessary to share common view from
keys
Add DT bindings for PCIe controller implemented in UniPhier SoCs when
configured in Root Complex (host) mode. This controller is based on
the DesignWare PCIe core.
Signed-off-by: Kunihiko Hayashi
Reviewed-by: Rob Herring
---
.../devicetree/bindings/pci/uniphier-pcie.txt | 81 ++
This introduces specific glue layer for UniPhier platform to support
PCIe host controller that is based on the DesignWare PCIe core, and
this driver supports Root Complex (host) mode.
Signed-off-by: Kunihiko Hayashi
---
MAINTAINERS| 7 +
drivers/pci/controller/d
Hi Yueyi,
On Tue, Nov 27, 2018 at 10:34:26AM +, Yueyi Li wrote:
> It`s possible ip overrun in lzo1x_1_do_compress() when compressed page is
> point to the end of memory and which virtual address is 0xf000.
> Leading to a NULL pointer access during the get_unaligned_le32(ip).
Thank
On Wed, Nov 28, 2018 at 03:16:33AM +0300, Andrey Jr. Melnikov wrote:
> Corrupted inodes - always directory, not touched at least year or
> more for writing. Something wrong when updating atime?
We're not sure. The frustrating thing is that it's not reproducing
for me. I run extensive regression
On 11/10/18 11:59 AM, Catalin Marinas wrote:
> On Sat, Nov 10, 2018 at 10:08:10AM -0500, Qian Cai wrote:
>> On Nov 8, 2018, at 4:23 PM, Qian Cai wrote:
>>> The maximum value for DEBUG_KMEMLEAK_EARLY_LOG_SIZE is only 4, so it
>>> disables kmemleak every time on this aarch64 server running th
> On Nov 27, 2018, at 2:04 PM, Emre Ates wrote:
>
> ---
> mm/vmstat.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/mm/vmstat.c b/mm/vmstat.c
> index 9c624595e904..cc7d04928c2e 100644
> --- a/mm/vmstat.c
> +++ b/mm/vmstat.c
> @@ -1106,7 +1106,7 @@ int fragmentation_i
Hi,
On Thu, Nov 15, 2018 at 5:36 PM Chen-Yu Tsai wrote:
>
> Hi everyone,
>
> This is v2 of my Broadcom-based Bluetooth controllers on Allwinner SoC-
> based SBCs series.
>
> Changes since v1:
>
> - Collected tags
> - Re-organize dt binding clocks and clock-names properties
> - Simplify chec
Hi,
> -Original Message-
> From: Alex Williamson
> Sent: Tuesday, November 27, 2018 9:39 PM
> To: Bjorn Helgaas
> Cc: Bharat Bhushan ; linux-...@vger.kernel.org;
> linux-kernel@vger.kernel.org; bharatb.ya...@gmail.com; David Daney
> ; Jan Glauber ; Maik
> Broemme ; Chris Blake
>
> Subje
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
Signed-off-by: Gustavo A. R. Silva
---
drivers/scsi/lpfc/lpfc_nportdisc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/scsi/lpfc/lpfc_nportdisc.c
b/drivers/scsi/lpfc/lpfc_
Everyone:
This patch contains changes I made in order to add support for i.MX8MQ
to reset-imx7.c in order to enable support of PCIE IP block on i.MX8MQ
SoCs (full tree can be found at [github-v1]).
NOTE: This patch depens on CONFIG_ARCH_IMX8MQ introduced in [imx8mq]
Feedback is welcome!
Thanks,
The driver now supports i.MX8MQ, so update bindings accordingly.
Cc: p.za...@pengutronix.de
Cc: Fabio Estevam
Cc: cphe...@gmail.com
Cc: l.st...@pengutronix.de
Cc: Leonard Crestez
Cc: "A.s. Dong"
Cc: Richard Zhu
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Cc: linux-...@nxp.com
Cc: linux-arm
Add bits and pieces needed to support IP block variant found on
i.MX8MQ SoCs.
Cc: p.za...@pengutronix.de
Cc: Fabio Estevam
Cc: cphe...@gmail.com
Cc: l.st...@pengutronix.de
Cc: Leonard Crestez
Cc: "A.s. Dong"
Cc: Richard Zhu
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Cc: linux-...@nxp.com
In order to enable supporting i.MX8MQ with this driver, convert it to
expect variant specific bits to be passed via driver data.
Cc: p.za...@pengutronix.de
Cc: Fabio Estevam
Cc: cphe...@gmail.com
Cc: l.st...@pengutronix.de
Cc: Leonard Crestez
Cc: "A.s. Dong"
Cc: Richard Zhu
Cc: Rob Herring
Cc
Hello Kees,
On 2018/11/28 6:38, Kees Cook wrote:
> On Thu, Nov 22, 2018 at 11:54 PM, Wang Dongsheng
> wrote:
>> When select ARCH_TASK_STRUCT_ON_STACK the first of thread_info variable
>> is overwritten by STACK_END_MAGIC. In fact, the ARCH_TASK_STRUCT_ON_STACK
>> is not a real task on stack, it's
Hi all,
On Tue, 27 Nov 2018 20:14:58 -0800 Randy Dunlap wrote:
>
> On 11/26/18 8:25 PM, Stephen Rothwell wrote:
> > Hi all,
> >
> > Changes since 20181126:
> >
>
> on i386:
>
> ERROR: "__udivdi3" [drivers/scsi/aha1542.ko] undefined!
>
> somewhere in aha1542_interrupt() according to objdump
Kees Cook writes:
> On Tue, Nov 27, 2018 at 4:38 PM, Kees Cook wrote:
>> On Tue, Nov 27, 2018 at 3:21 PM, Tycho Andersen wrote:
>>> On Mon, Nov 12, 2018 at 12:24:43PM -0700, Tycho Andersen wrote:
On Mon, Nov 12, 2018 at 11:55:38AM -0700, Tycho Andersen wrote:
> I haven't manage to rep
On Sat, Nov 24, 2018 at 08:45:34AM -0800, Jarkko Sakkinen wrote:
> On Fri, Nov 23, 2018 at 04:39:23AM -0600, Dr. Greg wrote:
> > Jarkko, when this driver lands it will set the SGX ABI in stone for
> > Linux. It would be very, very helpful to the development community if
> > there was some official
Hi Florian,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on gpio/for-next]
[also build test ERROR on v4.20-rc4 next-20181127]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as
system controller, the system controller is in charge of system
power, clock and secure RTC etc. management, Linux kernel
has to communicate with system controller via MU (message unit)
IPC to do RTC operation.
Since the RTC set time MUS
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as
system controller, the system controller is in charge of system
power, clock and secure RTC etc. management, Linux kernel
has to communicate with system controller via MU (message unit)
IPC to do RTC operation, this patch adds binding doc
Add i.MX8QXP system controller RTC support.
Signed-off-by: Anson Huang
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 9155d45..ef57db6 100644
---
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
inside, the system controller is in charge of controlling power,
clock and secure rtc etc..
This patch adds i.MX system controller RTC driver support,
Linux kernel has to communicate with system controller via MU
(message unit) IPC t
This patch enables CONFIG_RTC_DRV_IMX_SC as module by default.
Signed-off-by: Anson Huang
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 6d224f7..e3df5dd 100644
--- a/arch/arm64/configs/defcon
Hi all,
Changes since 20181127:
The vfs tree gained a conflict against the ext3 tree.
Non-merge commits (relative to Linus' tree): 5084
5241 files changed, 259238 insertions(+), 151877 deletions(-)
I have cr
In nand_scan_ident(), the controller driver resets every NAND chip.
This is done by sending NAND_CMD_RESET. The Denali IP provides
another way to do the equivalent thing; if a bit is set in the
DEVICE_RESET register, the controller sends the RESET command to
the corresponding device. denali_reset_b
The Denali NAND IP has no way to read out the current signal level
of the R/B# pin. Instead, denali_dev_ready() checks if the R/B#
transition has already happened. (The INTR__INT_ACT interrupt is
asserted at the rising edge of the R/B# pin.) It is not a correct
way to implement the ->dev_ready() ho
I sent this series on September,
and Miquel replied this series was applied:
http://patchwork.ozlabs.org/patch/967242/
But, It turned out not applied.
I rebased it and resending now.
Masahiro Yamada (2):
mtd: rawnand: denali: remove ->dev_ready() hook
mtd: rawnand: denali: remove denali_res
This series fixed some issues for Tegra soctherm
Main changes from v2:
1. add codes to parse sensor id to avoid registration
failure.
Main changes from v1:
1. Acked by Thierry Reding for the patch
"thermal: tegra: fix memory allocation".
2. Print out the sensor name when register failed.
2. Remo
Convert warnings to info as not all platforms may
have all the thresholds and sensors enabled.
Signed-off-by: Wei Ni
---
drivers/thermal/tegra/soctherm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c
Since different platforms may not support all 4
sensors, so the sensor registration may be failed.
Add codes to parse dt to find sensor id which
need to be registered. So that the registration
can be successful on all platform.
Signed-off-by: Wei Ni
---
drivers/thermal/tegra/soctherm.c | 46
Fix memory allocation to store the pointers to
thermal_zone_device.
Signed-off-by: Wei Ni
Acked-by: Thierry Reding
---
drivers/thermal/tegra/soctherm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c
index 5
Hi Daniel,
I updated my patch to parse the sensor id, please take a look.
Wei.
On 28/11/2018 1:44 PM, Wei Ni wrote:
> Since different platforms may not support all 4
> sensors, so the sensor registration may be failed.
> Add codes to parse dt to find sensor id which
> need to be registered. So th
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
inside, the system controller is in charge of controlling power,
clock and thermal sensors etc..
This patch adds i.MX system controller thermal driver support,
Linux kernel has to communicate with system controller via MU
(message un
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
inside, the system controller is in charge of controlling power,
clock and thermal sensors etc..
This patch adds i.MX system controller thermal driver support,
Linux kernel has to communicate with system controller via MU
(message un
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