Hi Yogesh
On 23/10/18 3:07 PM, Yogesh Narayan Gaur wrote:
> Add support for octo mode IO data transfer.
> Micron flash, mt35xu512aba, supports octal mode data transfer and
> NXP FlexSPI controller supports 8 data lines for data transfer (Rx/Tx).
>
> Patch series
> * Add support for octo mode flag
On Wed, 03 Oct 2018, Wolfram Sang wrote:
> From: Dien Pham
>
> Because BD9571MWV_DVFS_MONIVDAC is not defined in the volatile table,
> the physical register value is not updated by regmap and DVFS doesn't
> work as expected. Fix it!
>
> Signed-off-by: Dien Pham
> [wsa: rebase, add 'Fixes', rew
On Wed 07-11-18 14:04:13, Andrew Morton wrote:
> On Wed, 7 Nov 2018 11:18:29 +0100 Michal Hocko wrote:
>
> > From: Michal Hocko
> >
> > The memory offlining failure reporting is inconsistent and insufficient.
> > Some error paths simply do not report the failure to the log at all.
> > When we
Commit fa5e084e43eb ("vmscan: do not unconditionally treat zones that
fail zone_reclaim() as full") changed the return value of node_reclaim().
The original return value 0 means NODE_RECLAIM_SOME after this commit.
While the return value of node_reclaim() when CONFIG_NUMA is n is not
changed. This
Andrew, could you pick up this one as well please? Let me know if you
prefer me to send the whole pile with all the fixes again.
> diff --git a/mm/memory_hotplug.c b/mm/memory_hotplug.c
> index bf214beccda3..820397e18e59 100644
> --- a/mm/memory_hotplug.c
> +++ b/mm/memory_hotplug.c
> @@ -1411,9 +
On Mon, 12 Nov 2018, Jean Delvare wrote:
> It doesn't make sense to present option MFD_AT91_USART by default if
> not building an AT91 kernel, as the drivers which depend on it are
> not available.
>
> Signed-off-by: Jean Delvare
> Fixes: 7d3aa342cef7 ("mfd: at91-usart: Add MFD driver for USART"
Hi Benjamin
On 11/12/18 4:23 PM, Benjamin Gaignard wrote:
This serie adds the support of the hardware semaphore block for stm32mp1 SoC.
version 3:
- fix clock name in properties description.
- use postcore_initcall() instead of module_platform_driver()
version 2:
- fix comments done by Bjorn a
> I have not received an answer to my questions in the last version of this
> patch
> set. Also it would be good if I could be Cc'ed by default. I can't hunt down
> all
> patches.
> I do not know of any kernel entity, specifically devices, that change
> namespaces
> on open().
> This seems like
Hi,
> -Original Message-
> From: Frieder Schrempf [mailto:frieder.schre...@kontron.de]
> Sent: Wednesday, November 7, 2018 8:13 PM
> To: linux-...@lists.infradead.org; boris.brezil...@bootlin.com; linux-
> s...@vger.kernel.org
> Cc: dw...@infradead.org; computersforpe...@gmail.com;
> marek
Hi Finn,
Am 13.11.2018 um 19:15 schrieb Finn Thain:
On Tue, 13 Nov 2018, Michael Schmitz wrote:
(It appears that a QEMU-emulated Mac does not benefit from having a
clocksource that's more accurate than the 'jiffies' clocksource, in
spite of "clocksource: Switched to clocksource via1".)
Wit
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun7i-a20-bananapi.dts | 98 +-
1 file changed, 98 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi.dts
b/arch/arm/boot/dts/sun7i-a20-bananapi.dts
index 70dfc4ac0bb5..18dbff9f1ce9 100644
--- a/arch/arm/boo
The CSI controller embedded in the A20 can be supported by our new driver.
Let's add it to our DT.
Signed-off-by: Maxime Ripard
---
arch/arm/boot/dts/sun7i-a20.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.d
On Mon, 12 Nov 2018, Richard Fitzgerald wrote:
> Add variables to struct madera that will be shared by the
> extcon and audio codec drivers to synchronize output state
> during accessory detection. Also add a mutex to protect
> the DAPM pointer.
Why the odd 58 char line feeds?
Not a blocker. Ju
We report a bug in v4.19-rc8 (4.20-rc1 as well):
kernel config: https://kt0755.github.io/etc/config-4.19-rc2.kmsan
repro: https://kt0755.github.io/etc/repro.e3752.c
This happens during data transition from user-supplied buffer to port
(using outb) pointed by ppos. (driver/mem/char.c:640)
Although
clock is missing in the title of this patch.
Regards
Ludovic
On Mon, Nov 12, 2018 at 02:31:03PM +0100, Alexandre Belloni wrote:
> Switch sama5d2 boards to the new PMC clock bindings.
>
> Signed-off-by: Alexandre Belloni
> ---
> arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 12 +-
> arch/arm/
On Thu, 08 Nov 2018, Charles Keepax wrote:
> Lochnagar is an evaluation and development board for Cirrus
> Logic Smart CODEC and Amp devices. It allows the connection of
> most Cirrus Logic devices on mini-cards, as well as allowing
> connection of various application processor systems to provide
Hi,
> -Original Message-
> From: Yogesh Narayan Gaur
> Sent: Tuesday, November 13, 2018 1:53 PM
> To: 'Frieder Schrempf' ; linux-
> m...@lists.infradead.org; boris.brezil...@bootlin.com; linux-
> s...@vger.kernel.org
> Cc: dw...@infradead.org; computersforpe...@gmail.com;
> marek.va...@gma
On Thu, 08 Nov 2018, Charles Keepax wrote:
> Lochnagar is an evaluation and development board for Cirrus
> Logic Smart CODEC and Amp devices. It allows the connection of
> most Cirrus Logic devices on mini-cards, as well as allowing
> connection of various application processor systems to provide
On Tue, 13 Nov 2018 at 05:52, Sasha Levin wrote:
> syzbot is reporting too large memory allocation at bfs_fill_super() [1].
> Since file system image is corrupted such that bfs_sb->s_start == 0,
> bfs_fill_super() is trying to allocate 8MB of continuous memory. Fix
> this by adding a sanity check
On Tue, Nov 13, 2018 at 2:09 AM Brian Norris wrote:
>
> On Mon, Nov 12, 2018 at 10:42:26AM +0200, Alexander Kapshuk wrote:
> > An even simpler approach would be:
> >
> > {
> > git --no-optional-locks status -uno --porcelain 2>/dev/null ||
> > git diff-index --name-only HEAD
> > } |
On 11/11/2018 22:21, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.14.81 release.
> There are 222 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me know.
>
> Responses s
Set add_mdev_supported_type as static since it is only used within
mdev_sysfs.c.
This fixes -Wmissing-prototypes gcc warning.
Signed-off-by: Paolo Cretaro
---
drivers/vfio/mdev/mdev_sysfs.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/vfio/mdev/mdev_sysfs.c b/d
Discussion:
https://lore.kernel.org/lkml/20180702084622.GA15274@yury-thinkpad/
Although RENAME_* macros are exposed in kernel headers, they are not
used by glibc. That's because linux/fs.h which hosts RENAME_* is
considered unsuitable by glibc developers:
As Florian Weimer wrote:
> undefines an
From: Jonathan Hunter
The tps6586x driver creates an irqchip that is used by its various child
devices for managing interrupts. The tps6586x-rtc device is one of its
children that uses the tps6586x irqchip. When using the tps6586x-rtc as
a wake-up device from suspend, the following is seen:
PM:
Hi Jernej,
On Sun, Nov 11, 2018 at 01:18:11PM +0100, Jernej Skrabec wrote:
> A64 has Mali400 MP2 GPU. Add a node for it.
>
> Signed-off-by: Jernej Skrabec
> ---
> This node and A64 GPU binary driver was tested with Kodi on LibreELEC.
>
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 22
On 13/11/2018 09:27:09+0100, Ludovic Desroches wrote:
> clock is missing in the title of this patch.
>
I fixed it up in place and pushed the at91-dt branch. Thanks!
> Regards
>
> Ludovic
>
> On Mon, Nov 12, 2018 at 02:31:03PM +0100, Alexandre Belloni wrote:
> > Switch sama5d2 boards to the new
On 30/10/18 10:22, Jerome Brunet wrote:
Get and enable the peripheral clock required by the efuse device.
The driver has been handle to work without it so far because the
clock was left enabled by default but it won't be the case soon.
Signed-off-by: Jerome Brunet
---
drivers/nvmem/meson-ef
On 30/10/18 10:22, Jerome Brunet wrote:
The efuse found in gx SoC requires a peripheral clock to properly operate.
We have been able to work without it until now because the clock was on by
default, and left on by the CCF. Soon, it will not be the case anymore, so
the device needs to claim the
On 11/12/18 7:22 PM, Olof Johansson wrote:
> On Thu, Jul 27, 2017 at 04:50:20PM +, Bich HEMON wrote:
>> From: Gerald Baeza
>>
>> This adds low-level debug support on USART1 for STM32F4
>> and STM32F7.
>> Compiled via 'CONFIG_DEBUG_LL' and 'CONFIG_EARLY_PRINTK'.
>> Enabled via 'earlyprintk' in
On Tue, Nov 13, 2018 at 02:39:00PM +1100, Finn Thain wrote:
> On Mon, 12 Nov 2018, Christoph Hellwig wrote:
>
> > On Mon, Nov 12, 2018 at 03:12:39PM +1100, Finn Thain wrote:
> > > Implementations of arch_gettimeoffset are generally not re-entrant and
> > > assume that interrupts have been disable
Add pinctrls required for camera sensors:
- power down signal;
- reset signal;
- camera external clock.
Signed-off-by: Todor Tomov
---
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 64
arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 96 ++
2 files cha
Add pinctrls required for Camera Control Interface.
Signed-off-by: Todor Tomov
---
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi | 12
arch/arm64/boot/dts/qcom/msm8996-pins.dtsi | 24
2 files changed, 36 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8
On Tue, Nov 13, 2018 at 09:16:16AM +, Bich HEMON wrote:
>
> On 11/12/18 7:22 PM, Olof Johansson wrote:
> > On Thu, Jul 27, 2017 at 04:50:20PM +, Bich HEMON wrote:
> >> From: Gerald Baeza
> >>
> >> This adds low-level debug support on USART1 for STM32F4
> >> and STM32F7.
> >> Compiled via
From: Colin Ian King
Pointer port is dereferenced on port->private_data when assigning pointer
pdata before port is null checked, leading to a potential null pointer
dereference. Fix this by assigning pdata after the null pointer check on
port.
Detected by CoverityScan, CID#1475434 ("Dereferenc
On 13/11/2018 09:38, Colin King wrote:
> From: Colin Ian King
>
> Pointer port is dereferenced on port->private_data when assigning pointer
> pdata before port is null checked, leading to a potential null pointer
> dereference. Fix this by assigning pdata after the null pointer check on
> port.
Andrew, could you take the patch please? This patch contains a comment
update as suggested by Tetsuo. I do not think there were any other
unresolved concerns.
>From 9ad6b1d9c07b18dd25a6af8cccbc56d1fbe6b922 Mon Sep 17 00:00:00 2001
From: Michal Hocko
Date: Fri, 9 Nov 2018 09:35:29 +0100
Subject:
From: Colin Ian King
Pointer port is dereferenced on port->private_data when assigning pointer
pdata before port is null checked, leading to a potential null pointer
dereference. Fix this by assigning pdata after the null pointer check on
port.
Detected by CoverityScan, CID#1475434 ("Dereferenc
Hi Sai,
On 25/10/18 15:36, saiprakash.ran...@codeaurora.org wrote:
"If I disable dma node and LS-UART0, then I don't see any crash and
ftrace also works fine"
And one more observation is that even without ftrace cmdline, if I use
earlycon and disable dma, I face the same crash.
So basically
Add hwlocks as optional property
Signed-off-by: Benjamin Gaignard
---
Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
b/Documentation/devicetree/bindings/pinctrl/st,
This series allow to protect pin controller configuration registers
with a hwspinlock to avoid conflicting accesses between processors.
Benjamin Gaignard (3):
dt-bindings: pinctrl: stm32: Document hwlocks properties
pinctrl: stm32: protect configuration registers with a hwspinlock
ARM: dts:
Define a hwspinlock to be used by pin-controller
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
index c4851271e810..2886e5a6a
If a hwspinlock if defined in device tree use it to protect
configuration registers.
Signed-off-by: Benjamin Gaignard
---
drivers/pinctrl/stm32/pinctrl-stm32.c | 71 ++-
1 file changed, 70 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/stm32/pinctrl-st
Hello,
On Tue, Nov 13, 2018 at 10:08:22AM +0800, Ryder Lee wrote:
> The flag 'has_clks' and related checks are superfluous as the CCF
> subsystem does this for you.
I'd write instead:
Handle optional clocks by using NULL as clk instead of a
separate bool field in the device's pla
On Tue, Nov 13, 2018 at 10:08:24AM +0800, Ryder Lee wrote:
> This updates bindings for MT7629 pwm controller.
>
> Signed-off-by: Ryder Lee
> ---
> Documentation/devicetree/bindings/pwm/pwm-mediatek.txt | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/pw
Hi Benjamin
On 11/13/18 10:51 AM, Benjamin Gaignard wrote:
Define a hwspinlock to be used by pin-controller
Signed-off-by: Benjamin Gaignard
---
arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 1 +
1 file changed, 1 insertion(+)
In commit title please add for which SoC it is targeted. If you
This series fixed some issues for Tegra soctherm
Main changes from v1:
1. Acked by Thierry Reding for the patch
"thermal: tegra: fix memory allocation".
2. Print out the sensor name when register failed.
2. Remove patch "thermal: tegra: fix coverity defect"
Wei Ni (3):
thermal: tegra: continue
Hi Krzysztof,
Thanks for the comments.
On 11/12/18 9:51 AM, Krzysztof Kozlowski wrote:
> On Wed, 7 Nov 2018 at 18:10, Lukasz Luba wrote:
>>
>
> Subject prefix:
> dt-bindings: thermal:
>
>> Thermal trip point gets new flag in DT: irq-mode.
>> Trip point may have a new explicit flag which indica
Convert warnings to info as not all platforms may
have all the thresholds and sensors enabled.
Signed-off-by: Wei Ni
---
drivers/thermal/tegra/soctherm.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c
Don't bail when a sensor fails to register with the
thermal zone and allow other sensors to register.
This allows other sensors to register with thermal
framework even if one sensor fails registration.
Signed-off-by: Wei Ni
---
drivers/thermal/tegra/soctherm.c | 8 +---
1 file changed, 5 ins
Fix memory allocation to store the pointers to
thermal_zone_device.
Signed-off-by: Wei Ni
Acked-by: Thierry Reding
---
drivers/thermal/tegra/soctherm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c
index 1
From: Saravanan Sekar
Add pinctrl and pio bindings for Actions Semi S700 SoC.
Signed-off-by: Parthiban Nallathambi
Signed-off-by: Saravanan Sekar
Reviewed-by: Rob Herring
---
.../bindings/pinctrl/actions,s700-pinctrl.txt | 170 ++
1 file changed, 170 insertions(+)
create mod
This patchset adds pinctrl support for Actions Semi S700 SoC.
Pinmux functions are only accessible for pin groups while pinconf
parameters are available for both pin groups and individual pins.
pinctrl driver is verified using the Cubieboard7.
common functionalities from s900 is moved for all Act
From: Saravanan Sekar
pad control for s900 and s700 are differs in number of
pull control configuraions
s900 has 4 pull controls - high impedence, pull up, pull down, repeater
s700, s500 has 2 pull controls - pull up and pull down
so pad control configuration has to SoC specific, moved out from
From: Saravanan Sekar
Add pinctrl and gpio driver for Actions Semi S700 SoC. The driver
supports pinctrl, pinmux, pinconf, gpio and interrupt functionalities
through a range of registers common to both gpio driver and pinctrl driver.
Signed-off-by: Parthiban Nallathambi
Signed-off-by: Saravanan
From: Saravanan Sekar
Move generic defines common to the Owl family out of S900 driver.
Signed-off-by: Parthiban Nallathambi
Signed-off-by: Saravanan Sekar
---
drivers/pinctrl/actions/pinctrl-owl.h | 131 +++
drivers/pinctrl/actions/pinctrl-s900.c | 139 ++
From: Saravanan Sekar
Add pinctrl nodes for Actions Semi S700 SoC
Signed-off-by: Parthiban Nallathambi
Signed-off-by: Saravanan Sekar
---
arch/arm64/boot/dts/actions/s700.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/actions/s700.dtsi
b/arch/a
On Tue, 13 Nov 2018 09:45:43 +0100
Paolo Cretaro wrote:
> Set add_mdev_supported_type as static since it is only used within
> mdev_sysfs.c.
> This fixes -Wmissing-prototypes gcc warning.
>
> Signed-off-by: Paolo Cretaro
> ---
> drivers/vfio/mdev/mdev_sysfs.c | 4 ++--
> 1 file changed, 2 inse
On Tue, Nov 13, 2018 at 09:56:29AM +0800, Yi Wang wrote:
> We get a warning when building kernel with W=1:
> arch/x86/kernel/irqinit.c:79:13: warning: no previous prototype for
> ‘init_IRQ’ [-Wmissing-prototypes]
> void __init init_IRQ(void)
> ^
>
> Add the missing declaration in he
On 11/13/18 10:24 AM, Russell King - ARM Linux wrote:
> On Tue, Nov 13, 2018 at 09:16:16AM +, Bich HEMON wrote:
>>
>> On 11/12/18 7:22 PM, Olof Johansson wrote:
>>> On Thu, Jul 27, 2017 at 04:50:20PM +, Bich HEMON wrote:
From: Gerald Baeza
This adds low-level debug support
On Tue, Nov 13, 2018 at 08:17:12AM +0100, Ingo Molnar wrote:
>
> * Bjorn Helgaas wrote:
>
> > PCI changes:
> >
> > - Pay attention to device-specific _PXM node values (Jonathan Cameron)
>
> There's a new boot regression, my AMD ThreadRipper system (MSI X399 SLI
> PLUS (MS-7B09)) hangs durin
Tested on an OLPC XO-1.75 machine, where the Embedded Controller happens
to be a SPI master.
Signed-off-by: Lubomir Rintel
Acked-by: Pavel Machek
---
drivers/spi/spi-pxa2xx.c | 81 +++---
include/linux/spi/pxa2xx_spi.h | 1 +
2 files changed, 75 insertions(+),
On Thu, 8 Nov 2018 08:16:53 -0800
Eric Anholt wrote:
> The extra to_v3d_bo() calls came from copying this from the vc4
> driver, which stored the cma gem object in the structs.
>
> Signed-off-by: Eric Anholt
Reviewed-by: Boris Brezillon
> ---
> drivers/gpu/drm/v3d/v3d_gem.c | 32 ++
Hi Tony,
On 11/8/18 5:59 PM, Tony Lindgren wrote:
> Hi,
>
> * Lukasz Luba [181009 08:36]:
>> PROVE_LOCKING enables LOCKDEP, which causes big overhead on cache and
>> bus transactions.
>>
>> On some ARM big.LITTLE architecutres (Exynos 5433) the overhead is really
>> big.
>> The overhead can be
Some drivers, such as spi-pxa2xx return from the transfer_one callback
immediately, idicating that the transfer will be finished asynchronously.
Normally, spi_transfer_one_message() synchronously waits for the
transfer to finish with wait_for_completion_timeout(). For slaves, we
don't want the tra
This this is used to let the SPI master know that our FIFO is filled and
we're ready to service a transfer. Only useful in slave mode.
A signal like this is used by an embedded controller on a OLPC XO 1.75
machine, that happens to be a SPI master.
Signed-off-by: Lubomir Rintel
Acked-by: Pavel Ma
There doesn't seem to be a way to empty TXFIFO on MMP2. The datasheet is
super-secret and the method described in Armada 16x manual won't work:
"The TXFIFO and RXFIFO are cleared to 0b0 when the SSPx port is reset or
disabled (by writing a 0b0 to the field
in the SSP Control Register 0)."
Strobe a GPIO line when the slave TX FIFO is filled. This is how the
Embedded Controller on an OLPC XO-1.75 machine, that happens to be a SPI
master, learns that it can initiate a transaction.
Signed-off-by: Lubomir Rintel
Tested-by: Pavel Machek
---
Changes since v2
- Avoid an useless delay if
Hello,
this patch set adds slave mode support to pxa2xx.
The objective is that it will be able to support the OLPC XO 1.75 embedded
controller that is a SPI master talking to a MMP2 SOC with an extra
"ready" signal for handshaking.
The patches have been submitted previously along with DT support
This is used to indicate that the chip attached to this controller is a SPI
master.
Signed-off-by: Lubomir Rintel
Reviewed-by: Rob Herring
Acked-by: Pavel Machek
---
Changes since v2:
- Updated the subject line to conform with subsystem customs
Documentation/devicetree/bindings/spi/spi-pxa2x
From: Li, Aubrey
> Sent: 12 November 2018 01:41
...
> VZEROUPPER instruction resets the init state. If context switch happens
> to occur exactly after VZEROUPPER instruction, XINUSE bitmap is empty(all
> zeros), which indicates the task is not using AVX. That's why the state
> decay count is used h
On 13/11/2018 08.26, Yi Wang wrote:
> We get two warning when building kernel with W=1:
> kernel/fork.c:167:13: warning: no previous prototype for
> ‘arch_release_thread_stack’ [-Wmissing-prototypes]
> kernel/fork.c:779:13: warning: no previous prototype for ‘fork_init’
> [-Wmissing-prototypes]
On Mon 12-11-18 17:09:31, Oleg Nesterov wrote:
> load_script() simply truncates bprm->buf and this is very wrong if the
> length of shebang string exceeds BINPRM_BUF_SIZE-2. This can silently
> truncate i_arg or (worse) we can execute the wrong binary if buf[2:126]
> happens to be the valid executa
Hi Myungho,
On 2018-11-12 01:49, Myungho Jung wrote:
> The mutex that is held from vb2_fop_read() can be unlocked while waiting
> for a buffer if the queue is streaming and blocking. Meanwhile, fileio
> can be released. So, it should return an error if the fileio address is
> changed.
>
> Signed-o
On Tue, Nov 13, 2018 at 11:23 AM Lubomir Rintel wrote:
> This is used to indicate that the chip attached to this controller is a SPI
> master.
>
> Signed-off-by: Lubomir Rintel
> Reviewed-by: Rob Herring
> Acked-by: Pavel Machek
Reviewed-by: Geert Uytterhoeven
Gr{oetje,eeting}s,
On Sun, Nov 11, 2018 at 06:55:36PM +0100, Michael Niewöhner wrote:
> Hi all,
>
> Nuvoton NCPT650 does not work in TPM 2.0 mode with tpm_tis / tpm_i2c_nuvoton
> while it works in TPM 1.2 mode (I can reflash it via UEFI setup).
> Kernel version is 4.19.1
Can you check what ACPI dump would show up [
On Mon 12-11-18 17:09:56, Oleg Nesterov wrote:
> Large enterprise clients often times run applications out of networked
> file systems where the IT mandated layout of project volumes can end up
> leading to paths that are longer than 128 characters. Bumping this up to
> the next order of two solves
On Tue, Nov 13, 2018 at 11:23 AM Lubomir Rintel wrote:
> This this is used to let the SPI master know that our FIFO is filled and
> we're ready to service a transfer. Only useful in slave mode.
>
> A signal like this is used by an embedded controller on a OLPC XO 1.75
> machine, that happens to be
On Tue, Nov 13, 2018 at 11:23 AM Lubomir Rintel wrote:
> Strobe a GPIO line when the slave TX FIFO is filled. This is how the
> Embedded Controller on an OLPC XO-1.75 machine, that happens to be a SPI
> master, learns that it can initiate a transaction.
>
> Signed-off-by: Lubomir Rintel
> Tested-
On Tue, Nov 13, 2018 at 11:23 AM Lubomir Rintel wrote:
> Some drivers, such as spi-pxa2xx return from the transfer_one callback
> immediately, idicating that the transfer will be finished asynchronously.
>
> Normally, spi_transfer_one_message() synchronously waits for the
> transfer to finish with
Hi Maxime,
On Tue, Nov 13, 2018 at 09:24:13AM +0100, Maxime Ripard wrote:
> The Allwinner A10 CMOS Sensor Interface is a camera capture interface also
...
> +Optional properties:
> + - allwinner,csi-channels: Number of channels available in the CSI
> +controller. If no
On Mon, 2018-11-12 at 12:34 -0800, syzbot wrote:
> Hello,
>
> syzbot found the following crash on:
>
> HEAD commit:442b8cea2477 Add linux-next specific files for 20181109
> git tree: linux-next
> console output: https://syzkaller.appspot.com/x/log.txt?x=115dbad540
> kernel config:
Hi Benjamin
On 11/13/18 10:51 AM, Benjamin Gaignard wrote:
If a hwspinlock if defined in device tree use it to protect
configuration registers.
Signed-off-by: Benjamin Gaignard
---
drivers/pinctrl/stm32/pinctrl-stm32.c | 71 ++-
1 file changed, 70 insertions(
On Sun, Nov 11, 2018 at 03:32:59PM -0800, David Miller wrote:
> From: Jiri Olsa
> Date: Mon, 12 Nov 2018 00:26:27 +0100
>
> > On Sun, Nov 11, 2018 at 03:08:01PM -0800, David Miller wrote:
> >> From: Jiri Olsa
> >> Date: Sun, 11 Nov 2018 20:41:32 +0100
> >>
> >> > On Thu, Nov 08, 2018 at 05:07:2
On Mon, 2018-11-12 at 12:14 +1100, NeilBrown wrote:
> Changes:
> - field names improved as requested by Bruce.
>"fl_blocked_requests" is a list of blocked requests,
>linked through fl_block_member
> - the introductory text has been moved to a commit comment
>as suggested by Bruce
> -
The new naming rule is added in acpica version 20180427.
So the dsdt aml code name changes from "AmlCode" to "dsdt_aml_code".
The patch that introduces naming rules is:
https://github.com/acpica/acpica/commit/f9a88a4c1cd020b6a5475d63b29626852a0b5f37
Tested:
ACPICA release version 20180427+.
ARM64
On Sun, Nov 11, 2018 at 10:11:33PM +0100, Michael Niewöhner wrote:
> Very strange... When I pull the power cord, then replug and boot, I get these
> dmesg messages:
> [0.00] efi: ACPI
> 2.0=0x9ea78000 ACPI=0x9ea78000 SMBIOS=0x9f5e5000 SMBIOS
> 3.0=0x9f5e4000 MPS=0xfca00 ESRT=0x9c06e91
We just changed the code so we apply bias disable on the correct
register but forgot to align the register calculation. The result
is that we apply the change on the correct register, but possibly
at the incorrect offset/bit
This went undetected because offsets tends to be the same between
REG_PUL
* Yury Norov:
> diff --git a/include/uapi/linux/fs.h b/include/uapi/linux/fs.h
> index 53a22e8e0408..dbf58bbf5bad 100644
> --- a/include/uapi/linux/fs.h
> +++ b/include/uapi/linux/fs.h
Could you move it to a dedicated header? Or add
a comment that the header is only for rename flags?
Then we c
On Fri, Nov 09, 2018 at 09:37:48PM +, Winkler, Tomas wrote:
> > On Thu, Nov 08, 2018 at 06:38:59PM +, Winkler, Tomas wrote:
> > > > Call tpm_chip_start() and tpm_chip_stop() in
> > > >
> > > > * tpm_try_get_ops() and tpm_put_ops()
> > > > * tpm_chip_register()
> > > > * tpm2_del_space()
> >
On Tue, Nov 13, 2018 at 08:28:25AM +, Lee Jones wrote:
> On Thu, 08 Nov 2018, Charles Keepax wrote:
>
> > Lochnagar is an evaluation and development board for Cirrus
> > Logic Smart CODEC and Amp devices. It allows the connection of
> > most Cirrus Logic devices on mini-cards, as well as allow
The horizontal and vertical back porch calculation in BSP
code is simply following the Linux drm comment diagram, in
include/drm/drm_modes.h which is
[hv]back porch = [hv]total - [hv]sync_end
BSP code form BPI-M64-bsp is calculating vertical back porch as
(from linux-sunxi/drivers/video/sunxi/dis
TCON DRQ set bits for non-burst DSI mode can computed via
horizontal front porch instead of front porch + sync timings.
BSP code form BPI-M64-bsp is computing TCON DRQ set bits
for non-burts as (from linux-sunxi/
drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c)
=> panel->lcd_ht -
DSI DPHY gate bit on MIPI DSI clock register is bit 15
not bit 30.
Signed-off-by: Jagan Teki
Acked-by: Stephen Boyd
---
drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
b/drivers/clk/sunxi-ng/ccu-sun
There are several ADC drivers that depend on the same device tree
bindings. Rather than continue to duplicate the properties, this patch
adds a common adc binding document that can be referenced. For beginning,
only two properties are documented.
Signed-off-by: Stefan Popa
---
Changes in v2, v3:
From: Lars-Peter Clausen
Some newer devices from the Sigma-Delta ADC family do have their data
register at a different address than the current default address. Add a
parameter to the ad_sigma_delta_info struct which allows to override the
default address.
Signed-off-by: Lars-Peter Clausen
Sign
Add support for Analog Devices AD7124 4-channels and 8-channels ADC.
Signed-off-by: Stefan Popa
---
Changes in v2:
- Nothing changed.
Changes in v3:
- Removed the "adi,channels" property.
- Used the "reg" property to get the channel number and
"adi,diff-channels"
The ad7124-4 and ad7124-8 are a family of 4 and 8 channel sigma-delta ADCs
with 24-bit precision and reference.
Three power modes are available which in turn affect the output data rate:
* Full power: 9.38 SPS to 19,200 SPS
* Mid power: 2.34 SPS to 4800 SPS
* Low power: 1.17 SPS to 2400 SPS
Th
Thumb-2 functions have the lowest bit set in the symbol value in the
symtab. When kallsyms are generated for the vmlinux, the kallsyms are
generated from the output of nm, and nm clears the lowest bit.
$ arm-linux-gnueabihf-readelf -a vmlinux | grep show_interrupts
95947: 8015dc89 686 FUNC
This patch adds a maintainer for the MCP16502 PMIC
driver.
Signed-off-by: Andrei Stefanescu
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index f485597..edfad02 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9723,6 +9723,13 @@ M: Ludov
This patch adds a regulator driver for the MCP16502 PMIC.
This drivers supports basic operations through the
regulator interface such as:
- setting/reading voltage
- setting/reading operating mode
- reading current status
- transitioning to/from suspend-to-ram and standby
power states
Signed-off
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