On Sun, 16 Sep 2018, srinivas.kandaga...@linaro.org wrote:
> From: Srinivas Kandagatla
>
> Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC,
> It has mulitple blocks like Soundwire controller, codec,
> Codec processing engine, ClassH controller, interrupt mux.
> It supports both I2S/I
/0day-ci/linux/commits/Clark-Wang/spi-lpspi-Add-slave-mode-support-for-imx7ulp/20181024-125200
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the
On Thu, Oct 18, 2018 at 9:57 AM Guo Ren wrote:
>
> On Thu, Oct 18, 2018 at 10:34:00AM +0200, Arnd Bergmann wrote:
> > On Thu, Oct 18, 2018 at 5:41 AM Guo Ren wrote:
> > >
> > > On Wed, Oct 17, 2018 at 05:44:17PM +0200, Arnd Bergmann wrote:
> > > > On Tue, Oct 16, 2018 at 5:33 AM Guo Ren wrote:
>
The function sdhci_allocate_bounce_buffer() always return zero at
present, so there's no need to have a return value, that will also make
error path easier.
CC: Linus Walleij
Signed-off-by: Chunyan Zhang
---
drivers/mmc/host/sdhci.c | 15 +--
1 file changed, 5 insertions(+), 10 dele
On 22-10-18, 14:29, Ross Zwisler wrote:
> From: Ricky Liang
>
> Add thermal logs in devfreq_cooling and cpu_cooling.
Why should we add them ?
> Also add logging to
> power_allocator when it starts to control power.
>
> These changes can lead to excessive log spam when running up against
> ther
This series of patches are created On top of the
below repo.
//git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git
BRANCH: next/drivers.
Nava kishore Manne (3):
firmware: xilinx: Add fpga API's
dt-bindings: fpga: Add bindings for ZynqMP fpga driver
fpga manager: Adding FPGA Manager supp
On Tue, Oct 23, 2018 at 01:32:56PM -0500, Rob Herring wrote:
> On Tue, Oct 23, 2018 at 4:21 AM Johan Hovold wrote:
> >
> > Hi Rob,
> >
> > On Tue, Sep 04, 2018 at 03:05:57PM +0200, Johan Hovold wrote:
> > > I think Rob will be picking up any patches that remain by the end of the
> > > release cyc
This Patch Adds fpga API's to support the Bitstream loading
by using firmware interface.
Signed-off-by: Nava kishore Manne
---
This patch depends on the below series of patches
https://lkml.org/lkml/2018/9/12/983
Which is got integrated into the below upstream repo.
https://git.kernel.org/pub/scm
This patch convert dwmac-sun8i driver to use all xxxsetbits_le32 functions.
Signed-off-by: Corentin Labbe
---
.../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 62 +--
1 file changed, 16 insertions(+), 46 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c
Since setbits32/clrbits32 work on be32, it's better to remove ambiguity on
the used data type.
Signed-off-by: Corentin Labbe
---
arch/powerpc/include/asm/fsl_lbc.h| 2 +-
arch/powerpc/include/asm/io.h | 4 +-
arch/powerpc/platforms/44x/canyonlands.c | 4 +-
ar
This patch adds setbits_le32/clrbits_le32/clrsetbits_le32 and
setbits_le64/clrbits_le64/clrsetbits_le64 in linux/setbits.h header.
Signed-off-by: Corentin Labbe
---
include/linux/setbits.h | 84 +
1 file changed, 84 insertions(+)
create mode 100644 includ
This patch convert meson DRM driver to use all xxxsetbits_le32 functions.
Signed-off-by: Corentin Labbe
Reviewed-by: Neil Armstrong
Tested-by: Neil Armstrong
---
drivers/gpu/drm/meson/meson_crtc.c | 14 +++---
drivers/gpu/drm/meson/meson_dw_hdmi.c | 33 +++--
drivers/gpu/drm/mes
Hello
This patchset adds a new set of functions which are open-coded in lot of
place.
Basicly the pattern is always the same, "read, modify a bit, write"
some driver and the powerpc arch already have thoses pattern them as functions.
(like ahci_sunxi.c or dwmac-meson8b)
The first patch rename so
Add documentation to describe Xilinx ZynqMP fpga driver
bindings.
Signed-off-by: Nava kishore Manne
---
Changes for v2:
-Removed "" separators.
Changes for v1:
-Created a Seperate(New) DT binding file as
suggested by Rob.
Changes for RFC-V2:
This patch adds FPGA Manager support for the Xilinx
ZynqMP chip.
Signed-off-by: Nava kishore Manne
---
Changes for v2:
-Fixed some minor coding issues as suggested by
Moritz
Changes for v1:
-None.
Changes for RFC-V2:
-Updated the
On Wed, 10 Oct 2018 19:49:23 +0200,
Connor McAdams wrote:
>
> The following changes since commit c6b6265d718d118e28e1ce8f91769aa886b54c94:
>
> Merge tag 'iwlwifi-fw-2018-10-03' of
> git://git.kernel.org/pub/scm/linux/kernel/git/iwlwifi/linux-firmware
> (2018-10-08 09:23:53 -0400)
>
> are ava
Would you mind opening a report at https://bugzilla.kernel.org? I'm
not sure if anybody will be able to do anything about this, but it's
always possible.
Submitted now, https://bugzilla.kernel.org/show_bug.cgi?id=201503
A complete dmesg log and "sudo lspci -vv" output from a successful
boot
The Xilinx Zynq FPGA driver takes ownership of the PR interface, making
it impossible to use the ICAP interface for partial reconfiguration.
This patch changes the driver to only activate PR over PCAP while the
device is actively being accessed by the driver for programming.
This allows both PCAP
On 2018-09-08 at 02:03:28 +0800, Zhang Yi wrote:
> PageReserved() is already checked inside kvm_is_reserved_pfn(),
> remove it from kvm_set_pfn_dirty().
>
> Signed-off-by: Zhang Yi
> Signed-off-by: Zhang Yu
> Reviewed-by: David Hildenbrand
> Acked-by: Pankaj Gupta
> ---
> virt/kvm/kvm_main.c
On Wed, Oct 24, 2018 at 9:50 AM Amir Goldstein wrote:
>
> On Tue, Oct 23, 2018 at 11:19 PM Phillip Potter wrote:
> >
> > Deduplicate the ext2 file type conversion implementation.
> >
> > Original patch by Amir Goldstein.
> >
> > v2:
> > - Rebased against Linux 4.19 by Phillip Potter
> > - This ve
Add SPI slave mode support for imx7ulp, in PIO mode.
Add "spi-slave" attribute in spi node of dts file to boot.
For now, slave has to send the message which is same as the length of
message master sent.
Wire connection:
GND, SCK, MISO(to MISO of slave), MOSI(to MOSI of slave), SCS
Signed-off-by
Hello!
Typo in the subject: s/xxxsetbitsi/xxxsetbits/.
On 24.10.2018 10:35, Corentin Labbe wrote:
This patch converts ahci_sunxi to use xxxsetbits_le32 functions
Signed-off-by: Corentin Labbe
[...]
MBR, Sergei
Use SR_TDF to judge if need send data, and SR_FCF to judge if
transmission end to replace the waiting after transmission end. This
waiting has no actual meaning, for the real end will set the FCF
flag.
Resolved an issue that could cause a transmission timeout when
transferring large amounts of dat
Add both ipg and per clock for lpspi to support i.MX8QM/QXP boards.
Signed-off-by: Xiaoning Wang
---
V2:
- No changes.
---
drivers/spi/spi-fsl-lpspi.c | 52 +
1 file changed, 41 insertions(+), 11 deletions(-)
diff --git a/drivers/spi/spi-fsl-lpspi.c b/driver
Remove Reset operation in fsl_lpspi_config(). This RST may cause both CLK
and CS pins go from high to low level under cs-gpio mode.
Add fsl_lpspi_reset() function after one message transfer to clear all
flags in use.
Signed-off-by: Xiaoning Wang
Reviewed-by: Fugang Duan
---
V2:
- Wrong place to
Enable the runtime pm for lpspi module
BuildInfo:
- U-Boot 2018.03-imx_4.14.y
Signed-off-by: Han Xu
Reviewed-by: Frank Li
Signed-off-by: Xiaoning Wang
---
V2:
- Add pinctrl/consumer.h include to fix the Warning error: implicit
declaration of function 'pinctrl_pm_select_sleep_state'
The function sdhci_allocate_bounce_buffer() always return zero at
present, so there's no need to have a return value, that will also make
error path easier.
CC: Linus Walleij
Signed-off-by: Chunyan Zhang
---
drivers/mmc/host/sdhci.c | 15 +--
1 file changed, 5 insertions(+), 10 dele
>From V12
- Refine the title and description of patch 1~3. -- Thomas Gleixner
- Rename the function of validate the capabilities of Intel PT. -- Thomas
Gleixner
- Add more description of Intel PT work mode. -- Alexander Shishkin
>From V11:
- In patch 3, arguments caps vs. cap is not good. Spe
From: Chao Peng
pt_cap_get() is required by the upcoming PT support in KVM guests.
Export it and move the capabilites enum to a global header.
As a global functions, "pt_*" is already used for ptrace and
other things, so it makes sense to use "intel_pt_*" as a prefix.
Acked-by: Song Liu
Signe
This adds support for "output to Trace Transport subsystem"
capability of Intel PT. It means that PT can output its
trace to an MMIO address range rather than system memory buffer.
Acked-by: Song Liu
Signed-off-by: Luwei Kang
---
arch/x86/events/intel/pt.c | 1 +
arch/x86/include/asm/intel
Add bit definitions for Intel PT MSRs to support trace output
directed to the memeory subsystem and holds a count if packet
bytes that have been sent out.
These are required by the upcoming PT support in KVM guests
for MSRs read/write emulation.
Signed-off-by: Luwei Kang
---
arch/x86/include/as
intel_pt_validate_hw_cap() validates whether a given PT capability is
supported by the hardware. It checks the PT capability array which
reflects the capabilities of the hardware on which the code is executed.
For setting up PT for KVM guests this is not correct as the capability
array for the gue
From: Chao Peng
The Intel Processor Trace (PT) MSR bit defines are in a private
header. The upcoming support for PT virtualization requires these defines
to be accessible from KVM code.
Move them to the global MSR header file.
Reviewed-by: Thomas Gleixner
Signed-off-by: Chao Peng
Signed-off-b
Currently, Intel Processor Trace do not support tracing in L1 guest
VMX operation(IA32_VMX_MISC[bit 14] is 0). As mentioned in SDM,
on these type of processors, execution of the VMXON instruction will
clears IA32_RTIT_CTL.TraceEn and any attempt to write IA32_RTIT_CTL
causes a general-protection ex
From: Chao Peng
Load/Store Intel Processor Trace register in context switch.
MSR IA32_RTIT_CTL is loaded/stored automatically from VMCS.
In Host-Guest mode, we need load/resore PT MSRs only when PT
is enabled in guest.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
---
arch/x86/include/as
From: Chao Peng
Intel Processor Trace virtualization can be work in one
of 2 possible modes:
a. System-Wide mode (default):
When the host configures Intel PT to collect trace packets
of the entire system, it can leave the relevant VMX controls
clear to allow VMX-specific packets to prov
Initialize the Intel PT configuration when cpuid update.
Include cpuid inforamtion, rtit_ctl bit mask and the number of
address ranges.
Signed-off-by: Luwei Kang
---
arch/x86/kvm/vmx.c | 73 ++
1 file changed, 73 insertions(+)
diff --git a/arc
From: Chao Peng
To save performance overhead, disable intercept Intel PT MSRs
read/write when Intel PT is enabled in guest.
MSR_IA32_RTIT_CTL is an exception that will always be intercepted.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
---
arch/x86/kvm/vmx.c | 23 +++
From: Chao Peng
This patch implement Intel Processor Trace MSRs read/write
emulation.
Intel PT MSRs read/write need to be emulated when Intel PT
MSRs is intercepted in guest and during live migration.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
---
arch/x86/include/asm/intel_pt.h | 8
From: Chao Peng
Expose Intel Processor Trace to guest only when
the PT works in Host-Guest mode.
Signed-off-by: Chao Peng
Signed-off-by: Luwei Kang
---
arch/x86/include/asm/kvm_host.h | 1 +
arch/x86/kvm/cpuid.c| 22 --
arch/x86/kvm/svm.c | 6 +++
Hi Kirill. Thanks for your comments.
> On 22 Oct 2018, at 23:25, Kirill Marinushkin wrote:
>
> AFAIU, this patch is wrong. Please correct me, maybe I misunderstand
> something.
>
>> The problem that this patch seeks to resolve is that when userland asks for
>> the delay
>
> The userspace asks
On Wed, Oct 24, 2018 at 09:16:20AM +0300, Amir Goldstein wrote:
> On Tue, Oct 23, 2018 at 11:19 PM Phillip Potter wrote:
> >
> > Many file systems use a copy&paste implementation
> > of dirent to on-disk file type conversions.
> >
> > Create a common implementation to be used by file systems
> > w
On Tue 23-10-18 23:26:16, Joe Perches wrote:
> On Wed, 2018-10-24 at 08:15 +0200, Michal Hocko wrote:
> > On Wed 24-10-18 10:47:52, Arun KS wrote:
> > > On 2018-10-24 01:34, Kees Cook wrote:
> > [...]
> > > > Thank you -- I was struggling to figure out the best way to reply to
> > > > this. :)
> >
So far the VMX code relied on manually assembled VMX instructions. This
was apparently done to ensure compatibility with old binutils. VMX
instructions were introduced with binutils 2.19 and the kernel currently
requires binutils 2.20.
Remove the manually assembled versions and replace them with t
The code violated the coding style. Fixed by using tabs instead of
spaces. There are only whitespace changes here.
Signed-off-by: Julian Stecklina
Reviewed-by: Jan H. Schönherr
Reviewed-by: Konrad Jan Miller
---
arch/x86/kvm/vmx.c | 22 +++---
1 file changed, 11 insertions(+),
On 24/10/2018 04:48, Andy Tang wrote:
> Hi Daniel,
>
>> -Original Message-
>> From: Daniel Lezcano
>> Sent: 2018年10月16日 19:21
>> To: Andy Tang ; rui.zh...@intel.com
>> Cc: edubez...@gmail.com; linux...@vger.kernel.org;
>> linux-kernel@vger.kernel.org; Rob Herring
>> Subject: Re: [PATCH]
The VM entry/exit path is a giant inline assembly statement. Simplify it
by doing CR2 context switching in plain C. Move CR2 restore behind IBRS
clearing, so we reduce the amount of code we execute with IBRS on.
Signed-off-by: Julian Stecklina
Reviewed-by: Jan H. Schönherr
Reviewed-by: Konrad Ja
Split the security related register clearing out of the large inline
assembly VM entry path. This results in two slightly less complicated
inline assembly statements, where it is clearer what each one does.
Signed-off-by: Julian Stecklina
Reviewed-by: Jan H. Schönherr
Reviewed-by: Konrad Jan Mil
Hi!
> > +
> > + The gradual dimming format of the software pattern values
> > should be:
> > + "brightness_1 duration_1 brightness_2 duration_2 brightness_3
> > + duration_3 ...". For example:
> > +
> > + echo 0 1000 255 2000 > pattern
> > +
> > +
Hi!
> > OK, let's abide by constant update interval for now.
> >
> > Thank you for your work on this patch set throughout
> > all these months. We will have -rc8, so one week of testing
> > before sending upstream should be enough.
> >
> > Patch set applied to the for-next branch of linux-leds.git
On Mon, 22 Oct 2018, ndesaulni...@google.com wrote:
Fixes the warning reported by Clang:
security/keys/trusted.c:146:17: warning: passing an object that
undergoes default
argument promotion to 'va_start' has undefined behavior [-Wvarargs]
va_start(argp, h3);
^
se
On Wed, 2018-10-24 at 10:23 +0200, Michal Hocko wrote:
> On Tue 23-10-18 23:26:16, Joe Perches wrote:
> > On Wed, 2018-10-24 at 08:15 +0200, Michal Hocko wrote:
> > > On Wed 24-10-18 10:47:52, Arun KS wrote:
> > > > On 2018-10-24 01:34, Kees Cook wrote:
> > > [...]
> > > > > Thank you -- I was stru
Quoting Jianxin Pan (2018-10-23 23:29:24)
> On 2018/10/19 1:13, Stephen Boyd wrote:
> > Quoting Jianxin Pan (2018-10-17 22:07:25)
> [...]
> >> diff --git a/drivers/clk/meson/mmc-clkc.c b/drivers/clk/meson/mmc-clkc.c
> >> new file mode 100644
> >> index 000..e3f
> >> --- /dev/null
> >> +++ b
On 10/21/2018 02:20 PM, NeilBrown wrote:
I call on the community to consider what *does* need to be said, about
conduct, to people outside the community and who have recently joined.
What is the document that you would have liked to have read as you were
starting out? It is all too long ago f
On 2018/10/24 16:47, Stephen Boyd wrote:
> Quoting Jianxin Pan (2018-10-23 23:29:24)
>> On 2018/10/19 1:13, Stephen Boyd wrote:
>>> Quoting Jianxin Pan (2018-10-17 22:07:25)
>> [...]
diff --git a/drivers/clk/meson/mmc-clkc.c b/drivers/clk/meson/mmc-clkc.c
new file mode 100644
index 0
Linus,
please pull the latest timers-core-for-linus git tree from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
timers-core-for-linus
The timers and timekeeping departement provides:
- Another large y2038 update with further preparations for providing the
y2038 safe timespe
On Fri 2018-10-19 07:58:12, Tony Lindgren wrote:
> * Dan Murphy [181019 11:42]:
> > On 10/18/2018 05:10 PM, Pavel Machek wrote:
> > >
> > > Now... this is what I've suggested before. If you don't agree, you may
> > > want to contact Tony Lindgren, IIRC he works for TI, too, and might be
> > > wil
On Wed, Oct 24, 2018 at 08:32:49AM +0530, Srikar Dronamraju wrote:
> Load balancer and NUMA balancer are not suppose to work on isolcpus.
>
> Currently when setting sched affinity, there are no checks to see if the
> requested cpumask has CPUs from both isolcpus and housekeeping CPUs.
>
> If user
On Thu, 2018-10-18 at 13:07 +0800, Jianxin Pan wrote:
> From: Yixun Lan
>
> Document the MMC sub clock controller driver, the potential consumer
> of this driver is MMC or NAND. Also add four clock bindings IDs which
> provided by this driver.
>
> Reviewed-by: Rob Herring
> Signed-off-by: Yixun
On Wed, Oct 24, 2018 at 07:35:46AM +, Corentin Labbe wrote:
> This patchset adds a new set of functions which are open-coded in lot of
> place.
> Basicly the pattern is always the same, "read, modify a bit, write"
> some driver and the powerpc arch already have thoses pattern them as
> functio
On Thu, 2018-10-18 at 13:07 +0800, Jianxin Pan wrote:
> From: Yixun Lan
>
> Export the emmc sub clock phase delay ops which will be used
> by the emmc sub clock driver itself.
>
> Signed-off-by: Yixun Lan
> Signed-off-by: Jianxin Pan
> ---
> drivers/clk/meson/Makefile | 2 +-
> driv
On Tue, 23 Oct 2018, Winkler, Tomas wrote:
To the out label we jump after we are done with locality and cmd
read() before we jump to locality 'locality'. We will need to add
another variable to check If cmd_ready() was called or not in order to
get rid of the extran label, it's not internall
>
> On Tue, 23 Oct 2018, Winkler, Tomas wrote:
> > To the out label we jump after we are done with locality and cmd
> > read() before we jump to locality 'locality'. We will need to add
> > another variable to check If cmd_ready() was called or not in order to
> > get rid of the extran label,
On Fri, 2018-10-19 at 11:03 -0700, Stephen Boyd wrote:
> Quoting Jianxin Pan (2018-10-19 09:12:53)
> > On 2018/10/19 1:13, Stephen Boyd wrote:
> > > Quoting Jianxin Pan (2018-10-17 22:07:25)
> > > > diff --git a/drivers/clk/meson/clk-regmap.c
> > > > b/drivers/clk/meson/clk-regmap.c
> > > > index
Linus,
please pull the latest irq-core-for-linus git tree from:
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq-core-for-linus
The interrupt brigade came up with the following updates:
- Driver for the Marvell System Error Interrupt machinery
- Overhaul of the GIC-V3 ITS d
On Thu, 2018-10-18 at 13:07 +0800, Jianxin Pan wrote:
> From: Yixun Lan
>
> The patch will add a MMC clock controller driver which used by MMC or NAND,
> It provide a mux and divider clock, and three phase clocks - core, tx, tx.
>
> Two clocks are provided as the parent of MMC clock controller f
By default, when ACPI tables and FDT coexist for ARM64,
current kernel takes precedence over FDT to get device information.
This patch increases the way to get information through FDT.
Signed-off-by: Peng Hao
---
drivers/misc/pvpanic.c | 69 +-
1 f
Signed-off-by: Peng Hao
---
.../devicetree/bindings/arm/pvpanic-mmio.txt | 29 ++
1 file changed, 29 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/pvpanic-mmio.txt
diff --git a/Documentation/devicetree/bindings/arm/pvpanic-mmio.txt
b/Documenta
On some architectures (e.g. arm64), it's preferable to use MMIO, since
this can be used standalone. Add MMIO support to the pvpanic driver.
Signed-off-by: Peng Hao
---
drivers/misc/pvpanic.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/misc/pvpa
move pvpanic.c from drivers/platform/x86 to drivers/misc.
following patches will use pvpanic device in arm64.
Signed-off-by: Peng Hao
---
drivers/misc/Kconfig | 7 +++
drivers/misc/Makefile | 1 +
drivers/misc/pvpanic.c | 124 +++
Hi!
> The LM3697 is a single function LED driver. The single function LED
> driver needs to reside in the LED directory as a dedicated LED driver
> and not as a MFD device. The device does have common brightness and ramp
So it is single function LED driver. That does not mean it can not
share bi
Hi Pavan,
On Wed, 24 Oct 2018 at 06:53, Pavan Kondeti wrote:
>
> Hi Vincent,
>
> Thanks for the detailed explanation.
>
> On Tue, Oct 23, 2018 at 02:15:08PM +0200, Vincent Guittot wrote:
> > Hi Pavan,
> >
> > On Tue, 23 Oct 2018 at 07:59, Pavan Kondeti wrote:
> > >
> > > Hi Vincent,
> > >
> > >
Hi Amir,
Thanks so much for this idea.
On Fri, Sep 28, 2018 at 08:39:15PM +0300, Amir Goldstein wrote:
> On Fri, Sep 28, 2018 at 5:55 PM Dmitry Vyukov wrote:
> >
> > On Fri, Sep 28, 2018 at 4:45 PM, syzbot
> > wrote:
> > > Hello,
> > >
> > > syzbot found the following crash on:
> > >
> > > HEAD
On Tue 2018-10-23 12:06:17, Dan Murphy wrote:
> From: Pavel Machek
>
> This adds backlight support for the following TI LMU
> chips: LM3532, LM3631, LM3632, LM3633, LM3695 and LM3697.
>
> It controls LEDs on Droid 4
> smartphone, including keyboard and screen backlights.
>
> Signed-off-by: Milo
On Wed, Oct 24, 2018 at 11:21 AM Phillip Potter wrote:
>
> On Wed, Oct 24, 2018 at 09:16:20AM +0300, Amir Goldstein wrote:
> > On Tue, Oct 23, 2018 at 11:19 PM Phillip Potter
> > wrote:
> > >
> > > Many file systems use a copy&paste implementation
> > > of dirent to on-disk file type conversions
Hello all,
i know GCC 9 is currently in deployment progress. But i tried to build a
kernel 4.19RC8 with gcc 9 and i got the following error message:
Kernel: arch/x86/boot/bzImage is ready (#1)
ERROR: "__popcountdi2"
[drivers/net/wireless/broadcom/brcm80211/brcmfmac/brcmfmac.ko] undefined!
ERROR
On Tue 2018-10-23 12:06:21, Dan Murphy wrote:
> The LM3633 is a single function LED driver. The single function LED
> driver needs to reside in the LED directory as a dedicated LED driver
> and not as a MFD device. The device does have common brightness and ramp
> features and those can be accomod
On Wed, Oct 24, 2018 at 12:20:14PM +0300, Amir Goldstein wrote:
> On Wed, Oct 24, 2018 at 11:21 AM Phillip Potter wrote:
> > Dear Amir,
> >
> > Yes, I applied each patch manually to my tree, fixed it up where needed,
> > then after rebuilding and testing each one I committed it and regenerated
> >
This commit fixes incorrect property because it was different
from the actual.
The parameters of '#address-cells' and '#size-cells' were removed,
and 'interrupts', 'pinctrl-names' and 'pinctrl-0' were added.
Fixes: 4dcd5c2781f3 ("spi: add DT bindings for UniPhier SPI controller")
Signed-off-by: Ke
> > diff --git a/fs/lockd/host.c b/fs/lockd/host.c
> > index d35cd6be0675..93fb7cf0b92b 100644
> > --- a/fs/lockd/host.c
> > +++ b/fs/lockd/host.c
> > @@ -341,7 +341,7 @@ struct nlm_host *nlmsvc_lookup_host(const struct
> > svc_rqst *rqstp,
> > };
> > struct lockd_net *ln = net_gene
On 16/10/2018 16:33, Bartlomiej Zolnierkiewicz wrote:
> 'default n' is the default value for any bool or tristate Kconfig
> setting so there is no need to write it explicitly.
>
> Also since commit f467c5640c29 ("kconfig: only write '# CONFIG_FOO
> is not set' for visible symbols") the Kconfig beh
Hi Pavel,
On Wed, Oct 24, 2018 at 02:51:17PM +0800, Pavel Machek wrote:
> On Wed 2018-10-24 11:40:07, Nickhu wrote:
> > There are three sleep states in nds32:
> > suspend to idle,
> > suspend to standby,
> > suspend to ram
> >
> > In suspend to ram, we use the 'standby' instruction to
On Wed, Oct 24, 2018 at 12:31 PM Phillip Potter wrote:
>
> On Wed, Oct 24, 2018 at 12:20:14PM +0300, Amir Goldstein wrote:
> > On Wed, Oct 24, 2018 at 11:21 AM Phillip Potter
> > wrote:
> > > Dear Amir,
> > >
> > > Yes, I applied each patch manually to my tree, fixed it up where needed,
> > > th
Hi!
> > Can we get rid of "is_bit_1" array here, and use normal bit operations
> > on another variable here?
> >
> Do you mean like this:
>
> static int nointc_set_wake(struct irq_data *data, unsigned int on) {
> unsigned long int_mask = __nds32__mfsr(NDS32_SR_INT_MASK);
> stati
* Mel Gorman [2018-10-24 09:56:36]:
> On Wed, Oct 24, 2018 at 08:32:49AM +0530, Srikar Dronamraju wrote:
> It would certainly be a bit odd because the
> application is asking for some protection but no guarantees are given
> and the application is not made aware via an error code that there is a
On Sunday, October 21, 2018 4:39:07 PM CEST Peter Korsgaard wrote:
> On Mon, Jun 25, 2018 at 6:14 PM Federico Vaga wrote:
> > This driver assumes that an interrupt line is always available for
> > the I2C master. This is not always the case and this patch adds support
> > for a polling version bas
Hi Anatolij, Andreas,
On Tue, Oct 23, 2018 at 06:46:47PM +, Andreas Puhm wrote:
> Hi Anatolij,
>
> > The CvP docs says that on some FPGAs (e.g. Arria 10) the assertion of CVP
> > status can take up to 500ms. However it is not clear whether this delay
> > might be required after peripheral ima
On Wed, Oct 24, 2018 at 12:44:50PM +0300, Amir Goldstein wrote:
> On Wed, Oct 24, 2018 at 12:31 PM Phillip Potter wrote:
> >
> > On Wed, Oct 24, 2018 at 12:20:14PM +0300, Amir Goldstein wrote:
> > > On Wed, Oct 24, 2018 at 11:21 AM Phillip Potter
> > > wrote:
> > > > Dear Amir,
> > > >
> > > > Y
On Mon, Oct 22, 2018 at 04:34:55PM -0700, Rajat Jain wrote:
> On Fri, Oct 19, 2018 at 2:13 AM Andy Shevchenko
> wrote:
> > On Fri, Oct 19, 2018 at 12:53 AM Rajat Jain wrote:
> > > across other users of this API (other MMC host controller drivers).
> >
> > > if (slot->cd_idx >= 0) {
> > >
On Wed, Oct 24, 2018 at 08:32:49AM +0530, Srikar Dronamraju wrote:
> Load balancer and NUMA balancer are not suppose to work on isolcpus.
>
> Currently when setting sched affinity, there are no checks to see if the
> requested cpumask has CPUs from both isolcpus and housekeeping CPUs.
>
> If user
On Wed, Oct 24, 2018 at 12:56 PM Phillip Potter wrote:
>
> On Wed, Oct 24, 2018 at 12:44:50PM +0300, Amir Goldstein wrote:
...
> > Well, I did request to change some content (the location and the comment
> > above BUILD_BUG_ON section) which is relevant for several patches.
> > However, so far aff
Sometimes we want to print a whole line without being disturbed by
concurrent printk() from interrupts and/or other threads, for printk()
which does not end with '\n' can be disturbed.
Since mixed printk() output makes it hard to interpret, this patch
introduces API for line-buffered printk() outp
Luwei Kang writes:
> +static void pt_guest_enter(struct vcpu_vmx *vmx)
> +{
> + if (pt_mode == PT_MODE_SYSTEM)
> + return;
> +
> + /* Save host state before VM entry */
> + rdmsrl(MSR_IA32_RTIT_CTL, vmx->pt_desc.host.ctl);
> +
> + /*
> + * Set guest state of MSR_I
On Tue, Oct 23, 2018 at 12:23:13PM -0700, Joe Perches wrote:
> On Tue, 2018-10-23 at 20:50 +0200, Jacek Anaszewski wrote:
> > > diff --git a/drivers/leds/leds-upboard.c b/drivers/leds/leds-upboard.c
> > > new file mode 100644
> > > index 000..34a6973
> > > --- /dev/null
> > > +++ b/drivers/leds
This commit is power management porting for nds32.
Changes in V2:
1. Fix the my complete name "Nickhu" to "Nick Hu".
2. Fix missing space in 'arch/nds32/kernel/sleep.S'.
3. Use normal bit operations to replace the array
'is_bit_1' in 'drivers/irqchip/irq-ativic32.c'.
Nic
There are three sleep states in nds32:
suspend to idle,
suspend to standby,
suspend to ram
In suspend to ram, we use the 'standby' instruction to emulate
power management device to hang the system util wakeup source
send wakeup events to break the loop.
First, we push the
On Wed, Oct 24, 2018 at 03:16:46PM +0530, Srikar Dronamraju wrote:
> * Mel Gorman [2018-10-24 09:56:36]:
>
> > On Wed, Oct 24, 2018 at 08:32:49AM +0530, Srikar Dronamraju wrote:
> > It would certainly be a bit odd because the
> > application is asking for some protection but no guarantees are giv
On 21/10/2018 19:36, Dmitry Osipenko wrote:
> This fixes splats like the one below if CONFIG_DEBUG_ATOMIC_SLEEP=y
> and machine (Tegra30) booted with SMP=n or all secondary CPU's are put
> offline. Locking isn't needed because it protects atomic operation.
>
> # echo 0 | tee /sys/devices/system/
On Wed, 2018-10-24 at 13:13 +0300, Andy Shevchenko wrote:
> On Tue, Oct 23, 2018 at 12:23:13PM -0700, Joe Perches wrote:
> > Until such a time when either a local preferred style
> > document or a treewide preferred style exists, please
> > stop asking people to modify #include ordering for
> > var
Remove reg property from fixed regulator as upstream has no longer
needed this property.
Signed-off-by: Joakim Zhang
---
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi | 53 ++--
1 file changed, 22 insertions(+), 31 deletions(-)
diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dts
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