On Sun, Sep 23, 2018 at 7:54 PM Paul E. McKenney wrote:
>
> On Sun, Sep 23, 2018 at 07:30:30PM -0400, Joel Fernandes wrote:
> > Hi Paul,
> >
> > I was parsing the Data-Structures document and had a question about
> > the following "Important note" text.
> >
> > Could it be clarified in the below t
Hi Greg,
Today's linux-next merge of the staging tree got a conflict in:
Documentation/filesystems/00-INDEX
between commit:
a7ddcea58ae2 ("Drop all 00-INDEX files from Documentation/")
from the jc_docs tree and commit:
a779df303b05 ("Documentation: filesystems: remove reminiscences of P
Dear Well Wishers,
Greetings to all of you and we Thank you, who have work with my late brother
before in various capacities during his term as the UN Sec General and after,
once again on behalf of the entire family of Late Kofi Annan, we thank you all
for all the support and comfort you show to
Hi Eric,
Today's linux-next merge of the userns tree got a conflict in:
arch/x86/kernel/traps.c
between commits:
76dee4a72849 ("x86/kprobes: Inline kprobe_exceptions_notify() into
do_general_protection()")
81fd9c18444e ("x86/fault: Plumb error code and fault address through to fault
han
Rob Herring writes:
> On Thu, Sep 20, 2018 at 4:18 AM Stephen Rothwell
> wrote:
>> On Thu, 20 Sep 2018 21:10:08 +1000 Stephen Rothwell
>> wrote:
>> > On Thu, 20 Sep 2018 20:37:37 +1000 Michael Ellerman
>> > wrote:
>> > > Oodles of:
>> > >
>> > > # < make -s -j 48 ARCH=arm64
>> > > O=/kiss
On 9/23/2018 2:24 PM, Stefan Metzmacher wrote:
Hi Tom,
I just tested that setting:
mr->iova &= (PAGE_SIZE - 1);
mr->iova |= 0x;
after the ib_map_mr_sg() and before doing the IB_WR_REG_MR, seems to
work.
Good! As you know, we were concerned about it after seeing that
the ib_d
> They're basically the same concept, it's a subtle difference.
>
> FRMR = Fast Register Memory Region
> FRWR = Fast Register Work Request
>
> The memory region is the mr itself, this is created early on.
>
> The work request is built when actually binding the physical
> pages to the region, and
The macro CLOCKSOURCE_OF_DECLARE was renamed more TIMER_OF_DECLARE, and we
kept an alias CLOCKSOURCE_OF_DECLARE in order to smooth the transition for
drivers.
This change was done 1.5 year ago, we can reasonably remove this backward
compatible macro as it is no longer used anywhere.
Signed-off-by
Some drivers need to find the device on a bus having a specific firmware
node. Currently, such drivers have their own implementations to do this.
Provide a helper similar to bus_find_device_by_name so that each driver
does not have to reinvent this.
Signed-off-by: Silesh C V
---
drivers/base/bus
Hi all,
Today's linux-next merge of the akpm-current tree got a conflict in:
arch/arm64/Kconfig
between commit:
8a695a587333 ("arm64: Kconfig: Remove ARCH_HAS_HOLES_MEMORYMODEL")
from the arm64 tree and commit:
e1405baa7db1 ("arm: arm64: introduce CONFIG_HAVE_MEMBLOCK_PFN_VALID")
from
While sending patches around, Joachim Eastwood was Cc'ed but I got an error
its mailbox was full and the mail can not be delivered which makes me think
there is no body at the other end of the line.
After doing some statistics, it appears the latest commit as author/commiter
is:
commit b16ebc017e
On Mon, Sep 24, 2018 at 12:50:16PM +1000, Stephen Rothwell wrote:
> Hi Greg,
>
> Today's linux-next merge of the staging tree got a conflict in:
>
> Documentation/filesystems/00-INDEX
>
> between commit:
>
> a7ddcea58ae2 ("Drop all 00-INDEX files from Documentation/")
>
> from the jc_docs
On Mon, Sep 24, 2018 at 10:05:55AM +0530, Silesh C V wrote:
> Some drivers need to find the device on a bus having a specific firmware
> node. Currently, such drivers have their own implementations to do this.
> Provide a helper similar to bus_find_device_by_name so that each driver
> does not have
Hi all,
Changes since 20180921:
Dropped trees: xarray, ida (temporarily)
The bpf-next tree gained a conflict against Linus' tree.
The staging tree gained a conflict against the jc_docs tree.
The userns tree gained conflicts against the tip tree.
The akpm-current tree gained a conflict against
Thomas, Ingo,
This pull request for clockevents / clocksource contains two fixes and
is based on tip/timers/urgent:
- Add the CLOCK_SOURCE_SUSPEND_NONSTOP for non-am43 SoCs (Keerthy)
- Fix set_next_event handler for the fttmr010 (Tao Ren)
Thanks !
-- Daniel
The following changes since
From: Tao Ren
Currently, the aspeed MATCH1 register is updated to in set_next_event handler, with the assumption that COUNT
register value is preserved when the timer is disabled and it continues
decrementing after the timer is enabled. But the assumption is wrong:
RELOAD register is loaded into
From: Keerthy
The 32k clocksource is NONSTOP for non-am43 SoCs. Hence
add the flag for all the other SoCs.
Reported-by: Tony Lindgren
Signed-off-by: Keerthy
Acked-by: Tony Lindgren
Signed-off-by: Daniel Lezcano
---
drivers/clocksource/timer-ti-32k.c | 3 +++
1 file changed, 3 insertions(+)
On Sun, 23 Sep 2018, Rob Prowel wrote:
> On 09/23/18 17:19, Thomas Gleixner wrote:
> > It's in the 4.18.8 stable kernel, which should be available from your
> > fedora repo anytime soon.
> >
> Will check with the newer kernel when it's available but please do double
> check if this problem might e
On 22.09.2018 13:31, Jonathan Cameron wrote:
On Thu, 20 Sep 2018 15:40:37 +0300
Eugen Hristev wrote:
When doing simple conversions, the driver did not acknowledge the DRDY irq.
If this irq is not acked, it will be left pending, and as soon as a trigger
is enabled, the irq handler will be ca
On Mon, Sep 24, 2018 at 06:15:17AM +0200, Daniel Lezcano wrote:
> In order to make some housekeeping in the directory, this patch renames
> drivers to the timer-* format in order to unify their names.
>
> There is no functional changes.
>
> Signed-off-by: Daniel Lezcano
> ---
> MAINTAINERS
On 24/09/2018 08:28, Uwe Kleine-König wrote:
> On Mon, Sep 24, 2018 at 06:15:17AM +0200, Daniel Lezcano wrote:
>> In order to make some housekeeping in the directory, this patch renames
>> drivers to the timer-* format in order to unify their names.
>>
>> There is no functional changes.
>>
>> Signe
Lars,
Am Sonntag, 23. September 2018, 15:49:42 CEST schrieb Lars Persson:
> Hi Richard
>
> Sorry, I assumed this omission from -stable was a mistake.
>
> The timing for our boot increased from 45 seconds to 55 seconds on one
> chip and 42 seconds to 48 seconds on another chip. The regression was
Hello Greg,
On Mon, Sep 24, 2018 at 10:48 AM Greg Kroah-Hartman
wrote:
>
> On Mon, Sep 24, 2018 at 10:05:55AM +0530, Silesh C V wrote:
> > Some drivers need to find the device on a bus having a specific firmware
> > node. Currently, such drivers have their own implementations to do this.
> > Provi
Hi Abel,
On Fri, Sep 21, 2018 at 03:11:33PM +0300, Abel Vesa wrote:
> Since a lot of clocks on imx8 are formed by a mux, gate, predivider and
> divider, the idea here is to combine all of those into one composite clock,
> but we need to deal with both predivider and divider at the same time and
>
Thanks Sibi for reviewing.
On 9/22/2018 1:11 AM, Sibi Sankar wrote:
Hi Rohit,
On 2018-09-03 17:22, Rohit kumar wrote:
This adds Non PAS ADSP PIL driver for Qualcomm
Technologies Inc SoCs.
Added initial support for SDM845 with ADSP bootup and
shutdown operation handled from Application Process
Christian Brauner wrote:
> Ok, understood. What about passing the different attrs as a struct?
>
> struct mount_attr {
> unsigned int attr_cmd,
> unsigned int attr_values,
> unsigned int attr_mask,
>
> };
>
> mount_setattr(int dfd, const char *path, unsigned int atflags
Hello,
syzbot found the following crash on:
HEAD commit:474ff2600889 net-ethtool: ETHTOOL_GUFO did not and should ..
git tree: net
console output: https://syzkaller.appspot.com/x/log.txt?x=164c405940
kernel config: https://syzkaller.appspot.com/x/.config?x=5fa12be50bca08d8
dashboa
Remove including that don't need it.
Signed-off-by: YueHaibing
---
arch/x86/hyperv/hv_apic.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/x86/hyperv/hv_apic.c b/arch/x86/hyperv/hv_apic.c
index 2c43e30..8eb6fbee 100644
--- a/arch/x86/hyperv/hv_apic.c
+++ b/arch/x86/hyperv/hv_apic.c
@@
On Sun, Sep 23, 2018 at 3:00 AM Miguel Ojeda
wrote:
>
> Hi Diego,
>
> A few things, since it looks like this is your first patch.
git log...
> On Sat, Sep 22, 2018 at 5:56 PM, Diego Viola wrote:
> > On Wed, Sep 12, 2018 at 12:54 AM Diego Viola wrote:
> >>
> >> Signed-off-by: Diego Viola
> >>
From: Colin Ian King
Trivial fix to spelling mistake in RT_TRACE message
Signed-off-by: Colin Ian King
---
drivers/staging/rtl8188eu/core/rtw_mlme.c | 2 +-
drivers/staging/rtl8723bs/core/rtw_mlme.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/rtl8188e
Add x86 architecture support for a new processor: Hygon Dhyana Family
18h. Carve out initialization code needed by Dhyana into a separate
compilation unit.
To identify Hygon Dhyana CPU, add a new vendor type X86_VENDOR_HYGON
for system recognition.
Since Dhyana uses AMD functionality to a large d
The Hygon Dhyana CPU has a special magic MSR way to force WB for
memory >4GB, and support TOP_MEM2. Therefore, it is necessary to
add Hygon Dhyana support in amd_special_default_mtrr().
The number of variable MTRRs for Hygon is 2 as AMD's.
Signed-off-by: Pu Wen
Reviewed-by: Borislav Petkov
---
The Hygon Dhyana CPU has topology extensions bit in CPUID. With this
bit, the kernel can get the cache information. So add support in
cpuid4_cache_lookup_regs() to get the correct cache size.
The Hygon Dhyana CPU also discovers num_cache_leaves via CPUID leaf
0x801d, so add support to it in fi
The Hygon Dhyana CPU uses no delay in smp_quirk_init_udelay(),
and returns in mwait_play_dead() as AMD does.
Signed-off-by: Pu Wen
Reviewed-by: Borislav Petkov
---
arch/x86/kernel/smpboot.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/smpboot.c b/arch/x
On Tue, Sep 18, 2018 at 01:27:11PM +0200, Greg Kroah-Hartman wrote:
> On Sat, Sep 15, 2018 at 06:47:51PM +0530, Nishad Kamdar wrote:
> > This patch removes do {} while (0) loop for single statement macros.
> > Issue found by checkpatch.
> >
> > Signed-off-by: Nishad Kamdar
> > ---
> > drivers/st
As Hygon registered its PCI Vendor ID as a new one 0x1d94, and there
are PCI Devices 0x1450/0x1463/0x1464 for Host bridge on Hygon Dhyana
platform, so add Hygon Dhyana support to the PCI and north bridge
subsystem by using the code path of AMD family 17h.
To prevent further checking PCI device ids
The ideal_nops for Hygon Dhyana CPU should be p6_nops.
Signed-off-by: Pu Wen
Reviewed-by: Borislav Petkov
---
arch/x86/kernel/alternative.c | 4
1 file changed, 4 insertions(+)
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index b9d5e7c..184e9a0 100644
--- a/a
Hello Stephen,
On 8/24/2018 12:08 AM, Stephen Boyd wrote:
Quoting Taniya Das (2018-08-08 03:15:26)
On 8/8/2018 11:52 AM, Stephen Boyd wrote:
Binding describes hardware controllable by the OS. That's the reality.
Let's not add mandatory clock bindings for clocks that the OS can't do
anythin
Add Hygon Dhyana support to the APIC subsystem as it uses modern APIC.
When running on 32 bit mode, bigsmp should be enabled if there are
more than 8 cores online.
Signed-off-by: Pu Wen
Reviewed-by: Borislav Petkov
---
arch/x86/kernel/apic/apic.c | 7 +++
arch/x86/kernel/apic/probe_32.c
The PMU architecture for Hygon Dhyana CPU is similar to the AMD Family
17h one. To support Hygon Dhyana PMU, call amd_pmu_init() to share
AMD PMU initialization flow, and change the PMU name to "HYGON".
The Hygon Dhyana CPU supports both legacy and extension PMC MSRs(perf
counter registers and eve
The Hygon Dhyana CPU has the same speculative execution as AMD family
17h, so share AMD spectre mitigation code for Hygon Dhyana.
Also Hygon Dhyana is not affected by meltdown vulnerability, so add
exception for it.
Signed-off-by: Pu Wen
---
arch/x86/kernel/cpu/bugs.c | 4 +++-
arch/x86/kerne
The machine check architecture for Hygon Dhyana CPU is similar to the
AMD family 17h one. To make MCE working on Hygon platform, add vendor
checking for Hygon Dhyana to share the code path of AMD family 17h.
Signed-off-by: Pu Wen
Reviewed-by: Borislav Petkov
---
arch/x86/include/asm/mce.h
The Hygon Dhyana CPU has the SVM feature as AMD family 17h does.
So enable the KVM infrastructure support to it.
Signed-off-by: Pu Wen
Reviewed-by: Borislav Petkov
---
arch/x86/include/asm/kvm_emulate.h | 4
arch/x86/include/asm/virtext.h | 5 +++--
arch/x86/kvm/emulate.c
The Hygon Dhyana CPU has NONSTOP TSC feature, so enable the ACPI
driver support to it.
Signed-off-by: Pu Wen
Acked-by: Rafael J. Wysocki
---
drivers/acpi/acpi_pad.c | 1 +
drivers/acpi/processor_idle.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/acpi/acpi_pad.c b/drivers
Tool cpupower is useful to get CPU frequency information and monitor
power stats on Hygon Dhyana platform. So add Hygon Dhyana support to
it by checking vendor and family to share the code path of AMD family
17h.
Signed-off-by: Pu Wen
---
tools/power/cpupower/utils/cpufreq-info.c |
This patch fixes a few single statement macros in sd.c.
It converts two macros to inline functions. It removes
five other macros and replaces their usages with calls to
the function being called in the macro definition.
Issue found by checkpatch.
Signed-off-by: Nishad Kamdar
---
Changes in v2:
To make AMD64 EDAC and MCE drivers working on Hygon platform, add
support for Hygon Dhyana CPU by using the code path of AMD family
17h.
Signed-off-by: Pu Wen
---
drivers/edac/amd64_edac.c | 8 +++-
drivers/edac/mce_amd.c| 4 +++-
2 files changed, 10 insertions(+), 2 deletions(-)
diff -
The Hygon Dhyana CPU supports ACPI P-States feature, and there is
SMBus device(PCI device ID 0x790b) on Hygon platform, so add Hygon
Dhyana support to the cpufreq driver by using the code path of AMD
family 17h.
Signed-off-by: Pu Wen
Acked-by: Rafael J. Wysocki
---
drivers/cpufreq/acpi-cpufreq.
Hello Matthias,
Thanks for your review comments.
On 8/29/2018 11:31 PM, Matthias Kaehlcke wrote:
Hi Taniya,
On Tue, Jul 24, 2018 at 04:12:50PM +0530, Taniya Das wrote:
The CPUfreq HW present in some QCOM chipsets offloads the steps necessary
for changing the frequency of CPUs. The driver impl
Hi Amit,
On 9/9/2018 8:04 PM, Amit Kucheria wrote:
Hi Taniya,
How much have you stressed this driver?
I tried it on top of an integration branch based on 4.19-rc2 that we
maintain[1] and was able to get the board to reboot fairly easily with
just a few "yes > /dev/null &" instances running in
On Sat, 22 Sep 2018 18:09:09 +0100,
Lina Iyer wrote:
>
> On Sat, Sep 22 2018 at 10:29 -0600, Marc Zyngier wrote:
> > Hi Lina,
> >
> > On Tue, 04 Sep 2018 22:18:08 +0100,
> > Lina Iyer wrote:
> >>
> >> During suspend the system may power down some of the system rails. As a
> >> result, the TLMM
On 9/11/2018 1:00 AM, Matthias Kaehlcke wrote:
On Tue, Jul 24, 2018 at 04:12:50PM +0530, Taniya Das wrote:
The CPUfreq HW present in some QCOM chipsets offloads the steps necessary
for changing the frequency of CPUs. The driver implements the cpufreq
driver interface for this hardware engine.
On 2018/9/20 17:39, Thomas Gleixner wrote:
I reproduced the PANIC by running lkp-tests with a Intel machine.
The reason is that the function early_is_amd_nb is called even if
running on Intel machine. At this case the misc_ids is NULL so the
PANIC occur.
I'll rework a patch to solve this proble
[v8]
* Address comments to update code to take cpufreq_hw phandle and index from
the CPU nodes.
* Updated the Documentation for the above change in DT.
* Updated logic for assigning 'qcom_freq_domain_map' for related CPUs.
* Clock input to the HW block is taken from DT which has b
The CPUfreq HW present in some QCOM chipsets offloads the steps necessary
for changing the frequency of CPUs. The driver implements the cpufreq
driver interface for this hardware engine.
Signed-off-by: Saravana Kannan
Signed-off-by: Taniya Das
---
drivers/cpufreq/Kconfig.arm | 11 ++
dri
Add QCOM cpufreq firmware device bindings for Qualcomm Technology Inc's
SoCs. This is required for managing the cpu frequency transitions which are
controlled by the hardware engine.
Signed-off-by: Taniya Das
---
.../bindings/cpufreq/cpufreq-qcom-hw.txt | 169 +
1 f
2018-09-22 4:11 GMT-04:00 Boris Brezillon :
> On Sat, 22 Sep 2018 09:41:11 +0200
> Miquel Raynal wrote:
>
>> Hi Masahiro,
>>
>> Masahiro Yamada wrote on Sat, 8 Sep
>> 2018 01:10:25 +0900:
>>
>> > Hi Boris,
>> >
>> > 2018-09-07 23:53 GMT+09:00 Boris Brezillon :
>> > > On Fri, 7 Sep 2018 23:42:53 +
Please i need your assistance my dear,
I am Col. Hussein Harmush, An Army officer from Syria but now living
with the United Nations on asylum. I want to seek your assistance in
the following ways:
1. To assist me look for a profitable business opportunity in your
country where I can invest to su
Hi Song,
I love your patch! Perhaps something to improve:
url:
https://github.com/0day-ci/linux/commits/Song-Qiang/iio-magnetometer-Add-support-for-PNI-RM3100-9-axis-magnetometer/20180920-215124
base: https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio.git togreg
smatch warnings:
dri
On Sun, Sep 23, 2018 at 05:35:13PM +0800, Pu Wen wrote:
> As Hygon registered its PCI Vendor ID as a new one 0x1d94, and there
> are PCI Devices 0x1450/0x1463/0x1464 for Host bridge on Hygon Dhyana
> platform, so add Hygon Dhyana support to the PCI and north bridge
> subsystem by using the code pat
Some users want to introduce device tree support to the mockup driver.
Let's make it easier by switching to using generic device properties.
The driver stays compatible with previous use cases and after this
conversion there'll be no need to change the way probing of mockup
GPIO chips works.
Teste
Hi Richard,
On Sun, Sep 23, 2018 at 10:59 AM, Richard Weinberger
wrote:
> On Sun, Sep 23, 2018 at 3:00 AM Miguel Ojeda
> wrote:
>>
>> Hi Diego,
>>
>> A few things, since it looks like this is your first patch.
>
> git log...
Oops! I guess I mistyped the search string, sorry Diego!
Cheers,
Migu
Hi Christophe,
wrote on Mon, 17 Sep 2018 17:47:39 +0200:
> From: Christophe Kerello
>
> The driver adds the support for the STMicroelectronics FMC2 NAND
> Controller found on STM32MP SOCs.
>
> This patch is based on FMC2 command sequencer.
> The purpose of the command sequencer is to facilita
Hi Janusz,
Janusz Krzysztofik wrote on Thu, 20 Sep 2018
00:17:29 +0200:
> Now as Amstrad Delta board - the only user of this driver - provides
> GPIO lookup tables, switch from GPIO numbers to GPIO descriptors and
> use the table to locate required GPIO pins.
>
> Declare static variables for st
Hi Janusz,
Janusz Krzysztofik wrote on Thu, 20 Sep 2018
00:52:52 +0200:
> This series consist of possibly ready to apply patches extracted from
> a former one titled "mtd: rawnand: ams-delta: Use GPIO API for data I/O".
> Remaining patches implementing conversion of data I/O to GPIO have been
>
Hi Nathan,
Nathan Chancellor wrote on Thu, 20 Sep 2018
16:30:25 -0700:
> Clang warns when one enumerated type is converted implicitly to another:
>
> drivers/mtd/nand/raw/sh_flctl.c:483:46: warning: implicit conversion
> from enumeration type 'enum dma_transfer_direction' to different
> enumera
Hi Masahiro,
Masahiro Yamada wrote on Sun, 23 Sep
2018 06:38:40 -0400:
> 2018-09-22 4:11 GMT-04:00 Boris Brezillon :
> > On Sat, 22 Sep 2018 09:41:11 +0200
> > Miquel Raynal wrote:
> >
> >> Hi Masahiro,
> >>
> >> Masahiro Yamada wrote on Sat, 8 Sep
> >> 2018 01:10:25 +0900:
> >>
> >> > Hi
'cnt' should be used to calculate ring buffer size rather than data->cnt
Signed-off-by: YueHaibing
---
kernel/trace/ring_buffer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/trace/ring_buffer.c b/kernel/trace/ring_buffer.c
index 65bd461..53538c3 100644
--- a/kernel
On 09/22/2018 09:44 PM, Pavel Machek wrote:
> On Sat 2018-09-22 00:18:13, Pavel Machek wrote:
>> On Sat 2018-09-22 00:11:29, Jacek Anaszewski wrote:
>>> On 09/21/2018 11:17 PM, Pavel Machek wrote:
On Fri 2018-09-21 22:59:40, Jacek Anaszewski wrote:
> Hi Baolin,
>
> On 09/21/2018 05
On Sun, Jul 1, 2018 at 6:27 PM Greg Kroah-Hartman
wrote:
>
> 4.9-stable review patch. If anyone has any objections, please let me know.
>
> --
>
> From: Richard Weinberger
>
> commit 781932375ffc6411713ee0926ccae8596ed0261c upstream.
>
> Fastmap cannot track the LEB unmap operati
On 2018/9/23 19:10, Borislav Petkov wrote:
Signed-off-by: Pu Wen
Acked-by: Bjorn Helgaas # pci_ids.h
Reviewed-by: Borislav Petkov
A note for your future submissions: if you rework a patch in a
non-trivial way, you *must* drop Reviewed-by/Acked-by tags because they
are not valid anymore.
Lars,
Am Sonntag, 23. September 2018, 14:49:23 CEST schrieb Lars Persson:
> On Sun, Jul 1, 2018 at 6:27 PM Greg Kroah-Hartman
> wrote:
> >
> > 4.9-stable review patch. If anyone has any objections, please let me know.
> >
> > --
> >
> > From: Richard Weinberger
> >
> > commit 78
On Mon, Sep 17, 2018 at 7:40 PM Christoph Hellwig wrote:
>
> On Wed, Sep 12, 2018 at 09:47:55AM -0700, Atish Patra wrote:
> > The extra hart information will not be parsed by lscpu which will make the
> > cpu information inconsistent between lscpu & /proc/cpuinfo.
> >
> > Should we patch lscpu as
Hi Li,
On Thu, Sep 20, 2018 at 11:56:56AM -0500, Li Yang wrote:
> Hi arm-soc maintainers,
>
> Please merge the following fixes for soc/fsl drivers.
>
> Regards,
> Leo
>
> The following changes since commit 5b394b2ddf0347bef56e50c69a58773c94343ff3:
>
> Linux 4.19-rc1 (2018-08-26 14:11:59 -070
On Thu, Sep 20, 2018 at 12:06:34PM -0500, Li Yang wrote:
> Hi arm-soc maintainers,
>
> Please merge the following updates for soc/fsl drivers.
>
> Regards,
> Leo
>
> The following changes since commit 5b394b2ddf0347bef56e50c69a58773c94343ff3:
>
> Linux 4.19-rc1 (2018-08-26 14:11:59 -0700)
>
On Wed, Sep 19, 2018 at 08:58:02AM +0200, Antoine Tenart wrote:
> Free Electrons became Bootlin. Update my email accordingly.
>
> Signed-off-by: Antoine Tenart
> ---
> MAINTAINERS | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied, thanks.
-Olof
This patch fixes the checkpatch.pl error:
ERROR: space required after that ','
in the interface/vchi directory
Signed-off-by: Aymen Qader
---
drivers/staging/vc04_services/interface/vchi/vchi.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/vc04_servi
This patch fixes the checkpatch.pl error:
ERROR: space prohibited after/before that open/closed parenthesis
in the interface/vchi directory.
Signed-off-by: Aymen Qader
---
.../vc04_services/interface/vchi/vchi.h | 106 +-
.../vc04_services/interface/vchi/vchi_cfg.h |
This patch fixes the checkpatch.pl error:
ERROR: Macros with complex values should be enclosed in parentheses
in the interface/vchi directory
Signed-off-by: Aymen Qader
---
drivers/staging/vc04_services/interface/vchi/vchi.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --g
This patch fixes the checkpatch.pl error:
ERROR: code indent should use tabs where possible
in the interface/vchi directory
Signed-off-by: Aymen Qader
---
.../vc04_services/interface/vchi/vchi.h | 116 +-
1 file changed, 58 insertions(+), 58 deletions(-)
diff --git a/dri
This patch fixes the checkpatch.pl error:
ERROR: "foo * bar" should be "foo* bar"
in the interface/vchi directory
Signed-off-by: Aymen Qader
---
drivers/staging/vc04_services/interface/vchi/vchi.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/vc04_serv
Hi,
Apologies for the slow responses here, I meant to follow up on this sooner.
On Tue, Sep 11, 2018 at 8:20 PM, Jolly Shah wrote:
> Hi Sudeep and Olof,
>
> Clock driver from same patch set uses ioctl API along with other clock eemi
> APIs. As clock patches' final review is pending by Stephen,
On Thu, Sep 20, 2018 at 5:46 PM, Jolly Shah wrote:
> Hi Olof,
>
> As suggested, this patchset is generated without ioctl interface. Please
> review. If you are ok, Michal can create a pull request for merge.
Hi,
I replied on the other thread as well; it sounds like you will need
something _like
On Fri, 07 Sep 2018, Pascal PAILLET-LME wrote:
> From: pascal paillet
>
> stpmic1 is a pmic from STMicroelectronics. The stpmic1 integrates 10
> regulators and 3 switches with various capabilities.
>
> Signed-off-by: pascal paillet
> ---
> changes in v2:
> * the hardware component has been ren
This patchset fixes the following checkpatch.pl errors in the
interface/vchi directory:
ERROR: space prohibited after/before that open/closed parenthesis
ERROR: code indent should use tabs where possible
ERROR: space required after that ','
ERROR: Macros with complex values should be enclosed in p
On Sun, 2018-09-23 at 15:08 +0530, Nishad Kamdar wrote:
> This patch fixes a few single statement macros in sd.c.
> It converts two macros to inline functions. It removes
> five other macros and replaces their usages with calls to
> the function being called in the macro definition.
> Issue found b
Currently, /proc/cpuinfo show logical CPU ID as Hart ID which
is in-correct. This patch shows CPU ID and Hart ID separately
in /proc/cpuinfo using cpuid_to_hardid_map().
With this patch, contents of /proc/cpuinfo looks as follows:
processor : 0
hart: 1
isa : rv64imafd
On Thu, Aug 30, 2018 at 7:02 PM, Krzysztof Kozlowski wrote:
> Samsung Exynos SoCs and boards related bindings evolved since the initial
> introduction, but initially the bindings were minimal and a bit incomplete
> (they never described all the hardware modules available in the SoCs).
> Since then
On Sun, Sep 23, 2018 at 2:58 PM Richard Weinberger wrote:
>
> Lars,
>
> Am Sonntag, 23. September 2018, 14:49:23 CEST schrieb Lars Persson:
> > On Sun, Jul 1, 2018 at 6:27 PM Greg Kroah-Hartman
> > wrote:
> > >
> > > 4.9-stable review patch. If anyone has any objections, please let me
> > > kno
The watchdog controller on NCT6796D, NCT6797D, and NCT6798D is compatible
with the wtachdog controller on other Nuvoton chips.
Signed-off-by: Guenter Roeck
---
drivers/watchdog/w83627hf_wdt.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/watchdog/w83627hf_wdt
Hi,
On Fri, Sep 21, 2018 at 07:45:19PM +0200, Krzysztof Kozlowski wrote:
> Hi,
>
> Nothing special, description in tag.
Hmm. Point 12 is special, I'd say.
I commented on the patch, and I don't want to hold everything else up so it
might make sense to separate that out and send a fresh pull requ
On Fri, Sep 21, 2018 at 07:45:20PM +0200, Krzysztof Kozlowski wrote:
> Hi,
>
> Nothing special, description in tag.
>
>
> Best regards,
> Krzysztof
>
>
> The following changes since commit 5b394b2ddf0347bef56e50c69a58773c94343ff3:
>
> Linux 4.19-rc1 (2018-08-26 14:11:59 -0700)
>
> are avai
This patchset fixes the following checkpatch.pl errors in the
interface/vchi directory:
ERROR: space prohibited after/before that open/closed parenthesis
ERROR: code indent should use tabs where possible
ERROR: space required after that ','
ERROR: Macros with complex values should be enclosed in p
This patch fixes the checkpatch.pl error:
ERROR: code indent should use tabs where possible
in the interface/vchi directory
Signed-off-by: Aymen Qader
---
.../vc04_services/interface/vchi/vchi.h | 116 +-
1 file changed, 58 insertions(+), 58 deletions(-)
diff --git a/dri
This patch fixes the checkpatch.pl error:
ERROR: "foo * bar" should be "foo* bar"
in the interface/vchi directory
Signed-off-by: Aymen Qader
---
drivers/staging/vc04_services/interface/vchi/vchi.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/vc04_serv
This patch fixes the checkpatch.pl error:
ERROR: Macros with complex values should be enclosed in parentheses
in the interface/vchi directory
Signed-off-by: Aymen Qader
---
drivers/staging/vc04_services/interface/vchi/vchi.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --g
This patch fixes the checkpatch.pl error:
ERROR: space prohibited after/before that open/closed parenthesis
in the interface/vchi directory.
Signed-off-by: Aymen Qader
---
.../vc04_services/interface/vchi/vchi.h | 106 +-
.../vc04_services/interface/vchi/vchi_cfg.h |
This patch fixes the checkpatch.pl error:
ERROR: space required after that ','
in the interface/vchi directory
Signed-off-by: Aymen Qader
---
drivers/staging/vc04_services/interface/vchi/vchi.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/vc04_servi
>Subject: [PATCH] RDMA/i40iw: Fix incorrect iterator type
>
>Commit f27b4746f378 ("i40iw: add connection management code") uses an
>incorrect rcu iterator, whilst holding the rtnl_lock. Since the critical
>region invokes
>i40iw_manage_qhash(), which is a sleeping function, the rcu locking and
>tra
On Fri, Sep 21, 2018 at 12:27 PM, Lukasz Majewski wrote:
> This commit adds DTS support for BK4 device from Liebherr. It
> uses vf610 SoC from NXP.
>
> Signed-off-by: Lukasz Majewski
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/vf610-bk4.dts | 504
> +
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