The BrcmSTB PCIe controller needs to remap DMA accesses to it because
of the requirements of its interface with the SOC memory controllers.
In the ARM64 and MIPs architectures, this is accomplished by
CONFIG_ARCH_HAS_PHYS_TO_DMA=y and then defining the functions
__dma_to_phys() and __phys_to_dma()
On Tue, 2018-09-18 at 19:03 -0400, Peng Hao wrote:
> From: Peng Hao
>
> When handling ept misconfig exit, it will call emulate instruction
> with insn_len = 0. The decode instruction function may return a fetch
> fault and should propagate to guest.
What fault is encountered, e.g. #PF, #UD, etc.
This is useless on its own. Please merge it into whatever patch
selects ARCH_HAS_PHYS_TO_DMA and actually implements the functions.
On 19/09/18 15:18, Laurentiu Tudor wrote:
Hi Robin,
On 19.09.2018 16:25, Robin Murphy wrote:
Hi Laurentiu,
On 19/09/18 13:35, laurentiu.tu...@nxp.com wrote:
From: Laurentiu Tudor
This patch series adds SMMU support for NXP LS1043A and LS1046A chips
and consists mostly in important driver fi
On Wed, Sep 19, 2018 at 07:19:56AM -0700, Andy Lutomirski wrote:
>
>
> > On Sep 19, 2018, at 2:55 AM, Tycho Andersen wrote:
> >
> >> On Wed, Sep 12, 2018 at 04:52:38PM -0700, Andy Lutomirski wrote:
> >>> On Thu, Sep 6, 2018 at 8:28 AM, Tycho Andersen wrote:
> >>> The idea here is that the user
Signed-off-by: Mathieu Desnoyers
CC: "Paul E. McKenney"
CC: Peter Zijlstra
CC: Paul Turner
CC: Thomas Gleixner
CC: Andy Lutomirski
CC: Andi Kleen
CC: Dave Watson
CC: Chris Lameter
CC: Ingo Molnar
CC: "H. Peter Anvin"
CC: Ben Maurer
CC: Steven Rostedt
CC: Josh Triplett
CC: Linus Torval
On Wed, Sep 19, 2018 at 10:32:06AM -0400, Jim Quinlan wrote:
> +#if defined(CONFIG_ARM64)
Please use plain #ifdef where possible.
> +dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr)
> +{
> + return brcm_phys_to_dma(dev, paddr);
> +}
> +
> +phys_addr_t __dma_to_phys(struct devic
This patch basic node support for Rockpro64 board and make it able to bring up.
Peripheral Works
- SDIO, Sdcard
- USB 2.0, 3.0
- Leds
Not working:
- USB Type-C
Signed-off-by: Akash Gajjar
---
Changes in v2:
- add support for usb 2.0, 3.0
- add fusb302 node and its regulator support
- cleanup p
Here is a rough prototype registering rseq(2) TLS for each thread
(including main), and unregistering for each thread (excluding
main). "rseq" stands for Restartable Sequences.
Things to consider:
- Move __rseq_refcount to an extra field at the end of __rseq_abi to
eliminate one symbol. This wo
Hi,
On 09/16/2018 08:24 AM, A.s. Dong wrote:
Ping again
-Original Message-
From: A.s. Dong
Sent: Thursday, September 6, 2018 11:23 AM
To: linux-...@vger.kernel.org
Cc: linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org;
sb...@kernel.org; mturque...@baylibre.com; shawn..
replace pin numbers with equivalent pin macro in rk3399.dtsi
Signed-off-by: Akash Gajjar
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 252 ---
1 file changed, 134 insertions(+), 118 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
b/arch/arm64/bo
On 18.09.18 02:47, Dmitry Torokhov wrote:
The kernel is supposed to handle multiple devices, static flags
in packet handling code will never work.
Signed-off-by: Dmitry Torokhov
---
This is a random assortment of iforce patches that I made a few weeks back.
Tim, I do not have hardware, so I w
2018-09-18 2:24 GMT+09:00 Nick Desaulniers :
> On Mon, Sep 17, 2018 at 12:38 AM Joel Stanley wrote:
>>
>> When building to record the mcount locations the kernel uses
>> KBUILD_CFLAGS but not KBUILD_CPPFLAGS. This means it lacks
>> -Qunused-arguments when building with clang, resulting in a lot of
On Tue, Sep 18, 2018 at 12:34:47PM +0300, Tomas Winkler wrote:
> Factor out get random implementation from tpm-interface.c
> into tpm1_get_random function in tpm1-cmd.c.
> No functional changes.
>
> Signed-off-by: Tomas Winkler
Reviewed-by: Jarkko Sakkine
/Jarkko
2018-09-19 2:16 GMT+09:00 Nick Desaulniers :
> On Mon, Sep 17, 2018 at 7:32 PM Stefan Agner wrote:
>>
>> When using a GCC cross toolchain which is not in a compiled in
>> Clang search path, Clang reverts to the system assembler and
>> linker. This leads to assembler or linker errors, depending on
On Tue, Sep 18, 2018 at 12:34:51PM +0300, Tomas Winkler wrote:
> Add tpm2_pcr_extend() function to tpm2-cmd.c with signature required
> by tpm-interface.c. It wraps the original open code
> implementation. The original original tpm2_pcr_extend() function
> is renamed and made static, called only fr
On 9/19/18 9:42 AM, Juergen Gross wrote:
> When a driver domain (e.g. dom0) is running out of maptrack entries it
> can't map any more foreign domain pages. Instead of silently stalling
> the affected domUs issue a rate limited warning in this case in order
> to make it easier to detect that situat
On Tue, Sep 18, 2018 at 12:34:49PM +0300, Tomas Winkler wrote:
> Factor out tpm1 suspend flow from tpm-interface.c into a new function
> tpm1_pm_suspend in tpm1-cmd.c
>
> Signed-off-by: Tomas Winkler
Use "TPM 1.x" in the short summary and long description instead of
"tpm1" and add parentheses to
On Tue, Sep 18, 2018 at 12:34:48PM +0300, Tomas Winkler wrote:
> Move the tpm1 selftest code functions to tpm1-cmd.c
TPM 1.x. Also, the function names are missing parentheses.
Tested-by: Jarkko Sakkinen
/Jarkko
On Tue, Sep 18, 2018 at 12:34:50PM +0300, Tomas Winkler wrote:
> tpm manual startup is used only from within tpm1 or tpm2
> code, hence remove tpm_startup function from tpm-interface.c
> and add two static functions implementations tpm1_startup
> and tpm2_startup into to tpm1-cmd.c and tpm2-cmd.c r
On Tue, 2018-09-18 at 18:09 +0200, Vitaly Kuznetsov wrote:
> When EPT is used for nested guest we need to re-init MMU as shadow
> EPT MMU (nested_ept_init_mmu_context() does that). When we return back
> from L2 to L1 kvm_mmu_reset_context() in nested_vmx_load_cr3() resets
> MMU back to normal TDP m
On Tue, Sep 18, 2018 at 12:34:52PM +0300, Tomas Winkler wrote:
> Add wrapper tpm_auto_startup() to tpm-interface.c
> instead of open coded decision between tpm 1.2 and tpm 2.0
> in tpm-chip.c
>
> Signed-off-by: Tomas Winkler
Language.
> ---
> V3: new in the series
Please put the changelog to t
Hi,
On Mon, Sep 17, 2018 at 11:16:00AM -0700, Dmitry Torokhov wrote:
> Several drivers rely on having notion of sub-nodes when describing
> hardware, let's allow static board-defined properties also have it.
>
> The board files will then attach properties to devices in the following
> fashion:
>
This patch adds device device tree bindings for the vibrator found on
the LG Nexus 5 (hammerhead) phone.
Signed-off-by: Brian Masney
---
.../qcom-msm8974-lge-nexus5-hammerhead.dts| 39 +++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus
This patch set adds support for the vibrator found on various Qualcomm
MSM SOCs. The driver was tested on a LG Nexus 5 (hammerhead) phone. This
is based on work from:
Jonathan Marek from qcom,pwm-vibrator.c in the PostmarketOS repo:
https://gitlab.com/postmarketOS/linux-postmarketos/commit/7647fb3
This patch adds a new PWM vibrator driver that supports various
Qualcomm MSM SOCs. It is intended to be wired into the pwm-vibra driver
in the input/misc/ subsystem via device tree. Driver was tested on a
LG Nexus 5 (hammerhead) phone.
Signed-off-by: Brian Masney
---
drivers/pwm/Kconfig
This patch adds the device tree bindings for the pwm-msm-vibrator.c
driver that supports the vibrator found on various Qualcomm MSM SOCs.
Signed-off-by: Brian Masney
---
.../bindings/pwm/pwm-msm-vibrator.txt | 38 +++
1 file changed, 38 insertions(+)
create mode 100644 D
On Tue, Sep 18, 2018 at 12:34:53PM +0300, Tomas Winkler wrote:
> The code movement left some macros unused.
Rewrite the long description and the language is horrible. The code
movement maps to nothing. Should be something along the lines: "The
migration of the TPM 1.x code has left some unused ma
On Tue, Sep 18, 2018 at 12:34:54PM +0300, Tomas Winkler wrote:
> Remove unneeded semicolon in tpm2_map_response_header()
>
> Signed-off-by: Tomas Winkler
Reviewed-by: Jarkko Sakkinen
/Jarkko
On Tue, Sep 18, 2018 at 12:34:55PM +0300, Tomas Winkler wrote:
> 1. Use tpm_buf in tpm1_get_random()
> 2. Fix comment in tpm_get_random() so it is clear that
> the function is expected to return number of random bytes.
>
> Signed-off-by: Tomas Winkler
Reviewed-by: Jarkko Sakkinen
Tested-by: Jar
On Tue, Sep 18, 2018 at 12:34:56PM +0300, Tomas Winkler wrote:
> Implement tpm1_pcr_read_dev() using tpm_buf and remove
> now unneeded structures from tpm.h
>
> Signed-off-by: Tomas Winkler
Reviewed-by: Jarkko Sakkinen
Tested-by: Jarkko Sakkinen
/Jarkko
Hi Viresh,
On mer., sept. 12 2018, Viresh Kumar wrote:
> dev_pm_opp_cpumask_remove_table() is going to change in the next commit
> and will not remove dynamic OPPs automatically. They must be removed
> with a call to dev_pm_opp_remove().
So now that mean when adding more than 2 OPPs, we shoul
This patch will power off regulators while hci0 down and turn on them
back on hci0 up. Every time we power off we call proto specific close
function, so that we will free the memory of Qualcomm BT specific buffers.
Will call proto open to assign the memory and turn on the regulators, before
callin
This patch enables power off support for hci down and power on support
for hci up. As wcn3990 power sources are ignited by regulators, we will
turn off them during hci down, i.e. an complete power off of wcn3990.
So while hci up, we will call vendor specific open/close and setup which
will turn on
On Tue, Sep 18, 2018 at 12:34:57PM +0300, Tomas Winkler wrote:
> TPM pcr indices cannot be negative, also the tpm
> commands accept u32 number as a pcr index.
>
> 1. Adjust the API to use u32 instead of int in all pcr related
> functions.
NAK.
> 2. Rename tpm1_pcr_read_dev to tpm1_pcr_read() to
On Tue, Sep 18, 2018 at 12:34:58PM +0300, Tomas Winkler wrote:
> In tpm1_pm_suspend() function reimplement,
> TPM_ORD_SAVESTATE comamnd using tpm_buf.
>
> Signed-off-by: Tomas Winkler
Reviewed-by: Jarkko Sakkinen
Tested-by: Jarkko Sakkinen
/Jarkko
On Tue, Sep 18, 2018 at 12:34:59PM +0300, Tomas Winkler wrote:
> Reimplement tpm1_continue_selftest() using tpm_buf structure.
> This is the last command using the old tpm_cmd_t structure
> and now the structure can be removed.
>
> Signed-off-by: Tomas Winkler
Minor rant: the last sentence shoul
Hi!
On 19/09/2018 15:03, Arnaldo Carvalho de Melo wrote:
> That is indeed a cross build environment I'm not regularly testing, I'm
> trying these cross builds:
Probably my assumption was wrong about cross compiler.
HOST tool fails (objtool) and it's being build by separate i686->i686 compiler.
>
Hi Timur
On Wed, Sep 19, 2018 at 1:50 PM Timur Tabi wrote:
>
> On 9/18/18 11:04 PM, Ricardo Ribalda Delgado wrote:
> > And should't that be tacked in qcom hardware with something like:
> >
> > if (!priv->initialized)
> > return INPUT;
> >
> > if you or Timur point me to the harware that was cr
On Tue, 2018-09-18 at 18:09 +0200, Vitaly Kuznetsov wrote:
> In preparation to MMU reconfiguration avoidance we need a space to
> cache source data. As this partially intersects with kvm_mmu_page_role,
> create 64bit sized union kvm_mmu_role holding both base_role and
> extended data. No functional
I'm leaving Broadcom, and will no longer have access to hardware and
documentation necessary to be effective in a maintainership role.
Signed-off-by: Jon Mason
---
MAINTAINERS | 2 --
1 file changed, 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 4ece30f15777..d063c605074e 100644
-
Hi Geert,
On 9/19/18 2:54 PM, Geert Uytterhoeven wrote:
> Hi Eric,
>
> On Wed, Sep 19, 2018 at 2:36 PM Auger Eric wrote:
>> On 9/17/18 6:39 PM, Geert Uytterhoeven wrote:
>>> Vfio-platform requires dedicated reset support, provided either by ACPI,
>>> or, on DT platforms, by a device-specific res
Hi Manivannan,
On 2018/8/10 18:53, Manivannan Sadhasivam wrote:
> This patchset adds support for Hi3670 SoC and HiKey970 board. Hi3670 SoC
> is very similar to the Hi3660 SoC with additional NPU support. For now,
> only UART6 has been enabled which is configured by the bootloader for
> console sup
(apologies again; resending due to formatting issues)
On Tue, Sep 18, 2018 at 6:03 PM Balbir Singh wrote:
>
> On Mon, Aug 20, 2018 at 09:52:19PM +, Woodhouse, David wrote:
> > On Mon, 2018-08-20 at 14:48 -0700, Linus Torvalds wrote:
> > >
> > > Of course, after the long (and entirely unrelated
From: Dexuan Cui Sent: Tuesday, September 18, 2018 3:30 PM
>
> A Generatin-2 Linux VM on Hyper-V doesn't have the legacy PCI bus, and
> users always see the scary warning, which is actually harmless. The patch
> is made to suppress the warning.
>
> Signed-off-by: Dexuan Cui
> Cc: K. Y. Sriniva
On Mon, Sep 17, 2018 at 04:09:33PM +, Schaufler, Casey wrote:
> diff --git a/kernel/ptrace.c b/kernel/ptrace.c
> index 5c5e7cb597cd..202a4d9c2af7 100644
> --- a/kernel/ptrace.c
> +++ b/kernel/ptrace.c
> @@ -330,9 +330,7 @@ int __ptrace_may_access(struct task_struct *task,
> unsigned int mode)
On Thu, 2018-08-02 at 12:01 +0200, Vitaly Kuznetsov wrote:
> In preparation to MMU reconfiguration avoidance we need a space to
> cache source data. As this partially intersects with kvm_mmu_page_role,
> create 64bit sized union kvm_mmu_role holding both base_role and
> extended data. No functional
From: Tianyu Lan Sent: Monday, September 17, 2018 8:18 PM
>
> +static void kvm_flush_remote_tlbs_with_range(struct kvm *kvm,
> + struct kvm_tlb_range *range)
> +{
> + int ret = -ENOTSUPP;
> +
> + if (range && kvm_x86_ops->tlb_remote_flush_with_range) {
> + /*
> +
From: Tianyu Lan Sent: Monday, September 17, 2018 8:19 PM
> +
> + if (ret && kvm_available_flush_tlb_with_range()) {
> + kvm_flush_remote_tlbs_with_address(kvm,
> + gfn_start,
> +
On Wed, Sep 19, 2018 at 04:16:50PM +0200, Jann Horn wrote:
...
> >
> > Heh, actually not :) It is due to commit
> >
> > commit 1f8266ff58840d698a1e96d2274189de1bdf7969
> > Author: Jann Horn
> > Date: Thu Sep 13 18:12:09 2018 +0200
> >
> > which introduced might_sleep. Seems it is bad idea to sen
On Tue, 2018-09-11 at 21:58 +0300, Matwey V. Kornilov wrote:
> вт, 28 авг. 2018 г. в 10:17, Matwey V. Kornilov :
> >
> > вт, 21 авг. 2018 г. в 20:06, Matwey V. Kornilov :
> > >
> > > DMA cocherency slows the transfer down on systems without hardware
> > > coherent DMA.
> > > Instead we use noncoc
On Mon, Sep 17, 2018 at 04:07:07PM +0200, Håkon Bugge wrote:
> Commit f27b4746f378 ("i40iw: add connection management code") uses an
> incorrect rcu iterator, whilst holding the rtnl_lock. Since the
> critical region invokes i40iw_manage_qhash(), which is a sleeping
> function, the rcu locking and
On Wed, Sep 19, 2018 at 08:28:38PM +0800, YueHaibing wrote:
> rdma_set_src_addr_rcu should check copy_src_l2_addr fails,
> rather than always return 0. Also copy_src_l2_addr should return
> 'ret' as its return value while rdma_translate_ip fails.
>
> Fixes: c31d4b2ddf07 ("RDMA/core: Protect agains
On Wed, Sep 19, 2018 at 04:28:09PM +0200, Martin Schwidefsky wrote:
> On Wed, 19 Sep 2018 14:38:49 +0200
> Peter Zijlstra wrote:
>
> > On Tue, Sep 18, 2018 at 02:51:51PM +0200, Martin Schwidefsky wrote:
> > > +page_table_free_rcu(tlb, (unsigned long *) pte, address);
> >
> > (whitespa
Hi Amélie,
On 09/19/2018 03:27 PM, Amelie Delaunay wrote:
This series adds support for STMicroelectronics Multi-Function eXpander
(STMFX), used on some STM32 discovery and evaluation boards.
STMFX is an STM32L152 slave controller whose firmware embeds the following
features:
- I/O expander (16
Hi,
On 09/19/2018 07:50 AM, Yogesh Gaur wrote:
> Add entry for mt35xu512aba Micron NOR flash.
> This flash is having uniform sector erase size of 128KB, have
> support of FSR(flag status register), flash size is 64MB and
> supports 4-byte commands.
>
Seems that the datasheet for mt35xu512aba is
Initial introduction of Facebook TiogaPass family equipped with
Aspeed 2500 BMC SoC. TiogaPass is a x86 server development kit
with a ASPEED ast2500 BMC manufactured by Facebook.
This adds an entry of Facebook in Documentation for vendor prefix
---
Documentation/devicetree/bindings/vendor-prefixe
Hi,
On 09/19/2018 07:50 AM, Yogesh Gaur wrote:
> Some MICRON related macros in spi-nor domain were ST.
> Rename entries related to STMicroelectronics under macro SNOR_MFR_ST.
>
> Added entry of MFR Id for Micron flashes, 0x002C.
>
> Signed-off-by: Yogesh Gaur
> ---
> drivers/mtd/spi-nor/spi-no
On 09/19/2018 05:17 AM, Peter Zijlstra wrote:
> On Wed, Sep 19, 2018 at 09:53:47AM +0200, Thomas Gleixner wrote:
>> On Tue, 18 Sep 2018, Waiman Long wrote:
>>
>>> The clocksource watchdog, when running, is scheduled on all the CPUs in
>>> the system sequentially on a round-robin fashion with a peri
Hi Masami,
On Wed, 2018-09-19 at 08:54 +0900, Masami Hiramatsu wrote:
> Hi Tom,
>
> On Tue, 18 Sep 2018 14:16:43 -0500
> Tom Zanussi wrote:
>
> > Hi Masami,
> >
> > On Wed, 2018-09-19 at 03:54 +0900, Masami Hiramatsu wrote:
> > > Hi Tom,
> > >
> > > On Mon, 10 Sep 2018 14:10:46 -0500
> > > To
On Tue, Sep 18, 2018 at 12:05:40PM -0700, Rob Herring wrote:
> On Thu, Sep 13, 2018 at 7:51 AM Lorenzo Pieralisi
> wrote:
> >
> > On Wed, Aug 29, 2018 at 01:34:40PM -0500, Rob Herring wrote:
> > > PCI host drivers have already matched on compatible strings, so checking
> > > device_type is redunda
On 09/18/2018 01:44 PM, Thomas Gleixner wrote:
> On Tue, 18 Sep 2018, Eric W. Biederman wrote:
>> The function bad_area_nosemaphore always sets si_code to SEGV_MAPERR
>> and as such can never return a pkey parameter. Therefore remove the
>> unusable pkey parameter from bad_area_nosemaphore.
The r
Hi,
Subject should be "dt-bindings: Add vendor prefix for Facebook" or so.
Please compare other commits for that file.
Am 19.09.18 um 18:29 schrieb Vijay Khemka:
> Initial introduction of Facebook TiogaPass family equipped with
> Aspeed 2500 BMC SoC. TiogaPass is a x86 server development kit
> wi
On Wed, 19 Sep 2018, Mathieu Desnoyers wrote:
> Here is a rough prototype registering rseq(2) TLS for each thread
> (including main), and unregistering for each thread (excluding
> main). "rseq" stands for Restartable Sequences.
A final patch would need to add documentation and tests and a NEWS e
Initial introduction of Facebook TiogaPass family equipped with
Aspeed 2500 BMC SoC. TiogaPass is a x86 server development kit
with a ASPEED ast2500 BMC manufactured by Facebook.
This adds an entry of Facebook in Documentation for vendor prefix
Signed-off-by: Vijay Khemka
---
Documentation/devi
From: "haiqing.shq"
Use the variable write_len instead of ov_iter_count(from).
Signed-off-by: haiqing.shq
---
mm/filemap.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/mm/filemap.c b/mm/filemap.c
index 52517f2..4a699ef 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -301
- On Sep 19, 2018, at 12:37 PM, Joseph Myers jos...@codesourcery.com wrote:
> On Wed, 19 Sep 2018, Mathieu Desnoyers wrote:
>
>> Here is a rough prototype registering rseq(2) TLS for each thread
>> (including main), and unregistering for each thread (excluding
>> main). "rseq" stands for Rest
On Tue, 18 Sep 2018, Dmitry Safonov wrote:
> Hi all,
>
> Three fixes that worth to have in the @stable, as they were hit by
> different people, including Arista on v4.9 stable.
>
> And for linux-next - adding lockdep asserts for line discipline changing
> code, verifying that write ldisc sem w
On 2018-09-19 07:55:51 [+0200], Paolo Bonzini wrote:
> A kthread can do use_mm/unuse_mm.
indeed. The FPU struct for the kernel thread isn't valid / does not
contain the expected PKRU value. So loading the pkru value from the
struct FPU does not work as expected. We could set it to 0 for a kernel
t
On 2018-09-12 08:49:01 [-0700], Andy Lutomirski wrote:
> Sure, but the first write is *before* this. So we can be preempted with the
> two copies of PKRU being out of sync.
so it took a while to understand this but now that I did, I will
consider this in the next version. Thank you.
Sebastian
On 19/09/2018 18:57, Sebastian Andrzej Siewior wrote:
> On 2018-09-19 07:55:51 [+0200], Paolo Bonzini wrote:
>> A kthread can do use_mm/unuse_mm.
>
> indeed. The FPU struct for the kernel thread isn't valid / does not
> contain the expected PKRU value. So loading the pkru value from the
> struct F
Background:
Recently, when we ran some vm scalability tests on machines with large memory,
we ran into a couple of mmap_sem scalability issues when unmapping large memory
space, please refer to https://lkml.org/lkml/2017/12/14/733 and
https://lkml.org/lkml/2018/2/20/576.
History:
Then akpm sugg
When unmapping VM_HUGETLB mappings, vm flags need to be updated. Since
the vmas have been detached, so it sounds safe to update vm flags with
read mmap_sem.
Cc: Michal Hocko
Cc: Vlastimil Babka
Reviewed-by: Matthew Wilcox
Signed-off-by: Yang Shi
---
mm/mmap.c | 2 +-
1 file changed, 1 inserti
When running some mmap/munmap scalability tests with large memory (i.e.
> 300GB), the below hung task issue may happen occasionally.
INFO: task ps:14018 blocked for more than 120 seconds.
Tainted: GE 4.9.79-009.ali3000.alios7.x86_64 #1
"echo 0 > /proc/sys/kernel/hung_task_timeo
On 2018-09-12 08:47:19 [-0700], Andy Lutomirski wrote:
> > --- a/arch/x86/kernel/fpu/core.c
> > +++ b/arch/x86/kernel/fpu/core.c
> > @@ -101,14 +101,14 @@ void __kernel_fpu_begin(void)
> >
> >kernel_fpu_disable();
> >
> > -if (fpu->initialized) {
> > +__cpu_invalidate_fpregs_state();
When unmapping VM_PFNMAP mappings, vm flags need to be updated. Since
the vmas have been detached, so it sounds safe to update vm flags with
read mmap_sem.
Cc: Michal Hocko
Cc: Vlastimil Babka
Reviewed-by: Matthew Wilcox
Signed-off-by: Yang Shi
---
mm/mmap.c | 9 -
1 file changed, 9 d
On 25/07/2018 19:26:04+0200, Giulio Benetti wrote:
> m41txx chips can hold a calibration value to get correct clock bias.
>
> Add offset handling (ranging between -63ppm and 126ppm) via sysfs.
>
> Signed-off-by: Giulio Benetti
> ---
> drivers/rtc/rtc-ds1307.c | 77 ++
On 25/07/2018 19:26:05+0200, Giulio Benetti wrote:
> On m41txx you can enable open-drain OUT pin to check if offset is ok.
> Enabling OUT pin with frequency_test_enable attribute, OUT pin will tick
> 512 times faster than 1s tick base.
>
> Enable or Disable FT bit on CONTROL register if freq_test
On Tue, Sep 18, 2018 at 01:29:01PM +0200, Greg Kroah-Hartman wrote:
> On Sat, Sep 15, 2018 at 08:28:03AM +0530, Nishad Kamdar wrote:
> > This patch removes IRQ_MSG() and its users as currently it is a no-op.
> >
> > Signed-off-by: Nishad Kamdar
> > ---
> > Changes in v7:
> > - Delete IRQ_MSG()
On Wed, 19 Sep 2018, Mathieu Desnoyers wrote:
> > This looks like it's coming from the Linux kernel. Can't the relevant
> > uapi header just be used directly without copying into glibc (with due
> > care to ensure that glibc still builds if the kernel headers used for the
> > build are too old -
On Wed, Sep 19, 2018 at 04:51:26PM +0200, Tim Schumacher wrote:
> On 18.09.18 02:47, Dmitry Torokhov wrote:
> > The kernel is supposed to handle multiple devices, static flags
> > in packet handling code will never work.
> >
> > Signed-off-by: Dmitry Torokhov
> > ---
> >
> > This is a random ass
On Mon, Sep 17, 2018 at 10:43:50PM +0200, Cedric Roux wrote:
> This commit fixes the wrong usage of pr_info introduced by the
> commit e728e4f20100 ("ARM: s3c24xx: formatting cleanup in
> mach-mini2440.c").
>
> Since the idea is to print on a single line, pr_cont has to be used.
>
> Signed-off-by
On 19/09/2018 15:39:53+0300, Eugen Hristev wrote:
> Add fixed regulators for the ADC. This board does not have
> a programmable PMIC, but fixed regulators.
> Adding them to DT so the ADC can probe correctly.
>
> Tested-by: Swapna Gurumani
> Signed-off-by: Ludovic Desroches
> Signed-off-by: Eugen
On 12/09/2018 14:53:51+0100, Suzuki K Poulose wrote:
> Switch to the new coresight bindings for hardware ports
>
> Cc: Nicolas Ferre
> Cc: Alexandre Belloni
> Cc: Mathieu Poirier
> Signed-off-by: Suzuki K Poulose
> ---
> arch/arm/boot/dts/sama5d2.dtsi | 17 ++---
> 1 file changed,
This patch fixes the debug macro IRQ_MSG().
It deletes IRQ_MSG() and all its users as currently it is a no-op.
Changes in v8:
- Remove unnecessary {} for single statement if
Changes in v7:
- Delete IRQ_MSG() macro and its users.
- Patchset reduced to 1 patch as the patches fixing N_MSG() an
Hi Heikki,
On Wed, Sep 19, 2018 at 06:10:26PM +0300, Heikki Krogerus wrote:
> Hi,
>
> On Mon, Sep 17, 2018 at 11:16:00AM -0700, Dmitry Torokhov wrote:
> > Several drivers rely on having notion of sub-nodes when describing
> > hardware, let's allow static board-defined properties also have it.
> >
Hi folks,
Sasha and I are pleased to announce the Testing and Fuzzing track at
LPC [ 1 ]. We are planning to continue the discussions from last
year's microconference [2]. Many discussions from the Automated
Testing Summit [3] will also continue, and a final agenda will come up
only soon after tha
This patch removes IRQ_MSG() and its users as currently it is a no-op.
Signed-off-by: Nishad Kamdar
---
Changes in v8:
- Remove unnecessary {} for single statement if
Changes in v7:
- Delete IRQ_MSG() and all its users
Changes in v6:
- No change
Changes in v5:
- No change
---
drivers/sta
On Wed, Sep 19, 2018 at 11:08 AM Michal Simek wrote:
>
> Clear ADDR64 dma bit in DMACFG register in case that HW_DMA_CAP_64B
> is not detected on 64bit system.
> The issue was observed when bootloader(u-boot) does not check macb
> feature at DCFG6 register (DAW64_OFFSET) and enabling 64bit dma sup
From: Tianyu Lan Sent: Monday, September 17, 2018 8:19 PM
>
> #include
> #include
> #include
> #include
> +#include
Hopefully asm/kvm_host.h does not need to be #included, given
the new code structure.
>
> #include
>
> +/*
> + * MAX_FLUSH_PAGES = "additional_pages" + 1. It's limite
During fakenuma processing in numa_emulation(), pi gets passed in and
processed as new fake numa nodes are being split out. Once the original
memory region is proccessed, it gets removed from the pi by
numa_remove_memblk_from() in emu_setup_memblk(). So entry 0 gets deleted
and the rest of the entr
On 2018-09-19 19:00:34 [+0200], Paolo Bonzini wrote:
> On 19/09/2018 18:57, Sebastian Andrzej Siewior wrote:
> > On 2018-09-19 07:55:51 [+0200], Paolo Bonzini wrote:
> >> A kthread can do use_mm/unuse_mm.
> >
> > indeed. The FPU struct for the kernel thread isn't valid / does not
> > contain the e
On 09/10/2018 08:17 AM, Pu Wen wrote:
> As Hygon registered its PCI Vendor ID as a new one 0x1d94, and there
> are PCI Devices 0x1450/0x1463/0x1464 for Host bridge on Hygon Dhyana
> platforms, so add Hygon Dhyana support to the PCI and north bridge
> subsystem by using the code path of AMD family 1
On Wed, Sep 19, 2018 at 08:51:13PM +0530, Balakrishna Godavarthi wrote:
> This patch enables power off support for hci down and power on support
> for hci up. As wcn3990 power sources are ignited by regulators, we will
> turn off them during hci down, i.e. an complete power off of wcn3990.
> So whi
nit: Not sure there is much value in a cover letter for a 'series'
with a single patch. The changelog and additional comments (if needed)
can be placed in the post with the patch below '---'.
On Wed, Sep 19, 2018 at 08:51:12PM +0530, Balakrishna Godavarthi wrote:
> This patch will power off regula
On Wed, Sep 19, 2018 at 10:20 AM Dave Jiang wrote:
>
> During fakenuma processing in numa_emulation(), pi gets passed in and
> processed as new fake numa nodes are being split out. Once the original
> memory region is proccessed, it gets removed from the pi by
> numa_remove_memblk_from() in emu_se
The success of a cache pseudo-locked region is measured using
performance monitoring events that are programmed directly at the time
the user requests a measurement.
Modifying the performance event registers directly is not appropriate
since it circumvents the in-kernel perf infrastructure that ex
perf_event_read_local() is the safest way to obtain measurements
associated with performance events. In some cases the overhead
introduced by perf_event_read_local() affects the measurements and the
use of rdpmcl() is needed. rdpmcl() requires the index
of the performance counter used so a helper i
A perf event has many attributes that are maintained in a separate
structure that should be provided when a new perf_event is created.
In preparation for the transition to perf_events the required attribute
structures are created for all the events that may be used in the
measurements. Most attrib
Commit 4a7a54a55e72 ("x86/intel_rdt: Disable PMU access") disabled
measurements of pseudo-locked regions because of incorrect usage
of the performance monitoring hardware.
Cache pseudo-locking measurements are now done correctly with the
in-kernel perf API and its use can be re-enabled at this tim
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