On Mon, Sep 10, 2018 at 9:43 PM, Christoph Hellwig wrote:
> On Mon, Sep 10, 2018 at 07:59:15PM +0530, Anup Patel wrote:
>> > Yes. external is chained and IPI is still handled explicitly.
>>
>> On riscv64, there are 64 local interrupts (i.e. per-CPU interrupts).
>
> There aren't. There are 9 righ
On Mon, Sep 10, 2018 at 9:41 PM, Christoph Hellwig wrote:
> On Mon, Sep 10, 2018 at 06:07:12PM +0200, Thomas Gleixner wrote:
>> > Considering above, it is better to have a distinct irqchip and
>> > irq_domain for all local interrupts (just like this patch).
>>
>> If that's the future usage
>
> It'
On Mon, Sep 10, 2018 at 10:02:09PM +0530, Anup Patel wrote:
> You are thinking very much in-context of SiFive CPUs only.
No. I think in terms of the RISC-V spec. I could care less about
SiFive to be honest.
> Lot of SOC vendors are trying to come-up with their own CPUs
> and RISC-V spec does no
Hi Robin,
> -Original Message-
> From: Robin Murphy [mailto:robin.mur...@arm.com]
> Sent: 10 September 2018 12:02
> To: Shameerali Kolothum Thodi ;
> lorenzo.pieral...@arm.com
> Cc: will.dea...@arm.com; mark.rutl...@arm.com; Guohanjun (Hanjun Guo)
> ; John Garry ;
> pa...@codeaurora.org; v
On Mon, Sep 10, 2018 at 09:15:29PM +0800, Pu Wen wrote:
> Add x86 architecture support for new processor Hygon Dhyana Family
"... for a new processor: Hygon... "
> 18h.
Instead of all that:
> Rework to create a separated file(arch/x86/kernel/cpu/hygon.c)
> from the AMD one(arch/
On Mon, Sep 10, 2018 at 10:05 PM, Christoph Hellwig wrote:
> On Mon, Sep 10, 2018 at 10:02:09PM +0530, Anup Patel wrote:
>> You are thinking very much in-context of SiFive CPUs only.
>
> No. I think in terms of the RISC-V spec. I could care less about
> SiFive to be honest.
>
>> Lot of SOC vendo
On Mon, Sep 10, 2018 at 10:05:42PM +0530, Anup Patel wrote:
> I am quite sure RISC-V spec does not restrict the use of other
> local interrupts. Different CPU implementations can have their
> own local interrupts.
Please take a look at sections 3.1.14 and 4.1.1 of the RISC-V privileged
spec 1.10.
On 10/09/18 17:28, Quentin Perret wrote:
> The SCMI protocol can be used to get power estimates from firmware
> corresponding to each performance state of a device. Although these power
> costs are already managed by the SCMI firmware driver, they are not
> exposed to any external subsystem yet.
On Mon, Sep 10, 2018 at 5:29 AM, Oleg Nesterov wrote:
> Hi Kees,
>
> I was thinking about backporting the commit 98da7d08850fb8bde
> ("fs/exec.c: account for argv/envp pointers"), but I am not sure
> I understand it...
>
> So get_arg_page() does
>
> /*
> * Since th
This patch adds SNDRV_PCM_INFO_INTERLEAVED into PCM hardware info.
Signed-off-by: Katsuhiro Suzuki
---
sound/soc/rockchip/rockchip_pcm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/sound/soc/rockchip/rockchip_pcm.c
b/sound/soc/rockchip/rockchip_pcm.c
index f77538319221
On Mon, Sep 10, 2018 at 9:41 AM, Kees Cook wrote:
> On Mon, Sep 10, 2018 at 5:29 AM, Oleg Nesterov wrote:
>> Hi Kees,
>>
>> I was thinking about backporting the commit 98da7d08850fb8bde
>> ("fs/exec.c: account for argv/envp pointers"), but I am not sure
>> I understand it...
BTW, if you backport
On Mon, Sep 10, 2018 at 06:23:49PM +0200, Thomas Gleixner wrote:
> On Mon, 10 Sep 2018, Ville Syrjälä wrote:
> > On Mon, Sep 10, 2018 at 02:48:45PM +0200, Thomas Gleixner wrote:
> > > On Mon, 10 Sep 2018, Ville Syrjala wrote:
> > > I asked for that before and I really do not understand why you do n
Ok,
so *maybe* - and I pretty much have no clue about virt - but just
*maybe*, that kvmclock thing can be shared by all CPUs in a *guest*
then. As in: the guest should see stable clocks which are the same
regardless from which vCPU they're read and so on...
Just a dumb idea anyway - this is me th
On Thu, Sep 06, 2018 at 07:22:10PM +0900, Minchan Kim wrote:
> diff --git a/arch/arm/include/asm/pgtable-2level.h
> b/arch/arm/include/asm/pgtable-2level.h
> index 92fd2c8a9af0..91b99fadcba1 100644
> --- a/arch/arm/include/asm/pgtable-2level.h
> +++ b/arch/arm/include/asm/pgtable-2level.h
> @@ -16
On Mon, Sep 10, 2018 at 5:14 AM Arnd Bergmann wrote:
>
> On Mon, Sep 10, 2018 at 8:05 AM Stefan Agner wrote:
> >
> > ARM32 arch code uses the __naked attribute. This has previously been
> > defined in include/linux/compiler-gcc.h, which is no longer included
> > for Clang. Define __naked for Clan
On Mon, Sep 10, 2018 at 12:41:05AM -0700, syzbot wrote:
> =
> WARNING: SOFTIRQ-safe -> SOFTIRQ-unsafe lock order detected
> 4.19.0-rc2+ #229 Not tainted
> -
> syz-executor2/9399 [HC0[0]:SC0[0]:HE
On 09/10/2018 12:23 PM, Krzysztof Kozlowski wrote:
>> static struct s3c24xx_mci_pdata mini2440_mmc_cfg __initdata = {
>> - .gpio_detect = S3C2410_GPG(8),
>> - .gpio_wprotect = S3C2410_GPH(8),
>> - .set_power = NULL,
>> - .ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34,
>
On Mon, 10 Sep 2018, Ville Syrjälä wrote:
Good: 1718674.70 BogoMIPS (lpj=2863311530)
Bad: 859455.59 BogoMIPS (lpj=1431852151)
while both kernels agree on the CPU frequency of 996MHz. This pretty much
smells like the 32bit LPJ conversion bug which got fixed in rc3. Does the
problem persist with
> -Original Message-
> From: Robin Murphy [mailto:robin.mur...@arm.com]
> Sent: 10 September 2018 12:15
> To: Shameerali Kolothum Thodi ;
> lorenzo.pieral...@arm.com
> Cc: will.dea...@arm.com; mark.rutl...@arm.com; Guohanjun (Hanjun Guo)
> ; John Garry ;
> pa...@codeaurora.org; vkil...@co
On Mon, Sep 10, 2018 at 06:55:09PM +0200, Cedric Roux wrote:
> On 09/10/2018 12:23 PM, Krzysztof Kozlowski wrote:
> >> static struct s3c24xx_mci_pdata mini2440_mmc_cfg __initdata = {
> >> - .gpio_detect = S3C2410_GPG(8),
> >> - .gpio_wprotect = S3C2410_GPH(8),
> >> - .set_power
On Mon, Sep 10 2018 at 10:28 -0600, Rob Herring wrote:
On Tue, Sep 04, 2018 at 03:18:07PM -0600, Lina Iyer wrote:
Update the documentation to use interrupts-extended format for
specifying the TLMM summary IRQ line that is requested from GIC and the
PDC interrupts corresponding to the wakeup capa
Hi Linus,
On Thursday, September 6, 2018 2:24:36 PM CEST Linus Walleij wrote:
> As we augmented the regulator core to accept a GPIO descriptor instead
> of a GPIO number, we can augment the fixed GPIO regulator to look up
> and pass that descriptor directly from device tree or board GPIO
> descrip
On Thu, Sep 6, 2018 at 8:30 PM Tycho Andersen wrote:
> On Thu, Sep 06, 2018 at 10:22:46AM -0600, Tycho Andersen wrote:
> > On Thu, Sep 06, 2018 at 06:15:18PM +0200, Jann Horn wrote:
> > > On Thu, Sep 6, 2018 at 5:29 PM Tycho Andersen wrote:
> > > > The idea here is that the userspace handler shou
On Mon, Sep 10, 2018 at 2:49 AM Will Deacon wrote:
>
> On Sun, Sep 09, 2018 at 05:47:31PM +0200, Miguel Ojeda wrote:
> > All other uses of "asm goto" go through asm_volatile_goto
> > (including the arm version of the same file). For consistency,
> > use it here as well.
> >
> > Cc: Nick Desaulnier
On Mon, 10 Sep 2018, Ville Syrjälä wrote:
> On Mon, Sep 10, 2018 at 06:23:49PM +0200, Thomas Gleixner wrote:
> > 1) My workflow makes things tagged as BUG and REGRESSION urgent
> >automatically while [PATCH] just is queued to the normal pile of
> >backlog, i.e. at the end. It just sprang in
On 09/10/2018 02:37 AM, Sekhar Nori wrote:
On Monday 10 September 2018 12:55 PM, Linus Walleij wrote:
On Sat, Sep 8, 2018 at 9:41 PM Grygorii Strashko
wrote:
On 09/06/2018 09:16 AM, Keerthy wrote:
Okay now its numbered differently:
cat /sys/class/gpio/gpiochip340/ngpio
144
cat /sys/class/
Hi David,
I love your patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v4.19-rc3 next-20180910]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits
Code was mixing spaces and tabs for indenting members in structures.
Signed-off-by: Krzysztof Kozlowski
---
arch/arm/mach-s3c24xx/mach-mini2440.c | 40 +--
1 file changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/arm/mach-s3c24xx/mach-mini2440.c
b/arc
On Fri, Sep 07, 2018 at 11:54:45PM +0200, Cedric Roux wrote:
> Running:
> scripts/checkpatch.pl -f arch/arm/mach-s3c24xx/mach-mini2440.c
> revealed several errors and warnings.
>
> They were all removed, except one which is an #if 0 around the declaration
> of a gpio pin. This needs some more
This is weekend's 4.19.0-rc2-00246-gd7b686ebf704 on a Thinkad T460s.
There seems to be a usercopy warning from rng_dev read (full dmesg
below).
[0.00] microcode: microcode updated early to revision 0xc6, date =
2018-04-17
[0.00] Linux version 4.19.0-rc2-00246-gd7b686ebf704 (mroo
On 09/08/2018 12:13 AM, John Hubbard wrote:
>
> Hi Daniel and all,
>
> I'm interested in the first 3 of those 4 topics, so if it doesn't conflict
> with HMM topics or
> fix-gup-with-dma topics, I'd like to attend. GPUs generally need to access
> large chunks of
> memory, and that includes migrati
On Mon, Sep 10, 2018 at 10:09 PM, Christoph Hellwig wrote:
> On Mon, Sep 10, 2018 at 10:05:42PM +0530, Anup Patel wrote:
>> I am quite sure RISC-V spec does not restrict the use of other
>> local interrupts. Different CPU implementations can have their
>> own local interrupts.
>
> Please take a lo
On Thu, Jul 26, 2018 at 2:31 PM Wendy Liang wrote:
>
> On Tue, Jan 9, 2018 at 8:42 PM, Jassi Brar wrote:
> > On Wed, Jan 10, 2018 at 6:52 AM, Jiaying Liang wrote:
> >>> From: Jassi Brar [mailto:jassisinghb...@gmail.com]
> >
> >>> > +
> >>> > +Controller Device Node:
> >>> > +
On Mon, 10 Sep 2018, Waiman Long wrote:
One major issue with a combined count/owner is that we may have to use
cmpxchg for reader lock which will certainly impact reader-heavy
workloads. I have also thought about ways to compress the task pointer
address so that it can use fewer bits and leave t
On Tue, Apr 10, 2018 at 02:41:55PM +0200, Bartlomiej Zolnierkiewicz wrote:
> Add thermal_zone_device_toggle() helper. Then update core code and
> drivers to use it.
Cool, but I think it would be good to have some sort of rational here
at the commit message telling why this helper is being added,
Hi,
This patch set adds the CAAM crypto engine driver for DPAA2
(Data Path Acceleration Architecture v2) found on ARMv8-based SoCs
like LS1088A, LS2088A, LX2160A.
Previously sent RFC can be found here:
https://www.mail-archive.com/linux-crypto@vger.kernel.org/msg27290.html
Driver consists of:
-D
This reverts commit a211c8170b3c348353decb6e175c58a7814f218c.
(+ updated to account for driver being moved out of staging)
dpseci object will make use of these functions, thus it's time to add
them back.
Signed-off-by: Horia Geantă
---
drivers/soc/fsl/dpio/dpio-service.c | 58 ++
Add support for unkeyed and keyed (hmac) md5, sha algorithms.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/Kconfig |4 +-
drivers/crypto/caam/caamalg_qi2.c | 1712 +
drivers/crypto/caam/caamalg_qi2.h | 16 +
3 files changed, 1731 insertions(
Add CAAM driver that works using the DPSECI backend, i.e. manages
DPSECI DPAA2 objects sitting on the Management Complex (MC) fsl-mc bus.
Data transfers (crypto requests) are sent/received to/from CAAM crypto
engine via Queue Interface (v2), this being similar to existing caam/qi.
OTOH, configurat
On Fri, Aug 24, 2018 at 9:26 AM Wendy Liang wrote:
>
> Ping, any comments to the driver?
Any comments to this driver?
Thanks,
Wendy
> On Thu, Aug 16, 2018 at 3:17 AM Wendy Liang wrote:
> >
> > There are cortex-r5 processors in Xilinx Zynq UltraScale+
> > MPSoC platforms. This remoteproc driver
On Wed, 5 Sep 2018 at 04:09, Leo Yan wrote:
>
> In ETB dump function tmc_etb_dump_hw() it has nested loops. The second
> level loop is to iterate index in the range [0 .. drvdata->memwidth);
> but the index isn't really used in the code, thus the second level
> loop is useless.
>
> This patch is
caam/qi2 driver will support ahash algorithms,
thus move ahash descriptors generation in a shared location.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/Kconfig | 3 ++
drivers/crypto/caam/Makefile| 1 +
drivers/crypto/caam/caamhash.c | 79 +-
Signed-off-by: Horia Geantă
---
drivers/bus/fsl-mc/fsl-mc-bus.c | 5 +
include/linux/fsl/mc.h | 6 ++
2 files changed, 11 insertions(+)
diff --git a/drivers/bus/fsl-mc/fsl-mc-bus.c b/drivers/bus/fsl-mc/fsl-mc-bus.c
index 5d8266c6571f..4552b06fe601 100644
--- a/drivers/bus/fsl-mc
On 09/10, Kees Cook wrote:
>
> > So get_arg_page() does
> >
> > /*
> > * Since the stack will hold pointers to the strings, we
> > * must account for them as well.
> > *
> > * The size calculation is the entire vma
Currently the TPM driver only supports blocking calls, which doesn't allow
asynchronous IO operations to the TPM hardware.
This patch changes it and adds support for nonblocking write and a new poll
function to enable applications, which want to take advantage of this.
Tested-by: Philip Tricca
Si
Add a ptr to struct tpm_space to the file_priv and consolidate
of the write operations for the two interfaces.
Tested-by: Philip Tricca
Signed-off-by: Tadeusz Struk
---
drivers/char/tpm/tpm-dev-common.c |8 +---
drivers/char/tpm/tpm-dev.c| 10 ++
drivers/char/tpm/tpm-d
The TCG SAPI specification [1] defines a set of functions, which allow
applications to use the TPM device in either blocking or non-blocking fashion.
Each command defined by the specification has a corresponding
Tss2_Sys__Prepare() and Tss2_Sys__Complete() call, which
together with Tss2_Sys_Execute
On Mon, 10 Sep 2018, Waiman Long wrote:
On 09/08/2018 12:13 AM, John Hubbard wrote:
Hi Daniel and all,
I'm interested in the first 3 of those 4 topics, so if it doesn't conflict with
HMM topics or
fix-gup-with-dma topics, I'd like to attend. GPUs generally need to access
large chunks of
mem
On 09/10, Kees Cook wrote:
>
> On Mon, Sep 10, 2018 at 9:41 AM, Kees Cook wrote:
> > On Mon, Sep 10, 2018 at 5:29 AM, Oleg Nesterov wrote:
> >> Hi Kees,
> >>
> >> I was thinking about backporting the commit 98da7d08850fb8bde
> >> ("fs/exec.c: account for argv/envp pointers"), but I am not sure
>
On Fri, Sep 07, 2018 at 11:54:46PM +0200, Cedric Roux wrote:
> The mini2440 computer uses "active high" to signal that the "write protect"
> of the inserted MMC is set. The current code uses the opposite, leading to
> a wrong detection of write protection. The solution is simply to use
> ".wprotect
On 9/10/2018 5:08 PM, Mark Brown wrote:
> On Mon, Sep 10, 2018 at 01:36:29PM +0530, Akshu Agrawal wrote:
>> If capture and playback are started on different channel (I2S/BT)
>> there is a possibilty that channel information passed from machine driver
>> is overwritten before the configuration is
Am Montag, 10. September 2018, 17:13:54 CEST schrieb Manivannan Sadhasivam:
> Add devicetree binding for Rock960 board from Vamrs Limited.
>
> Signed-off-by: Manivannan Sadhasivam
> ---
> Documentation/devicetree/bindings/arm/rockchip.txt | 4
> 1 file changed, 4 insertions(+)
>
> diff --g
On 08/31/2018 01:58 AM, Jarkko Sakkinen wrote:
> Just the change to the commit message. Mislooked patchwork, the typo was
> in my response :-) I'll do recheck for 2/2. Check those comments before
> v6 if there is anything else.
Hi,
I have done the changes you requested and ran the "checkpatch.pl -
If capture and playback are started on different channel (I2S/BT)
there is a possibilty that channel information passed from machine driver
is overwritten before the configuration is done in dma driver.
Example:
113.597588: cz_max_startup: ---playback sets BT channel
113.597694: cz_dmic1_startup: -
Hi Heiko,
On Mon, Sep 10, 2018 at 07:22:26PM +0200, Heiko Stuebner wrote:
> Am Montag, 10. September 2018, 17:13:54 CEST schrieb Manivannan Sadhasivam:
> > Add devicetree binding for Rock960 board from Vamrs Limited.
> >
> > Signed-off-by: Manivannan Sadhasivam
> > ---
> > Documentation/devicet
On 09/10/2018 01:15 PM, Davidlohr Bueso wrote:
> On Mon, 10 Sep 2018, Waiman Long wrote:
>
>> One major issue with a combined count/owner is that we may have to use
>> cmpxchg for reader lock which will certainly impact reader-heavy
>> workloads. I have also thought about ways to compress the task
Signed-off-by: Julien Folly
Acked-by: Evgeniy Polyakov
---
drivers/w1/slaves/w1_ds2438.c | 66 ++-
1 file changed, 52 insertions(+), 14 deletions(-)
diff --git a/drivers/w1/slaves/w1_ds2438.c b/drivers/w1/slaves/w1_ds2438.c
index bf641a1..7c4e33d 10064
On Tue, Apr 10, 2018 at 02:41:54PM +0200, Bartlomiej Zolnierkiewicz wrote:
> Hi,
>
> [devm]_thermal_zone_of_sensor_register() is used to register
> thermal sensor by thermal drivers using DeviceTree. Besides
> registering sensor this function also immediately enables it
> (using ->set_mode method)
Using the kernel 4.19.0-rc2 it works now, so With the fix for not
calling fput when memfd == NULL the patch is
Reviewed-By: Gert Wollny
best,
Gert
Am Montag, den 10.09.2018, 15:30 +0200 schrieb Gerd Hoffmann:
> On Mon, Sep 10, 2018 at 01:31:08PM +0200, Gert Wollny wrote:
> > Am Montag, den 1
Currently we use ktime_us_delta() to calculate last residency and
state usage unconditionally, it makes no sense to do this calculation
when we fails to enter any idle state.
It can be optimize by moving the calculation after entered_state >= 0
While at it, merge those comment blocks into one and
On 09/10, Oleg Nesterov wrote:
>
> On 09/10, Kees Cook wrote:
> >
> > On Mon, Sep 10, 2018 at 9:41 AM, Kees Cook wrote:
> > > On Mon, Sep 10, 2018 at 5:29 AM, Oleg Nesterov wrote:
> > >> Hi Kees,
> > >>
> > >> I was thinking about backporting the commit 98da7d08850fb8bde
> > >> ("fs/exec.c: accou
Hi all,
Just to say that I've pushed the base tlb.h changes to a stable branch
here:
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git tlb/asm-generic
and this is already in -next via the arm64 tree. Feel free to pull this
into your own trees if you need it too.
Cheers,
Will
Em Mon, Sep 10, 2018 at 11:18:30AM -0300, Arnaldo Carvalho de Melo escreveu:
> Em Mon, Sep 10, 2018 at 10:47:54AM -0300, Arnaldo Carvalho de Melo escreveu:
> > Em Mon, Sep 10, 2018 at 12:31:54PM +0200, Jiri Olsa escreveu:
> > > On Mon, Sep 10, 2018 at 03:28:11PM +0530, Ravi Bangoria wrote:
> > > >
On Thu, Aug 30, 2018 at 10:34:20AM +0800, Jia-Ju Bai wrote:
> My static tool DSAC reports many sleep-in-atomic-context bugs involving
> regmap_lock_mutex(), so I wonder whether this function is possible to be
> executed in atomic context.
Have you actually analyzed the code paths that are really
In functions snd_soc_get_volsw_sx() or snd_soc_put_volsw_sx(),
if the result of (min + max) is negative, then fls() returns
signed integer with value as 32. This leads to signed integer
overflow as complete operation is considered as signed integer.
UBSAN: Undefined behaviour in sound/soc/soc-ops.
On 9/10/18 10:20 AM, Davidlohr Bueso wrote:
> On Mon, 10 Sep 2018, Waiman Long wrote:
>> On 09/08/2018 12:13 AM, John Hubbard wrote:
[...]
>>> It's also interesting that there are two main huge page systems (THP and
>>> Hugetlbfs), and I sometimes
>>> wonder the obvious thing to wonder: are these
Hi Sahitya,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on f2fs/dev-test]
[also build test ERROR on next-20180910]
[cannot apply to v4.19-rc3]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https
On Wed 22 Aug 10:36 PDT 2018, Douglas Anderson wrote:
> From: Manu Gautam
>
> This adds nodes for USB and related PHYs.
>
> Signed-off-by: Manu Gautam
> [dianders: reworked quite a bit]
> Signed-off-by: Douglas Anderson
Reviewed-by: Bjorn Andersson
> ---
>
> Changes in v3:
> - Don't just
Hi,
On 08.09.2018 14:24, Miguel Ojeda wrote:
> Commit 9c695203a7dd ("compiler-gcc.h: gcc-4.5 needs noclone
> and noinline on __naked functions") added noinline and noclone
> as a workaround for a gcc 4.5 bug, which was resolved in 4.6.0.
>
> Since now the minimum gcc supported version is 4.6,
> w
Hi Linus,
On Fri, Sep 07, 2018 at 10:51:19AM -0700, Linus Torvalds wrote:
> On Fri, Sep 7, 2018 at 8:45 AM Will Deacon wrote:
> >
> > Just one small fix here, preventing a VM_WARN_ON when a !present PMD/PUD
> > is "freed" as part of a huge ioremap() operation. The correct behaviour
> > is to skip
Instead of defining symbols already defined in
linux/platform_data/gpio-omap.h, use that header file.
Since we include the header into an assembler code, prevent C only bits
from being read in.
Signed-off-by: Janusz Krzysztofik
---
arch/arm/mach-omap1/ams-delta-fiq-handler.S | 12 +++-
On Wed 22 Aug 10:36 PDT 2018, Douglas Anderson wrote:
> diff --git a/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
> b/arch/arm64/boot/dts/qcom/sdm845-mtp.dts
[..]
> +
> + vdd_qusb_hs0:
> + vdda_hp_pcie_core:
> + vdda_mipi_csi0_0p9:
> + vdda_mipi_csi1_0p9:
On Wed 22 Aug 10:36 PDT 2018, Douglas Anderson wrote:
> Set the various nodes to "okay" and hook up the regulators.
>
> NOTE: For now the main USB port (the one that goes out the Type C
> connector) is forced to host. Eventually someone will need to get the
> Type C detection hooked up and get t
On 08.09.2018 14:24, Miguel Ojeda wrote:
> The naked attribute is supported by at least gcc >= 4.6 (for ARM,
> which is the only current user), gcc >= 8 (for x86), clang >= 3.1
> and icc >= 13. See https://godbolt.org/z/350Dyc
>
> Therefore, move it out of compiler-gcc.h so that the definition
> i
Am Montag, 10. September 2018, 19:26:55 CEST schrieb Manivannan Sadhasivam:
> Hi Heiko,
>
> On Mon, Sep 10, 2018 at 07:22:26PM +0200, Heiko Stuebner wrote:
> > Am Montag, 10. September 2018, 17:13:54 CEST schrieb Manivannan Sadhasivam:
> > > Add devicetree binding for Rock960 board from Vamrs Limi
The patch
ASoC: pxa: switch to new ac97 bus support
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Lin
Olof/All,
On 18-09-04 03:13 AM, Grant Likely wrote:
Hey folks. More comments below, but the short answer is I really don't
see what the problem is. Distros cannot easily support platforms that
require a dtb= parameter, and so they probably won't. They may or may
not disable 'dtb=', depending on
The patch
spi: spi-mem: Adjust op len based on message/transfer size limitations
has been applied to the spi tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next
On Mon, Sep 10, 2018 at 07:36:51PM +0200, Julien Folly wrote:
>
> Signed-off-by: Julien Folly
> Acked-by: Evgeniy Polyakov
> ---
> drivers/w1/slaves/w1_ds2438.c | 66
> ++-
> 1 file changed, 52 insertions(+), 14 deletions(-)
Hi,
This is the friendly pa
On Mon, Sep 10, 2018 at 10:42:59PM +0800, Song Qiang wrote:
> This driver was originally written by ST in 2016 as a misc input device,
> and hasn't been maintained for a long time. I grabbed some code from
> it's API and reformed it to a iio proximity device driver.
> This version of driver uses i2
On Mon, Sep 10, 2018 at 10:53 AM, Scott Branden
wrote:
> Olof/All,
>
>
> On 18-09-04 03:13 AM, Grant Likely wrote:
>>
>> Hey folks. More comments below, but the short answer is I really don't
>> see what the problem is. Distros cannot easily support platforms that
>> require a dtb= parameter, and
ACPI buffers were being allocated but never freed.
Reported-by: Pinzhen Xu
Signed-off-by: Mario Limonciello
Cc: sta...@vger.kernel.org
---
drivers/platform/x86/dell-smbios-wmi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/platform/x86/dell-smbios-wmi.c
b/drivers/platform/x86/de
An ACPI buffer that was allocated was not being freed after use.
Signed-off-by: Mario Limonciello
Cc: sta...@vger.kernel.org
---
drivers/platform/x86/alienware-wmi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/platform/x86/alienware-wmi.c
b/drivers/platform/x86/alienware-wmi.c
i
On Mon, Sep 10, 2018 at 09:16:03PM +0800, Pu Wen wrote:
> The Hygon Dhyana CPU have a special magic MSR way to force WB for
>From the last review round:
Also, it is "The ... CPU has a special..."
Please take your time and incorporate *all* review feedback - no need to
*rush* a new revision out a
On 10 September 2018 at 20:01, Olof Johansson wrote:
> On Mon, Sep 10, 2018 at 10:53 AM, Scott Branden
> wrote:
>> Olof/All,
>>
>>
>> On 18-09-04 03:13 AM, Grant Likely wrote:
>>>
>>> Hey folks. More comments below, but the short answer is I really don't
>>> see what the problem is. Distros canno
On Mon, Sep 10, 2018 at 6:53 PM, Christoph Hellwig wrote:
> On Mon, Sep 10, 2018 at 12:41:05AM -0700, syzbot wrote:
>> =
>> WARNING: SOFTIRQ-safe -> SOFTIRQ-unsafe lock order detected
>> 4.19.0-rc2+ #229 Not tainted
>> ---
On Mon, Sep 10, 2018 at 09:16:43PM +0800, Pu Wen wrote:
> The PMU architecture for Hygon Dhyana CPU is similar to the AMD Family
> 17h one. To support Hygon Dhyana PMU, call amd_pmu_init() to share
> AMD PMU initialization flow, and change the PMU name to "HYGON".
>
> The Hygon Dhyana CPU support
On Fri, 7 Sep 2018 08:24:58 +0200, Andrea Merello wrote:
> The width of the "length register" cannot be autodetected, and it is now
> specified with a DT property. Add documentation for it.
>
> Cc: Rob Herring
> Cc: Mark Rutland
> Cc: devicet...@vger.kernel.org
> Cc: Radhey Shyam Pandey
> Sign
Hi,
I'm seeing a regression with Linux next with commit 7b6ec2ae877a
("fs: convert return type int to vm_fault_t") where apps can just
hang.
The reproducable test case I have is to remove a distro package
and then add it back where adding the package back just hangs and
the package file seems cor
On Mon, 10 Sep 2018 19:33:56 +0200,
Rohit kumar wrote:
>
> In functions snd_soc_get_volsw_sx() or snd_soc_put_volsw_sx(),
> if the result of (min + max) is negative, then fls() returns
> signed integer with value as 32. This leads to signed integer
> overflow as complete operation is considered as
> -Original Message-
> From: Jiri Kosina [mailto:ji...@kernel.org]
> Sent: Monday, September 10, 2018 2:24 AM
> To: Thomas Gleixner ; Ingo Molnar ;
> Peter Zijlstra ; Josh Poimboeuf
> ; Andrea Arcangeli ;
> Woodhouse, David ; Andi Kleen ;
> Tim Chen ; Schaufler, Casey
>
> Cc: linux-kernel@
On Mon 03 Sep 04:52 PDT 2018, Rohit kumar wrote:
> Add devicetree bindings documentation file for Qualcomm
> Technolgies Inc ADSP Peripheral Image Loader.
>
> Signed-off-by: Rohit kumar
Rob, this revision looks good to me and I would like to move ahead and
merge it.
Regards,
Bjorn
> ---
> ..
On Thu, 30 Aug 2018 00:42:12 +0530, Sibi Sankar wrote:
> Remove the additional definition tag declared for WCSS sub-system
> under reset-names.
>
> Reviewed-by: Matthias Kaehlcke
> Signed-off-by: Sibi Sankar
> ---
> Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 4 ++--
> 1 file c
Hi Rob,
On Fri, Sep 7, 2018 at 2:16 PM Christian Hewitt
wrote:
>
> This change adds the uart_A used by the brmcfmac sdio module in the
> WeTek Hub and WeTek Play 2 devices. meson_uart_probe seems to mandate
> an alias (without it, BT is not working) so this is also included.
>
> Signed-off-by: Ch
On Mon 03 Sep 04:52 PDT 2018, Rohit kumar wrote:
> This adds Non PAS ADSP PIL driver for Qualcomm
> Technologies Inc SoCs.
> Added initial support for SDM845 with ADSP bootup and
> shutdown operation handled from Application Processor
> SubSystem(APSS).
>
> Signed-off-by: Rohit kumar
Thanks for
ht not using any.
> >
> > The default return value for security_fs_context_parse_param() should be
> > -ENOPARAM, both in security.h and security.c.
> >
> > I've fixed my tree and Al has pulled it, but we're now waiting on Stephen
> > Rothwell to refresh linux
On Thu, Sep 06, 2018 at 07:35:46PM +0200, Miguel Ojeda wrote:
> Hi Jarkko,
>
> On Thu, Sep 6, 2018 at 11:21 AM, Jarkko Sakkinen
> wrote:
> > There is another open. If I grep through the kernel tree I see SPDX
> > headers that are decorated both with C99- and C89-style comments. I
> > guess I ende
Add missing chosen and memory nodes.
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/amlogic/meson-axg-s400.dts | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
b/arch/arm64/boot/dts/amlogic/meson-axg-s400.dts
index d399078..f0de8
On Thu, Sep 06, 2018 at 05:50:01PM -0700, Joe Perches wrote:
> On Thu, 2018-09-06 at 19:35 +0200, Miguel Ojeda wrote:
> > > Which one is right and why the kernel tree is polluted with C99-headers
> > > when they do not pass checkpatch.pl?
>
> checkpatch ignores c99 headers since 2016.
For headers
Use the correct compatible for the AXG ethernet mac node.
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
inde
501 - 600 of 822 matches
Mail list logo
