The nr_running field has not been used since commit 2d4056fafa19
("sched/numa: Remove numa_has_capacity()") so remove it.
Signed-off-by: Mel Gorman
---
kernel/sched/fair.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
index b39fb596f6c1..2472aeaf
Srikar had an automatic NUMA balancing series merged during the 4.19 window
and there some issues I missed during review that this series addresses.
Patches 1-2 are simply removing redundant code and calculations that are
never used.
Patch 3 makes the observation that we can call select_idle_sibl
When spi_alloc_master() fails you don't want spi_master_put().
Agree, will update it.
--Dilip
On Tue, Aug 28, 2018 at 01:22:57PM -0400, Johannes Weiner wrote:
> +enum psi_states {
> + PSI_IO_SOME,
> + PSI_IO_FULL,
> + PSI_MEM_SOME,
> + PSI_MEM_FULL,
> + PSI_CPU_SOME,
> + /* Only per-CPU, to weigh the CPU in the global average: */
> + PSI_NONIDLE,
> + NR_PSI_S
Hi dee Ho peeps,
I was browsing through the clk drivers as I tried to do some cleaning.
Few days ago I submitted a patch which would add devm variants for
clkdev lookup registration. I also added devm of_provider registration
for cases where it is actually the parent device which contains clock
de
On Fri, Sep 07, 2018 at 12:16:34PM +0200, Peter Zijlstra wrote:
> This does the whole seqcount thing 6x, which is a bit of a waste.
>
> struct snapshot {
> u32 times[NR_PSI_STATES];
> };
>
> static inline struct snapshot get_times_snapshot(struct psi_group *pg, int
> cpu)
> {
> struc
When ordering events, we use preallocated buffers to store separated
events. Those buffers currently don't have their own struct, but since
they are basically array of 'struct ordered_event' objects, we use the
first event to hold buffers data - list head, that holds all buffers
together:
struc
On Mon, Aug 27, 2018 at 09:36:56PM +0200, Richard Weinberger wrote:
> > diff --git a/fs/ubifs/tnc.c b/fs/ubifs/tnc.c
> > index a47fced47823..a00809d4fe6f 100644
> > --- a/fs/ubifs/tnc.c
> > +++ b/fs/ubifs/tnc.c
> > @@ -488,6 +488,12 @@ static int try_read_node(const struct ubifs_info *c,
> > void
Stephane reported possible issue in the ordered
events code, which could lead to allocating more
memory than guarded by max_alloc_size.
He also suggested the fix to properly check that
the new size is below the max_alloc_size limit.
Reported-and-suggested-by: Stephane Eranian
Link: http://lkml.k
On Tue, Aug 28, 2018 at 01:22:57PM -0400, Johannes Weiner wrote:
> +static void psi_clock(struct work_struct *work)
> +{
> + struct delayed_work *dwork;
> + struct psi_group *group;
> + bool nonidle;
> +
> + dwork = to_delayed_work(work);
> + group = container_of(dwork, struct p
The current custom solution for the G920 is not the best because
hid_hw_start() is not called at the end of the .probe().
It means that any configuration retrieved after the initial hid_hw_start
would not be exposed to user space without races.
We can simply force hid_hw_start to just enable the t
Hi Jiri, Nestor,
I have this series in my tree for a while now (first commit was in January).
I never sent it (as far as I can remember*) because I was requesting
feedback regarding the G920 wheel. I think I haven't break it, but
mistakes can happen.
Anyway, I think it's been too long, so I am ju
From: Colin Ian King
A null check before a kfree is redundant, so remove it.
Signed-off-by: Colin Ian King
---
drivers/sbus/char/oradax.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/sbus/char/oradax.c b/drivers/sbus/char/oradax.c
index 524f9ea62e52..6516bc3cb5
On the gaming mice, there are 2 interfaces, one for the mouse and one
for the macros. Better allow everybody to go through hid-logitech-hidpp
than trying to be smarter.
Signed-off-by: Benjamin Tissoires
---
drivers/hid/hid-logitech-hidpp.c | 77 +++-
1 file ch
The G700 is using a non unifying receiver, so it's easy to add its support
in hid-logitech-hidpp now.
With this, the 2 input nodes attached to the mouse will be enumerated
as "Logitech G700" and the battery power_supply will be exported (HID++
1.0 battery type).
Signed-off-by: Benjamin Tissoires
The non-Unifying receivers forward the input events over one HID++
capable node (the second one) and one which is not HID++ capable (the
first one, the keyboard). We can use the HID++ information to know
which device name and serial is connected to the first node. For that,
delay the probe of the n
From: Borislav Petkov
There's no 'allocatote' - use the next best thing: 'allocate' :-)
Signed-off-by: Borislav Petkov
Cc: Ingo Molnar
Cc: Josh Poimboeuf
Cc: Peter Zijlstra
Cc: "Steven Rostedt (VMware)"
Cc: Jason Baron
---
kernel/jump_label.c | 2 +-
1 file changed, 1 insertion(+), 1 dele
Some low cost devices don't even have a name (nor a serial) registered
in the receiver. In those case, create a better name that "Logitech
USB Receiver" or even "Logitech " if we try to get their name.
Signed-off-by: Benjamin Tissoires
---
drivers/hid/hid-logitech-hidpp.c | 36 +
The non unifying receivers are similar to a Unifying one, but not
entirely. They don't come with the DJ collections and thus can't be
handled by hid-logitech-dj.
To enable connection notifications, we need to instruct the receiver (0xff)
that we can handle those. Then, we need to retrieve the devi
The receiver of the G900 is similar to a Unifying one. However,
if we switch the receiver into the DJ mode through hid-logitech-dj,
the reports emitted by the mouse are from a new kind. Instead of finding
out what they are, and given that only one device should be connected
to the receiver, just us
On Fri, Sep 07, 2018 at 12:23:14AM +, Sasha Levin wrote:
> On Mon, Sep 03, 2018 at 12:16:26PM +0100, Mark Brown wrote:
> >I'm worried that if anyone notices this at all they will have already
> >compensated for the delays in userspace and therefore this will cause
> >them to see problems as th
I am actually suggesting people to not populate this list, and I should
probably start to apply my advices to myself.
The end result means that if your initrd is lacking hid-logitech-dj
or hid-logitech-hidpp, but still contains hid-generic, then your
keyboard will work during pre-init.
Signed-off
On Fri, 7 Sep 2018, Feng Tang wrote:
> On Fri, Aug 31, 2018 at 09:36:59PM +0800, Feng Tang wrote:
> > Any sugestion? I can only have patch like this:
>
> Could you review this patch, as at this time window there is no usable memory
> block or other memory allocators that I know, so I follow the ex
From: Liang Yang
Add initial support for the Amlogic NAND flash controller which found
in the Meson-GXBB/GXL/AXG SoCs.
Signed-off-by: Liang Yang
Signed-off-by: Yixun Lan
Signed-off-by: Jianxin Pan
---
drivers/mtd/nand/raw/Kconfig | 10 +
drivers/mtd/nand/raw/Makefile |1 +
dri
These two patches try to add initial NAND driver support for Amlogic Meson
SoCs, current it has been tested on GXL(p212) and AXG(s400) platform.
Changes since v2 at [3]:
- remove some hardcode time value, like twb
- use dev wait R/B instead of nand_soft_waitrdy
- implement nfc ecc init by ecc
On 9/6/18 12:41 PM, Joe Perches wrote:
On Thu, 2018-09-06 at 13:32 +0300, Dan Carpenter wrote:
Thanks.
Reviewed-by: Dan Carpenter
Trivial, but these case statement blocks should prefer
unindented blocks instead of reformatting the test.
Perhaps similar to the below for each of the cases:
From: Liang Yang
Add Amlogic NAND controller dt-bindings for Meson SoC,
Current this driver support GXBB/GXL/AXG platform.
Signed-off-by: Liang Yang
Signed-off-by: Yixun Lan
---
.../devicetree/bindings/mtd/amlogic,meson-nand.txt | 91 ++
1 file changed, 91 insertions(+)
c
NAND devices need additional data area (OOB) for error correction,
but it is also used for Bad Block Marker (BBM). In many cases, the
first byte in OOB is used for BBM, but the location actually depends
on chip vendors. The NAND controller should preserve the precious
BBM to keep track of bad blo
On Wed, Sep 05, 2018 at 05:43:03PM -0400, Johannes Weiner wrote:
> On Tue, Aug 28, 2018 at 01:22:49PM -0400, Johannes Weiner wrote:
> > This version 4 of the PSI series incorporates feedback from Peter and
> > fixes two races in the lockless aggregator that Suren found in his
> > testing and which
On 2018-09-05 14:13, whitequark wrote:
On 2018-09-05 13:50, mario.limoncie...@dell.com wrote:
Some Dell XPS systems do not support that TBT2<->TBT3 adapter. I think
I
tried this on XPS 15 9550 and XPS 13 9365 and in both cases it is
rejected. I think it has something to do with the PD controlle
On Fri, 2018-09-07 at 08:39 +0200, Jiri Slaby wrote:
> On 09/07/2018, 06:50 AM, kernel test robot wrote:
> > FYI, we noticed the following commit (built with gcc-7):
> >
> > commit: 0b4f83d510f6fef6bb9da25f122c8d733d50516f ("[PATCH 2/4] tty:
> > Hold tty_ldisc_lock() during tty_reopen()")
> > url:
On Fri, Sep 07, 2018 at 11:11:35AM +0100, Mel Gorman wrote:
> Srikar had an automatic NUMA balancing series merged during the 4.19 window
> and there some issues I missed during review that this series addresses.
>
> Patches 1-2 are simply removing redundant code and calculations that are
> never
On Fri, Sep 07, 2018 at 11:11:39AM +0100, Mel Gorman wrote:
> Commit 305c1fac3225 ("sched/numa: Evaluate move once per node")
> restructured how task_numa_compare evaluates load but there is an anomaly.
> task_numa_find_cpu() checks if the load balance between too nodes is too
> imbalanced with the
On Fri, Sep 07, 2018 at 09:51:04AM +0200, Vincent Guittot wrote:
> It can happen that load_balance finds a busiest group and then a busiest rq
> but the calculated imbalance is in fact null.
Cute. Does that happen often?
> If the calculated imbalance is null, it's useless to try to find a busiest
On Fri, Sep 07, 2018 at 12:35:21PM +0200, Borislav Petkov wrote:
> From: Borislav Petkov
>
> There's no 'allocatote' - use the next best thing: 'allocate' :-)
There damn well should be ;-)
Thanks!
From: Michal Hocko
should_suppress_show_mem has been introduced to reduce the overhead of
show_mem on large NUMA systems. Things have changed since then though.
Namely c78e93630d15 ("mm: do not walk all of system memory during
show_mem") has reduced the overhead considerably.
Moreover warn_alloc
On Fri, Sep 07, 2018 at 12:46:21PM +0530, Agrawal, Akshu wrote:
> But more likely I think the delay was just getting left out and there
> wouldn't have been a compensation in userspace.
Yes, I don't think most users are going to notice this either way - the
overwhelming majority of them won't hav
> > > > > - xilinx_write(chan, XILINX_CDMA_REG_SRCADDR, hw-
> > > > >src_addr);
> > > > > - xilinx_write(chan, XILINX_CDMA_REG_DSTADDR, hw-
> > > > >dest_addr);
> > > > > + xilinx_write(chan, XILINX_CDMA_REG_SRCADDR,
> > > > (dma_addr_t)
> > > > > +
On 8/14/2018 7:58 PM, Jerome Brunet wrote:
> On Tue, 2018-08-14 at 18:38 +0800, Jianxin Pan wrote:
>> This attempt will try to add new DT files to support Meson-G12A SoC.
>>
>> 1) first, Please notice that, in this patch series, the DT node about 16M
>> reserved
>> memory for hwrom is removed, sin
On 09/06/2018 12:04 AM, Arnaldo Carvalho de Melo wrote:
> rpm -e iputils-debuginfo
I have done the same on my s390 this morning:
[root@p23lp27 perf]# ./perf test ping
60: probe libc's inet_pton & backtrace it with ping : Ok
[root@p23lp27 perf]# rpm -e iputils-debuginfo
[root@p23lp27 perf]#
On Thu, Sep 06, 2018 at 05:27:28PM -0700, Grant Grundler wrote:
> Commit ca917f9fe1a0fab added use of usleep_range() but not
> the corresponding "include ". The result is
> with Chrome OS won't build because warnings are forced
> to be errors:
> mnt/host/source/src/third_party/kernel/v4.4/sound/soc
On 09/07/2018 01:43 PM, Michal Hocko wrote:
> From: Michal Hocko
>
> should_suppress_show_mem has been introduced to reduce the overhead of
> show_mem on large NUMA systems. Things have changed since then though.
> Namely c78e93630d15 ("mm: do not walk all of system memory during
> show_mem") has
This change adds the uart_A used by the brmcfmac sdio module in the
WeTek Hub and WeTek Play 2 devices. meson_uart_probe seems to mandate
an alias (without it, BT is not working) so this is also included.
Signed-off-by: Christian Hewitt
---
arch/arm64/boot/dts/amlogic/meson-gxbb-wetek.dtsi | 13
On Fri, 7 Sep 2018 18:57:10 +0800
Jianxin Pan wrote:
> From: Liang Yang
>
> Add Amlogic NAND controller dt-bindings for Meson SoC,
> Current this driver support GXBB/GXL/AXG platform.
>
> Signed-off-by: Liang Yang
> Signed-off-by: Yixun Lan
> ---
> .../devicetree/bindings/mtd/amlogic,meson-
Since commit cafa0010cd51f ("Raise the minimum required gcc version to
4.6"), sparse check fails as follows:
[root@pc16082vm linux-powerpc]# make C=2 arch/powerpc/kernel/process.o
CALLscripts/checksyscalls.sh
CHECK scripts/mod/empty.c
./include/linux/compiler-gcc.h:14:3: error: Sorry,
On Thu, Aug 30, 2018 at 01:24:58PM -0700, subhra mazumdar wrote:
> +void pipe_busy_wait(struct pipe_inode_info *pipe)
> +{
> + unsigned long wait_flag = pipe->pipe_wait_flag;
> + unsigned long start_time = pipe_busy_loop_current_time();
> +
> + pipe_unlock(pipe);
> + preempt_disable
On Fri, Sep 07, 2018 at 01:24:55PM +0200, Peter Zijlstra wrote:
> On Fri, Sep 07, 2018 at 11:11:35AM +0100, Mel Gorman wrote:
> > Srikar had an automatic NUMA balancing series merged during the 4.19 window
> > and there some issues I missed during review that this series addresses.
> >
> > Patches
On Tue, Aug 28, 2018 at 10:52:53AM -0500, Rob Herring wrote:
> In preparation to remove the node name pointer from struct device_node,
> convert printf users to use the %pOFn format specifier.
>
> Cc: Frank Rowand
> Cc: Andrew Lunn
> Cc: Florian Fainelli
> Cc: devicet...@vger.kernel.org
> Cc: n
Le Friday 07 Sep 2018 à 13:37:49 (+0200), Peter Zijlstra a écrit :
> On Fri, Sep 07, 2018 at 09:51:04AM +0200, Vincent Guittot wrote:
> > It can happen that load_balance finds a busiest group and then a busiest rq
> > but the calculated imbalance is in fact null.
>
> Cute. Does that happen often?
On Fri, Sep 07, 2018 at 01:33:09PM +0200, Peter Zijlstra wrote:
> > ---
> > kernel/sched/fair.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
> > index d59d3e00a480..d4c289c11012 100644
> > --- a/kernel/sched/fair.c
> > ++
The superblock node is read/modified/written several times throughout
the UBIFS code. Instead of reading it from the device each time just
keep a copy in memory and write back the modified copy when necessary.
This patch helps for authentication support, here we not only have to
read the superblock
The LPT needs to be authenticated aswell. Since the LPT is only written
during commit it is enough to authenticate the whole LPT with a single
hash which is stored in the master node. Only the leaf nodes (pnodes)
are hashed which makes the implementation much simpler than it would be
to hash the co
On Thu, 6 Sep 2018 at 23:27, Cedric Roux wrote:
>
> The mini2440 computer uses "active high" to signal that the "write protect"
> of the inserted MMC is set. The current code uses the opposite, leading to
> a wrong detection of write protection. The solution is simply to use
> ".wprotect_invert =
Nodes that are written to flash can only be authenticated through the
index after the next commit. When a journal replay is necessary the
nodes are not yet referenced by the index and thus can't be
authenticated.
This patch overcomes this situation by creating a hash over all nodes
beginning from
In authenticated mode we cannot fixup the inode sizes in-place
during recovery as this would invalidate the hashes and HMACs
we stored for this inode.
Instead, we just write the updated inodes to the journal. We can
only do this after ubifs_rcvry_gc_commit() is done though, so for
authenticated mo
The master node contains hashes over the root index node and the LPT.
This patch adds a HMAC to authenticate the master node itself.
Signed-off-by: Sascha Hauer
---
fs/ubifs/master.c | 61 -
fs/ubifs/recovery.c | 9 ---
fs/ubifs/ubifs.h| 1
As part of the UBIFS authentication support every branch in the index
gets a hash covering the referenced node. To make that happen the tree
node cache needs hashes over the nodes. This patch adds a hash argument
to ubifs_tnc_add() and ubifs_tnc_add_nm(). The hashes are calculated
from the callers
On Wed, Sep 05, 2018 at 02:31:28PM -0700, Andy Lutomirski wrote:
> On Tue, Sep 4, 2018 at 12:04 AM, Peter Zijlstra wrote:
> > On Mon, Sep 03, 2018 at 03:59:44PM -0700, Andy Lutomirski wrote:
> >> There is a possible alternative approach: we could instead move the
> >> trampoline within 2G of the
This patch adds the various helper functions needed for authentication
support. We need functions to hash nodes, to embed HMACs into a node and
to compare hashes and HMACs. Most functions first check if this
filesystem is authenticated and bail out early if not, which makes the
functions safe to be
During creation of the default filesystem on an empty flash the default
LPT is created. With this patch a hash over the default LPT is
calculated which can be added to the default filesystems master node.
Signed-off-by: Sascha Hauer
---
fs/ubifs/lpt.c | 21 -
fs/ubifs/sb.c
To be able to authenticate the garbage collector journal head add
authentication nodes to the buds the garbage collector creates.
Signed-off-by: Sascha Hauer
---
fs/ubifs/gc.c | 46 +++---
1 file changed, 43 insertions(+), 3 deletions(-)
diff --git a/fs/u
ubifs_lpt_lookup() starts by looking up the nth pnode in the LPT. We
already have this functionality in ubifs_pnode_lookup(). Use this
function rather than open coding its functionality.
Signed-off-by: Sascha Hauer
---
fs/ubifs/lpt.c | 20 ++--
1 file changed, 2 insertions(+), 18
With this patch the hashes over the index nodes stored in the tree node
cache are written to flash and are checked when read back from flash.
The hash of the root index node is stored in the master node.
During journal replay the hashes are regenerated from the read nodes
and stored in the tree no
This patch adds the changes to the on disk format needed for
authentication support. We'll add:
* a HMAC covering super block node
* a HMAC covering the master node
* a hash over the root index node to the master node
* a hash over the LPT to the master node
* a flag to the filesystem flag indicat
With the preparations all being done this patch now enables authentication
support for UBIFS. Authentication is enabled when the newly introduced
auth_key and auth_hash_name mount options are passed. auth_key provides
the key which is used for authentication whereas auth_hash_name provides
the hash
This adds a HMAC covering the super block node and adds the logic that
decides if a filesystem shall be mounted unauthenticated or
authenticated.
Signed-off-by: Sascha Hauer
---
fs/ubifs/sb.c | 70 ++-
1 file changed, 69 insertions(+), 1 deletion(-
read_znode() takes len, lnum and offs arguments which the caller all
extracts from the same struct ubifs_zbranch *. When adding authentication
support we would have to add a pointer to a hash to the arguments which
is also part of struct ubifs_zbranch. Pass the ubifs_zbranch * instead
so that we do
This patch calculates the necessary hashes and HMACs for the default
filesystem so that the dynamically created default fs can be
authenticated.
Signed-off-by: Sascha Hauer
---
fs/ubifs/sb.c | 34 +++---
1 file changed, 27 insertions(+), 7 deletions(-)
diff --git a/f
With authentication support some nodes (master node, super block node)
get a HMAC embedded into them. This patch adds functions to prepare and
write such a node.
The difficulty is that besides the HMAC the nodes also have a CRC which
must stay valid. This means we first have to initialize all field
Signed-off-by: Sascha Hauer
---
.../filesystems/ubifs-authentication.md | 426 ++
1 file changed, 426 insertions(+)
create mode 100644 Documentation/filesystems/ubifs-authentication.md
diff --git a/Documentation/filesystems/ubifs-authentication.md
b/Documentation/filesyst
ubifs_lpt_lookup could be implemented using pnode_lookup. To make that
possible move pnode_lookup from lpt.c to lpt_commit.c. Rename it to
ubifs_pnode_lookup since it's now exported.
Signed-off-by: Sascha Hauer
---
fs/ubifs/lpt.c| 32
fs/ubifs/lpt_commit.
Hello all,
The i40e_ethtool_stats.h is just included by i40e/i40e_ethtool.c. So the
static doesn't make any affect. And Carolyn's team is working rebuild
i40e and i40evf.
Cheers,
Dongsheng
On 9/7/2018 7:19 PM, Wang, Dongsheng wrote:
> Remove "inline" from __i40e_add_stat_strings and move the fun
Make sure that during replay all buds can be authenticated. To do
this we calculate the hash chain until we find an authentication
node and check the HMAC in that node against the current status
of the hash chain.
After a power cut it can happen that some nodes have been written, but
not yet the a
create_default_filesystem() allocates memory for a node, writes that
node and frees the memory directly afterwards. With this patch we
allocate memory for all nodes at the beginning of the function and
free the memory at the end. This makes it easier to implement
authentication support since with a
Hi all,
This patchset introduces UBIFS authentication support. With authentication
enabled UBIFS is fully protected against offline changes. This is done by
hashing the different parts of UBIFS and protecting the toplevel hashes with
HMACs. The parts that are protected are:
* the index tree
* the
write_node() is used only once and can easily be replaced with calls
to ubifs_prepare_node()/write_head() which makes the code a bit shorter.
Signed-off-by: Sascha Hauer
---
fs/ubifs/journal.c | 39 +--
1 file changed, 5 insertions(+), 34 deletions(-)
diff --
try_read_node() takes len, lnum and offs arguments which the caller all
extracts from the same struct ubifs_zbranch *. When adding authentication
support we would have to add a pointer to a hash to the arguments which
is also part of struct ubifs_zbranch. Pass the ubifs_zbranch * instead
so that we
Signed-off-by: Sascha Hauer
---
arch/arm/configs/imx_v6_v7_defconfig | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/arch/arm/configs/imx_v6_v7_defconfig
b/arch/arm/configs/imx_v6_v7_defconfig
index 7eca43ff69bb..2ce9626e213b 100644
--- a/arch/arm/configs/imx_
When adding authentication support we will embed a HMAC into some
nodes. To prepare these nodes we have to first initialize the nodes,
then add a HMAC and finally add a CRC. To accomplish this add separate
ubifs_init_node/ubifs_crc_node functions.
Signed-off-by: Sascha Hauer
---
fs/ubifs/io.c
On Wed, Aug 29, 2018 at 03:08:38PM +0100, Qais Yousef wrote:
> It was hard to track the history of this and *why* it's needed.
Yeah, my bad..
So at some point I wanted to do dynamic capacity and dynamic smt gain by
using the x86 APERF/MPERF stuff. But it never quite worked and we got
stuck with t
This patch provides arch_show_interrupts() implementation to
show IPI stats via /proc/interrupts.
Now the contents of /proc/interrupts" will look like below:
CPU0 CPU1 CPU2 CPU3
8: 17 7 6 14 SiFive PLIC 8 virtio0
10: 10
On Fri, Sep 07, 2018 at 01:37:39PM +0100, Mel Gorman wrote:
> On Fri, Sep 07, 2018 at 01:33:09PM +0200, Peter Zijlstra wrote:
> > > ---
> > > kernel/sched/fair.c | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
> > > in
On Fri, 7 Sep 2018, Dou Liyang wrote:
> -int irq_matrix_alloc_managed(struct irq_matrix *m, unsigned int cpu)
> +int irq_matrix_alloc_managed(struct irq_matrix *m, const struct cpumask *msk,
> + unsigned int *mapped_cpu)
> {
> - struct cpumap *cm = per_cpu_ptr(m->ma
On 06.09.2018 18:42, Masami Hiramatsu wrote:
> Peter Oberparleiter wrote:
>> I've attached a quick fix that should address both problems. I'd
>> appreciate if this patch could get some testing before I post proper fix
>> patches.
>
> Hmm, I'm still not able to reproduce it on powerpc cross build
On Fri, 7 Sep 2018 at 14:35, Vincent Guittot wrote:
>
> Le Friday 07 Sep 2018 à 13:37:49 (+0200), Peter Zijlstra a écrit :
> > On Fri, Sep 07, 2018 at 09:51:04AM +0200, Vincent Guittot wrote:
> > > It can happen that load_balance finds a busiest group and then a busiest
> > > rq
> > > but the cal
On Fri, Sep 07, 2018 at 02:35:51PM +0200, Vincent Guittot wrote:
> Le Friday 07 Sep 2018 à 13:37:49 (+0200), Peter Zijlstra a écrit :
> > On Fri, Sep 07, 2018 at 09:51:04AM +0200, Vincent Guittot wrote:
> > > It can happen that load_balance finds a busiest group and then a busiest
> > > rq
> > > b
On 09/07/2018 03:34 AM, Heikki Krogerus wrote:
+Guenter
On Thu, Sep 06, 2018 at 01:26:44PM -0600, Angus Ainslie (Purism) wrote:
If the board is being powered by USB disabling the source and sink
can remove power from the board. Default to source and sink enabled.
Seems to me that might viola
On Fri, Sep 07, 2018 at 10:14:38AM +0200, Arnd Bergmann wrote:
> On Fri, Sep 7, 2018 at 5:04 AM Guo Ren wrote:
> >
> > On Thu, Sep 06, 2018 at 04:31:16PM +0200, Arnd Bergmann wrote:
> > > On Wed, Sep 5, 2018 at 2:08 PM Guo Ren wrote:
> > >
> > > Can you describe how C-Sky hardware implements MMIO
* Jirka Hladky [2018-09-07 11:34:49]:
Hi Jirka,
>
> We have detected a significant performance drop (20% and more) with
> 4.19rc1 relatively to 4.18 vanilla. We see the regression on different
> 2 NUMA and 4 NUMA boxes with pretty much all the benchmarks we use -
> NAS, Stream, SPECjbb2005, SPE
On Fri, Sep 07, 2018 at 02:55:54PM +0200, Peter Zijlstra wrote:
> > Beside this patch, I'm preparing another patch in fix small imbalance to
> > ensure 1 task per CPU in similar situation but according to the comment
> > above,
> > we can reach this situation because of tasks priority
>
> Didn't
From: pascal paillet
stpmic1 is a pmic from STMicroelectronics. The stpmic1 integrates 10
regulators and 3 switches with various capabilities.
Signed-off-by: pascal paillet
---
changes in v2:
* the hardware component has been renamed from stpmu1 to stpmic1 !
* replace _ with - in properties nam
From: pascal paillet
The stpmic1 pmic is able to manage an onkey button. This driver exposes
the stpmic1 onkey as an input device. It can also be configured to
shut-down the power supplies on a long key-press with an adjustable
duration.
Signed-off-by: pascal paillet
---
changes in v2:
* the ha
From: pascal paillet
The STPMIC1 regulators supply power to the application processor as well as
to the external system peripherals such as DDR, Flash memories and system
devices.
Signed-off-by: pascal paillet
---
changes in v2:
* the hardware component has been renamed from stpmu1 to stpmic1 !
From: pascal paillet
The stpmic1 PMIC embeds a watchdog which is disabled by default.
In case of watchdog, the PMIC goes off.
Signed-off-by: pascal paillet
---
Documentation/devicetree/bindings/watchdog/st,stpmic1-wdt.txt | 11 +++
1 file changed, 11 insertions(+)
create mode 100644
From: pascal paillet
stpmic1 is a pmic from STMicroelectronics. The stpmic1 integrates 10
regulators and 3 switches with various capabilities.
Signed-off-by: pascal paillet
---
changes in v2:
* the hardware component has been renamed from stpmu1 to stpmic1 !
* Handle remarks from Enric
* change
From: pascal paillet
The stpmic1 pmic is able to manage an onkey button. It can be configured
to shut-down the power supplies on a long key-press with an adjustable
duration.
Signed-off-by: pascal paillet
---
.../devicetree/bindings/input/st,stpmic1-onkey.txt | 31 ++
1 fil
From: pascal paillet
The stpmic1 PMIC embeds a watchdog which is disabled by default. As soon
as the watchdog is started, it must be refreshed periodically otherwise
the PMIC goes off.
Signed-off-by: pascal paillet
---
changes in v2:
* the hardware component has been renamed from stpmu1 to stpm
From: pascal paillet
The stpmic1 PMIC embeds several regulators and witches with
different capabilities.
Signed-off-by: pascal paillet
---
changes in v2:
* the hardware component has been renamed from stpmu1 to stpmic1 !
* change headers
* rework map_mode function
* remove proprietary get volta
From: pascal paillet
The goal of this patch-set is to propose a driver for the STPMIC1 PMIC from
STMicroelectronics.
The STPMIC1 regulators supply power to an application processor as well as
to external system peripherals such as DDR, Flash memories and system
devices. It also features onkey
* Mel Gorman [2018-09-07 11:11:38]:
> task_numa_migrate is responsible for finding a core on a preferred NUMA
> node for a task. As part of this, task_numa_find_cpu iterates through
> the CPUs of a node and evaulates CPUs, both idle and with running tasks,
> as placement candidates. Generally tho
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