On Mon, Jul 02, 2018 at 02:49:28PM +0200, Michal Hocko wrote:
> On Mon 02-07-18 15:33:50, Kirill A. Shutemov wrote:
> [...]
> > I probably miss the explanation somewhere, but what's wrong with allowing
> > other thread to re-populate the VMA?
>
> We have discussed that earlier and it boils down to
From: Colin Ian King
Variable payload_virt is being assigned but is never used hence it is
redundant and can be removed.
Cleans up clang warning:
warning: variable 'payload_virt' set but not used [-Wunused-but-set-variable]
Signed-off-by: Colin Ian King
---
drivers/mtd/nand/raw/gpmi-nand/gpmi
* Suzuki K Poulose [180703 08:01]:
>
>
> Hi Tony,
>
> On 07/03/2018 08:09 AM, Tony Lindgren wrote:
> > * Suzuki K Poulose [180605 14:48]:
> > > Switch to the new coresight bindings for hardware ports
> >
> > So is this patch safe for me to pick separately for v4.19?
>
> No. Please ignore thi
Hi Joey,
On Sun, Jul 1, 2018 at 2:19 AM, Joey Pabalinas wrote:
> Avoid processing reports containing invalid values to reduce
> multitouch input stutter.
>
> Signed-off-by: Joey Pabalinas
>
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/hid/hid-multitouch.c b/drivers/hid/hid-multito
On Mon, Jul 02, 2018 at 10:30:09PM -0400, Mathieu Desnoyers wrote:
> > Use "get_user()". It works for 64-bit objects too, and it will be
> > atomic in the 32-bit sub-parts on a 32-bit architecture.
>
> Is it really ? Last time we had this discussion, not all architectures
> guaranteed that reading
On Tue, 2018-07-03 at 14:57 +, Yixun Lan wrote:
> Document the EMMC sub clock controller driver, the potential consumer
> of this driver is EMMC or NAND.
>
> Signed-off-by: Yixun Lan
> ---
> .../bindings/clock/amlogic,emmc-clkc.txt | 45 +++
> 1 file changed, 45 insertio
On Sun, Jul 1, 2018 at 2:19 AM, Joey Pabalinas wrote:
> The HID_GROUP_MULTITOUCH_WIN_8 group never needs to check for the serial
> protocol, so avoid setting `td->serial_maybe = true;` in order to avoid
> an unnecessary mt_post_parse_default_settings() call
>
> Signed-off-by: Joey Pabalinas
>
>
On Sun, Jul 1, 2018 at 2:19 AM, Joey Pabalinas wrote:
> Elide lone `else` cases and replace `else if` clauses
> with plain `if` conditionals when they occur immediately
> after return statements.
>
> Signed-off-by: Joey Pabalinas
>
This one looks good.
Reviewed-by: Benjamin Tissoires
Just FYI,
On Mon, 2 Jul 2018, Andy Shevchenko wrote:
On Mon, Jul 2, 2018 at 9:41 AM, Nikolaus Voss
wrote:
On Fri, 29 Jun 2018, Andy Shevchenko wrote:
I'm not sure I understand how ->probe_new() is supposed to work
against i2c_id_table, but I don't care for legacy platform data
anyway.
What I would lik
On Tue 03-07-18 11:12:05, Kirill A. Shutemov wrote:
> On Mon, Jul 02, 2018 at 02:49:28PM +0200, Michal Hocko wrote:
> > On Mon 02-07-18 15:33:50, Kirill A. Shutemov wrote:
> > [...]
> > > I probably miss the explanation somewhere, but what's wrong with allowing
> > > other thread to re-populate the
* Randy Dunlap wrote:
> On 07/02/2018 07:06 AM, Christoph Hellwig wrote:
> > On Sun, Jul 01, 2018 at 07:48:38PM -0700, Randy Dunlap wrote:
> >> From: Randy Dunlap
> >>
> >> Currently for x86, the "Memory Management" kconfig options are
> >> displayed under "Processor type and features." This
On Tue, Jul 03, 2018 at 10:14:49AM +0200, Peter Zijlstra wrote:
> On Mon, Jul 02, 2018 at 10:30:09PM -0400, Mathieu Desnoyers wrote:
> > > Use "get_user()". It works for 64-bit objects too, and it will be
> > > atomic in the 32-bit sub-parts on a 32-bit architecture.
> >
> > Is it really ? Last ti
On Mon, Jul 02, 2018 at 07:01:28PM +, Benjamin Gilbert wrote:
> On Mon, Jul 02, 2018 at 12:34:50PM +0300, Kirill A. Shutemov wrote:
> > Could you check if you can trigger the issue with my changes to config and
> > the way I run KVM?
>
> Yes, the issue still triggers in that case. I've also v
* Dan Williams wrote:
> Hi Ingo,
>
> Here is an additional copy_to_iter_mcsafe() fix to address the crash
> reported by Ross. This now passes xfstests:generic/323 on my system.
The lib/iov_iter fix would need an Acked-by from Al.
Thanks,
Ingo
On Mon, Jul 02, 2018 at 09:16:27PM -0600, Rob Herring wrote:
>
> Are these configs mutually exclusive? We try to have one kernel build
> serve many platforms. So you'd probably want to divide things between
> the 2 ABIs.
Yes, they are mutually exclusive, and may I prepare defconfigs like
these:
a
Most users won't even know what string from this to google on to find
out what this is all about:
Jul 03 13:57:20 jidanni7 kernel: [ cut here ]
Jul 03 13:57:20 jidanni7 kernel: recvmsg bug 2: copied 73BCB6CD seq 70F17CBE
rcvnxt 73BCB9AA fl 0
Jul 03 13:57:20 jidanni7 kerne
On 03-07-18, 15:34, Shawn Guo wrote:
> Please use my kernel.org email address for future patches.
As there were many patches I relied on get_maintainers to do that
stuff and it didn't pick you up by default. Maybe try fixing
MAINTAINERS to add an entry against your email id ?
--
viresh
Commit-ID: 612bc3b3d4be749f73a513a17d9b3ee1330d3487
Gitweb: https://git.kernel.org/tip/612bc3b3d4be749f73a513a17d9b3ee1330d3487
Author: Tom Lendacky
AuthorDate: Mon, 2 Jul 2018 16:36:02 -0500
Committer: Ingo Molnar
CommitDate: Tue, 3 Jul 2018 09:45:48 +0200
x86/bugs: Fix the AMD SSBD u
Commit-ID: 845d382bb15c6e7dc5026c0ff919c5b13fc7e11b
Gitweb: https://git.kernel.org/tip/845d382bb15c6e7dc5026c0ff919c5b13fc7e11b
Author: Tom Lendacky
AuthorDate: Mon, 2 Jul 2018 16:35:53 -0500
Committer: Ingo Molnar
CommitDate: Tue, 3 Jul 2018 09:45:48 +0200
x86/bugs: Update when to che
On Mon, Jul 02, 2018 at 06:52:47PM -0400, Sinan Kaya wrote:
> If a bridge supports hotplug and observes a PCIe fatal error, the following
> events happen:
>
> 1. AER driver removes the devices from PCI tree on fatal error
> 2. AER driver brings down the link by issuing a secondary bus reset waits
Commit-ID: a7bea8308933aaeea76dad7d42a6e51000417626
Gitweb: https://git.kernel.org/tip/a7bea8308933aaeea76dad7d42a6e51000417626
Author: Jan Beulich
AuthorDate: Mon, 2 Jul 2018 04:31:54 -0600
Committer: Ingo Molnar
CommitDate: Tue, 3 Jul 2018 09:59:29 +0200
x86/asm/64: Use 32-bit XOR to
Commit-ID: 6709812f094d96543b443645c68daaa32d3d3e77
Gitweb: https://git.kernel.org/tip/6709812f094d96543b443645c68daaa32d3d3e77
Author: Jan Beulich
AuthorDate: Mon, 2 Jul 2018 04:47:57 -0600
Committer: Ingo Molnar
CommitDate: Tue, 3 Jul 2018 09:59:29 +0200
x86/entry/64: Add two more in
Am Montag, den 02.07.2018, 17:18 + schrieb Leonard Crestez:
> On Fri, 2018-06-08 at 16:33 +0200, Lucas Stach wrote:
> > Am Dienstag, den 29.05.2018, 22:39 +0300 schrieb Leonard Crestez:
> > > On imx7d the phy is turned off in suspend and must be reset on resume.
> > > Right now lspci -v fails a
On Tue, Jul 03, 2018 at 10:29:55AM +0200, Heiko Carstens wrote:
> On Tue, Jul 03, 2018 at 10:14:49AM +0200, Peter Zijlstra wrote:
> > On Mon, Jul 02, 2018 at 10:30:09PM -0400, Mathieu Desnoyers wrote:
> > > > Use "get_user()". It works for 64-bit objects too, and it will be
> > > > atomic in the 32
Inorder to debug issues with fpga's users would
like to read the fpga configuration information.
This patch adds readback support for fpga configuration data
in the framework through debugfs interface.
Usage:
cat /sys/kernel/debug/fpga/readback
Signed-off-by: Appana Durga Kedareswara rao
From: Jan Beulich
> Sent: 03 July 2018 09:36
...
> As said there, omitting suffixes from instructions in AT&T mode is bad
> practice when operand size cannot be determined by the assembler from
> register operands, and is likely going to be warned about by upstream
> gas in the future (mine does al
This patch adds support for Read-back of
configuration registers in zynq.
Signed-off-by: Appana Durga Kedareswara rao
---
drivers/fpga/zynq-fpga.c | 254 +++
1 file changed, 254 insertions(+)
diff --git a/drivers/fpga/zynq-fpga.c b/drivers/fpga/zynq-f
* Belisko Marek [180620 09:40]:
> Hello,
>
> I'm trying to fix warning (for omap5 board) produced by recent change
> to avoid using IRQ_TYPE_NONE like:
> [1.818666] WARNING: CPU: 1 PID: 778 at
> drivers/irqchip/irq-gic.c:1016 gic_irq_domain_translate+0x78/0x100
> [1.828839] Modules linked
On 02.07.2018 16:36, Ulf Hansson wrote:
> On 28 June 2018 at 10:13, Stefan Agner wrote:
>> Some hosts are capable of running higher speed modes but do not
>> have the board support for it. Introduce a quirk which prevents
>> the stack from using modes running at 100MHz or faster.
>
> To cap the f
On Tue, 2018-07-03 at 14:57 +, Yixun Lan wrote:
> This patch will add a EMMC clock controller driver support,
> It provide a mux and divider clock.
>
> This clock driver can be protentially used by either EMMC and
> NAND driver.
>
> Signed-off-by: Yixun Lan
> ---
> drivers/clk/meson/Kconfig
> > > We're piece-wise enabling rseq across architectures anyway, and when the
> > > relevant maintains do this, they can have a look at their
> > > {get,put}_user() implementations and fix them.
> > >
> > > If you rely on get_user(u64) working, that means microblaze is already
> > > broken, but I
On Tegra30 Cardhu the PCA9546 I2C mux is not ACK'ing I2C commands on
resume from suspend (which is caused by the reset signal for the I2C
mux not being configured correctl). However, this NACK is causing the
Tegra30 to hang on resuming from suspend which is not expected as we
detect NACKs and handl
Hi Shawn,
Am Dienstag, den 03.07.2018, 15:12 +0800 schrieb Shawn Guo:
> On Mon, May 28, 2018 at 04:37:39PM +0530, Viresh Kumar wrote:
> > Hi Lucas,
> >
> > On 25-05-18, 13:46, Lucas Stach wrote:
> > > This is a lot of duplicate information for what is effectively a shared
> > > cluster wide thin
Hi,
On 03-07-18 00:08, Srinivas Pandruvada wrote:
Hi Hans,
On Mon, 2018-07-02 at 23:27 +0200, Hans de Goede wrote:
SATA IP block doesn't get turned off till SATA is in DEVSLP mode.
Here
user has to either use scsi-host sysfs or tools like powertop to
set
the sata-host link_power_management
On Tue, 3 Jul 2018, Kirill A. Shutemov wrote:
> On Mon, Jul 02, 2018 at 07:01:28PM +, Benjamin Gilbert wrote:
> > On Mon, Jul 02, 2018 at 12:34:50PM +0300, Kirill A. Shutemov wrote:
> > > Could you check if you can trigger the issue with my changes to config and
> > > the way I run KVM?
> >
>
On 3 July 2018 at 09:06, Qing Xia wrote:
> From: x00270170
>
> Card write threshold control is supposed to be set since controller
> version 2.80a for data write in HS400 mode and data read in
> HS200/HS400/SDR104 mode. However the current code returns without
> configuring it in the case of data
commit ef1433f717a2c63747a519d86965d73 ("PCI: endpoint: Create configfs
entry for each pci_epf_device_id table entry") while adding configfs
entry for each pci_epf_device_id table entry introduced a NULL pointer
dereference error when CONFIG_PCI_ENDPOINT_CONFIGFS is not enabled.
Fix it here.
Fixes
On Wed, 20 Jun 2018, Dmitry Torokhov wrote:
> On Mon, Nov 20, 2017 at 8:18 AM Thierry Escande
> wrote:
> >
> > The cros_ec_dev module is responsible for registering the MFD devices
> > attached to the ChromeOS EC. This patch moves this module to drivers/mfd
> > so calls to mfd_add_devices() are no
On Mon, Jul 02, 2018 at 09:33:51PM -0600, Rob Herring wrote:
> > +config CSKY_BUILTIN_DTB
> > + bool "Use kernel builtin dtb"
> > +
> > +config CSKY_BUILTIN_DTB_NAME
> > + string "kernel builtin dtb name"
> > + depends on CSKY_BUILTIN_DTB
> > +endmenu
>
> These options generally
On Tue, Jul 03, 2018 at 10:55:46AM +0200, Heiko Carstens wrote:
> > > > We're piece-wise enabling rseq across architectures anyway, and when the
> > > > relevant maintains do this, they can have a look at their
> > > > {get,put}_user() implementations and fix them.
> > > >
> > > > If you rely on g
On Fri, 22 Jun 2018, Dmitry Torokhov wrote:
> On Fri, Jun 22, 2018 at 01:42:28PM +0200, Matthias Brugger wrote:
> > The drivers gets probed from a mfd devices. So the driver runs
> > probe although no DT node exists. This leads to a NULL pointer
> > dereference in the probe function. Check if a no
On Sun, Jul 01, 2018 at 06:29:54PM +0200, Helge Deller wrote:
> Hi Greg,
>
> On 01.07.2018 18:01, Greg Kroah-Hartman wrote:
> > 3.18-stable review patch. If anyone has any objections, please let me know.
> >
> > --
> >
> > From: Helge Deller
> >
> > [ Upstream commit 01f56832c
On Mon 02-07-18 16:19:25, Andrew Morton wrote:
> On Mon, 02 Jul 2018 15:34:40 -0700 James Bottomley
> wrote:
>
> > On Mon, 2018-07-02 at 14:18 -0700, Andrew Morton wrote:
> > > On Mon, 2 Jul 2018 12:34:00 -0700 Linus Torvalds > > dation.org> wrote:
> > >
> > > > On Sun, Jul 1, 2018 at 10:52 PM
On Mon, 2018-07-02 at 21:31 +, Yixun Lan wrote:
> Add the pcie and mipi clock dt-bindings for the pcie driver.
>
> Since the mipi clock isalso used by the pcie driver,
> we add it together in this patch.
>
> Tested-by: Jianxin Qin
> Signed-off-by: Yixun Lan
> ---
> include/dt-bindings/cloc
On 07/03/2018 09:46 AM, Harald Freudenberger wrote:
On 02.07.2018 18:28, Halil Pasic wrote:
On 06/29/2018 11:11 PM, Tony Krowiak wrote:
This patch provides documentation describing the AP architecture and
design concepts behind the virtualization of AP devices. It also
includes an example
On Tue, Jul 03, 2018 at 10:55:46AM +0200, Heiko Carstens wrote:
> >
> > The problem is interrupts; we need interrupts on the CPU doing the store
> > to observe either the old or the new value, not a mix.
> >
> > If mvcos does not guarantee that, we're having problems. Is there a
> > reason get_us
This patch provides a function, to get of_device_id after
matching with ACPI device _DSD object compatible property
in the case driver does not contain acpi_device_id list
and driver probe called for ACPI device ID PRP0001 with
compatible property match with of_device_id compatible.
Signed-off-by:
On Mon, 2018-07-02 at 21:31 +, Yixun Lan wrote:
> Adding clocks for the pcie driver. Due to the ASIC design,
> the pcie controller re-use part of the mipi clock logic,
> so the mipi clock is also added.
>
> Tested-by: Jianxin Qin
> Signed-off-by: Yixun Lan
> ---
> drivers/clk/meson/axg.c |
Changelog v3:
- Splitted uart clock DTS changes into separate patch
- Splitted REGMAP Kconfig selection into separate patch
- General naming convention as "Actions Semi" in dt-binding documentation
- Patch re-oredering
- Cleanup and fixed review findings
Changelog v2:
Fixed 0 day compilation warni
On Tue, Jul 03, 2018 at 11:17:17AM +0200, Heiko Carstens wrote:
> And to answer also your question: we don't use a regular load, since we
> would have to use 'sacf' construct surrounding the load instruction which
> would be much slower.
> We have something like that implemented for the futex atom
Hi Matti,
One doubt regarding the probe function and few comments.
Missatge de Matti Vaittinen del
dia dv., 29 de juny 2018 a les 11:47:
>
> ROHM BD71837 PMIC MFD driver providing interrupts and support
> for three subsystems:
> - clk
> - Regulators
> - input/power-key
>
> fix too long lines
I
Add REGMAP as dependency to avoid undefined reference to regmap symbol
Signed-off-by: Saravanan Sekar
---
drivers/clk/actions/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/actions/Kconfig b/drivers/clk/actions/Kconfig
index 5a2dad33769e..9066eb4709b1 100644
--- a/driver
Add Actions Semi S700 SoC clock support
Signed-off-by: Parthiban Nallathambi
Signed-off-by: Saravanan Sekar
---
drivers/clk/actions/Kconfig| 13 +
drivers/clk/actions/Makefile | 1 +
drivers/clk/actions/owl-s700.c | 610 +
3 files changed, 624 in
Signed-off-by: Parthiban Nallathambi
Signed-off-by: Saravanan Sekar
---
arch/arm64/boot/dts/actions/s700-cubieboard7.dts | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/actions/s700-cubieboard7.dts
b/arch/arm64/boot/dts/actions/s700-cubieboard7.dts
Added clock management controller for S700
Signed-off-by: Parthiban Nallathambi
Signed-off-by: Saravanan Sekar
---
arch/arm64/boot/dts/actions/s700.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/actions/s700.dtsi
b/arch/arm64/boot/dts/actions/s700.
Hi Jerome,
On Tue, Jun 19, 2018 at 4:42 PM Jerome Brunet wrote:
> Add the possibility to apply and query the clock signal duty cycle ratio.
>
> This is useful when the duty cycle of the clock signal depends on some
> other parameters controlled by the clock framework.
>
> For example, the duty cy
Rename document generic to Actions Semi Owl S700/S900 Soc's.
Add clock bindings constants for action S700
Signed-off-by: Parthiban Nallathambi
Signed-off-by: Saravanan Sekar
---
.../{actions,s900-cmu.txt => actions,owl-cmu.txt} | 20 ++--
include/dt-bindings/clock/actions,s700-cmu.h | 1
On Mon, Jul 02, 2018 at 04:33:28PM -0600, Mathieu Poirier wrote:
> It can be advantagous to have access to all the information conveyed by
> a perf_event when setting up the AUX buffer, as it is the case when
> dealing with PMU specific driver configuration communicated to the kernel
> using an ioc
From: Sebastian Andrzej Siewior
hrtimer_init_sleeper() calls require a prior initialisation of the
hrtimer object with hrtimer_init(). Lets make the initialisation of
the hrtimer object part of hrtimer_init_sleeper(). To remain
consistent consider init_on_stack as well.
Beside adapting the hrtim
On Mon, 2 Jul 2018, Guo Ren wrote:
-EEMPTYCHANGELOG
> Signed-off-by: Guo Ren
> +
> +#ifdef CONFIG_CSKY_VECIRQ_LEGENCY
I assume you meant _LEGACY
> +#include
> +#endif
Also why making the include conditional. Just include it always and be done
with it.
> +static void __iomem *reg_base;
> +
>
On Mon, 2 Jul 2018, Guo Ren wrote:
-EEMPTYCHANGELOG
> Signed-off-by: Guo Ren
> --- /dev/null
> +++ b/drivers/clocksource/timer-csky-v1.c
> @@ -0,0 +1,169 @@
> +// SPDX-License-Identifier: GPL-2.0
> +// Copyright (C) 2018 Hangzhou NationalChip Science & Technology Co.,Ltd.
newline please
> +#in
On Mon, 18 Jun 2018, Charles Keepax wrote:
> On Mon, Jun 18, 2018 at 07:27:54AM +0100, Lee Jones wrote:
> > On Mon, 04 Jun 2018, Charles Keepax wrote:
> > > @@ -240,18 +241,28 @@ static int arizona_poll_reg(struct arizona *arizona,
> > > int timeout_ms, unsigned int reg,
> >
Hi Rob,
On 14/06/18 14:59, Rob Herring wrote:
On Thu, Jun 14, 2018 at 2:53 AM, Suzuki K Poulose
wrote:
On 13/06/18 22:07, Matt Sealey wrote:
-Original Message-
From: Mathieu Poirier
So, if the suggestion is to use an existing property "unit", I am fine
with it, if people agree
Hi Lee, Sebastian,
cc'ing Fabien
Missatge de Sebastian Reichel del dia dj., 24 de maig
2018 a les 10:38:
>
> Hi,
>
> On Wed, May 02, 2018 at 05:44:17PM +0200, Enric Balletbo i Serra wrote:
> > From: Sameer Nanda
> >
> > This driver gets various bits of information about what is connected to
> >
Hello,
Here is a V6 series to add the driver of the touchscreen Cypress,
TrueTouch Generation 5.
Based on v4.18-rc3.
This patch series has already been posted in several iterations:
- v1: Sent on 2017/05/29
- v2: Sent on 2017/08/18
- v3: Sent on 2017/09/27
- v4: Sent on 2017/12/01
This is the basic driver for the Cypress TrueTouch Gen5 touchscreen
controllers. This driver supports only the I2C bus but it uses regmap
so SPI support could be added later.
The touchscreen can retrieve some defined zone that are handled as
buttons (according to the hardware). That is why it handl
Add the Cypress TrueTouch Generation 5 touchscreen device tree bindings
documentation. It can use I2C or SPI bus.
This touchscreen can handle some defined zone that are designed and
sent as button. To be able to customize the keycode sent, the
"linux,keycodes" property can be used.
Acked-by: Rob H
Some member description or colons miss cause build warning with 'W=1'
as below:
drivers/dma/imx-sdma.c:326: warning: Function parameter or member 'vd' not
described in 'sdma_desc'
drivers/dma/imx-sdma.c:326: warning: Function parameter or member 'num_bd' not
described in 'sdma_desc'
drivers/dma/
On Tue, 3 Jul 2018, Benjamin Tissoires wrote:
> > If our length is greater than the size of the buffer, we
> > overflow the buffer
> >
> > Signed-off-by: Daniel Rosenberg
> > Cc: sta...@vger.kernel.org
> > ---
>
> Looks good:
> Reviewed-by: Benjamin Tissoires
Indeed, thanks a lot for fixing th
Hi Jerome:
see my comments
On 07/03/18 16:51, Jerome Brunet wrote:
> On Tue, 2018-07-03 at 14:57 +, Yixun Lan wrote:
>> This patch will add a EMMC clock controller driver support,
>> It provide a mux and divider clock.
>>
>> This clock driver can be protentially used by either EMMC and
>> NAN
Hi Jerome:
On 07/03/18 16:09, Jerome Brunet wrote:
> On Tue, 2018-07-03 at 15:36 +0800, Yixun Lan wrote:
>> Hi Broris
>>
>> thanks for your quick response, and see my comments below
>>
>> On 07/03/18 15:21, Boris Brezillon wrote:
>>> On Tue, 3 Jul 2018 14:57:15 +
>>> Yixun Lan wrote:
>>>
>>
On Tue, 2018-07-03 at 11:27 +0200, Geert Uytterhoeven wrote:
> Hi Jerome,
>
> On Tue, Jun 19, 2018 at 4:42 PM Jerome Brunet wrote:
> > Add the possibility to apply and query the clock signal duty cycle ratio.
> >
> > This is useful when the duty cycle of the clock signal depends on some
> > othe
Hi jerome
On 07/03/18 16:16, Jerome Brunet wrote:
> On Tue, 2018-07-03 at 14:57 +, Yixun Lan wrote:
>> Document the EMMC sub clock controller driver, the potential consumer
>> of this driver is EMMC or NAND.
>>
>> Signed-off-by: Yixun Lan
>> ---
>> .../bindings/clock/amlogic,emmc-clkc.txt
In many cases, it would be useful to be able to use the full
sanity-checked refcount helpers regardless of CONFIG_REFCOUNT_FULL, as
this would help to avoid duplicate warnings where callers try to
sanity-check refcount manipulation.
This patch refactors things such that the full refcount helpers w
Enabling HARDENED_USERCOPY causes measurable regressions in
networking performance, up to 8% under UDP flood.
I'm running an a small packet UDP flood using pktgen vs. a host b2b
connected. On the receiver side the UDP packets are processed by a
simple user space process that just reads and drops
On Tue, 2018-07-03 at 17:56 +0800, Yixun Lan wrote:
> > > Yes, It's true, the mux is parent of the div clock.
> > >
> > > while testing for the NAND driver, I find it's kind of loose about the
> > > parent of the clock, so selecting the div (and let CCF decide freely) is
> > > actually works fine
Hi Jerome,
On Tue, Jul 3, 2018 at 11:58 AM Jerome Brunet wrote:
> On Tue, 2018-07-03 at 11:27 +0200, Geert Uytterhoeven wrote:
> > On Tue, Jun 19, 2018 at 4:42 PM Jerome Brunet wrote:
> > > Add the possibility to apply and query the clock signal duty cycle ratio.
> > >
> > > This is useful when
On Mon, Jul 02, 2018 at 04:33:29PM -0600, Mathieu Poirier wrote:
> This patch follows what has been done for filters by adding an ioctl()
> option to communicate to the kernel arbitrary PMU specific configuration
> that don't fit in the conventional struct perf_event_attr to the kernel.
Ok, so wha
Added support for a register read, register write and register field write
commands.
Added support for adjust link training command.
Updated cdn_dp_get_event function, so it reads all SW event registers.
Added definitions mostly for Framer and Streamer.
Signed-off-by: Damian Kos
---
drivers/gpu/
Make sure to enable the clock before registering regions and exporting
partitions to user space at which point we must be prepared for I/O.
Fixes: ee895ccdf776 ("misc: sram: fix enabled clock leak on error path")
Cc: Vladimir Zapolskiy
Signed-off-by: Johan Hovold
---
drivers/misc/sram.c | 13 ++
Make sure to disable clocks and deregister any exported partitions
before returning on late probe errors.
Note that since commit ee895ccdf776 ("misc: sram: fix enabled clock leak
on error path"), partitions are deliberately exported before enabling
the clock so we stick to that logic here. A follo
>>> On 03.07.18 at 10:46, wrote:
> From: Jan Beulich
>> Sent: 03 July 2018 09:36
> ...
>> As said there, omitting suffixes from instructions in AT&T mode is bad
>> practice when operand size cannot be determined by the assembler from
>> register operands, and is likely going to be warned about by
On Tue, Jul 03, 2018 at 02:04:31PM +0530, Viresh Kumar wrote:
> On 03-07-18, 15:34, Shawn Guo wrote:
> > Please use my kernel.org email address for future patches.
>
> As there were many patches I relied on get_maintainers to do that
> stuff and it didn't pick you up by default. Maybe try fixing
>
> > 1) Merge the file touched by that patch into (the recently created):
> >
> > Documentation/atomic_t.txt
> >
> > (FWIW, queued in my TODO list).
>
> Some consolidation of documentation would be good. ;-)
>
> Thoughts from others?
>
> > 2) Add the entry:
> >
> > F: D
Hi Chanwoo,
Any comments?
Just a gentle ping to make sure the parallel conversation regarding
the mutex didn't distract you :)
Missatge de l'adreça del dia dv., 22 de juny
2018 a les 23:22:
>
> On 2018-06-22 22:43, Ezequiel Garcia wrote:
> > Hey Akhil,
> >
> > On Fri, 2018-06-22 at 12:33 +0530,
Hi Jerome:
On 07/03/18 17:24, Jerome Brunet wrote:
> On Mon, 2018-07-02 at 21:31 +, Yixun Lan wrote:
>> Adding clocks for the pcie driver. Due to the ASIC design,
>> the pcie controller re-use part of the mipi clock logic,
>> so the mipi clock is also added.
>>
>> Tested-by: Jianxin Qin
>> S
Hi,
On 03-07-18 10:57, Hans de Goede wrote:
Hi,
On 03-07-18 00:08, Srinivas Pandruvada wrote:
Hi Hans,
On Mon, 2018-07-02 at 23:27 +0200, Hans de Goede wrote:
SATA IP block doesn't get turned off till SATA is in DEVSLP mode.
Here
user has to either use scsi-host sysfs or tools like power
Hey Robin,
On 04-07-18, 01:49, Robin Gong wrote:
No need to mention W=1 is patch title. Title should only describe the
change being done, so "add missing structure description" would suffice.
> Some member description or colons miss cause build warning with 'W=1'
> as below:
>
> drivers/dma/imx
Hi Johan,
On 07/03/2018 01:05 PM, Johan Hovold wrote:
> Make sure to enable the clock before registering regions and exporting
> partitions to user space at which point we must be prepared for I/O.
>
> Fixes: ee895ccdf776 ("misc: sram: fix enabled clock leak on error path")
> Cc: Vladimir Zapolsk
Hi Tvrtko,
> @@ -199,7 +199,7 @@ static inline void perf_get_data_addr(struct pt_regs
> *regs, u64 *addrp)
> if (!(mmcra & MMCRA_SAMPLE_ENABLE) || sdar_valid)
> *addrp = mfspr(SPRN_SDAR);
>
> - if (perf_paranoid_kernel() && !capable(CAP_SYS_ADMIN) &&
> + if (perf_par
From: Jan Beulich
> Sent: 03 July 2018 11:07
> >>> On 03.07.18 at 10:46, wrote:
> > From: Jan Beulich
> >> Sent: 03 July 2018 09:36
> > ...
> >> As said there, omitting suffixes from instructions in AT&T mode is bad
> >> practice when operand size cannot be determined by the assembler from
> >> re
Hi Ravi,
On 03/07/18 11:24, Ravi Bangoria wrote:
Hi Tvrtko,
@@ -199,7 +199,7 @@ static inline void perf_get_data_addr(struct pt_regs *regs,
u64 *addrp)
if (!(mmcra & MMCRA_SAMPLE_ENABLE) || sdar_valid)
*addrp = mfspr(SPRN_SDAR);
- if (perf_paranoid_kernel() && !ca
Add explicit casting to unsigned long to the __va() parameter
Signed-off-by: Mike Rapoport
---
arch/m68k/include/asm/page_no.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/m68k/include/asm/page_no.h b/arch/m68k/include/asm/page_no.h
index e644c4d..6bbe520 100644
--- a
The generic bitops declare __ffs as
static inline unsigned long __ffs(unsigned long word);
Convert the m68k version to match the generic declaration.
Signed-off-by: Mike Rapoport
---
arch/m68k/include/asm/bitops.h | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --gi
In m68k the physical memory is described by [memory_start, memory_end] for
!MMU variant and by m68k_memory array of memory ranges for the MMU version.
This information is directly used to register the physical memory with
memblock.
The reserve_bootmem() calls are replaced with memblock_reserve() a
Hi,
These patches switch m68k boot time memory allocators from bootmem to
memblock + no_bootmem.
The first two patches update __ffs() and __va() definitions to be inline
with other arches and asm-generic. This is required to avoid compilation
warnings in mm/memblock.c and mm/nobootmem.c.
The thi
Hi Mark,
a typo below:
> /**
> - * refcount_inc - increment a refcount
> + * refcount_inc_checked - increment a refcount
> * @r: the refcount to increment
> *
> * Similar to atomic_inc(), but will saturate at UINT_MAX and WARN.
> @@ -148,14 +146,14 @@ EXPORT_SYMBOL(refcount_inc_not_zero);
On Tue, Jul 03, 2018 at 12:58:48AM +, Gaoming (ming, consumer BG) wrote:
> And can you help me understand *why* such a choice was made?
> -if there is such a problem in your devices, how will you do? Is there
> any other choice?
> - of course, you cannot format the partition.
You misu
On Tue, Jul 03, 2018 at 12:11:18PM +0800, Yang Shi wrote:
> direct reclaim doesn't write out filesystem page, only kswapd could do
> it. So, if the call comes from direct reclaim, it is definitely a bug.
>
> And, Mel Gormane also mentioned "Ultimately, this will be a BUG_ON." In
> commit 94054fa3f
Hi Rob,
Kindly provide your feedback.
Regards,
Srinath.
On Fri, Jun 22, 2018 at 11:21 AM, Srinath Mannam
wrote:
> Hi Rob,
>
> Please find my comments for the reason to have multiple DT nodes.
>
> On Thu, Jun 21, 2018 at 1:22 AM, Rob Herring wrote:
>> On Mon, Jun 18, 2018 at 02:01:17PM +0530, S
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