On Fri, Jun 22, 2018 at 5:49 AM wrote:
> From: Sean Wang
>
> Using gpio-ranges property represent which GPIOs correspond to which pins
> on MT7622 pin controllers. For details, we can see section 2.1 of
> Documentation/devicetree/bindings/gpio/gpio.txt to know how to bind pinctrl
> and gpio driv
Hi Toshi, Thomas,
On Wed, Jun 27, 2018 at 04:13:22PM +, Kani, Toshi wrote:
> On Wed, 2018-06-27 at 16:56 +0100, Will Deacon wrote:
> > On Wed, Jun 27, 2018 at 08:13:47AM -0600, Toshi Kani wrote:
> > > From: Chintan Pandya
> > >
> > > The following kernel panic was observed on ARM64 platform
On 06/29/2018 08:13 AM, Jarkko Sakkinen wrote:
On Tue, 2018-06-26 at 15:09 -0400, Stefan Berger wrote:
This series of patches converts IMA's usage of the tpm_chip to find a TPM
chip initially and use it until the machine is shut down. To do this we need
to introduce a kref for the tpm_chip that
On Sat, Jun 23, 2018 at 7:00 AM Manivannan Sadhasivam
wrote:
> Add gpio interrupt bindings for Actions Semi S900 SoC.
>
> Signed-off-by: Manivannan Sadhasivam
> Reviewed-by: Rob Herring
Patch applied.
Yours,
Linus Walleij
On Sat, Jun 23, 2018 at 7:00 AM Manivannan Sadhasivam
wrote:
> Add interrupt properties to pinctrl node for Actions Semi S900 SoC.
>
> Signed-off-by: Manivannan Sadhasivam
Reviewed-by: Linus Walleij
Please take this through the ARM SoC tree.
Yours,
Linus Walleij
On Fri, Jun 29, 2018 at 01:35:52PM +0300, Jarkko Sakkinen wrote:
> On Thu, 2018-06-28 at 18:13 +0300, Tomas Winkler wrote:
> > Fix tpm ptt initialization error:
> > tpm tpm0: A TPM error (378) occurred get tpm pcr allocation.
> >
> > We cannot use go_idle cmd_ready commands via runtime_pm handles
As TPM_TRANSMIT_RAW always requires also not to take locks for obvious
reasons (deadlock), this commit renames the flag as TPM_TRANSMIT_NESTED
and prevents taking tpm_mutex when the flag is given to tpm_transmit().
Suggested-by: Tomas Winkler
Signed-off-by: Jarkko Sakkinen
---
drivers/char/tpm/
On Sat, Jun 23, 2018 at 7:00 AM Manivannan Sadhasivam
wrote:
> Add interrupt support for Actions Semi OWL S900 SoC.
>
> Signed-off-by: Manivannan Sadhasivam
Patch applied with Andy's review tag.
I really like the looks of this!
If you have ideas on how we can move more of the multiple
IRQ par
PCI fixes:
- Fix crash caused by endpoint library initialization order change (Alan
Douglas)
- Fix shpchp NULL pointer dereference regression on non-ACPI platforms
(Bjorn Helgaas)
- Move PCI_DOMAINS selection to fix build regression (Lorenzo Pieralisi)
The following changes since
On Fri, Jun 29, 2018 at 11:04:19AM +0200, Michal Hocko wrote:
> On Thu 28-06-18 14:31:05, Paul E. McKenney wrote:
> > On Thu, Jun 28, 2018 at 01:39:42PM +0200, Michal Hocko wrote:
> > > On Wed 27-06-18 07:31:25, Paul E. McKenney wrote:
> > > > On Wed, Jun 27, 2018 at 09:22:07AM +0200, Michal Hocko
On Fri, Jun 29, 2018 at 01:37:44PM +0200, Vitaly Kuznetsov wrote:
> The problem we're trying to solve here is: with PV TLB flush and IPI we
> need to walk through the supplied list of VP_INDEXes and get VCPU
> ids. Usually they match. But in case they don't [...]
Why wouldn't they *in practice*?
There are several FUSE filesystems that can implement server-side copy
or other efficient copy/duplication/clone methods. The copy_file_range()
syscall is the standard interface that users have access to while not
depending on external libraries that bypass FUSE.
Signed-off-by: Niels de Vos
---
On Thu, Jun 28, 2018 at 10:52:07PM +0800, Yu Chen wrote:
> Hi,
> On Thu, Jun 28, 2018 at 10:28:56PM +0800, joeyli wrote:
> > On Thu, Jun 28, 2018 at 09:50:17PM +0800, Yu Chen wrote:
> > > Hi,
> > > On Thu, Jun 28, 2018 at 09:07:20PM +0800, joeyli wrote:
> > > > Hi Chen Yu,
> > > >
> > > > On Wed,
Hi Wanpeng,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on kvm/linux-next]
[also build test ERROR on v4.18-rc2 next-20180629]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
On Wed, Jun 27, 2018 at 1:11 AM, Louis Collard
wrote:
>
> On some systems we have seen large delays in boot time, due to
> blocking on a call to getrandom() before the entropy pool has been
> initialized. On these systems the usual sources of entropy are not
> sufficient to initialize the pool in
Roman Kagan writes:
> On Fri, Jun 29, 2018 at 01:37:44PM +0200, Vitaly Kuznetsov wrote:
>> The problem we're trying to solve here is: with PV TLB flush and IPI we
>> need to walk through the supplied list of VP_INDEXes and get VCPU
>> ids. Usually they match. But in case they don't [...]
>
> Why
On Fri 29-06-18 05:52:18, Paul E. McKenney wrote:
> On Fri, Jun 29, 2018 at 11:04:19AM +0200, Michal Hocko wrote:
> > On Thu 28-06-18 14:31:05, Paul E. McKenney wrote:
> > > On Thu, Jun 28, 2018 at 01:39:42PM +0200, Michal Hocko wrote:
[...]
> > > > Well, I am not really sure what is the objective
On Tue, Jun 19, 2018 at 11:15:39AM +0100, Suzuki K Poulose wrote:
> The armpmu uses get_event_idx callback to allocate an event
> counter for a given event, which marks the selected counter
> as "used". Now, when we delete the counter, the arm_pmu goes
> ahead and clears the "used" bit and then inv
On Tue, Jun 19, 2018 at 11:15:40AM +0100, Suzuki K Poulose wrote:
> armv8pmu_select_counter always returns the passed idx. So
> let us make that void and get rid of the pointless checks.
>
> Suggested-by: Mark Rutland
> Cc: Will Deacon
> Signed-off-by: Suzuki K Poulose
Acked-by: Mark Rutland
On Fri, Jun 29, 2018 at 01:23:54PM +0200, Andrew Jones wrote:
> On Fri, Jun 29, 2018 at 11:29:27AM +0100, Sudeep Holla wrote:
> > On Thu, Jun 28, 2018 at 07:32:43PM +0200, Andrew Jones wrote:
> > > On Thu, Jun 28, 2018 at 05:30:51PM +0100, Sudeep Holla wrote:
> > > > I am not sure if we can ever gu
The deferred memory initialization relies on section definitions, e.g
PAGES_PER_SECTION, that are only available when CONFIG_SPARSEMEM=y on most
architectures.
Initially DEFERRED_STRUCT_PAGE_INIT depended on explicit
ARCH_SUPPORTS_DEFERRED_STRUCT_PAGE_INIT configuration option, but since the
commi
On Fri, Jun 29, 2018 at 01:42:27PM +0200, Andrew Jones wrote:
> On Fri, Jun 29, 2018 at 11:53:34AM +0100, Sudeep Holla wrote:
> > On Thu, Jun 28, 2018 at 12:12:00PM -0500, Jeremy Linton wrote:
> > > Hi,
> > >
> > > On 06/28/2018 11:30 AM, Sudeep Holla wrote:
> >
> > [...]
> >
> > > >I am not sur
On Tue, Jun 19, 2018 at 07:19:17PM +0200, Geert Uytterhoeven wrote:
> PCIE_DW_PLAT_HOST does not have any platform dependency, so it should
> not default to yes.
>
> Fixes: 1d906b22076e12cf ("PCI: dwc: Add support for EP mode")
> Signed-off-by: Geert Uytterhoeven
> ---
> v2:
> - Rebased on top
On Wed, Jun 13, 2018 at 07:20:44PM +0200, Nicholas Mc Guire wrote:
> The call to of_get_next_child() returns a node pointer with refcount
> incremented thus it must be explicitly decremented here after the last
> usage.
>
> Signed-off-by: Nicholas Mc Guire
> Fixes: commit 8961def56845 ("PCI: xil
On Tue, Jun 19, 2018 at 11:15:39AM +0100, Suzuki K Poulose wrote:
> The armpmu uses get_event_idx callback to allocate an event
> counter for a given event, which marks the selected counter
> as "used". Now, when we delete the counter, the arm_pmu goes
> ahead and clears the "used" bit and then inv
On Thu, Jun 14, 2018 at 11:04:34AM +0200, Nicholas Mc Guire wrote:
> The call to of_get_next_child() returns a node pointer with
> refcount incremented thus it must be explicitly decremented
> here after the last usage.
>
> Signed-off-by: Nicholas Mc Guire
> Fixes: commit ab597d35ef11 ("PCI: xil
On Sat, Jun 23, 2018 at 05:14:59PM +0200, Nicholas Mc Guire wrote:
> The call to of_get_next_child() returns a node pointer with refcount
> incremented thus it must be explicitly decremented here in the error
> path and after the last usage.
>
> Signed-off-by: Nicholas Mc Guire
> Fixes: commit d
Otherwise mm configuration options show up in the top level menu.
Signed-off-by: Mike Rapoport
---
arch/arc/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index e81bcd271be7..92cf06b354a8 100644
--- a/arch/arc/Kconfig
+++ b/arc
On Fri 29-06-18 16:35:08, Mike Rapoport wrote:
> The deferred memory initialization relies on section definitions, e.g
> PAGES_PER_SECTION, that are only available when CONFIG_SPARSEMEM=y on most
> architectures.
>
> Initially DEFERRED_STRUCT_PAGE_INIT depended on explicit
> ARCH_SUPPORTS_DEFERRED
On Fri, Jun 29, 2018 at 01:55:39PM +0200, Andrew Jones wrote:
> On Fri, Jun 29, 2018 at 01:42:27PM +0200, Andrew Jones wrote:
> > On Fri, Jun 29, 2018 at 11:53:34AM +0100, Sudeep Holla wrote:
> > > On Thu, Jun 28, 2018 at 12:12:00PM -0500, Jeremy Linton wrote:
> > > > Hi,
> > > >
> > > > On 06/28/
hi Ulf
I know that you very busy on other task,
but did you have time to look my serie.
do you have first feedback ?
BR
Ludo
On 06/12/2018 03:14 PM, Ludovic Barre wrote:
From: Ludovic Barre
This patch series adapts mmci driver to add support for stm32
sdmmc variant. stm32h7 SoC integrates th
- On Jun 28, 2018, at 7:29 PM, Andy Lutomirski l...@kernel.org wrote:
> On Thu, Jun 28, 2018 at 2:22 PM, Linus Torvalds
> wrote:
>> On Thu, Jun 28, 2018 at 1:23 PM Andy Lutomirski wrote:
>>>
>>> This is okay with me for a fix outside the merge window. Can you do a
>>> followup for the next
On Thu, Jun 28, 2018 at 7:22 PM Benjamin Herrenschmidt
wrote:
>
> This fixes it by instead doing an explicit kobject_del() when
> the glue dir is empty, by keeping track of the number of
> child devices of the gluedir.
Ugh. I was hoping that you'd just do the "only check duplicate names
if actual
On Fri, Jun 29, 2018 at 6:56 AM Linus Torvalds
wrote:
>
> This patch seems to make patch 1/2 pointless. No?
.. well, maybe not "pointless", since it seems to be a good idea
regardless, but you get what I mean, I think.
Linus
On Wednesday 27 June 2018 10:43 PM, David Lechner wrote:
> On 06/27/2018 06:11 AM, Sekhar Nori wrote:
>> On Friday 01 June 2018 01:55 AM, David Lechner wrote:
>>> This enables Bluetooth modules in davinic_all_defconfig needed for LEGO
>>
>> davinci_all_defconfig
>>
>>> MINDSTORMS EV3.
>>>
>>> Signe
On Tue, Jun 19, 2018 at 11:15:42AM +0100, Suzuki K Poulose wrote:
> Add support for 64bit event by using chained event counters
> and 64bit cycle counters.
>
> PMUv3 allows chaining a pair of adjacent 32-bit counters, effectively
> forming a 64-bit counter. The low/even counter is programmed to co
The card write threshold is applicable for HS400 mode only, so it should
return back except HS400 timing mode.
The card read threshold is also required for HS400 mode as the host
controller incorrectly samples the data if the card clock stops within
a block transfer.
Signed-off-by: Huanlin.Ke
Si
On Thu, Jun 28, 2018 at 6:08 PM Andy Lutomirski wrote:
> > On Jun 28, 2018, at 5:18 PM, Linus Torvalds
> > wrote:
> >
> >
> > Make it do
> >
> >if (rseq_cs->abort_ip != (unsigned long)rseq_cs->abort_ip)
> >return -EINVAL;
> >
> > at abort time.
>
> You sure? Because, unl
The size of kvm's shadow page tables corresponds to the size of the
guest virtual machines on the system. Large VMs can spend a significant
amount of memory as shadow page tables which can not be left as system
memory overhead. So, account shadow page tables to the kmemcg.
Signed-off-by: Shakeel B
- On Jun 29, 2018, at 10:02 AM, Linus Torvalds
torva...@linux-foundation.org wrote:
> On Thu, Jun 28, 2018 at 6:08 PM Andy Lutomirski wrote:
>> > On Jun 28, 2018, at 5:18 PM, Linus Torvalds
>> > wrote:
>> >
>> >
>> > Make it do
>> >
>> >if (rseq_cs->abort_ip != (unsigned long)rseq_c
This is something I also wanted to see, thank you.
Reviewed-by: Pavel Tatashin
Changes since v1 [Roman Kagan]:
- Drop vp_index_to_vcpu_idx mapping. get_vcpu_by_vpidx() should be fast
(1:1 mapping) in all valid use-cases. We'll optimize it later if needed
(or at least discuss this in a separate patchset).
- "enforce vp_index < KVM_MAX_VCPUS" patch added.
- Issues reported
We can use 'NULL' to represent 'all cpus' case in
kvm_make_vcpus_request_mask() and avoid building vCPU mask with
all vCPUs.
Suggested-by: Radim Krčmář
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/kvm/hyperv.c | 42 +++---
virt/kvm/kvm_main.c | 6 ++
2
Using hypercall for sending IPIs is faster because this allows to specify
any number of vCPUs (even > 64 with sparse CPU set), the whole procedure
will take only one VMEXIT.
Current Hyper-V TLFS (v5.0b) claims that HvCallSendSyntheticClusterIpi
hypercall can't be 'fast' (passing parameters through
Hyper-V TLFS (5.0b) states:
> Virtual processors are identified by using an index (VP index). The
> maximum number of virtual processors per partition supported by the
> current implementation of the hypervisor can be obtained through CPUID
> leaf 0x4005. A virtual processor index must be less
These structures are going to be used from KVM code so let's make
their names reflect their Hyper-V origin.
Signed-off-by: Vitaly Kuznetsov
---
arch/x86/hyperv/hv_apic.c | 12 ++--
arch/x86/include/asm/hyperv-tlfs.h | 16 +---
2 files changed, 15 insertions(+), 13 de
VP_INDEX almost always matches VCPU id and get_vcpu_by_vpidx() is fast,
use it instead of traversing full vCPU list every time.
To support the change switch kvm_make_vcpus_request_mask() to checking
vcpu_id instead of vcpu index, kvm_hv_flush_tlb() is currently the only
user with non-NULL vcpu_bit
Hi Mark,
On 29/06/18 14:40, Mark Rutland wrote:
On Tue, Jun 19, 2018 at 11:15:39AM +0100, Suzuki K Poulose wrote:
The armpmu uses get_event_idx callback to allocate an event
counter for a given event, which marks the selected counter
as "used". Now, when we delete the counter, the arm_pmu goe
On Fri, Jun 29, 2018 at 7:05 AM Mathieu Desnoyers
wrote:
>
> What I'm worried about is setting regs->ip of a compat 32-bit task to
> addresses in the range 0x1-0x.
Well, they won't have anything mapped in that range, so it really
shouldn't matter.
Linus
On Fri, Jun 29, 2018 at 02:06:03AM +, Gaoming (ming, consumer BG) wrote:
> We use usual inode size, it is 256 bytes.
>
> Yes, this commit is in my repository.
> But there is a bug in this patch.
>
> Let me show you,
> Here is the bug: " return ALIGN(inodes, (info.block_size / info.inode_size)
Remove open-coded uses of set instructions to use CC_SET()/CC_OUT() in
arch/x86/boot/.
Signed-off-by: Uros Bizjak
---
arch/x86/boot/bitops.h | 3 ++-
arch/x86/boot/string.c | 5 +++--
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/x86/boot/bitops.h b/arch/x86/boot/bitops.h
On 29/06/18 15:01, Mark Rutland wrote:
On Tue, Jun 19, 2018 at 11:15:42AM +0100, Suzuki K Poulose wrote:
Add support for 64bit event by using chained event counters
and 64bit cycle counters.
PMUv3 allows chaining a pair of adjacent 32-bit counters, effectively
forming a 64-bit counter. The low/
Song noticed switch_mm_irqs_off taking a lot of CPU time in recent
kernels, using 1.9% of a 48 CPU system during a netperf run. Digging
into the profile, the atomic operations in cpumask_clear_cpu and
cpumask_set_cpu are responsible for about half of that CPU use.
However, the CPUs running netperf
Andy discovered that speculative memory accesses while in lazy
TLB mode can crash a system, when a CPU tries to dereference a
speculative access using memory contents that used to be valid
page table memory, but have since been reused for something else
and point into la-la land.
The latter proble
Song noticed switch_mm_irqs_off taking a lot of CPU time in recent
kernels,using 1.8% of a 48 CPU system during a netperf to localhost run.
Digging into the profile, we noticed that cpumask_clear_cpu and
cpumask_set_cpu together take about half of the CPU time taken by
switch_mm_irqs_off.
However,
On Fri, Jun 29, 2018 at 03:18:23PM +0100, Suzuki K Poulose wrote:
>
> Hi Mark,
>
> On 29/06/18 14:40, Mark Rutland wrote:
> > On Tue, Jun 19, 2018 at 11:15:39AM +0100, Suzuki K Poulose wrote:
> > > The armpmu uses get_event_idx callback to allocate an event
> > > counter for a given event, which
Lazy TLB mode can result in an idle CPU being woken up by a TLB flush,
when all it really needs to do is reload %CR3 at the next context switch,
assuming no page table pages got freed.
Memory ordering is used to prevent race conditions between switch_mm_irqs_off,
which checks whether .tlb_gen chan
On Thu, 2018-06-28 at 12:43 +0200, Thomas Gleixner wrote:
> On Thu, 28 Jun 2018, Thomas Gleixner wrote:
> > I still want to document the unholy mess of what is initialized and
> > available when. We have 5 hypervisors and 3 different points in
> > early boot
> > where the calibrate_* callbacks are
On Fri 29-06-18 07:02:24, Shakeel Butt wrote:
> The size of kvm's shadow page tables corresponds to the size of the
> guest virtual machines on the system. Large VMs can spend a significant
> amount of memory as shadow page tables which can not be left as system
> memory overhead. So, account shado
Now that CPUs in lazy TLB mode no longer receive TLB shootdown IPIs, except
at page table freeing time, and idle CPUs will no longer get shootdown IPIs
for things like mprotect and madvise, we can always use lazy TLB mode.
Signed-off-by: Rik van Riel
Tested-by: Song Liu
---
arch/x86/include/asm
Move some code that will be needed for the lazy -> !lazy state
transition when a lazy TLB CPU has gotten out of date.
No functional changes, since the if (real_prev == next) branch
always returns.
Signed-off-by: Rik van Riel
Suggested-by: Andy Lutomirski
---
arch/x86/mm/tlb.c | 60
CPUs in !is_lazy have either received TLB flush IPIs earlier on during
the munmap (when the user memory was unmapped), or have context switched
and reloaded during that stage of the munmap.
Page table free TLB flushes only need to be sent to CPUs in lazy TLB
mode, which TLB contents might not yet
The mm_struct always contains a cpumask bitmap, regardless of
CONFIG_CPUMASK_OFFSTACK. That means the first step can be to
simplify things, and simply have one bitmask at the end of the
mm_struct for the mm_cpumask.
This does necessitate moving everything else in mm_struct into
an anonymous sub-st
On Fri, Jun 29, 2018 at 03:10:14PM +0200, Vitaly Kuznetsov wrote:
> Roman Kagan writes:
>
> > On Fri, Jun 29, 2018 at 01:37:44PM +0200, Vitaly Kuznetsov wrote:
> >> The problem we're trying to solve here is: with PV TLB flush and IPI we
> >> need to walk through the supplied list of VP_INDEXes an
By default, #AC for split lock is enabled. In some cases (e.g. system
hang when firmware hits split lock), user may want to opt-out of the
feature.
Kernel parameter "ac_split_lock_off" disables the feature during boot time.
Signed-off-by: Fenghua Yu
---
Documentation/admin-guide/kernel-paramete
There may be different considerations on how to handle #AC for split lock,
e.g. how to handle system hang caused by split lock issue in firmware, if
need to emulate faulting instruction, etc. We use a simple method to
handle user and kernel split lock and may extend the method in the future.
When
==Introduction==
A split lock is any atomic operation whose operand crosses two cache
lines. Since the operand spans two cache lines and the operation must
be atomic, the system locks the bus while the CPU accesses the two cache
lines.
During bus locking, request from other CPUs or bus agents for
set_cpu_cap() calls locked BTS and clear_cpu_cap() calls locked BTR to
operate on bitmap defined in x86_capability.
Locked BTS/BTR accesses a single unsigned long location. In 64-bit mode,
the location is at:
base address of x86_capability + (bit offset in x86_capability % 64) * 8
Since base addr
On Thu, Jun 28, 2018 at 01:30:09PM -0400, Pavel Tatashin wrote:
> sparse_init() requires to temporary allocate two large buffers:
> usemap_map and map_map. Baoquan He has identified that these buffers are so
> large that Linux is not bootable on small memory machines, such as a kdump
> boot.
>
> B
Alignment Check (#AC) exception for split lock is supported on Tremont
and future processors. We need to enumerate the feature on processors.
Bit 29 in MSR TEST_CTL 0x33 can only be set on processors that support
the feature. On processors not supporting the feature, the bit is reserved
(i.e. cann
On 2018/06/29 21:52, Paul E. McKenney wrote:
> The effect of RCU's current OOM code is to speed up callback invocation
> by at most a few seconds (assuming no stalled CPUs, in which case
> it is not possible to speed up callback invocation).
>
> Given that, I should just remove RCU's OOM code enti
When registering clocks, we just skip any that fail to register
(leaving a NULL hole in the clock table). However, our of_xlate
function still tries to dereference each entry while looking for
the clock with the requested id, causing a crash if any clocks
failed to register. Add a check to of_xlate
On 29/06/2018 16:30, Michal Hocko wrote:
> I am not familiar wtih kvm to judge but if we are going to account this
> memory we will probably want to let oom_badness know how much memory
> to account to a specific process. Is this something that we can do?
> We will probably need a new MM_KERNEL rss
On Fri, Jun 29, 2018 at 03:29:12PM +0100, Suzuki K Poulose wrote:
> On 29/06/18 15:01, Mark Rutland wrote:
> > On Tue, Jun 19, 2018 at 11:15:42AM +0100, Suzuki K Poulose wrote:
> > > Add support for 64bit event by using chained event counters
> > > and 64bit cycle counters.
> > >
> > > PMUv3 allow
On Fri, Jun 29, 2018 at 3:01 PM, Mark Rutland wrote:
> On Fri, Jun 29, 2018 at 02:45:08PM +0200, Andrey Konovalov wrote:
>> So with clean kernel after boot we get 40 kb memory usage. With KASAN
>> it is ~120 kb, which is 200% overhead. With KHWASAN it's 50 kb, which
>> is 25% overhead. This should
On 29/06/18 15:38, Mikko Perttunen wrote:
> When registering clocks, we just skip any that fail to register
> (leaving a NULL hole in the clock table). However, our of_xlate
> function still tries to dereference each entry while looking for
> the clock with the requested id, causing a crash if an
On Thu, Jun 28, 2018 at 01:30:10PM -0400, Pavel Tatashin wrote:
> Change sprase_init() to only find the pnum ranges that belong to a specific
> node and call sprase_init_nid() for that range from sparse_init().
>
> Delete all the code that became obsolete with this change.
>
> Signed-off-by: Pave
i.MX6ULL has different operating ranges than i.MX6UL so add the
operating points for the i.MX6ULL and removed them form board device
trees. A 25mV offset is added to the minimum allowed values like for the
i.MX6UL.
The valid frequencies are now selected by the cpufreq driver according
to ratings st
Hi,
On mar., juin 19 2018, Gregory CLEMENT wrote:
> Switching the CPU from the L2 or L3 frequencies (300 and 200 Mhz
> respectively) to L0 frequency (1.2 Ghz) requires a significant amount
> of time to let VDD stabilize to the appropriate voltage. This amount of
> time is large enough that it
On Tue, Dec 05, 2017 at 12:14:46PM -0800, Kees Cook wrote:
> On Tue, Dec 5, 2017 at 12:09 PM, Russell King - ARM Linux
> wrote:
> > On Tue, Dec 05, 2017 at 11:35:59AM -0800, Kees Cook wrote:
> >> We don't _need_ to, but they're all contiguous, so the ro_perms array
> >> used by set_kernel_text_*()
Hi Linus,
The following changes since commit 7daf201d7fe8334e2d2364d4e8ed3394ec9af819:
Linux 4.18-rc2 (2018-06-24 20:54:29 +0800)
are available in the Git repository at:
https://github.com/ceph/ceph-client.git tags/ceph-for-4.18-rc3
for you to fetch changes up to 8b8f53af1ed9df88a4c0fbfdf3
Hi folks,
I've got a weird idea, that I'd like to hear your oppinion about:
In drivers we have lots of cases, where things like register accesses
sometimes (on specific boards+cpus) *could* be done by direct memory
access, while many times we need more complex operations, like talking
to an I2C c
On Fri 29-06-18 16:40:23, Paolo Bonzini wrote:
> On 29/06/2018 16:30, Michal Hocko wrote:
> > I am not familiar wtih kvm to judge but if we are going to account this
> > memory we will probably want to let oom_badness know how much memory
> > to account to a specific process. Is this something that
On 06/29/2018 07:33 AM, Fenghua Yu wrote:
> +/* Detect feature of #AC for split lock by probing bit 29 in MSR_TEST_CTL. */
> +void detect_ac_split_lock(void)
> +{
> + u64 val, orig_val;
> + int ret;
> +
> + /* Attempt to read the MSR. If the MSR doesn't exist, reading fails. */
> +
On Fri, Jun 29, 2018 at 04:14:53PM +0200, Vitaly Kuznetsov wrote:
> VP_INDEX almost always matches VCPU id and get_vcpu_by_vpidx() is fast,
> use it instead of traversing full vCPU list every time.
>
> To support the change switch kvm_make_vcpus_request_mask() to checking
> vcpu_id instead of vcpu
On Fri, 2018-06-29 at 15:13 +0300, Jarkko Sakkinen wrote:
> On Tue, 2018-06-26 at 15:09 -0400, Stefan Berger wrote:
> > This series of patches converts IMA's usage of the tpm_chip to find a TPM
> > chip initially and use it until the machine is shut down. To do this we need
> > to introduce a kref
On Fri, 2018-06-29 at 09:45 +0100, Colin King wrote:
> From: Colin Ian King
>
> Here are some of the more common spelling mistakes and typos that I've
> found while fixing up spelling mistakes in the kernel over the past 6
> months.
Super, thanks. One correction:
> diff --git a/scripts/spellin
On Fri, 29 Jun 2018 14:52:01 +0200
Anders Roxell wrote:
> Add a description that kernel config options should be added into a
> config file that is placed next to the newly added test.
>
> Signed-off-by: Anders Roxell
Applied, thanks.
jon
- On Jun 29, 2018, at 10:17 AM, Linus Torvalds
torva...@linux-foundation.org wrote:
> On Fri, Jun 29, 2018 at 7:05 AM Mathieu Desnoyers
> wrote:
>>
>> What I'm worried about is setting regs->ip of a compat 32-bit task to
>> addresses in the range 0x1-0x.
>
> Well, th
From: Colin Ian King
Here are some of the more common spelling mistakes and typos that I've
found while fixing up spelling mistakes in the kernel over the past 6
months.
Signed-off-by: Colin Ian King
---
V2: fix spelling mistake in parameters, thanks for spotting that Joe.
---
scripts/spellin
For each supported sample rate, the es7134 can work with several
mclk / sample rate ratio. Check if ratio we get is actually OK.
Signed-off-by: Jerome Brunet
---
sound/soc/codecs/es7134.c | 119 +-
1 file changed, 117 insertions(+), 2 deletions(-)
dif
Update the documentation to add support for the es7154 and
optional power supplies phandles.
Signed-off-by: Jerome Brunet
---
Documentation/devicetree/bindings/sound/everest,es7134.txt | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/so
This patchset provides several updates for the es7134 driver
It removes unsupported sample rates, add runtime check of the mclk-fs
ratio as documented in the datasheet and adds the component power
supplies.
Finally support for the es7154 is added.
Jerome Brunet (5):
ASoC: es7134: remove 64kHz r
Add support for the es7154 which is basically an es7134 with an
embedded power amplifier and lower maximum sample rate
Signed-off-by: Jerome Brunet
---
sound/soc/codecs/es7134.c | 47 ++-
1 file changed, 46 insertions(+), 1 deletion(-)
diff --git a/so
Add the VDD and AVDD power supplies to the DAPM graph as some board may
need to enable a regulator to turn them on.
Signed-off-by: Jerome Brunet
---
sound/soc/codecs/es7134.c | 4
1 file changed, 4 insertions(+)
diff --git a/sound/soc/codecs/es7134.c b/sound/soc/codecs/es7134.c
index 69828
64Khz is actually not supported by the es7134 according to the datasheet
Fixes: 9000b59d7a12 ("ASoC: es7134: add es7134 DAC driver")
Signed-off-by: Jerome Brunet
---
sound/soc/codecs/es7134.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/sound/soc/codecs/es7134.c b/sou
Do not allow to compile TPM core as a module. TPM defines a root of
trust for integrity and keyring subsystems and should be always
available and not be loaded from the user space. There is no a
reasonable use case for a loadable module existing.
Signed-off-by: Jarkko Sakkinen
---
drivers/char/t
Linus,
this pull request contains:
* a revert because of bugzilla #200045 (and some documentation about it)
* another regression fix in the i2c-gpio driver
* a leak fix for the i2c core
Please pull.
Thanks,
Wolfram
The following changes since commit 7daf201d7fe8334e2d2364d4e8ed3394ec9af81
On Fri, 29 Jun 2018 16:47:14 +0200
Matthias Reichl wrote:
> On Tue, Dec 05, 2017 at 12:14:46PM -0800, Kees Cook wrote:
> > On Tue, Dec 5, 2017 at 12:09 PM, Russell King - ARM Linux
> > wrote:
> > > On Tue, Dec 05, 2017 at 11:35:59AM -0800, Kees Cook wrote:
> > >> We don't _need_ to, but they
Em Thu, Jun 28, 2018 at 03:16:00PM +0800, Li Zhijian escreveu:
> On system which has not installed debuginfo of iputils(ping) will fail like:
> ~/lkp/linux/tools/perf$ sudo ./perf test ping -v
I think that we should try to check if the required debuginfo package is
installed and if so, expect the
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