[RESEND PATCH] x86: remove redundant check for kmem_cache_create()

The flag 'SLAB_PANIC' implies panic when encouter failure, so there is no need to check NULL pointer and return error code. Signed-off-by: Chengguang Xu --- arch/x86/mm/pgtable.c | 8 ++-- 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtab

[PATCH v6 00/29] FPGA Device Feature List (DFL) Device Drivers

Hi All, Here is v6 patch-series adding drivers for FPGA DFL devices. This patch series provides a common framework to support FPGA Device Feature List (DFL), and also feature dev drivers under this DFL framework to provide interfaces for userspace applications to configure, enumerate, open, and a

[PATCH v6 08/29] fpga: dfl: add dfl_fpga_cdev_find_port

For feature devices, we need a method to find the port dedicated to the device. This patch adds a function dfl_fpga_cdev_find_port for this purpose. e.g FPGA Management Engine (FME) Partial Reconfiguration sub feature, it uses this function to find dedicated port on the device for PR function imple

[PATCH v6 15/29] fpga: dfl: fme: add header sub feature support

From: Kang Luwei The Header Register set is always present for FPGA Management Engine (FME), this patch implements init and uinit function for header sub feature and introduces several read-only sysfs interfaces for the capability and status. Sysfs interfaces: * /sys/class/fpga_region///ports_nu

[PATCH v6 02/29] fpga: mgr: add region_id to fpga_image_info

This patch adds region_id to fpga_image_info data structure, it allows driver to pass region id information to fpga-mgr via fpga_image_info for fpga reconfiguration function. Signed-off-by: Wu Hao Acked-by: Moritz Fischer Acked-by: Alan Tull --- v3: add one line comment for region_id v4: add Ac

[PATCH v6 17/29] fpga: dfl: fme: add partial reconfiguration sub feature support

From: Kang Luwei Partial Reconfiguration (PR) is the most important function for FME. It allows reconfiguration for given Port/Accelerated Function Unit (AFU). It creates platform devices for fpga-mgr, fpga-regions and fpga-bridges, and invokes fpga-region's interface (fpga_region_program_fpga)

[PATCH v6 13/29] fpga: dfl-pci: add enumeration for feature devices

The Device Feature List (DFL) is implemented in MMIO, and features are linked via the DFLs. This patch enables pcie driver to prepare enumeration information (e.g locations of all device feature lists in MMIO) and use common APIs provided by the Device Feature List framework to enumerate each featu

[PATCH v6 19/29] fpga: dfl: fme-mgr: add compat_id support

This patch adds compat_id support to fme manager driver, it reads the ID from the hardware register. And it could be used for compatibility check before partial reconfiguration. Signed-off-by: Wu Hao Acked-by: Alan Tull --- v6: add Acked-by from Alan. --- drivers/fpga/dfl-fme-mgr.c | 15 +++

[PATCH v6 25/29] fpga: dfl: afu: add header sub feature support

The port header register set is always present for port, it is mainly for capability, control and status of the ports that AFU connected to. This patch implements header sub feature support. Below user interfaces are created by this patch. Sysfs interface: * /sys/class/fpga_region///id Read-onl

[PATCH v6 22/29] fpga: dfl: fme-region: add support for compat_id

This patch adds compat_id support, it reuses fme manager's compat id, as the per region compat id is actually from the fme manager's register. Signed-off-by: Wu Hao Acked-by: Alan Tull --- v5: reuse fme manager's compat_id as per region compat_id v6: rebase, fix copyright time and add Acked-by f

[PATCH v6 27/29] fpga: dfl: afu: add afu sub feature support

From: Xiao Guangrong User Accelerated Function Unit sub feature exposes the MMIO region of the AFU. After valid PR bitstream is programmed and the port is enabled, then this MMIO region could be accessed. This patch adds support to enumerate the AFU MMIO region and expose it to userspace via mma

Re: [GIT PULL] FSI updates

On Tue, 2018-06-12 at 08:20 +0200, Greg Kroah-Hartman wrote: > On Tue, Jun 12, 2018 at 02:14:25PM +1000, Benjamin Herrenschmidt wrote: > > Hi Greg ! > > > > There are a first round of updates of the FSI stack, aiming at > > reducing/removing > > the gap with the OpenBMC tree and a first step in g

[PATCH v6 28/29] fpga: dfl: afu: add DFL_FPGA_PORT_DMA_MAP/UNMAP ioctls support

DMA memory regions are required for Accelerated Function Unit (AFU) usage. These two ioctls allow user space applications to map user memory regions for dma, and unmap them after use. Iova is returned from driver to user space application via DFL_FPGA_PORT_DMA_MAP ioctl. Application needs to unmap

[PATCH v6 29/29] MAINTAINERS: add entry for FPGA DFL drivers

Add entry for FPGA Device Feature List (DFL) drivers. Signed-off-by: Wu Hao --- MAINTAINERS | 8 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 448957c..98fc5ea 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5619,6 +5619,14 @@ F: drivers/fpga/ F:

Re: [PATCH 0/4] Fix suspend resume on at91sam9261 and at91sam9263

On 07/06/2018 at 10:41, Alexandre Belloni wrote: USB clock detection may not work properly on at91sam9261 and at91sam9263 because they currently use the same bit mask as at91rm9200 instead of the one for at91sam9260. Take the opportunity to also change the PMC compatible strings for all the othe

[PATCH v6 21/29] fpga: dfl: add fpga region platform driver for FME

This patch adds fpga region platform driver for FPGA Management Engine. It register an fpga region with given fpga manager / bridge device. Signed-off-by: Tim Whisonant Signed-off-by: Enno Luebbers Signed-off-by: Shiva Rao Signed-off-by: Christopher Rauer Signed-off-by: Wu Hao Acked-by: Alan

[PATCH v6 24/29] fpga: dfl: afu: add port ops support

This patch registers the port ops into the global list in the DFL framework, and it allows other modules to use the port ops. And This patch includes the implementation of the get_id and enable_set ops too. Signed-off-by: Wu Hao Acked-by: Alan Tull --- v6: rebase, fix copyright time and add Acke

[PATCH v6 26/29] fpga: dfl: afu: add DFL_FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support

DFL_FPGA_GET_API_VERSION and DFL_FPGA_CHECK_EXTENSION ioctls are common ones which need to be supported by all feature devices drivers including FME and AFU. This patch implements above 2 ioctls in FPGA Accelerated Function Unit (AFU) driver. Signed-off-by: Tim Whisonant Signed-off-by: Enno Luebb

[PATCH v6 23/29] fpga: dfl: add FPGA Accelerated Function Unit driver basic framework

On DFL FPGA devices, the Accelerated Function Unit (AFU), can be reprogrammed for different functions. It connects to the FPGA infrastructure (static FPGA region) via a Port. Port CSRs are implemented separately from the AFU CSRs to provide control and status of the Port. Once valid PR bitstream is

[PATCH v6 20/29] fpga: dfl: add fpga bridge platform driver for FME

This patch adds fpga bridge platform driver for FPGA Management Engine. It implements the enable_set callback for fpga bridge. Signed-off-by: Tim Whisonant Signed-off-by: Enno Luebbers Signed-off-by: Shiva Rao Signed-off-by: Christopher Rauer Signed-off-by: Wu Hao Acked-by: Alan Tull Acked-b

[PATCH v6 18/29] fpga: dfl: add fpga manager platform driver for FME

This patch adds fpga manager driver for FPGA Management Engine (FME). It implements fpga_manager_ops for FPGA Partial Reconfiguration function. Signed-off-by: Tim Whisonant Signed-off-by: Enno Luebbers Signed-off-by: Shiva Rao Signed-off-by: Christopher Rauer Signed-off-by: Kang Luwei Signed-

[PATCH v6 10/29] fpga: dfl: add dfl_fpga_port_ops support.

In some cases, other DFL driver modules may need to access some port operations, e.g disable / enable port for partial reconfiguration in FME module. In order to avoid dependency between port and FME modules, this patch introduces the dfl_fpga_port_ops support in DFL framework. A global dfl_fpga_po

[PATCH v6 16/29] fpga: dfl: fme: add DFL_FPGA_GET_API_VERSION/CHECK_EXTENSION ioctls support

DFL_FPGA_GET_API_VERSION and DFL_FPGA_CHECK_EXTENSION ioctls are common ones which need to be supported by all feature devices drivers including FME and AFU. Userspace application can use these ioctl interfaces to get the API info and check if specific extension is supported or not in current drive

[PATCH v6 14/29] fpga: dfl: add FPGA Management Engine driver basic framework

From: Kang Luwei The FPGA Management Engine (FME) provides power, thermal management, performance counters, partial reconfiguration and other functions. For each function, it is packaged into a private feature linked to the FME feature device in the 'Device Feature List'. It's a platform device c

[PATCH v6 11/29] fpga: dfl: add dfl_fpga_check_port_id function.

This patch adds one common function in DFL framework. It uses port_ops get_id callback to get port id and compare it with given value. This function could be used as match function of the dfl_fpga_cdev_find_port function. Signed-off-by: Wu Hao Acked-by: Alan Tull --- v6: reabse and add Acked-by

[PATCH v6 12/29] fpga: add FPGA DFL PCIe device driver

From: Zhang Yi This patch implements the basic framework of the driver for FPGA PCIe device which implements the Device Feature List (DFL) in its MMIO space. This driver is verified on Intel(R) PCIe based FPGA DFL devices, including both integrated (e.g Intel Server Platform with In-package FPGA)

[PATCH v6 09/29] fpga: dfl: add feature device infrastructure

From: Xiao Guangrong This patch abstracts the common operations of the sub features, and defines the feature_ops data structure, including init, uinit and ioctl function pointers. And this patch adds some common helper functions for FME and AFU drivers, e.g dfl_feature_dev_use_begin/end which are

[PATCH v6 06/29] fpga: add device feature list support

Device Feature List (DFL) defines a feature list structure that creates a link list of feature headers within the MMIO space to provide an extensible way of adding features. This patch introduces a kernel module to provide basic infrastructure to support FPGA devices which implement the Device Feat

[PATCH v6 07/29] fpga: dfl: add chardev support for feature devices

For feature devices drivers, both the FPGA Management Engine (FME) and Accelerated Function Unit (AFU) driver need to expose user interfaces via the device file, for example, mmap and ioctls. This patch adds chardev support in the dfl driver for feature devices, FME and AFU. It reserves the charde

[PATCH v6 05/29] fpga: region: add compat_id support

This patch introduces a compat_id pointer member and sysfs interface for each fpga region, similar as compat_id for fpga manager, it allows applications to read the per region compat_id for compatibility checking before other actions on this fpga-region (e.g PR). Signed-off-by: Wu Hao Acked-by: A

[PATCH v6 01/29] docs: fpga: add a document for FPGA Device Feature List (DFL) Framework Overview

Add a document for FPGA Device Feature List (DFL) Framework Overview. Signed-off-by: Enno Luebbers Signed-off-by: Xiao Guangrong Signed-off-by: Wu Hao Acked-by: Alan Tull --- v2: added FME fpga-mgr/bridge/region platform driver to driver organization. updated open discussion per current im

Re: [PATCH] drivers/of: Add devm_of_iomap()

On Tue, 2018-06-12 at 11:35 +0300, Andy Shevchenko wrote: > On Tue, Jun 12, 2018 at 3:01 AM, Benjamin Herrenschmidt > wrote: > > There are still quite a few cases where a device might want to get to a > > different node of the device-tree, obtain the resources and map them. > > > > Drivers doing

[PATCH v6 04/29] fpga: mgr: add compat_id support

This patch introduces compat_id support to fpga manager, it adds a fpga_compat_id pointer to fpga manager data structure to allow fpga manager drivers to save the compatibility id. This compat_id could be used for compatibility checking before doing partial reconfiguration to associated fpga region

[PATCH v6 03/29] fpga: mgr: add status for fpga-manager

This patch adds status sysfs interface for fpga manager, it's a read only interface which allows user to get fpga manager status, including full/partial reconfiguration error and other status information. It adds a status callback to fpga_manager_ops too, allows each fpga_manager driver to define i

Re: [PATCH] mmc: Move the mmc driver init earlier

On 12 June 2018 at 10:42, Feng Tang wrote: > Hi Ulf, > > Thanks for the review. > > On Tue, Jun 12, 2018 at 08:25:44AM +0200, Ulf Hansson wrote: >> On 8 June 2018 at 11:51, Feng Tang wrote: >> > When doing some boot time optimization for an eMMC rootfs NUCs, >> > we found the rootfs may spend aro

[PATCH 2/2] mtd: rawnand: denali: add more clocks

According to the Denali User's Guide, this IP needs three clock inputs: - clk: controller core clock - clk_x: bus interface clock - ecc_clk: clock at which ECC circuitry is run Currently, denali_dt.c requires a single anonymous clock and its frequency. However, the driver needs to get the f

linux-kernel@vger.kernel.org

Add 'dev' as a shorthand before adding more code that takes a pointer to struce device. Signed-off-by: Masahiro Yamada --- drivers/mtd/nand/raw/denali_dt.c | 17 + 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/nand/raw/denali_dt.c b/drivers/mtd/nand/r

Re: [PATCH 2/2] mtd: rawnand: denali: add more clocks

Maybe, the commit title should be: mtd: rawnand: denali: add more clocks and improve setup_data_interface 2018-06-12 19:31 GMT+09:00 Masahiro Yamada : > According to the Denali User's Guide, this IP needs three clock inputs: > > - clk: controller core clock > > - clk_x: bus interface clock >

[PATCH REBASED RESEND] x86/cpu: Move early cpu initialization into a separate translation unit

__pgtable_l5_enabled shouldn't be needed after system has booted, we can mark it as __initdata, but it requires preparation. This patch moves early cpu initialization into a separate translation unit. This limits effect of USE_EARLY_PGTABLE_L5 to less code. Without the change cpu_init() uses __pg

Re: [PATCH 1/2] thermal: tsens: Add support for SDM845 platform

On Mon, Jun 4, 2018 at 6:03 PM, Bjorn Andersson wrote: > On Sat 02 Jun 04:11 PDT 2018, Amit Kucheria wrote: >> diff --git a/drivers/thermal/qcom/tsens-sdm845.c >> b/drivers/thermal/qcom/tsens-sdm845.c > [..] >> +#define TRDY_OFFSET 0xe4 >> +#define TRDY_READY_BIT BIT(1) > > This is bit 0. O

Re: [PATCH 10/20] dts: juno: Update coresight bindings for hw port

On Fri, Jun 08, 2018 at 03:52:58PM -0600, Mathieu Poirier wrote: > On 8 June 2018 at 15:49, Mathieu Poirier wrote: > > On Tue, Jun 05, 2018 at 10:43:21PM +0100, Suzuki K Poulose wrote: > >> Switch to updated coresight bindings for hw ports. > >> > >> Cc: Sudeep Holla > >> Cc: Liviu Dudau > >> Cc

Re: [PATCH] pwm: stm32: fix build warning with CONFIG_DMA_ENGINE disabled

On Tue, Jun 12, 2018 at 9:25 AM, Geert Uytterhoeven wrote: >> --- a/drivers/pwm/pwm-stm32.c >> +++ b/drivers/pwm/pwm-stm32.c >> @@ -484,9 +484,7 @@ static int stm32_pwm_apply_locked(struct pwm_chip *chip, >> struct pwm_device *pwm, >> static const struct pwm_ops stm32pwm_ops = { >> .own

Re: [PATCH] microblaze: heartbeat: fix missing prom.h include

On 11.6.2018 16:58, Rob Herring wrote: > Since commit 96f0e6fcc9ad ("microblaze: remove redundant early_printk > support") prom.h was removed and one instance in heartbeat.c remained. > Include of.h as it is the actual header needed. > > Fixes: 96f0e6fcc9ad ("microblaze: remove redundant early_pri

Self-Interest

-- Hello, I have a very Important Information for you, can you please contact me, I look forward for your response. Regards. Mr.Ben

[GIT PULL v2] FSI updates for 4.17

Hi Greg ! There are a first round of updates of the FSI stack, aiming at reducing/removing he gap with the OpenBMC tree and a first step in getting dependent drivers upstream. These changes significantly improve the FSI bitbanging driver performance and reliability, and add the new "sbefifo" driv

[PATCH v2 2/5] dt: qcom: 8996: thermal: Move to DT initialisation

We also split up the regmap address space into two, one for the TM registers, the other for the SROT registers. This was required to deal with different address offsets for the TM and SROT registers across different SoC families. Since tsens-common.c/init_common() currently only registers one addr

[PATCH v2 3/5] thermal: tsens: Move 8996 get_temp() to common code for reuse

The TSENS block inside the 8996 is internally classified as version 2. Several other SoC families use this block and can share this code. Rename get_temp() to reflect that it can be used across the v2 family. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-8996.c | 73 ++---

[PATCH v2 1/5] thermal: tsens: Get rid of unused fields in structure

status_field and trdy are unused in any of the tsens drivers. Remove them. Signed-off-by: Amit Kucheria Reviewed-by: Bjorn Andersson Acked-by: Rajendra Nayak --- drivers/thermal/qcom/tsens.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qco

[PATCH v2 0/5] thermal: tsens: Prepare for version 2 of TSENS IP

This series is a mixed bag: Some code moves to deal with version 2 of the TSENS IP in common functions, new platform support (sdm845), a cleanup patch and a DT change to have a common way to deal with the SROT and TM registers despite slightly different features across the IP family and different r

[PATCH v2 4/5] thermal: tsens: Add support for SDM845

SDM845 uses the TSENS v2 IP block Signed-off-by: Amit Kucheria --- Documentation/devicetree/bindings/thermal/qcom-tsens.txt | 1 + drivers/thermal/qcom/Makefile| 2 +- drivers/thermal/qcom/tsens-sdm845.c | 15 +++ drivers/thermal/qco

[PATCH v2 5/5] thermal: tsens: Check if we have valid data before reading

Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-common.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index 961ace4..f510e61 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/therma

Re: [GIT PULL 2/4] ARM: Device-tree updates

Olof Johansson writes: > - Qualcomm: > + SDM845, a.k.a Snapdragon 845, an 4+4-core Kryo 385/845 > (Cortex-A75/A55 derivative) SoC that's one of the current high-end > mobile SoCs. > > It's great to see mainline support for it. So far, you > can't do much with it, since a lot of peripherals are no

Re: [PATCH 01/19 v3] regulator: fixed: Convert to use GPIO descriptor only

On Tue, Jun 12, 2018 at 10:15:40AM +0200, Linus Walleij wrote: > On Mon, Jun 11, 2018 at 5:00 PM, Mark Brown wrote: > > On Mon, Jun 11, 2018 at 03:11:14PM +0200, Linus Walleij wrote: > >> Sadly this only handled the undocumented fixed > >> regulator binding "reg-fixed-voltage". So I need to fix i

[PATCH] PM / core: Fix supplier device runtime PM usage counter imbalance

From: Rafael J. Wysocki If a device link is added via device_link_add() by the driver of the link's consumer device, the supplier's runtime PM usage counter is going to be dropped by the pm_runtime_put_suppliers() call in driver_probe_device(). However, in that case it is not incremented unless

Re: [PATCH 2/2] mtd: rawnand: denali: add more clocks

On Tue, 12 Jun 2018 19:36:06 +0900 Masahiro Yamada wrote: > Maybe, the commit title should be: > > mtd: rawnand: denali: add more clocks and improve setup_data_interface Or you split that in 2 commits, one retrieving the new clks, and the other one fixing/improving ->setup_data_interface(). >

Re: [PATCH 2/2] mtd: rawnand: denali: add more clocks

Am Dienstag, 12. Juni 2018, 13:03:29 CEST schrieb Boris Brezillon: > On Tue, 12 Jun 2018 19:36:06 +0900 > Masahiro Yamada wrote: > > > Maybe, the commit title should be: > > > > mtd: rawnand: denali: add more clocks and improve setup_data_interface > > Or you split that in 2 commits, one retrie

Re: [PATCH 2/2] mtd: rawnand: denali: add more clocks

2018-06-12 20:03 GMT+09:00 Boris Brezillon : > On Tue, 12 Jun 2018 19:36:06 +0900 > Masahiro Yamada wrote: > >> Maybe, the commit title should be: >> >> mtd: rawnand: denali: add more clocks and improve setup_data_interface > > Or you split that in 2 commits, one retrieving the new clks, and the >

Re: [PATCH v1] clk: tegra: emc: Avoid out-of-bounds bug

On Tuesday, 12 June 2018 10:46:03 MSK Stephen Boyd wrote: > Quoting Dmitry Osipenko (2018-06-05 05:12:32) > > > Apparently there was an attempt to avoid out-of-bounds accesses when there > > is only one memory timing available, but there is a typo in the code that > > neglects that attempt. > > >

Re: [GIT PULL v2] FSI updates for 4.17

On Tue, Jun 12, 2018 at 08:54:39PM +1000, Benjamin Herrenschmidt wrote: > Hi Greg ! > > There are a first round of updates of the FSI stack, aiming at > reducing/removing > he gap with the OpenBMC tree and a first step in getting dependent drivers > upstream. > > These changes significantly impr

[PATCH v2] sched/fair: Fix util_avg of new tasks for asymmetric systems

When a new task wakes-up for the first time, its initial utilization is set to half of the spare capacity of its CPU. The current implementation of post_init_entity_util_avg() uses SCHED_CAPACITY_SCALE directly as a capacity reference. As a result, on a big.LITTLE system, a new task waking up on an

Re: [PATCH 3/7] MIPS: intel: Add initial support for Intel MIPS SoCs

Hi, Good to see this patch! On Tue, Jun 12, 2018 at 01:40:30PM +0800, Songjun Wu wrote: > diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms > index ac7ad54f984f..bcd647060f3e 100644 > --- a/arch/mips/Kbuild.platforms > +++ b/arch/mips/Kbuild.platforms > @@ -12,6 +12,7 @@ platfo

Re: [GIT PULL v2] FSI updates for 4.17

On Tue, 2018-06-12 at 13:18 +0200, Greg Kroah-Hartman wrote: > On Tue, Jun 12, 2018 at 08:54:39PM +1000, Benjamin Herrenschmidt wrote: > > Hi Greg ! > > > > There are a first round of updates of the FSI stack, aiming at > > reducing/removing > > he gap with the OpenBMC tree and a first step in ge

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I'm interested in financing your business project. I'm open to further discussion aimed at reaching an agreement.

Re: [RESEND PATCH] x86: remove redundant check for kmem_cache_create()

Hi Chengguang, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on tip/x86/core] [also build test WARNING on v4.17 next-20180612] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day

Re: [PATCH v2] ARM: DTS: imx53: Add support for imx53 HSC/DDC boards from K+P

Hi Shawn, Thanks for you review. > On Sat, May 19, 2018 at 02:15:06PM +0200, Lukasz Majewski wrote: > > This commit provides support for HSC and DDC boards from > > Kieback&Peter GmbH vendor. > > > > Signed-off-by: Lukasz Majewski > > --- > > Changes for v2: > > > > - Remove not needed #addres

Re: [PATCH v6 1/3] phy: Update PHY power control sequence

Hi Can, On 5/29/2018 10:07 AM, Can Guo wrote: All PHYs should be powered on before register configuration starts. And only PCIe PHYs need an extra power control before deasserts reset state. Signed-off-by: Can Guo --- drivers/phy/qualcomm/phy-qcom-qmp.c | 5 - 1 file changed, 4 inserti

Re: [PATCH] staging: rtl8712: add error handling for register_netdev

On Tue, Jun 12, 2018 at 11:18:43AM +0800, Zhouyang Jia wrote: > When register_netdev fails, the lack of error-handling code may > cause unexpected results. > > This patch adds error-handling code after calling register_netdev. > It doesn't add any error handling. It just adds an error message.

[PATCH v4 0/2] cpufreq: qcom-fw: Add support for QCOM cpufreq FW driver

[v4] * Fixed console messages as per comments. * Return error from qcom_resources_init() in the cases where failed to get frequency domain. * Rename cpu_dev to cpu_np in qcom_resources_init, qcom_get_related_cpus(). Also use temp variable freq_np in qcom_get_related_cpus(). * U

[PATCH v4 2/2] cpufreq: qcom-fw: Add support for QCOM cpufreq FW driver

The CPUfreq FW present in some QCOM chipsets offloads the steps necessary for changing the frequency of CPUs. The driver implements the cpufreq driver interface for this firmware. Signed-off-by: Saravana Kannan Signed-off-by: Taniya Das --- drivers/cpufreq/Kconfig.arm | 9 + drivers/cpu

[PATCH v4 1/2] dt-bindings: cpufreq: Introduce QCOM CPUFREQ FW bindings

Add QCOM cpufreq firmware device bindings for Qualcomm Technology Inc's SoCs. This is required for managing the cpu frequency transitions which are controlled by firmware. Signed-off-by: Taniya Das --- .../bindings/cpufreq/cpufreq-qcom-fw.txt | 173 + 1 file changed

Re: [RESEND PATCH] x86: remove redundant check for kmem_cache_create()

So still need to keep return type as int, I’ll fix in V2. Thanks. > 在 2018年6月12日，下午7:27，kbuild test robot 写道： > > Hi Chengguang, > > Thank you for the patch! Perhaps something to improve: > > [auto build test WARNING on tip/x86/core] > [also build test WARNING on v4

Re: [GIT PULL v2] FSI updates for 4.17

On Tue, Jun 12, 2018 at 09:25:11PM +1000, Benjamin Herrenschmidt wrote: > On Tue, 2018-06-12 at 13:18 +0200, Greg Kroah-Hartman wrote: > > On Tue, Jun 12, 2018 at 08:54:39PM +1000, Benjamin Herrenschmidt wrote: > > > Hi Greg ! > > > > > > There are a first round of updates of the FSI stack, aiming

[PATCH v2] x86: remove redundant check for kmem_cache_create()

The flag 'SLAB_PANIC' implies panic when encouter failure, So there is no need to check NULL pointer for cache creation. Signed-off-by: Chengguang Xu --- v1->v2: - Keep return type as int instead of changing to void. arch/x86/mm/pgtable.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/ar

Re: [PATCH] staging: comedi: add error handling for vmap

On Tue, Jun 12, 2018 at 11:25:35AM +0800, Zhouyang Jia wrote: > When vmap fails, the lack of error-handling code may > cause unexpected results. > > This patch adds error-handling code after calling vmap. > Again, this is not error handling, this is just an error message. This error condition i

Re: [PATCH] staging: gdm724x: add error handling for nlmsg_put

On Mon, Jun 11, 2018 at 01:09:24PM +0800, Zhouyang Jia wrote: > When nlmsg_put fails, the lack of error-handling code may > cause unexpected results. > > This patch adds error-handling code after calling nlmsg_put. > > Signed-off-by: Zhouyang Jia > --- > drivers/staging/gdm724x/netlink_k.c | 3

[PATCH] test_overflow: fix an IS_ERR() vs NULL bug

root_device_register() returns error pointers, it never returns NULL. Fixes: ca90800a91ba ("test_overflow: Add memory allocation overflow tests") Signed-off-by: Dan Carpenter diff --git a/lib/test_overflow.c b/lib/test_overflow.c index aecbbb217305..2278fe05a1b0 100644 --- a/lib/test_overflow.c

[PATCH V6] powercap/drivers/idle_injection: Add an idle injection framework

Initially, the cpu_cooling device for ARM was changed by adding a new policy inserting idle cycles. The intel_powerclamp driver does a similar action. Instead of implementing idle injections privately in the cpu_cooling device, move the idle injection code in a dedicated framework and give the opp

Re: [PATCH -mm -V3 03/21] mm, THP, swap: Support PMD swap mapping in swap_duplicate()

On Tue, Jun 12, 2018 at 09:23:19AM +0800, Huang, Ying wrote: > Daniel Jordan writes: > > #2: We've masked off SWAP_HAS_CACHE and COUNT_CONTINUED, and already > > checked > > for SWAP_MAP_BAD, so I think condition #2 always fails and can just be > > removed. > > I think this is used to check so

Re: [PATCH] mmc: Move the mmc driver init earlier

On 2018/6/12 18:29, Ulf Hansson wrote: On 12 June 2018 at 10:42, Feng Tang wrote: Hi Ulf, Thanks for the review. On Tue, Jun 12, 2018 at 08:25:44AM +0200, Ulf Hansson wrote: On 8 June 2018 at 11:51, Feng Tang wrote: When doing some boot time optimization for an eMMC rootfs NUCs, we found t

Re: [PATCH -mm -V3 03/21] mm, THP, swap: Support PMD swap mapping in swap_duplicate()

On Tue, Jun 12, 2018 at 11:15:28AM +0800, Huang, Ying wrote: > "Huang, Ying" writes: > >> On Wed, May 23, 2018 at 04:26:07PM +0800, Huang, Ying wrote: > >>> @@ -3516,11 +3512,39 @@ static int __swap_duplicate(swp_entry_t entry, > >>> unsigned char usage) > >> > >> Two comments about this part of

Re: [PATCH v2] serial: imx: fix cached UCR2 read on software reset

On 07.06.2018 09:56, Uwe Kleine-König wrote: > On Fri, Apr 20, 2018 at 02:44:07PM +0200, Stefan Agner wrote: >> To reset the UART the SRST needs be cleared (low active). According >> to the documentation the bit will remain active for 4 module clocks >> until it is cleared (set to 1). >> >> Hence t

Re: [PATCH 2/2] IB/mad: Use IDR for agent IDs

On Tue, Jun 12, 2018 at 11:50:46AM +0300, jackm wrote: > On Fri, 8 Jun 2018 10:42:18 -0700 > Matthew Wilcox wrote: > > > + rcu_read_lock(); > > + mad_agent = idr_find(&ib_mad_clients, hi_tid); > > + if (mad_agent > > && !atomic_inc_not_zero(&mad_agent->refcount)) >

Re: [PATCH v4 4/6] mtd: rawnand: add NVIDIA Tegra NAND Flash controller driver

On Monday, 11 June 2018 23:52:22 MSK Stefan Agner wrote: > Add support for the NAND flash controller found on NVIDIA > Tegra 2 SoCs. This implementation does not make use of the > command queue feature. Regular operations/data transfers are > done in PIO mode. Page read/writes with hardware ECC mak

Re: [PATCH 2/4] watchdog/softlockup: Replace "watchdog/%u" threads with cpu_stop_work

On Fri, Jun 08, 2018 at 03:57:04PM +0200, Oleg Nesterov wrote: > And probably there is another problem. Both watchdog_disable(cpu) and > watchdog_nmi_disable(cpu) assume that cpu == smp_processor_id(), this arg > is simply ignored. > > but lockup_detector_offline_cpu(cpu) is called by cpuhp_inv

Re: handling voice calls in ALSA soc (on Droid 4)

Hi! Sebastian, would you have pointer to original Motorola sources you used for inspiration? > > With setup like that, how does userland tell kernel that the baseband > > <-> microphone/speaker connection should be activated? > > Audio routing should be done as normal, and ideally the driver for

Re: [PATCH v2 2/5] PCI: iproc: Fix up corrupted PAXC root complex config registers

On 2018-06-12 13:57, p...@codeaurora.org wrote: On 2018-06-12 05:51, Ray Jui wrote: On certain versions of Broadcom PAXC based root complexes, certain regions of the configuration space are corrupted. As a result, it prevents the Linux PCIe stack from traversing the linked list of the capability

[PATCH] mm, page_alloc: actually ignore mempolicies for high priority allocations

The __alloc_pages_slowpath() function has for a long time contained code to ignore node restrictions from memory policies for high priority allocations. The current code that resets the zonelist iterator however does effectively nothing after commit 7810e6781e0f ("mm, page_alloc: do not break __GFP

Re: [PATCH v2] serial: imx: fix cached UCR2 read on software reset

On Tue, Jun 12, 2018 at 02:11:44PM +0200, Stefan Agner wrote: > On 07.06.2018 09:56, Uwe Kleine-König wrote: > > On Fri, Apr 20, 2018 at 02:44:07PM +0200, Stefan Agner wrote: > >> To reset the UART the SRST needs be cleared (low active). According > >> to the documentation the bit will remain activ

Re: [PATCH V6] powercap/drivers/idle_injection: Add an idle injection framework

On Tue, Jun 12, 2018 at 02:00:11PM +0200, Daniel Lezcano wrote: > +static void __idle_injection_wakeup(struct idle_injection_device *ii_dev) > +{ > + struct idle_injection_thread *iit; > + struct cpumask tmp; > + unsigned int cpu; > + > + cpumask_and(&tmp, ii_dev->cpumask, cpu_onlin

Re: [PATCH v4 2/2] dt-bindings: power: sbs-battery: re-document "ti,bq20z75"

Hi, On Fri, Jun 08, 2018 at 03:36:55PM -0700, Brian Norris wrote: > This compatible property was documented before the driver was renamed to > "SBS" (see commit e57f1b68c406 ("devicetree-bindings: Propagate > bq20z75->sbs rename to dt bindings")). The driver has continued to > support this propert

Re: [PATCH 09/11] vfs: factor out inode_insert5()

On Mon, Jun 11, 2018 at 05:43:55PM +0100, Al Viro wrote: > On Mon, Jun 11, 2018 at 01:32:30PM +0200, Miklos Szeredi wrote: > > > Incremental follows. I think it's cleaner to initialize i_state and > > i_sb_list > > up front (hence the use of new_inode()), but could just as well add to sb > > li

Re: [GIT PULL v2] FSI updates for 4.17

On Tue, 2018-06-12 at 13:44 +0200, Greg Kroah-Hartman wrote: > > > We are in regression only mode even before -rc1 these days ? including > > for code that is basically completely unused upstream (which is what > > this is trying to fix) ? :-) That's rather full-on ... > > For code that goes into

Re: [PATCH v7 3/6] kernel/reboot.c: export pm_power_off_prepare

Hi Rafael, Last version of this patch was send at 17.05.2018. No other comment was provided and this patch is a blocker for other patches in this serie. Can you please give some feedback on it. On 17.05.2018 07:50, Oleksij Rempel wrote: > Export pm_power_off_prepare. It is needed to implement pow

Re: [PATCH 4/4] kthread: Simplify kthread_park() completion

On Fri, Jun 08, 2018 at 11:52:20AM +0200, Oleg Nesterov wrote: > in smpboot_update_cpumask_percpu_thread() can hit a KTHREAD_SHOULD_PARK > thread? Lets look into kernel test robot's .config: > > CONFIG_NR_CPUS=1 > > Now look at NR_CPUS==1 version of for_each_cpu* helpers: > > #define

[PATCH] soc: qcom: rmtfs-mem: fix memleak in probe error paths

Make sure to set the mem device release callback before calling put_device() in a couple of probe error paths so that the containing object also gets freed. Fixes: d1de6d6c639b ("soc: qcom: Remote filesystem memory driver") Cc: stable # 4.15 Cc: Bjorn Andersson Signed-off-by: Johan Hovold -

Re: [PATCH V6] powercap/drivers/idle_injection: Add an idle injection framework

On 12/06/2018 14:30, Peter Zijlstra wrote: > On Tue, Jun 12, 2018 at 02:00:11PM +0200, Daniel Lezcano wrote: >> +static void __idle_injection_wakeup(struct idle_injection_device *ii_dev) >> +{ >> +struct idle_injection_thread *iit; >> +struct cpumask tmp; >> +unsigned int cpu; >> + >> +

Re: [PATCH] PM / core: Fix supplier device runtime PM usage counter imbalance

Hi Rafael, On 2018-06-12 13:00, Rafael J. Wysocki wrote: > From: Rafael J. Wysocki > > If a device link is added via device_link_add() by the driver of the > link's consumer device, the supplier's runtime PM usage counter is > going to be dropped by the pm_runtime_put_suppliers() call in > driver

Re: [PATCH RESEND v4 2/2] arm/arm64: KVM: Add KVM_GET/SET_VCPU_EVENTS

Christoffer, Thanks for the review. On 2018/6/9 19:17, Christoffer Dall wrote: > On Sat, Jun 09, 2018 at 03:48:40AM +0800, Dongjiu Geng wrote: >> For the migrating VMs, user space may need to know the exception >> state. For example, in the machine A, KVM make an SError pending, >> when migrate

[PATCH 2/2] EDAC: i7core: fix memleaks and use-after-free on probe and remove

Make sure to free and deregister the addrmatch and chancounts devices allocated during probe in all error paths. Also fix use-after-free in a probe error path and in the remove success path where the devices were being put before before deregistration. Fixes: 356f0a30860d ("i7core_edac: change the

[PATCH 1/2] EDAC: fix memleak in module init error path

Make sure to use put_device() to free the initialised struct device so that resources managed by driver core also gets released in the event of a registration failure. Fixes: de3910eb79ac ("edac: change the mem allocation scheme to make Documentation/kobject.txt happy") Fixes: 2d56b109e3a5 ("EDAC

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