Commit-ID: 6b0b2016806b2e16a20b62d143383983a34a
Gitweb: https://git.kernel.org/tip/6b0b2016806b2e16a20b62d143383983a34a
Author: Dave Hansen
AuthorDate: Wed, 9 May 2018 10:13:38 -0700
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:14:45 +0200
x86/pkeys/selftests: Give be
Commit-ID: caf9eb6b4c82fc6cbd03697052ff22d97b0c377b
Gitweb: https://git.kernel.org/tip/caf9eb6b4c82fc6cbd03697052ff22d97b0c377b
Author: Dave Hansen
AuthorDate: Wed, 9 May 2018 10:13:44 -0700
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:14:45 +0200
x86/pkeys/selftests: Avoid p
> extern unsigned int nvme_io_timeout;
> #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
> @@ -454,7 +455,9 @@ static inline void nvme_mpath_clear_current_path(struct
> nvme_ns *ns)
> {
> struct nvme_ns_head *head = ns->head;
>
> - if (head && ns == srcu_dereference(head->curren
On Mon, May 14, 2018 at 05:10:22AM -0700, Christoph Hellwig wrote:
> > +COMPAT_SYSCALL_DEFINE3(aarch32_statfs64, const char __user *, pathname,
> > + compat_size_t, sz, struct compat_statfs64 __user *, buf)
> > +{
> > + if (sz == 88)
> > + sz = 84;
> > +
> > + return
On Mon, May 14, 2018 at 2:30 PM, Ulf Hansson wrote:
> On 14 May 2018 at 14:22, Sylwester Nawrocki wrote:
>> Hi,
>>
>> On 05/14/2018 12:17 PM, Krzysztof Kozlowski wrote:
>>
>>> Bisected to:
>>> 8c123c14bbba4add148536b6d47a9226deda2f7a is the first bad commit
>>> commit 8c123c14bbba4add148536b6d47a
Commit-ID: 7e7fd67ca39335a49619729821efb7cbdd674eb0
Gitweb: https://git.kernel.org/tip/7e7fd67ca39335a49619729821efb7cbdd674eb0
Author: Dave Hansen
AuthorDate: Wed, 9 May 2018 10:13:46 -0700
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:14:45 +0200
x86/pkeys/selftests: Allow f
Commit-ID: 6af17cf89e99b64cf1f660bf848755442ab2f047
Gitweb: https://git.kernel.org/tip/6af17cf89e99b64cf1f660bf848755442ab2f047
Author: Dave Hansen
AuthorDate: Wed, 9 May 2018 10:13:48 -0700
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:14:45 +0200
x86/pkeys/selftests: Add PRO
Commit-ID: 3fcd2b2d928904cbf30b01e2c5e4f1dd2f9ab262
Gitweb: https://git.kernel.org/tip/3fcd2b2d928904cbf30b01e2c5e4f1dd2f9ab262
Author: Dave Hansen
AuthorDate: Wed, 9 May 2018 10:13:47 -0700
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:14:45 +0200
x86/pkeys/selftests: Factor
On Mon, May 14, 2018 at 2:40 PM, Sylwester Nawrocki
wrote:
> On 05/14/2018 02:29 PM, Krzysztof Kozlowski wrote:
>> Ah, I missed these messages because I was looking at err dmesg level
>> (and for some reason these are warn). Anyway do you have any thoughts
>> how is it connected with missing Odroi
Commit-ID: 3d64f4ed15c3c53dba4c514bf59c334464dee373
Gitweb: https://git.kernel.org/tip/3d64f4ed15c3c53dba4c514bf59c334464dee373
Author: Dave Hansen
AuthorDate: Wed, 9 May 2018 10:13:52 -0700
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:14:45 +0200
x86/pkeys/selftests: Fix poi
Commit-ID: 0a0b152083cfc44ec1bb599b57b7aab41327f998
Gitweb: https://git.kernel.org/tip/0a0b152083cfc44ec1bb599b57b7aab41327f998
Author: Dave Hansen
AuthorDate: Wed, 9 May 2018 10:13:51 -0700
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:14:45 +0200
x86/pkeys: Override pkey whe
On 14.5.2018 09:37, Alexander Graf wrote:
>
> On 05/14/2018 12:01 AM, Linus Walleij wrote:
>> On Wed, May 9, 2018 at 11:44 AM, Alexander Graf wrote:
>>> On 05/07/2018 08:31 PM, Bjorn Andersson wrote:
Can you please name platform that has enough support for Alexander to
care about backwa
Commit-ID: 3488a600d90bcaf061b104dbcfbdc8d99b398312
Gitweb: https://git.kernel.org/tip/3488a600d90bcaf061b104dbcfbdc8d99b398312
Author: Dave Hansen
AuthorDate: Wed, 9 May 2018 10:13:56 -0700
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:14:45 +0200
x86/pkeys/selftests: Add a t
Commit-ID: acb25d761d6f2f64e785ccefc71e54f244f1eda4
Gitweb: https://git.kernel.org/tip/acb25d761d6f2f64e785ccefc71e54f244f1eda4
Author: Dave Hansen
AuthorDate: Wed, 9 May 2018 10:13:54 -0700
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:14:45 +0200
x86/pkeys/selftests: Save of
On 05/05/2018 04:45 AM, Stephen Boyd wrote:
Quoting Alexandre Torgue (2018-05-04 00:54:16)
Stephen
On 05/03/2018 08:40 AM, gabriel.fernan...@st.com wrote:
From: Gabriel Fernandez
Clock driver is mandatory if the machine is selected.
Then don't use 'bool' and 'depends on' commands, but 'def
Commit-ID: f50b4878329ab61d8e05796f655adeb6f5fb57c6
Gitweb: https://git.kernel.org/tip/f50b4878329ab61d8e05796f655adeb6f5fb57c6
Author: Dave Hansen
AuthorDate: Wed, 9 May 2018 10:13:50 -0700
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:14:45 +0200
x86/pkeys/selftests: Fix pke
Commit-ID: 2fa9d1cfaf0e02f8abef0757002bff12dfcfa4e6
Gitweb: https://git.kernel.org/tip/2fa9d1cfaf0e02f8abef0757002bff12dfcfa4e6
Author: Dave Hansen
AuthorDate: Wed, 9 May 2018 10:13:58 -0700
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:14:45 +0200
x86/pkeys: Do not special ca
On Mon, May 14, 2018 at 05:51:58PM +0530, Laxman Dewangan wrote:
>
>
> On Monday 14 May 2018 05:29 PM, Thierry Reding wrote:
> > * PGP Signed by an unknown key
> >
> > On Mon, May 14, 2018 at 12:13:47AM +0300, Dmitry Osipenko wrote:
> > > Nothing prevents I2C clients to access I2C while Tegra's
Hi Boris,
On Mon, May 14, 2018 at 2:13 PM, Boris Brezillon
wrote:
> On Mon, 14 May 2018 14:00:19 +0200
> Geert Uytterhoeven wrote:
>> On Mon, May 14, 2018 at 1:46 PM, Boris Brezillon
>> wrote:
>> > On Mon, 14 May 2018 13:32:30 +0200
>> > Geert Uytterhoeven wrote:
>> >> On Mon, May 14, 2018 at
On Mon, 2018-05-14 at 14:18 +0200, Lukas Wunner wrote:
> On Tue, May 08, 2018 at 04:15:47PM +0300, Andy Shevchenko wrote:
> > --- a/drivers/firmware/efi/apple-properties.c
> > +++ b/drivers/firmware/efi/apple-properties.c
> > @@ -13,6 +13,9 @@
> > *
> > * You should have received a copy of the
When you add the changleog, please also fix the subject typo:
- bus: fsl-mc: supoprt dma configure for devices on fsl-mc bus
^^^
+ bus: fsl-mc: support dma configure for devices on fsl-mc bus
On Mon, Apr 30, 2018 at 11:57:20AM +0530, Nipun Gupta wrote:
> Signed-off-by: Nipun Gu
Commit-ID: 49892dbc2cb349f78eccfc1f55eac0ec718f44bb
Gitweb: https://git.kernel.org/tip/49892dbc2cb349f78eccfc1f55eac0ec718f44bb
Author: Frederic Weisbecker
AuthorDate: Tue, 8 May 2018 15:38:17 +0200
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:25:26 +0200
softirq/sparc: Conve
Commit-ID: 2e5c4632dcc0365a97c36817a368507e6a4c89b2
Gitweb: https://git.kernel.org/tip/2e5c4632dcc0365a97c36817a368507e6a4c89b2
Author: Frederic Weisbecker
AuthorDate: Tue, 8 May 2018 15:38:16 +0200
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:25:26 +0200
softirq/ia64: Conver
Commit-ID: 0f6f47bacba514f4e9f61de0d85940dfb41498cc
Gitweb: https://git.kernel.org/tip/0f6f47bacba514f4e9f61de0d85940dfb41498cc
Author: Frederic Weisbecker
AuthorDate: Tue, 8 May 2018 15:38:19 +0200
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:25:27 +0200
softirq/core: Turn d
On Thu, Mar 29, 2018 at 10:49:03AM +0100, Matt Redfearn wrote:
> Several messages from the MIPS GIC driver include the text "GIC", "GIC
> timer", etc, but the format is not standard. Add a pr_fmt of
> "mips-gic-timer: " and reword the messages now that they will be
> prefixed with the driver name.
Commit-ID: 0fd7d86285290ccebc0dc6eb536b6b043dd6a1e4
Gitweb: https://git.kernel.org/tip/0fd7d86285290ccebc0dc6eb536b6b043dd6a1e4
Author: Frederic Weisbecker
AuthorDate: Tue, 8 May 2018 15:38:20 +0200
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:25:27 +0200
softirq/core: Consol
>>> On 09.05.18 at 22:33, wrote:
> @@ -64,6 +67,17 @@ ENTRY(pvh_start_xen)
> mov %eax,%es
> mov %eax,%ss
>
> + /* Set base address in stack canary descriptor. */
> + movl _pa(gdt_start),%eax
> + movl $_pa(canary),%ecx
> + movw %cx, (PVH_GDT_ENTRY_CANARY * 8) + 0(%eax)
Commit-ID: a58bdf25b98bf765b4b732f2c56097ddcb9f2d5a
Gitweb: https://git.kernel.org/tip/a58bdf25b98bf765b4b732f2c56097ddcb9f2d5a
Author: Frederic Weisbecker
AuthorDate: Tue, 8 May 2018 15:38:21 +0200
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:25:27 +0200
softirq/ia64: Switch
Commit-ID: 03979f8a72e6576248e7b9e3abb72a760312dd7d
Gitweb: https://git.kernel.org/tip/03979f8a72e6576248e7b9e3abb72a760312dd7d
Author: Frederic Weisbecker
AuthorDate: Tue, 8 May 2018 15:38:22 +0200
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:25:27 +0200
softirq/parisc: Swit
On Mon, May 14, 2018 at 2:45 PM, Krzysztof Kozlowski wrote:
> On Mon, May 14, 2018 at 2:40 PM, Sylwester Nawrocki
> wrote:
>> On 05/14/2018 02:29 PM, Krzysztof Kozlowski wrote:
>>> Ah, I missed these messages because I was looking at err dmesg level
>>> (and for some reason these are warn). Anywa
On 14.05.2018 15:21, Laxman Dewangan wrote:
>
>
> On Monday 14 May 2018 05:29 PM, Thierry Reding wrote:
>> * PGP Signed by an unknown key
>>
>> On Mon, May 14, 2018 at 12:13:47AM +0300, Dmitry Osipenko wrote:
>>> Nothing prevents I2C clients to access I2C while Tegra's driver is being
>>> suspend
Commit-ID: 1321a5de1ecb0d2981394ff2111c75c4dcb0c237
Gitweb: https://git.kernel.org/tip/1321a5de1ecb0d2981394ff2111c75c4dcb0c237
Author: Frederic Weisbecker
AuthorDate: Tue, 8 May 2018 15:38:23 +0200
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:25:28 +0200
softirq/powerpc: Swi
Commit-ID: 424f7d3e3b950c88a4127b7dfa78ea54e287413e
Gitweb: https://git.kernel.org/tip/424f7d3e3b950c88a4127b7dfa78ea54e287413e
Author: Frederic Weisbecker
AuthorDate: Tue, 8 May 2018 15:38:24 +0200
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:25:28 +0200
softirq/sparc: Switc
Commit-ID: 1a8bc8f8d6a7980a75edbd29578fbce09359
Gitweb: https://git.kernel.org/tip/1a8bc8f8d6a7980a75edbd29578fbce09359
Author: Frederic Weisbecker
AuthorDate: Tue, 8 May 2018 15:38:25 +0200
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:25:28 +0200
softirq/x86: Switch
Commit-ID: 48bda43eabb8d086204f543cf8bbad696b8c6391
Gitweb: https://git.kernel.org/tip/48bda43eabb8d086204f543cf8bbad696b8c6391
Author: Frederic Weisbecker
AuthorDate: Tue, 8 May 2018 15:38:26 +0200
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:25:28 +0200
softirq/s390: Move d
Commit-ID: 1153933703d927b3d4874c0bc801de32b1b58be9
Gitweb: https://git.kernel.org/tip/1153933703d927b3d4874c0bc801de32b1b58be9
Author: Alexey Dobriyan
AuthorDate: Tue, 8 May 2018 00:39:37 +0300
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:38:51 +0200
x86/asm/64: Micro-optimi
On Mon, May 14, 2018 at 12:41:10PM +0100, Mark Rutland wrote:
> On Mon, May 14, 2018 at 12:07:18PM +0100, Dave Martin wrote:
> > On Mon, May 14, 2018 at 10:46:30AM +0100, Mark Rutland wrote:
> > > As a first step towards invoking syscalls with a pt_regs argument,
> > > convert the raw syscall invoc
Commit-ID: 51bad67ffbce0aaa44579f84ef5d05597054ec6a
Gitweb: https://git.kernel.org/tip/51bad67ffbce0aaa44579f84ef5d05597054ec6a
Author: Alexey Dobriyan
AuthorDate: Tue, 8 May 2018 00:37:55 +0300
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:43:03 +0200
x86/asm: Pad assembly fu
Commit-ID: 30d723340c30ff9afe200ef5ecbbdc77e6d1f816
Gitweb: https://git.kernel.org/tip/30d723340c30ff9afe200ef5ecbbdc77e6d1f816
Author: Frederic Weisbecker
AuthorDate: Tue, 8 May 2018 15:38:18 +0200
Committer: Ingo Molnar
CommitDate: Mon, 14 May 2018 11:25:27 +0200
softirq/sh: Use nmi_
On 05/14/2018, 05:04 AM, Randy Dunlap wrote:
> HTH.
Definitely, thanks for proof-reading.
--
js
suse labs
On Sat, May 12, 2018 at 11:17:08PM +0530, sumeet p wrote:
> Correct the typecast with const to struct thermal_cooling_device_ops.
> It is the last argument to the function thermal_of_cooling_device_register
> and this argument is of type const. So, declare this structure
> thermal_cooling_device_op
On Mon, May 14, 2018 at 05:42:30AM -0700, Christoph Hellwig wrote:
> > extern unsigned int nvme_io_timeout;
> > #define NVME_IO_TIMEOUT(nvme_io_timeout * HZ)
> > @@ -454,7 +455,9 @@ static inline void nvme_mpath_clear_current_path(struct
> > nvme_ns *ns)
> > {
> > struct nvme_ns_head *h
On Sun, May 13, 2018 at 06:11:45PM +0300, Andy Shevchenko wrote:
>On Tue, May 8, 2018 at 4:26 PM, William Breathitt Gray
> wrote:
>
>> While adding GPIO get_multiple/set_multiple callback support for various
>> drivers, I noticed a pattern of looping manifesting that would be useful
>> standardized
On Fri, 2018-05-11 at 21:52 +, Luis R. Rodriguez wrote:
> On Fri, May 11, 2018 at 01:00:26AM -0400, Mimi Zohar wrote:
> > On Thu, 2018-05-10 at 23:26 +, Luis R. Rodriguez wrote:
> > > On Wed, May 09, 2018 at 10:00:58PM -0400, Mimi Zohar wrote:
> > > > On Wed, 2018-05-09 at 23:48 +, Luis
On Mon, May 14, 2018 at 02:15:44PM +0200, Gabriel C wrote:
> http://ftp.frugalware.org/pub/other/people/crazy/ucode/cpuinfo-ucode-20180312
> http://ftp.frugalware.org/pub/other/people/crazy/ucode/cpuinfo-ucode-20180425
That's 0xc2 and 0x9e respectively, for the microcode revision.
For model 78 (I
On Tue, Apr 17, 2018 at 07:17:55PM +0530, Souptick Joarder wrote:
> Use new return type vm_fault_t for fault handler. For
> now, this is just documenting that the function returns
> a VM_FAULT value rather than an errno. Once all instances
> are converted, vm_fault_t will become a distinct type.
>
On 14.05.2018 15:18, Wolfram Sang wrote:
> On Mon, May 14, 2018 at 01:59:33PM +0200, Thierry Reding wrote:
>> On Mon, May 14, 2018 at 12:13:47AM +0300, Dmitry Osipenko wrote:
>>> Nothing prevents I2C clients to access I2C while Tegra's driver is being
>>> suspended, this results in -EBUSY error ret
On 11/05/18 17:45, Arnaldo Carvalho de Melo wrote:
> Em Fri, May 11, 2018 at 02:18:01PM +0300, Adrian Hunter escreveu:
>> On 10/05/18 23:47, Arnaldo Carvalho de Melo wrote:
>>> Em Thu, May 10, 2018 at 05:19:22PM -0300, Arnaldo Carvalho de Melo escreveu:
Em Thu, May 10, 2018 at 05:15:42PM -0300
On Sun, May 13, 2018 at 06:06:42PM +0300, Andy Shevchenko wrote:
>On Tue, May 8, 2018 at 4:26 PM, William Breathitt Gray
> wrote:
>> This macro iterates for each group of bits (port word) with set bits,
>> within a bitmap memory region. For each iteration, "port_word" is set to
>> the found port wo
On Sun, May 13, 2018 at 7:56 PM, Shawn Guo wrote:
> Hi Stephen,
>
> On Mon, May 14, 2018 at 09:21:58AM +1000, Stephen Rothwell wrote:
>> Hi Shawn,
>>
>> After merging the imx-mxs tree, today's linux-next build (arm
>> multi_v7_defconfig) produced this warning:
>>
>> arch/arm/boot/dts/imx6dl-arista
Drivers/subsystems creating scatterlists for DMA should be taking care
to respect the scatter-gather limitations of the appropriate device, as
described by dma_parms. A DMA API implementation cannot feasibly split
a scatterlist into *more* entries than originally passed, so it is not
well defined w
Hi Holger,
Thank you for your great work!
On Mon, 14 May 2018 12:19:34 +0800
Holger Freyther wrote:
> From: Holger Hans Peter Freyther
>
> Currently perf probe -x app --funcs will list and demangle C++ functions
> but the other probe actions can't work with them. When asking probe to not
> de
On Mon, May 14, 2018 at 01:41:23PM +0100, Dave Martin wrote:
> On Mon, May 14, 2018 at 01:06:10PM +0100, Mark Rutland wrote:
> > On Mon, May 14, 2018 at 12:56:09PM +0100, Robin Murphy wrote:
> > > On 14/05/18 12:20, Dave Martin wrote:
> > > > How about the following?
> > > >
> > > > /* Watch out f
David Miller writes:
> I'm deferring this patch series.
>
> If we can't get a reasonable review from an interested party in 10+
> days, that is not reasonable.
>
> Resubmit this once someone reviews it properly.
David I am out on vacation this week and last (the reason for the delay).
The last
Am Montag, den 14.05.2018, 17:42 +0530 schrieb Pintu Kumar:
> Hi,
>
> Is there any work around possible to set IRQ affinity for some GPIO
> interrupt ?
> How to avoid CPU0 to receive the current GPIO interrupt ?
> How do we assign GPIO interrupts to any CPU other than CPU0 ?
> Is it possible to is
[v6]
* Addressed comments from Viresh about:
** Comments style
** Kconfig bool instead of tristate
** DT and documentation style
** Resourses deallocation on an error
** Typos
[v5]
* Rebased
* Addressed comments from Bjorn about SPDX style,
functions and parameters naming
* Addressed c
The driver provides kernel level API for other drivers
to access the MSM8996 L2 cache registers.
Separating the L2 access code from the PMU driver and
making it public to allow other drivers use it.
The accesses must be separated with a single spinlock,
maintained in this driver.
Signed-off-by: Il
From: Rajendra Nayak
The CPU clock controller's primary PLL operates on a single VCO range,
between 600MHz and 3GHz. However the CPUs do support OPPs with
frequencies between 300MHz and 600MHz. In order to support running the
CPUs at those frequencies we end up having to lock the PLL at twice the
From: Rajendra Nayak
Each of the CPU clusters on msm8996 are powered via a primary
PLL and a secondary PLL. The primary PLL is what drives the
CPU clk, except for times when we are reprogramming the PLL
itself, when we temporarily switch to an alternate PLL.
Use clock rate change notifiers to sup
Each of the CPU clusters (Power and Perf) on msm8996 are
clocked via 2 PLLs, a primary and alternate. There are also
2 Mux'es, a primary and secondary all connected together
as shown below
+---+
XO | |
+-->0
Add support for SAW controlled regulators.
The regulators defined as SAW controlled in the device tree
will be controlled through special CPU registers instead of direct
SPMI accesses.
This is required especially for CPU supply regulators to synchronize
with clock scaling and for Automatic Voltage
The PMUX for each duplex allows for selection of ACD clock source.
The DVM (Dynamic Variation Monitor) will flag an error
when a voltage droop event is detected. This flagged error
enables ACD to provide a div-by-2 clock, sourced from the primary PLL.
The duplex will be provided the divided clock
u
1. Add syscon node for the SAW CPU registers
2. Add SAW regulators gang definition for s8-s11
3. Add voltages to the OPP tables
4. Add the s11 SAW regulator as CPU regulator
Signed-off-by: Ilia Lin
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 75 +++
1 file changed
In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996
that have KRYO processors, the CPU ferequencies subset and voltage value
of each OPP varies based on the silicon variant in use.
Qualcomm Technologies, Inc. Process Voltage Scaling Tables
defines the voltage and frequency value ba
Signed-off-by: Ilia Lin
---
arch/arm64/boot/dts/qcom/apq8096-db820c.dts | 2 +-
arch/arm64/boot/dts/qcom/msm8996.dtsi | 310 +++-
2 files changed, 309 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dts
b/arch/arm64/boot/dts/qco
Alexey Gladkov writes:
> On Fri, May 11, 2018 at 03:58:39PM +0200, Jann Horn wrote:
>> On Fri, May 11, 2018 at 11:37 AM, Alexey Gladkov
>> wrote:
>> > This allows to hide all files and directories in the procfs that are not
>> > related to tasks.
>>
>> /proc/$pid/net and /proc/$pid/task/$tid/ne
In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO processors,
the CPU ferequencies subset and voltage value of each OPP varies
based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
defines the voltage and frequency value based on the msm-id in SMEM
and speedbin blo
Add support for SAW controlled regulators.
The regulators defined as SAW controlled in the device tree
will be controlled through special CPU registers instead of direct
SPMI accesses.
This is required especially for CPU supply regulators to synchronize
with clock scaling and for Automatic Voltage
This series brings AEAD algorithms to the Inside Secure SafeXcel driver.
The first 7 commits rework the driver to allow the future AEAD addition,
and then 3 commits add AEAD functions and 3 algorithms.
This is based on top of v4.17-rc5.
Thanks!
Antoine
Since v1:
- Reworked the driver to remove
> "Thorsten" == Thorsten Glaser writes:
Thorsten> Adrian Bunk dixit:
>> As an example, what happens if I debootstrap and deploy the
>> resulting filesytem to a large number of identical embedded
>> systems without entropy sources?
Thorsten> Just get into a habit of not do
This patch adds the authenc(hmac(sha1),cbc(aes)) AEAD algorithm
support to the Inside Secure SafeXcel driver.
Signed-off-by: Antoine Tenart
---
drivers/crypto/inside-secure/safexcel.c | 1 +
drivers/crypto/inside-secure/safexcel.h | 1 +
.../crypto/inside-secure/safexcel_cipher.c
This patch makes the context control size computation dynamic, not to
rely on hardcoded values. This is better for the future, and will help
adding the AEAD support.
Signed-off-by: Antoine Tenart
---
drivers/crypto/inside-secure/safexcel_cipher.c | 5 ++---
1 file changed, 2 insertions(+), 3 del
This patch removes the use of VLAs to allocate requests on the stack, by
removing both SKCIPHER_REQUEST_ON_STACK and AHASH_REQUEST_ON_STACK. As
we still need to allocate requests on the stack to ease the creation of
invalidation requests a new, non-VLA, definition is used:
EIP197_REQUEST_ON_STACK.
This patch improves the error reporting from the Inside Secure driver to
the upper layers and crypto consumers. All errors reported by the engine
aren't fatal, and some may be genuine.
Signed-off-by: Antoine Tenart
---
drivers/crypto/inside-secure/safexcel.c | 21 +++
drive
This patch adds support for the first AEAD algorithm in the Inside
Secure SafeXcel driver, authenc(hmac(sha256),cbc(aes)). As this is the
first AEAD algorithm added to this driver, common AEAD functions are
added as well.
Signed-off-by: Antoine Tenart
---
drivers/crypto/Kconfig
This patch adds the authenc(hmac(sha224),cbc(aes)) AEAD algorithm
support to the Inside Secure SafeXcel driver.
Signed-off-by: Antoine Tenart
---
drivers/crypto/inside-secure/safexcel.c | 1 +
drivers/crypto/inside-secure/safexcel.h | 1 +
.../crypto/inside-secure/safexcel_cipher.c
This patches reworks the way the algorithm type is set in the context,
by using the fact that the decryption algorithms are just a combination
of the algorithm encryption type and CONTEXT_CONTROL_TYPE_NULL_IN.
This will help having simpler code when adding the AEAD support, to
avoid ending up with
This commit fixes the CONTEXT_CONTROL_TYPE_HASH_ENCRYPT_OUT and
CONTEXT_CONTROL_TYPE_HASH_DECRYPT_OUT types by assigning the right
value, and by renaming CONTEXT_CONTROL_TYPE_HASH_DECRYPT_OUT to
CONTEXT_CONTROL_TYPE_HASH_DECRYPT_IN.
This is not submitted as a fix for older kernel versions as these
This patches makes the key and context size computation dynamic when
using memzero_explicit() on these two arrays. This is safer, cleaner and
will help future modifications of the driver when these two parameters
sizes will changes (the context size will be bigger when using AEAD
algorithms).
Sign
This patch reworks the Inside Secure cipher functions, to remove all
skcipher specific information and structure from all functions generic
enough to be shared between skcipher and aead algorithms.
This is a cosmetic only patch.
Signed-off-by: Antoine Tenart
---
.../crypto/inside-secure/safexce
On Sun, May 06, 2018 at 03:03:00PM -0700, Nathan Chancellor wrote:
> uwrq is an unsigned 32-bit integer, it cannot be less than zero.
>
> Signed-off-by: Nathan Chancellor
> ---
> drivers/staging/ks7010/ks_wlan_net.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/
Signed-off-by: Ilia Lin
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 269 --
1 file changed, 260 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 37b7152c..e6cf290 100644
--- a/arch/arm6
-ci/linux/commits/Anders-Roxell/memstick-mspro_block-fix-unused-variable-warning/20180514-185634
config: x86_64-randconfig-x017-201819 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-16) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All
/commits/Anders-Roxell/memstick-mspro_block-fix-unused-variable-warning/20180514-185634
config: x86_64-randconfig-x001-201819 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-16) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new
Each of the CPU clusters (Power and Perf) on msm8996 are
clocked via 2 PLLs, a primary and alternate. There are also
2 Mux'es, a primary and secondary all connected together
as shown below
+---+
XO | |
+-->0
From: Rajendra Nayak
Allow clk_alpha_pll_configure to be called from loadable
kernel modules.
Signed-off-by: Rajendra Nayak
Signed-off-by: Ilia Lin
---
drivers/clk/qcom/clk-alpha-pll.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-
One of the downsides of THP as currently implemented is that it only supports
large page mappings for anonymous pages.
I embarked upon this prototype on the theory that it would be advantageous to
be able to map large ranges of read-only text pages using THP as well.
The idea is that the kernel
On Mon, May 14, 2018 at 6:38 AM, Bartosz Golaszewski wrote:
> 2018-05-11 22:13 GMT+02:00 Rob Herring :
>> On Fri, May 11, 2018 at 11:20 AM, Bartosz Golaszewski wrote:
>>> This series is a follow-up to the RFC[1] posted a couple days ago.
>>>
>>> NOTE: this series applies on top of my recent patch
On Sun, May 13, 2018 at 10:00:09PM -0700, Joel Fernandes wrote:
> On Sun, May 13, 2018 at 07:22:06PM -0700, Paul E. McKenney wrote:
> [..]
> > > > > > > If you don't mind going through the if conditions in the funnel
> > > > > > > locking loop
> > > > > > > with me, it would be quite helpful so th
On Mon, May 14, 2018 at 08:57:55AM +0200, Peter Zijlstra wrote:
> On Fri, May 11, 2018 at 09:20:53AM -0700, Paul E. McKenney wrote:
> > On Fri, May 11, 2018 at 10:32:42AM +0200, Peter Zijlstra wrote:
> > > On Fri, May 11, 2018 at 03:25:18PM +0800, Xiao Guangrong wrote:
> > > >
> > > > Hi,
> > > >
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/pti
head: 51bad67ffbce0aaa44579f84ef5d05597054ec6a
commit: 51bad67ffbce0aaa44579f84ef5d05597054ec6a [14/14] x86/asm: Pad assembly
functions with INT3 instructions
config: x86_64-randconfig-x016-201819 (attached as .config)
c
On Mon, May 14, 2018 at 05:42:30AM -0700, Christoph Hellwig wrote:
> > extern unsigned int nvme_io_timeout;
> > #define NVME_IO_TIMEOUT(nvme_io_timeout * HZ)
> > @@ -454,7 +455,9 @@ static inline void nvme_mpath_clear_current_path(struct
> > nvme_ns *ns)
> > {
> > struct nvme_ns_head *h
On Sun, May 06, 2018 at 06:13:24PM -0700, Nathan Chancellor wrote:
> Add the identifiers when missing and fix the ones already present
> according to checkpatch.pl.
>
> Signed-off-by: Nathan Chancellor
> ---
> drivers/staging/android/ashmem.h| 6 +-
> drivers/staging/android/uapi/as
On 13/05/2018 20:22:04-0300, Hernán Gonzalez wrote:
> GPIO_ACTIVE_LOW was being used to specify an interrupt, use
> IRQ_TYPE_EDGE_RISING instead. This improves DT readability.
>
> Signed-off-by: Hernán Gonzalez
> ---
> arch/arm/boot/dts/at91-sama5d2_xplained.dts | 2 +-
> 1 file changed, 1 inser
On Mon, 14 May 2018 12:19:34 +0800
Holger Freyther wrote:
> From: Holger Hans Peter Freyther
>
> Currently perf probe -x app --funcs will list and demangle C++ functions
> but the other probe actions can't work with them. When asking probe to not
> demangle it will not list any of the applicati
I hate this checkpatch warning... The original is often superior to the
modified versions we see.
regards,
dan carpenter
On Mon, May 14, 2018 at 06:31:05AM -0700, Paul E. McKenney wrote:
> > > + if (head &&
> > > + ns == rcu_dereference_protected(head->current_path,
> > > + lockdep_is_held(&ns->ctrl->subsys->lock)))
> > > rcu_assign_pointer(head->current_path, NULL);
> > > }
> >
Now that it has been surgically removed from the MCPM port-control code,
we can let the CCI PMU driver be modular. Probing the PMU in the first
place still depends on the bus driver stub being built-in, but it's a
small price to pay compared to the major upheaval of completely reworking
the DT-hand
On 05/14/2018 02:50 PM, Krzysztof Kozlowski wrote:
> On Mon, May 14, 2018 at 2:45 PM, Krzysztof Kozlowski wrote:
>> On Mon, May 14, 2018 at 2:40 PM, Sylwester Nawrocki
>> wrote:
>>> On 05/14/2018 02:29 PM, Krzysztof Kozlowski wrote:
Ah, I missed these messages because I was looking at err dm
On Mon, May 14, 2018 at 06:31:05AM -0700, Paul E. McKenney wrote:
> If you are just looking at the value of an RCU-protected pointer, then
> using rcu_access_pointer() will cause RCU to just read out the value
> and otherwise keeps its mouth shut.
>
> If you use rcu_access_pointer() and later dere
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