Re: [PATCH 00/13] [v4] x86, pkeys: two protection keys bug fixes

* Ingo Molnar wrote: > So this series is looking good to me in principle, but trying to build it I > got > warnings and errors - see the build log below. > > Note that this is on a box with "Ubuntu 18.04 LTS (Bionic Beaver)". So it turns out that the build errors already exist without the se

答复: [PATCH] ipvlan: flush arp table when mac address changed

Hi, > > Hi, > > On Sat, 2018-05-12 at 19:00 +0800, liuq...@huawei.com wrote: > > From: Keefe Liu > > > > When master device's mac has been changed, the commit <32c10bbfe914> > > "ipvlan: always use the current L2 addr of the master" makes the > > IPVlan devices's mac changed also, but it doesn't

Re: [Ksummit-discuss] bug-introducing patches

+Fengguang On Mon, 14 May 2018 10:40:10 +0200 Geert Uytterhoeven wrote: > Hi Boris, > > On Mon, May 14, 2018 at 10:34 AM, Boris Brezillon > wrote: > > On Mon, 14 May 2018 10:29:04 +0200 > > Geert Uytterhoeven wrote: > >> On Mon, May 14, 2018 at 10:12 AM, Boris Brezillon > >> wrote: > >>

Re: clk: stm32mp1: Fix a memory leak in 'clk_stm32_register_gate_ops()'

Hi Christophe, Many thanks ! Acked-by: Gabriel Fernandez On 05/13/2018 01:17 PM, Christophe Jaillet wrote: > We allocate some memory which is neither used, nor referenced by anything. > So axe it. > > Signed-off-by: Christophe JAILLET > --- > This patch as not been compile-tested, I don't hav

Re: [PATCH v4 4/4] ALSA: usb-audio: UAC3: Parse Input Terminal number of channels.

On 11/05/18 16:25, Jorge Sanjuan wrote: Obtain the number of channels for the Input Terminal from the Logical Cluster Descriptor. This achieves a useful minimal parsing of this unit so it can be used in other units in the topology. Signed-off-by: Jorge Sanjuan --- sound/usb/mixer.c | 4 ++--

[RFC PATCH 01/10] time: Add persistent clock support

On our Spreadtrum SC9860 platform, we registered the high resolution ARM generic timer as one clocksource to update the OS time, but the ARM generic timer will be stopped in suspend state. So we use one 64bit always-on timer (but low resolution) of Spreadtrum to calculate the suspend time to compen

[RFC PATCH 00/10] Add persistent clock support

Hi, We will meet below issues when compensating the suspend time for the timekeeping. 1. We have too many different ways of dealing with persistent timekeeping across architectures, so it is hard for one driver to compatable with different architectures. 2. On some platforms (such as Spreadtrum

[RFC PATCH 02/10] clocksource: sprd: Add one persistent timer for Spreadtrum platform

On Spreadtrum SC9860 platform, we need one persistent timer to calculate the suspend time to compensate the OS time. This patch registers one Spreadtrum AON timer as persistent timer, which runs at 32bit and periodic mode. Signed-off-by: Baolin Wang --- drivers/clocksource/Kconfig |1 +

[RFC PATCH 03/10] arm: omap: Convert 32K counter to use persistent clock

We have introduced the persistent clock framework to support the OS time compensating from persistent clock, so this patch converts the 32k counter to use persistent clock framework to save lots of duplicate code. Signed-off-by: Baolin Wang --- arch/arm/plat-omap/Kconfig |1 + arch/arm

[RFC PATCH 05/10] arm: time: Remove the persistent clock support for ARM

We have converted all drivers to use common persistent clock framework to compensate the suspend time, so we can remove the persistent clock, which only supports the ARM architecture. Moreover there are no drivers will register read_boot_clock64(), so remove it too. Signed-off-by: Baolin Wang --

[RFC PATCH 04/10] clocksource: tegra20_timer: Remove register_persistent_clock() API

We will convert all drivers to use persistent clock framework to compensate the suspend time for OS time, instead of using the register_persistent_clock() API in ARM architecture. So this patch removes the register_persistent_clock() and implement its function to read persistent clock. Signed-off

[RFC PATCH 07/10] clocksource: timer-ti-32k: Register the persistent clock

Since the 32K counter is always available, then we can register the persistent clock to compensate the suspend time for the OS time. Signed-off-by: Baolin Wang --- drivers/clocksource/Kconfig|1 + drivers/clocksource/timer-ti-32k.c |4 2 files changed, 5 insertions(+) diff

[RFC PATCH 06/10] clocksource: arm_arch_timer: Register the persistent clock

Register the persistent clock to compensate the suspend time for OS time, if the ARM counter clocksource will not be stopped in suspend state. Signed-off-by: Baolin Wang --- drivers/clocksource/Kconfig |1 + drivers/clocksource/arm_arch_timer.c | 10 ++ 2 files changed, 11

[RFC PATCH 08/10] clocksource: time-pistachio: Register the persistent clock

Since the timer on pistachio platform is always available, we can register it as one persistent clock to compensate the suspend time for the OS time. Signed-off-by: Baolin Wang --- drivers/clocksource/Kconfig |1 + drivers/clocksource/time-pistachio.c |3 +++ 2 files changed, 4

[RFC PATCH 10/10] time: timekeeping: Remove time compensating from nonstop clocksources

Since we have converted all nonstop clocksources to use persistent clock, thus we can simplify the time compensating by removing the nonstop clocksources. Now we can compensate the suspend time for the OS time from the persistent clock or rtc device. Signed-off-by: Baolin Wang --- kernel/time/ti

[RFC PATCH 09/10] x86: tsc: Register the persistent clock

Register the tsc as one persistent clock to compensate the suspend time if the tsc clocksource is always available. Signed-off-by: Baolin Wang --- arch/x86/Kconfig |1 + arch/x86/kernel/tsc.c | 16 2 files changed, 17 insertions(+) diff --git a/arch/x86/Kconfig b/arc

[PATCH] x86/pkeys/selftests: Adjust the self-test to fresh distros that export the pkeys ABI

Ubuntu 18.04 started exporting pkeys details in header files, resulting in build failures and warnings in the pkeys self-tests: protection_keys.c:232:0: warning: "SEGV_BNDERR" redefined protection_keys.c:387:5: error: conflicting types for ‘pkey_get’ protection_keys.c:409:5: error: conflicti

[PATCH] x86/mpx/selftests: Adjust the self-test to fresh distros that export the MPX ABI

Fix this warning: mpx-mini-test.c:422:0: warning: "SEGV_BNDERR" redefined Signed-off-by: Ingo Molnar --- tools/testing/selftests/x86/mpx-mini-test.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/tools/testing/selftests/x86/mpx-mini-test.c b/tools/testing/selftest

[PATCH v8 00/12] Intel Processor Trace virtualization enabling

Hi All, Here is a patch-series which adding Processor Trace enabling in KVM guest. You can get It's software developer manuals from: https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf In Chapter 4 INTEL PROCESSOR TRACE: V

[PATCH v8 02/12] perf/x86/intel/pt: Change pt_cap_get() to a public function

From: Chao Peng Change pt_cap_get() to a public function that KVM can access this function to check if specific feature is supported on hardware. Signed-off-by: Chao Peng Signed-off-by: Luwei Kang --- arch/x86/events/intel/pt.c | 3 ++- arch/x86/events/intel/pt.h | 21 -

[PATCH v8 03/12] perf/x86/intel/pt: Add new bit definitions for Intel PT MSRs

These bit definitions are use for emulate MSRs read/write for KVM. For example, IA32_RTIT_CTL.FabricEn[bit 6] is available only when CPUID.(EAX=14H, ECX=0):ECX[bit 3] = 1. If KVM guest try to set this bit with CPUID.(EAX=14H, ECX=0):ECX[bit3] = 0 a #GP would be injected to KVM guest. Signed-off-by

[PATCH v8 06/12] KVM: x86: Add Intel Processor Trace virtualization mode

From: Chao Peng Intel PT virtualization can be work in one of 2 possible modes: a. system-wide: trace both host and guest and output to host buffer; b. host-guest: trace host/guest simultaneous and output to their respective buffer. Signed-off-by: Chao Peng Signed-off-by: Luwei Kang --- ar

[PATCH v8 01/12] perf/x86/intel/pt: Move Intel-PT MSRs bit definitions to a public header

From: Chao Peng Intel Processor Trace virtualization enabling in KVM guest need to access these MSRs bit definitions, so move them to public header file msr-index.h. Signed-off-by: Chao Peng Signed-off-by: Luwei Kang --- arch/x86/events/intel/pt.h | 37 --

[PATCH v8 05/12] perf/x86/intel/pt: Introduce a new function to get capability of Intel PT

New function pt_cap_decode() will be invoked in KVM to check if a specific capability is available in KVM guest. Another function pt_cap_get() can only check the hardware capabilities but this may different with KVM guest because some features may not be exposed to guest. Signed-off-by: Luwei Kang

[PATCH v8 07/12] KVM: x86: Add Intel Processor Trace cpuid emulation

From: Chao Peng Expose Intel Processor Trace to guest only when PT work in HOST_GUEST mode. Signed-off-by: Chao Peng Signed-off-by: Luwei Kang --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/cpuid.c| 22 -- arch/x86/kvm/svm.c | 6 ++

[PATCH v8 08/12] KVM: x86: Add Intel Processor Trace context switch for each vcpu

From: Chao Peng Load/Store Intel processor trace register in context switch. MSR IA32_RTIT_CTL is loaded/stored automatically from VMCS. In HOST_GUEST mode, we need load/resore PT MSRs only when PT is enabled in guest. Signed-off-by: Chao Peng Signed-off-by: Luwei Kang --- arch/x86/kvm/vmx.c

[PATCH v8 09/12] KVM: x86: Introduce a function to initialize the PT configuration

Initialize the Intel PT configuration when cpuid update. Include cpuid inforamtion, rtit_ctl bit mask and the number of address ranges. Signed-off-by: Luwei Kang --- arch/x86/kvm/vmx.c | 69 ++ 1 file changed, 69 insertions(+) diff --git a/arc

[PATCH v8 11/12] KVM: x86: Set intercept for Intel PT MSRs read/write

From: Chao Peng Disable intercept Intel PT MSRs only when Intel PT is enabled in guest. But MSR_IA32_RTIT_CTL will alway be intercept. Signed-off-by: Chao Peng Signed-off-by: Luwei Kang --- arch/x86/kvm/vmx.c | 23 +++ 1 file changed, 23 insertions(+) diff --git a/arch/x8

Re: [PATCH v5 01/13] mm: Assign id to every memcg-aware shrinker

On 13.05.2018 08:15, Vladimir Davydov wrote: > On Thu, May 10, 2018 at 12:52:18PM +0300, Kirill Tkhai wrote: >> The patch introduces shrinker::id number, which is used to enumerate >> memcg-aware shrinkers. The number start from 0, and the code tries >> to maintain it as small as possible. >> >> Th

RE: [PATCH] x86: pad assembly functions with INT3

From: H. Peter Anvin > Sent: 11 May 2018 19:54 > > On 05/10/18 09:39, David Laight wrote: > > From: Alexey Dobriyan > >> Sent: 07 May 2018 22:38 > >> > >> Use INT3 instead of NOP. All that padding between functions is > >> an illegal area, no legitimate code should jump into it. > >> > >> I've che

[PATCH v8 10/12] KVM: x86: Implement Intel Processor Trace MSRs read/write emulation

From: Chao Peng This patch implement Intel Processor Trace MSRs read/write emulation. Intel PT MSRs read/write need to be emulated when Intel PT MSRs is intercepted in guest and during live migration. Signed-off-by: Chao Peng Signed-off-by: Luwei Kang --- arch/x86/include/asm/intel_pt.h | 8

Re: Allwinner A64: Issue on external rtc clock to wifi chip

On Mon, May 14, 2018 at 1:57 PM, Maxime Ripard wrote: > On Mon, May 14, 2018 at 01:34:56PM +0530, Jagan Teki wrote: >> On Mon, May 14, 2018 at 1:27 PM, Maxime Ripard >> wrote: >> > Hi, >> > >> > On Mon, May 14, 2018 at 12:37:49PM +0530, Jagan Teki wrote: >> >> Hi Maxime and All, >> >> >> >> We ar

[PATCH v8 12/12] KVM: x86: Disable Intel Processor Trace when VMXON in L1 guest

Currently, Intel Processor Trace do not support tracing in L1 guest VMX operation(IA32_VMX_MISC[bit 14] is 0). As mentioned in SDM, on these type of processors, execution of the VMXON instruction will clears IA32_RTIT_CTL.TraceEn and any attempt to write IA32_RTIT_CTL causes a general-protection ex

Re: [PATCH 4.16 41/72] mtd: rawnand: Make sure we wait tWB before polling the STATUS reg

On Mon, May 14, 2018 at 09:32:51AM +0200, Geert Uytterhoeven wrote: > On Mon, May 14, 2018 at 8:48 AM, Greg Kroah-Hartman > wrote: > > 4.16-stable review patch. If anyone has any objections, please let me know. > > > > -- > > > > From: Boris Brezillon > > > > commit 3057fcef38534

Re: Allwinner A64: Issue on external rtc clock to wifi chip

On Mon, May 14, 2018 at 02:34:22PM +0530, Jagan Teki wrote: > On Mon, May 14, 2018 at 1:57 PM, Maxime Ripard > wrote: > > On Mon, May 14, 2018 at 01:34:56PM +0530, Jagan Teki wrote: > >> On Mon, May 14, 2018 at 1:27 PM, Maxime Ripard > >> wrote: > >> > Hi, > >> > > >> > On Mon, May 14, 2018 at 12

Re: [PATCH] gpu: drm: qxl: Adding new typedef vm_fault_t

Hi, > > So my expectation that a backmerge happens anyway after -rc1/2 is in > > line with reality, it is just to be delayed this time. I'll stay > > tuned ;) > > Is this patch already merged in drm-misc-next tree ? Pushed now. cheers, Gerd

[PATCH v8 04/12] perf/x86/intel/pt: add new capability for Intel PT

CPUID(EAX=14H,ECX=0):EBX[bit 3] = 1 indicates support of output to Trace Transport subsystem. MSR IA32_RTIT_CTL.FabricEn[bit 6] is reserved if CPUID.(EAX=14H, ECX=0):ECX[bit 3] = 0. This is use for emulate IA32_RTIT_CTL MSR read/write in KVM. KVM guest write IA32_RTIT_CTL will trap to root mode and

Re: [PATCH v5 7/7] proc: add option to mount only a pids subset

On Fri, May 11, 2018 at 03:58:39PM +0200, Jann Horn wrote: > On Fri, May 11, 2018 at 11:37 AM, Alexey Gladkov > wrote: > > This allows to hide all files and directories in the procfs that are not > > related to tasks. > > /proc/$pid/net and /proc/$pid/task/$tid/net aren't in scope for this > prot

Re: [PATCH v2] mm/ksm: ignore STABLE_FLAG of rmap_item->address in rmap_walk_ksm

On 10/05/18 02:26, Jia He wrote: Hi Andrew On 5/10/2018 7:31 AM, Andrew Morton Wrote: On Fri,  4 May 2018 11:11:46 +0800 Jia He wrote: In our armv8a server(QDF2400), I noticed lots of WARN_ON caused by PAGE_SIZE unaligned for rmap_item->address under memory pressure tests(start 20 guests an

Re: [PATCH 4.16 41/72] mtd: rawnand: Make sure we wait tWB before polling the STATUS reg

On Mon, 14 May 2018 11:04:22 +0200 Greg Kroah-Hartman wrote: > On Mon, May 14, 2018 at 09:32:51AM +0200, Geert Uytterhoeven wrote: > > On Mon, May 14, 2018 at 8:48 AM, Greg Kroah-Hartman > > wrote: > > > 4.16-stable review patch. If anyone has any objections, please let me > > > know. > > >

Re: [PATCH v2] net/mlx4_core: Fix error handling in mlx4_init_port_info.

On 14/05/2018 2:38 AM, Tarick Bedeir wrote: Avoid exiting the function with a lingering sysfs file (if the first call to device_create_file() fails while the second succeeds), and avoid calling devlink_port_unregister() twice. In other words, either mlx4_init_port_info() succeeds and returns z

RE: [PATCH 1/3] thermal: imx: remove cpufreq cooling registration

Anson Huang Best Regards! > -Original Message- > From: Bastian Stender [mailto:b...@pengutronix.de] > Sent: Monday, May 14, 2018 4:37 PM > To: Anson Huang ; shawn...@kernel.org; > s.ha...@pengutronix.de; ker...@pengutronix.de; Fabio Estevam > ; robh...@kernel.org; mark.rutl...@arm.com;

Re: [PATCH 3.18 00/23] 3.18.109-stable review

On 14 May 2018 12:18:29 PM IST, Greg Kroah-Hartman wrote: >This is the start of the stable review cycle for the 3.18.109 release. >There are 23 patches in this series, all will be posted as a response >to this one. If anyone has any issues with these being applied, please >let me know. > >Resp

Re: kernel panic: EXT4-fs (device loop0): panic forced after error

On Sun, May 6, 2018 at 10:30 PM, Theodore Y. Ts'o wrote: > On Sun, May 06, 2018 at 11:40:10PM +0900, Tetsuo Handa wrote: >> > We could add a full kernel-mode fsck which gets run before mount --- >> > the question is how much complexity we want to add. If SELinux is >> > enabled, then we have to c

Re: [PATCH v2 1/3] sched/cpufreq: always consider blocked FAIR utilization

Hi Patrick, On 11 May 2018 at 15:15, Patrick Bellasi wrote: > Since the refactoring introduced by: > >commit 8f111bc357aa ("cpufreq/schedutil: Rewrite CPUFREQ_RT support") > > we aggregate FAIR utilization only if this class has runnable tasks. > This was mainly due to avoid the risk to stay

Re: [PATCH] gpu: drm: qxl: Adding new typedef vm_fault_t

On Mon, May 14, 2018 at 2:32 PM, Gerd Hoffmann wrote: > Hi, > >> > So my expectation that a backmerge happens anyway after -rc1/2 is in >> > line with reality, it is just to be delayed this time. I'll stay >> > tuned ;) >> >> Is this patch already merged in drm-misc-next tree ? > > Pushed now.

Re: [PATCH 1/3] thermal: imx: remove cpufreq cooling registration

On 05/14/2018 11:10 AM, Anson Huang wrote: -Original Message- From: Bastian Stender [mailto:b...@pengutronix.de] Sent: Monday, May 14, 2018 4:37 PM To: Anson Huang ; shawn...@kernel.org; s.ha...@pengutronix.de; ker...@pengutronix.de; Fabio Estevam ; robh...@kernel.org; mark.rutl...@arm.co

Re: [PATCH 1/3] sched/cpufreq: always consider blocked FAIR utilization

On 11 May 2018 at 11:12, Patrick Bellasi wrote: >> >> Do we need a Fixes tag and Cc stable ? > > Mmm... no sure, I would say that's not a fix. > > As I say in the changelog above, 8f111bc357aa was doing the correct > thing but, since the recent Vincent's commit 31e77c93e432, this is an > update w

Re: [PATCH v2 2/3] sched/fair: util_est: update before schedutil

Hi Patrick, On 11 May 2018 at 15:15, Patrick Bellasi wrote: > When a task is enqueue the estimated utilization of a CPU is updated > to better support the selection of the required frequency. > However, schedutil is (implicitly) updated by update_load_avg() which > always happens before util_est_

Re: [PATCH v2 1/2] dt-bindings/display/bridge: sii902x: add optional power supplies

Hi Rob & Laurent :) On 04/26/2018 12:05 AM, Laurent Pinchart wrote: > Hi Rob, > > On Wednesday, 25 April 2018 20:11:23 EEST Rob Herring wrote: >> On Wed, Apr 25, 2018 at 04:17:25PM +0300, Laurent Pinchart wrote: >>> On Wednesday, 25 April 2018 15:20:04 EEST Philippe CORNU wrote: On 04/25/201

[PATCH v2] ipvlan: flush arp table when mac address changed

From: Keefe Liu When master device's mac has been changed, the commit <32c10bbfe914> "ipvlan: always use the current L2 addr of the master" makes the IPVlan devices's mac changed also, but it doesn't flush the IPVlan's arp table. Signed-off-by: Keefe Liu --- drivers/net/ipvlan/ipvlan_main.c |

Re: [PATCH] staging: bcm2835-camera: Fix module section mismatch warnings.

On Mon, May 14, 2018 at 08:44:11AM +0100, Eric Anholt wrote: > Noticed by Stephen Rothwell in -next. > > Signed-off-by: Eric Anholt > Fixes: 4bebb0312ea9 ("staging/bcm2835-camera: Set ourselves up as a platform > driver.") > Cc: Stephen Rothwell Should be: Reported-by: Stephen Rothwell I'll

Re: [Ksummit-discuss] bug-introducing patches

On Mon, May 14, 2018 at 10:48:03AM +0200, Boris Brezillon wrote: +Fengguang On Mon, 14 May 2018 10:40:10 +0200 Geert Uytterhoeven wrote: Hi Boris, On Mon, May 14, 2018 at 10:34 AM, Boris Brezillon wrote: > On Mon, 14 May 2018 10:29:04 +0200 > Geert Uytterhoeven wrote: >> On Mon, May 14, 20

Re: [PATCH net-next v2 02/13] net: phy: sfp: handle non-wired SFP connectors

Hi Russell, On Tue, May 08, 2018 at 12:52:47PM +0100, Russell King - ARM Linux wrote: > On Fri, May 04, 2018 at 03:56:32PM +0200, Antoine Tenart wrote: > > SFP connectors can be solder on a board without having any of their pins > > (LOS, i2c...) wired. In such cases the SFP link state cannot be g

Re: linux-next: build warnings after merge of the staging tree

On Mon, May 14, 2018 at 02:34:04PM +1000, Stephen Rothwell wrote: > Hi Greg, > > After merging the staging tree, today's linux-next build (x86_64 > allmodconfig) produced this warning: > > drivers/staging/most/video/video.c: In function 'vidioc_enum_fmt_vid_cap': > drivers/staging/most/video/vide

Re: [PATCH 05/19 v3] regulator: max77686: Pass descriptor instead of GPIO number

On Mon, May 14, 2018 at 10:06 AM, Linus Walleij wrote: > Instead of passing a global GPIO number, pass a descriptor looked > up from the device tree configuration node. > > Cc: Chanwoo Choi > Cc: Krzysztof Kozlowski > Cc: Bartlomiej Zolnierkiewicz > Signed-off-by: Linus Walleij > --- > ChangeL

Re: [PATCH] selftests/x86: Add mov_to_ss

* Pavel Machek wrote: > Hi! > > > +#ifdef __x86_64__ > > + , "r8", "r9", "r10", "r11" > > +#endif > > + ); > > + } > > + > > + printf("[OK]\tI aten't dead\n"); > > + return 0; > > aren't? am not? It's a joke, Google it ... Thanks, In

Re: [PATCH 2/2] tools/testing/selftests/x86: fix error: conflicting types for 'pkey_get|pkey_set'

* Dave Hansen wrote: > On 05/08/2018 02:14 AM, Li Zhijian wrote: > > -u32 pkey_get(int pkey, unsigned long flags) > > +u32 _pkey_get(int pkey, unsigned long flags) > > { > > u32 mask = (PKEY_DISABLE_ACCESS|PKEY_DISABLE_WRITE); > > u32 pkru = __rdpkru(); > > @@ -422,7 +426,7 @@ u32 pkey_

Re: [PATCH] m68k: Implement ndelay() as an inline function to force type checking/casting

Hi Boris, On Sun, May 13, 2018 at 4:02 PM, Boris Brezillon wrote: > ndelay() is supposed to take an unsigned long, but if you define > ndelay() as a macro and the caller pass an unsigned long long instead > of an unsigned long, the unsigned long long to unsigned long cast is > not done and we end

Re: [PATCH 1/2] tools/testing/selftests/x86: fix warning: "SEGV_PKUERR|SEGV_BNDERR" redefined

* Shuah Khan wrote: > On 05/08/2018 10:25 AM, Dave Hansen wrote: > > On 05/08/2018 02:14 AM, Li Zhijian wrote: > >> SEGV_PKUERR and SEGV_BNDERR are defined since glibc-2.27 > > > > > > Acked-by: Dave Hansen > > > > Thanks. Queuing this up for 4.17-rc5 Please drop these patches, I have fixe

Re: [PATCH 4.16 41/72] mtd: rawnand: Make sure we wait tWB before polling the STATUS reg

Hi Greg, On Mon, May 14, 2018 at 11:04 AM, Greg Kroah-Hartman wrote: > On Mon, May 14, 2018 at 09:32:51AM +0200, Geert Uytterhoeven wrote: >> On Mon, May 14, 2018 at 8:48 AM, Greg Kroah-Hartman >> wrote: >> > 4.16-stable review patch. If anyone has any objections, please let me >> > know. >> >

[PATCH v2] i2c: i801: fix unused-function warning

With CONFIG_PM, we get a harmless build warning: drivers/i2c/busses/i2c-i801.c:1723:12: warning: ‘i801_resume’ defined but not used [-Wunused-function] static int i801_resume(struct device *dev) ^~~ drivers/i2c/busses/i2c-i801.c:1714:12: warning: ‘i801_suspend’ defined but not

Re: [PATCH v5 03/13] mm: Assign memcg-aware shrinkers bitmap to memcg

On 13.05.2018 19:47, Vladimir Davydov wrote: > On Thu, May 10, 2018 at 12:52:36PM +0300, Kirill Tkhai wrote: >> Imagine a big node with many cpus, memory cgroups and containers. >> Let we have 200 containers, every container has 10 mounts, >> and 10 cgroups. All container tasks don't touch foreign

Re: [PATCH 2/2] arm64: Clear the stack

On 14.05.2018 08:15, Mark Rutland wrote: > On Sun, May 13, 2018 at 11:40:07AM +0300, Alexander Popov wrote: >> It seems that previously I was very "lucky" to accidentally have those >> MIN_STACK_LEFT, >> call trace depth and oops=panic together to experience a hang on stack >> overflow >> during

Re: [PATCH v4 4/4] ALSA: usb-audio: UAC3: Parse Input Terminal number of channels.

On Mon, May 14, 2018 at 11:54 AM, Jorge wrote: > > > On 11/05/18 16:25, Jorge Sanjuan wrote: >> >> Obtain the number of channels for the Input Terminal from the >> Logical Cluster Descriptor. This achieves a useful minimal parsing >> of this unit so it can be used in other units in the topology. >

Re: [PATCH v2] edac: fix skx_edac build error when ACPI_NFIT=m

On Sun, May 13, 2018 at 10:35:44AM -0700, Randy Dunlap wrote: > From: Randy Dunlap > > Prevent build error when CONFIG_ACPI_NFIT=m and CONFIG_EDAC_SKX=y > by limiting EDAC_SKX based on how ACPI_NFIT is set. > > Fixes this build error: > drivers/edac/skx_edac.o: In function `get_nvdimm_info': > .

Re: [bisected] 051f3ca02e46 "Introduce NUMA identity node sched domain" breaks fake NUMA on s390

On Sat, May 12, 2018 at 12:02:33PM +0200, Heiko Carstens wrote: > Hello, > > Andre Wild reported that fake NUMA doesn't work on s390 anymore. Doesn't > work means it crashed for Andre, or it is in an endless loop within > init_sched_groups_capacity() for me (sg != sd->groups is always true). > >

Re: [PATCH v2 2/2] drm/bridge: sii902x: add optional power supplies

Hi Laurent, Archit, Andrzej & Yannick, Do you have any comments on this v2 driver part? (more details regarding v1/v2 differences in the cover letter https://www.spinics.net/lists/dri-devel/msg174137.html) Thank you, Philippe :-) On 04/25/2018 09:53 AM, Philippe Cornu wrote: > Add the optional

Re: [PATCH 10/18 v2] regulator: s2mps11: Pass descriptor instead of GPIO number

On Mon, May 14, 2018 at 9:59 AM, Krzysztof Kozlowski wrote: > On Mon, Apr 23, 2018 at 1:07 AM, Linus Walleij > wrote: >> Instead of passing a global GPIO number for the enable GPIO, pass >> a descriptor looked up with the standard devm_gpiod_get_optional() >> call. >> >> This regulator supports

Re: [PATCH 10/19 v3] regulator: s2mps11: Pass descriptor instead of GPIO number

On Mon, May 14, 2018 at 10:06 AM, Linus Walleij wrote: > Instead of passing a global GPIO number for the enable GPIO, pass > a descriptor looked up with the standard devm_gpiod_get_optional() > call. > > This regulator supports passing platform data, but enable/sleep > regulators are looked up fro

Re: Allwinner A64: Issue on external rtc clock to wifi chip

On Mon, May 14, 2018 at 2:36 PM, Maxime Ripard wrote: > On Mon, May 14, 2018 at 02:34:22PM +0530, Jagan Teki wrote: >> On Mon, May 14, 2018 at 1:57 PM, Maxime Ripard >> wrote: >> > On Mon, May 14, 2018 at 01:34:56PM +0530, Jagan Teki wrote: >> >> On Mon, May 14, 2018 at 1:27 PM, Maxime Ripard >>

Greetings

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Re: [PATCH v2] clocksource/drivers/mips-gic-timer: Add pr_fmt and reword pr_* messages

On 29/03/18 10:49, Matt Redfearn wrote: Several messages from the MIPS GIC driver include the text "GIC", "GIC timer", etc, but the format is not standard. Add a pr_fmt of "mips-gic-timer: " and reword the messages now that they will be prefixed with the driver name. Signed-off-by: Matt Redfea

Re: [PATCH v2 04/13] soc: rockchip: power-domain: Fix wrong value when power up pd

Hi Elaine, Am Montag, 14. Mai 2018, 05:29:38 CEST schrieb Elaine Zhang: > From: Finley Xiao > > Solve the pd could only ever turn off but never turn them on again, > If the pd registers have the writemask bits. > > Fix up the code error for commit: > commit 79bb17ce8edb3141339b5882e372d0e

Re: [PATCH v2] mm/ksm: ignore STABLE_FLAG of rmap_item->address in rmap_walk_ksm

On 10/05/18 00:31, Andrew Morton wrote: On Fri, 4 May 2018 11:11:46 +0800 Jia He wrote: In our armv8a server(QDF2400), I noticed lots of WARN_ON caused by PAGE_SIZE unaligned for rmap_item->address under memory pressure tests(start 20 guests and run memhog in the host). ... In rmap_walk_ksm

[PATCH 01/18] arm64: consistently use unsigned long for thread flags

In do_notify_resume, we manipulate thread_flags as a 32-bit unsigned int, whereas thread_info::flags is a 64-bit unsigned long, and elsewhere (e.g. in the entry assembly) we manipulate the flags as a 64-bit quantity. For consistency, and to avoid problems if we end up with more than 32 flags, let'

[PATCH 04/18] arm64: kill config_sctlr_el1()

Now that we have sysreg_clear_set(), we can consistently use this instead of config_sctlr_el1(). Signed-off-by: Mark Rutland Cc: Catalin Marinas Cc: James Morse Cc: Will Deacon --- arch/arm64/include/asm/sysreg.h | 10 -- arch/arm64/kernel/armv8_deprecated.c | 8 arch/a

[PATCH 00/18] arm64: invoke syscalls with pt_regs

This series reworks arm64's syscall handling to minimize the propagation of user-controlled register values into speculated code paths. As with x86 [1], a wrapper is generated for each syscall, which extracts the argument from a struct pt_regs. During kernel entry from userspace, registers are zero

[PATCH 02/18] arm64: move SCTLR_EL{1,2} assertions to

Currently we assert that the SCTLR_EL{1,2}_{SET,CLEAR} bits are self-consistent with an assertion in config_sctlr_el1(). This is a bit unusual, since config_sctlr_el1() doesn't make use of these definitions, and is far away from the definitions themselves. We can use the CPP #error directive to ha

[PATCH 03/18] arm64: introduce sysreg_clear_set()

Currently we have a couple of helpers to manipulate bits in particular sysregs: * config_sctlr_el1(u32 clear, u32 set) * change_cpacr(u64 val, u64 mask) The parameters of these differ in naming convention, order, and size, which is unfortunate. They also differ slightly in behaviour, as change

[PATCH 07/18] arm64: remove sigreturn wrappers

The arm64 sigreturn* syscall handlers are non-standard. Rather than taking a number of user parameters in registers as per the AAPCS, they expect the pt_regs as their sole argument. To make this work, we override the syscall definitions to invoke wrappers written in assembly, which mov the SP into

[PATCH 13/18] kernel: add kcompat_sys_{f,}statfs64()

Using this helper allows us to avoid the in-kernel calls to the compat_sys_{f,}statfs64() sycalls, as are necessary for parameter mangling in arm64's compat handling. Following the example of ksys_* functions, kcompat_sys_* functions are intended to be a drop-in replacement for their compat_sys_*

[PATCH 18/18] arm64: implement syscall wrappers

To minimize the risk of userspace-controlled values being used under speculation, this patch adds pt_regs based syscall wrappers for arm64, which pass the minimum set of required userspace values to syscall implementations. For each syscall, a wrapper which takes a pt_regs argument is automatically

[PATCH 16/18] arm64: use SYSCALL_DEFINE6() for mmap

We don't currently annotate our mmap implementation as a syscall, as we need to do to use pt_regs syscall wrappers. Let's mark it as a real syscall. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/

[PATCH 17/18] arm64: convert compat wrappers to C

In preparation for converting to pt_regs syscall wrappers, convert our existing compat wrappers to C. This will allow the pt_regs wrappers to be automatically generated, and will allow for the compat register manipulation to be folded in with the pt_regs accesses. To avoid confusion with the upcom

[PATCH 15/18] arm64: use {COMPAT,}SYSCALL_DEFINE0 for sigreturn

We don't currently annotate our various sigreturn functions as syscalls, as we need to do to use pt_regs syscall wrappers. Let's mark them as real syscalls. For compat_sys_sigreturn and compat_sys_rt_sigreturn, this changes the return type from int to long, matching the prototypes in sys32.c. Si

[PATCH 11/18] arm64: zero GPRs upon entry from EL0

We can zero GPRs x0 - x29 upon entry from EL0 to make it harder for userspace to control values consumed by speculative gadgets. We don't blat x30, since this is stashed much later, and we'll blat it before invoking C code. Signed-off-by: Mark Rutland Cc: Catalin Marinas Cc: Will Deacon --- a

Re: [RFC PATCH v3 0/6] Documentation/features: Provide and apply 'features-refresh.sh'

* Jonathan Corbet wrote: > On Mon, 7 May 2018 12:43:37 +0200 > Andrea Parri wrote: > > > This series provides the script 'features-refresh.sh', which operates on > > the arch support status files, and it applies this script to refresh the > > status files in place; previous discussions about

[PATCH 14/18] arm64: remove in-kernel call to sys_personality()

With pt_regs syscall wrappers, the calling convention for sys_personality() will change. Use ksys_personality(), which is functionally equivalent. Signed-off-by: Mark Rutland Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/kernel/sys.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

Re: [PATCH 3/3] arm64: dts: renesas: draak: Describe HDMI input

Hi Laurent, On 2018-05-14 05:49:41 +0300, Laurent Pinchart wrote: [snip] > > > +&vin4 { > > > + pinctrl-0 = <&vin4_pins>; > > > + pinctrl-names = "default"; > > > + > > > + status = "okay"; > > > + > > > + ports { > > > + #address-cells = <1>; > > > + #size-cells = <0>; > > > + >

[PATCH 10/18] arm64: convert native/compat syscall entry to C

Now that the syscall invocation logic is in C, we can migrate the rest of the syscall entry logic over, so that the entry assembly needn't look at the register values at all. Signed-off-by: Mark Rutland Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/kernel/entry.S | 42 --

[PATCH 12/18] kernel: add ksys_personality()

Using this helper allows us to avoid the in-kernel call to the sys_personality() syscall. The ksys_ prefix denotes that this function is meant as a drop-in replacement for the syscall. In particular, it uses the same calling convention as sys_personality(). This is necessary to enable conversion o

Re: DEBUG_RWSEMS warning from thaw_super()

On Sun 13-05-18 18:04:04, Oleg Nesterov wrote: > On 05/13, Amir Goldstein wrote: > > > > Since kernel v4.17-rc1 and DEBUG_RWSEMS, I see the > > warning below after filesystem freeze/thaw. > > > > This is a case where one process acquires a bunch of rwsem > > and another process releases them. > > >

Re: [PATCH v2] ipvlan: flush arp table when mac address changed

Hello. On 5/14/2018 12:22 PM, liuq...@huawei.com wrote: From: Keefe Liu When master device's mac has been changed, the commit <32c10bbfe914> "ipvlan: always use the current L2 addr of the master" makes the IPVlan devices's mac changed commit 32c10bbfe914 ("ipvlan: always use the current L2

[PATCH 09/18] arm64: convert syscall trace logic to C

Currently syscall tracing is a tricky assembly state machine, which can be rather difficult to follow, and even harder to modify. Before we start fiddling with it for pt_regs syscalls, let's convert it to C. This is not intended to have any functional change. Signed-off-by: Mark Rutland Cc: Cata

[PATCH 06/18] arm64: move sve_user_{enable,disable} to

In subsequent patches, we'll want to make use of sve_user_enable() and sve_user_disable() outside of kernel/fpsimd.c. Let's move these to where we can make use of them. To avoid ifdeffery in sequences like: if (system_supports_sve() && some_condition sve_user_disable(); ... empty stubs

[PATCH 08/18] arm64: convert raw syscall invocation to C

As a first step towards invoking syscalls with a pt_regs argument, convert the raw syscall invocation logic to C. We end up with a bit more register shuffling, but the unified invocation logic means we can unify the tracing paths, too. This only converts the invocation of the syscall. The rest of

Re: [PATCH v2 00/13] add power domain support for Rockchip Socs

On 14 May 2018 at 05:27, Elaine Zhang wrote: > add power domain support for RK3036/RK3128/RK3228/PX30 Soc. > fix up the wrong value when set power domain up. > > Change in V2: > Fix up the commit message description and Assign author. > > Caesar Wang (3): > dt-bindings: power: add RK3036 SoCs he

[PATCH 05/18] arm64: kill change_cpacr()

Now that we have sysreg_clear_set(), we can use this instead of change_cpacr(). Note that the order of the set and clear arguments differs between change_cpacr() and sysreg_clear_set(), so these are flipped as part of the conversion. Also, sve_user_enable() redundantly clears CPACR_EL1_ZEN_EL0EN b

[PATCH v3 1/4] drm/rockchip: add transfer function for cdn-dp

From: Chris Zhong We may support training outside firmware, so we need support dpcd read/write to get the message or do some setting with display. Signed-off-by: Chris Zhong Signed-off-by: Lin Huang Reviewed-by: Sean Paul Reviewed-by: Enric Balletbo --- Changes in v2: - update patch followin

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