One comment still mentioned process_maintenance operations after
commit af0614991ab6 ("KVM: arm/arm64: vgic: Get rid of unnecessary
process_maintenance operation")
Update the comment to point to vgic_fold_lr_state instead, which
is where maintenance interrupts are taken care of.
Acked-by: Christ
Hi,
I found one more issue, otherwise the driver looks fine to me.
On Wed, May 02, 2018 at 11:53:42AM +0200, Enric Balletbo i Serra wrote:
> This driver gets various bits of information about what is connected to
> USB PD ports from the EC and converts that into power_supply properties.
>
> Sign
Hi,
On 01/05/18 16:52, Chen-Yu Tsai wrote:
> On Mon, Apr 30, 2018 at 6:44 PM, Andre Przywara
> wrote:
>> Hi,
>>
>> On 30/04/18 10:51, Icenowy Zheng wrote:
>>>
>>>
>>> 于 2018年4月30日 GMT+08:00 下午5:47:35, Andre Przywara
>>> 写到:
Hi Icenowy,
On 27/04/18 08:12, Icenowy Zheng wrote:
>>>
On Tue, May 01, 2018 at 06:18:44PM +, Joel Fernandes wrote:
> > > From my understanding, Linux's hardlockup detector already uses the ARM
> PMU
> > > interrupt to check whether some task is stuck. I haven't looked at the
> > > details of the implementation yet, but in theory having the PMU
> in
Hi Lee,
On Wed, May 02, 2018 at 11:53:41AM +0200, Enric Balletbo i Serra wrote:
> From: Sameer Nanda
>
> The USBPD charger driver gets information from the ChromeOS EC, this
> patch adds the USBPD charger definitions needed by this driver.
>
> Signed-off-by: Sameer Nanda
> Signed-off-by: Enric
Hi,
On 02/05/18 10:36, Maxime Ripard wrote:
> On Mon, Apr 30, 2018 at 10:47:35AM +0100, Andre Przywara wrote:
I am just asking because I want to avoid running into the same problem
as with the A64 before: that future DTs become incompatible with older
kernels, because we change the
On Wednesday, May 02, 2018 12:03:44 PM Bartlomiej Zolnierkiewicz wrote:
> On Tuesday, May 01, 2018 01:02:39 PM Daniel Lezcano wrote:
> > On Thu, Apr 26, 2018 at 01:51:31PM +0200, Bartlomiej Zolnierkiewicz wrote:
> > > Cleanup code for enabling threshold interrupts in ->tmu_control
> > > method impl
On Wed, May 02, 2018 at 11:00:55AM +0200, Laurent Dufour wrote:
> On 02/05/2018 09:54, Ganesh Mahendran wrote:
> > Set ARCH_SUPPORTS_SPECULATIVE_PAGE_FAULT for arm64. This
> > enables Speculative Page Fault handler.
> >
> > Signed-off-by: Ganesh Mahendran
> > ---
> > This patch is on top of Laure
Current handle_read_error() function calls fix_read_error()
only if md device is RW and rdev does not include FailFast flag.
It does not handle a read error from a RW device including
FailFast flag.
I am not sure it is intended. But I found that write IO error
sets rdev faulty. The md module shoul
On 01/05/18 21:51, Joel Fernandes wrote:
> On Mon, Apr 30, 2018 at 2:46 AM Julien Thierry
> wrote:
> [...]
>>> On Wed, Jan 17, 2018 at 3:54 AM, Julien Thierry
> wrote:
Hi,
This series is a continuation of the work started by Daniel [1]. The
> goal
is to use GICv3 interrupt pri
* Du, Changbin wrote:
> On Wed, May 02, 2018 at 09:33:15AM +0200, Ingo Molnar wrote:
> >
> > * changbin...@intel.com wrote:
> >
> > > Comparison of system performance: a bit drop.
> > >
> > > w/o CONFIG_DEBUG_EXPERIENCE
> > > $ time make -j4
> > > real6m43.619s
> > > user
On Wed, May 02, 2018 at 11:10:48AM +0100, Colin King wrote:
> From: Colin Ian King
>
> Trivial fix to spelling mistake in DRM_ERROR error message
>
> Signed-off-by: Colin Ian King
Applied to drm-misc-next, thanks.
-Daniel
> ---
> drivers/gpu/drm/sti/sti_crtc.c | 2 +-
> 1 file changed, 1 ins
On Wed, May 02, 2018 at 11:47:49AM +0200, Geert Uytterhoeven wrote:
> Hi Greg,
>
> On Sun, Apr 29, 2018 at 3:37 PM, Greg Kroah-Hartman
> wrote:
> > On Fri, Mar 30, 2018 at 09:47:44AM +0200, Boris Brezillon wrote:
> >> Document sysfs files/directories/symlinks exposed by the I3C subsystem.
> >>
>
On 05/02/2018 06:41 AM, Rafael J. Wysocki wrote:
> On Tue, May 1, 2018 at 9:55 PM, Bjorn Helgaas wrote:
>> On Tue, May 01, 2018 at 10:34:29AM +0200, Rafael J. Wysocki wrote:
>>> On Mon, Apr 30, 2018 at 4:22 PM, Joseph Salisbury
>>> wrote:
On 04/16/2018 11:58 AM, Rafael J. Wysocki wrote:
On Wed, May 2, 2018 at 1:11 PM, Dongsong Yu wrote:
> Hi,
> I've got the following bug report while fuzzing linux kenrel (4.16.0) on
> arm64 with syzkaller.
> The kernel config file and poc generated by C reproducer are attached.
>
> Syzkaller hit 'KASAN: use-after-scope Write in mem_cgroup_uncharg
On Wed, May 2, 2018 at 12:35 PM, Dongsong Yu wrote:
> Hi,
> I've got the following bug report while fuzzing linux kenrel (4.16.0) on
> arm64 with syzkaller.
> The kernel config file and poc generated by C reproducer are attached.
>
> Syzkaller hit 'KASAN: use-after-scope Read in tick_sched_handle'
On Wed, May 2, 2018 at 9:33 AM, syzbot
wrote:
> Hello,
>
> syzbot found the following crash on:
>
> HEAD commit:fff75eb2a08c Merge tag 'errseq-v4.17' of
> git://git.kernel.o...
> git tree: upstream
> console output: https://syzkaller.appspot.com/x/log.txt?id=5301511529693184
> kernel con
On Wed, May 2, 2018 at 12:30 PM, Tetsuo Handa
wrote:
> Dmitry Vyukov wrote:
>> > syzbot is reporting various bugs which involve /dev/loopX.
>> > Two of them
>> >
>> > INFO: rcu detected stall in lo_ioctl
>> >
>> > https://syzkaller.appspot.com/bug?id=7b49fb610af9cca78c24e9f796f2e8b0d5573997
>
On Wed, May 02, 2018 at 10:16:58AM +0100, Colin King wrote:
> From: Colin Ian King
>
> There are memory leaks of params; when copy_to_user fails and also
> the exit via the label 'error'. Fix this by kfree'ing params in
> error exit path and jumping to this on the copy_to_user failure path.
>
>
config TRACING_SUPPORT has an exception for PPC32, because PPC32
didn't have irqflags tracing support.
But that hasn't been true since commit 5d38902c4838 ("powerpc: Add
irqtrace support for 32-bit powerpc") (Jun 2009).
So remove the exception for PPC32 and the comment.
Signed-off-by: Michael El
On 23 April 2018 at 22:50, Mathieu Malaterre wrote:
> Be nice to the user and check env vars KBUILD_BUILD_USER &
> KBUILD_BUILD_HOST when those are set.
mkdebian sets the maintainer address as "$name <$email>", but this
patch only sets the email part. I also wonder about the precedence, I
think K
Hi Greg,
On Wed, May 2, 2018 at 1:10 PM, Greg Kroah-Hartman
wrote:
> On Wed, May 02, 2018 at 11:47:49AM +0200, Geert Uytterhoeven wrote:
>> On Sun, Apr 29, 2018 at 3:37 PM, Greg Kroah-Hartman
>> wrote:
>> > On Fri, Mar 30, 2018 at 09:47:44AM +0200, Boris Brezillon wrote:
>> >> Document sysfs fil
Hi Fabrice,
On 04/18/2018 09:47 AM, Fabrice Gasnier wrote:
stm32mp157c has vrefbuf regulator that can provide analog reference
voltage from 1500mV to 2500mV.
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32mp157c.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/ar
On Mon, Apr 30, 2018 at 05:10:39PM +0530, Jagan Teki wrote:
> DE2 in A64 has clock control unit and behavior is
> same like H3/H5, so reuse the same in A64.
>
> Signed-off-by: Jagan Teki
> ---
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 15 +++
> 1 file changed, 15 insertions(+
Hi,
On Mon, Apr 30, 2018 at 05:10:46PM +0530, Jagan Teki wrote:
> + hdmi_phy: hdmi-phy@1ef {
> + compatible = "allwinner,sun50i-a64-hdmi-phy",
> + "allwinner,sun8i-h3-hdmi-phy";
> + reg = <0x01ef 0x1>;
dts reports incorrect usage of these properties in gpio-keys node.
Warning (avoid_unnecessary_addr_size): /gpio-keys: unnecessary
The patch is removing these useless properties.
Signed-off-by: Michal Simek
---
arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts | 2 --
arch/arm64/boot/dts/xilinx
于 2018年5月2日 GMT+08:00 下午7:32:50, Maxime Ripard 写到:
>On Mon, Apr 30, 2018 at 05:10:39PM +0530, Jagan Teki wrote:
>> DE2 in A64 has clock control unit and behavior is
>> same like H3/H5, so reuse the same in A64.
>>
>> Signed-off-by: Jagan Teki
>> ---
>> arch/arm64/boot/dts/allwinner/sun50i-a64
On Tue, 01 May 2018 21:11:06 +1000
Michael Ellerman wrote:
> Michal Suchánek writes:
> > Hello,
> >
> > On Tue, 24 Apr 2018 14:15:57 +1000
> > Michael Ellerman wrote:
> >
> >> From: Michal Suchanek
> >>
> >> Check what firmware told us and enable/disable the barrier_nospec
> >> as appropria
On 01/05/18 22:31, Rob Herring wrote:
Deferred probe will currently wait forever on dependent devices to probe,
but sometimes a driver will never exist. It's also not always critical for
a driver to exist. Platforms can rely on default configuration from the
bootloader or reset defaults for thing
On Mon, Apr 30, 2018 at 3:04 PM, Colin King wrote:
> From: Colin Ian King
>
> s900_functions, s900_padinfo and s900_pads are local to the source and do
> not need to be in global scope, so make them static.
>
> Cleans up sparse warnings:
> drivers/pinctrl/actions/pinctrl-s900.c:1445:30: warning:
On Mon, Apr 30, 2018 at 3:22 PM, Colin King wrote:
> From: Colin Ian King
>
> There is a missing break in case PIN_CONFIG_DRIVE_STRENGTH leading to
> a fall-through to the PIN_CONFIG_SLEW_RATE case that performs different
> checks against *arg. This looks like an unintentional missing break so
>
From: Colin Ian King
There are memory leaks of params; when copy_to_user fails and also
the exit via the label 'error'. Also, there is a bogos memory allocation
check on pointer 'to' when memory allocation fails on params.
Fix this by kfree'ing params in error exit path and jumping to this on
th
On Mon, Apr 30, 2018 at 05:10:52PM +0530, Jagan Teki wrote:
> From: Icenowy Zheng
>
> Allwinner SoCs with DWC HDMI controller have a "HVCC" power pin for the
> HDMI part, and on some boards it's connected to a dedicated regulator
> rather than the main 3.3v.
>
> Add support for optional HVCC reg
On Tue, May 1, 2018 at 5:00 AM, Manivannan Sadhasivam
wrote:
> 1. Fix Kconfig dependency for Actions Semi S900 pinctrl driver which
> generates below warning in x86:
>
> WARNING: unmet direct dependencies detected for PINCTRL_OWL
> Depends on [n]: PINCTRL [=y] && (ARCH_ACTIONS || COMPILE_TEST [
Am 30.04.2018 um 21:28 schrieb Andrey Grodzovsky:
On 04/30/2018 02:29 PM, Christian König wrote:
Am 30.04.2018 um 18:10 schrieb Andrey Grodzovsky:
On 04/30/2018 12:00 PM, Oleg Nesterov wrote:
On 04/30, Andrey Grodzovsky wrote:
What about changing PF_SIGNALED to PF_EXITING in
drm_sched_ent
On Tue, May 01, 2018 at 03:33:33PM +0100, Sudeep Holla wrote:
>
>
> On 26/04/18 00:31, Jeremy Linton wrote:
> > Now that we have an accurate view of the physical topology
> > we need to represent it correctly to the scheduler. Generally MC
> > should equal the LLC in the system, but there are a n
On Wed, May 02, 2018 at 07:34:21PM +0800, Icenowy Zheng wrote:
>
>
> 于 2018年5月2日 GMT+08:00 下午7:32:50, Maxime Ripard 写到:
> >On Mon, Apr 30, 2018 at 05:10:39PM +0530, Jagan Teki wrote:
> >> DE2 in A64 has clock control unit and behavior is
> >> same like H3/H5, so reuse the same in A64.
> >>
> >>
On Wed, May 2, 2018 at 5:04 PM, Icenowy Zheng wrote:
>
>
> 于 2018年5月2日 GMT+08:00 下午7:32:50, Maxime Ripard 写到:
>>On Mon, Apr 30, 2018 at 05:10:39PM +0530, Jagan Teki wrote:
>>> DE2 in A64 has clock control unit and behavior is
>>> same like H3/H5, so reuse the same in A64.
>>>
>>> Signed-off-by: J
On Thu, Apr 26, 2018 at 6:42 PM, Bartosz Golaszewski wrote:
> 2018-04-26 14:07 GMT+02:00 Linus Walleij :
>> On Tue, Apr 10, 2018 at 10:30 PM, Bartosz Golaszewski wrote:
>>
>>> Board files constitute a significant part of the users of the legacy
>>> GPIO framework. In many cases they only export a
于 2018年5月2日 GMT+08:00 下午7:48:43, Maxime Ripard 写到:
>On Mon, Apr 30, 2018 at 05:10:52PM +0530, Jagan Teki wrote:
>> From: Icenowy Zheng
>>
>> Allwinner SoCs with DWC HDMI controller have a "HVCC" power pin for
>the
>> HDMI part, and on some boards it's connected to a dedicated regulator
>> rath
Hi Logan,
it would be rather nice to have if you could separate out the functions
to detect if peer2peer is possible between two devices.
That would allow me to reuse the same logic for GPU peer2peer where I
don't really have ZONE_DEVICE.
Regards,
Christian.
Am 24.04.2018 um 01:30 schrieb
Avnet Ultra96 rev1 board is commercialized Xilinx zcu100 revC/D
internal board. The patch is reusing zcu100 revC files but changing
model description and compatible strings which are used for example by
libmraa.
Signed-off-by: Michal Simek
---
I choose this option because there are houndreds of
On Sat, Apr 28, 2018 at 6:31 PM, H. Nikolaus Schaller
wrote:
> V5:
> * fix wrong split up between patches 1/7and 2/7.
v5 is looking really nice, giving reviewers a chance to ACK
etc before applying, but will probably apply it anyways in a
few days.
Nice work on this series!
Yours,
Linus Walle
On Thu, Apr 26, 2018 at 10:12 PM, Bartosz Golaszewski wrote:
> Use the SPDX license identifier for GPLv2.0 or later and remove the
> license boilerplate.
>
> Signed-off-by: Bartosz Golaszewski
Patch applied.
Yours,
Linus Walleij
于 2018年5月2日 GMT+08:00 下午7:50:19, Jagan Teki 写到:
>On Wed, May 2, 2018 at 5:04 PM, Icenowy Zheng wrote:
>>
>>
>> 于 2018年5月2日 GMT+08:00 下午7:32:50, Maxime Ripard
> 写到:
>>>On Mon, Apr 30, 2018 at 05:10:39PM +0530, Jagan Teki wrote:
DE2 in A64 has clock control unit and behavior is
same lik
On Wed, 02 May 2018 11:33:41 +0900,
Rob Herring wrote:
>
> On Fri, Mar 16, 2018 at 4:33 PM, Rob Herring wrote:
> > Commit 0fa1c579349f ("of/fdt: use memblock_virt_alloc for early alloc")
> > inadvertently switched the DT unflattening allocations from memblock to
> > bootmem which doesn't work bec
The keystone 2 galileo evm has support for dcan.
Add nodes and pinmuxes for dcan0 and dcan1.
Signed-off-by: Faiz Abbas
---
arch/arm/boot/dts/keystone-k2g-evm.dts | 26 ++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/keystone-k2g-evm.dts
b/arch/arm/boo
On Wed, May 2, 2018 at 12:44 PM, Samarth Parikh wrote:
> Hi Jassi,
>
> I am resending the patch for review, in case you have missed my previous
> patch. Can you please go through it and let me know your thoughts on
> the same?
>
You don't want this to go into git log :)
If your patch isn't looked
On Tue, May 1, 2018 at 7:02 PM, Theodore Y. Ts'o wrote:
> On Tue, May 01, 2018 at 05:35:56PM -0500, Justin Forbes wrote:
>>
>> I have not reproduced in GCE myself. We did get some confirmation
>> that removing dracut-fips does make the problem less dire (but I
>> wouldn't call a 4 minute boot a w
Hi Fabrice
On 04/18/2018 09:43 AM, Fabrice Gasnier wrote:
Add LPtimer definitions, depending on features they provide:
- lptimer1 & 2 can act as PWM, trigger and encoder/counter
- lptimer3 can act as PWM and trigger
- lptimer4 & 5 can act as PWM
Signed-off-by: Fabrice Gasnier
---
Applied on
1;5201;0c
On Sun, Apr 29, 2018 at 01:10:56PM +0100, Colin King wrote:
> From: Colin Ian King
>
> Trivial fix to spelling mistake in status text string
>
> Signed-off-by: Colin Ian King
Applied, thanks!
Maxime
--
Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engin
On Wed, May 2, 2018 at 1:08 PM, Gioh Kim wrote:
> Current handle_read_error() function calls fix_read_error()
> only if md device is RW and rdev does not include FailFast flag.
> It does not handle a read error from a RW device including
> FailFast flag.
>
> I am not sure it is intended. But I fou
On Fri, Apr 27, 2018 at 3:49 AM, Katsuhiro Suzuki
wrote:
> The MPEG2-TS input/output core both accepts serial TS and parallel TS.
>
> The serial TS interface uses following pins:
> hscin0_s : HS0DOUT[0-3]
> hscin1_s : HS0DOUT[4-7]
> hscin2_s : HS1BCLKIN, HS1SYNCIN, HS1VALIN, HS1DIN0
> hsc
On Wed, May 2, 2018 at 11:49 AM, Christian König
wrote:
> Am 01.05.2018 um 15:24 schrieb Michel Dänzer:
>>
>> From: Michel Dänzer
>>
>> The result was printing the warning only when we were explicitly asked
>> not to.
>>
>> Cc: sta...@vger.kernel.org
>> Fixes: 0176adb004065d6815a8e67946752df4cd94
On Fri, Apr 27, 2018 at 3:49 AM, Katsuhiro Suzuki
wrote:
> The MPEG2-TS input/output core both accepts serial TS and parallel TS.
>
> The serial TS interface uses following pins:
> hscin0_s : HS0DOUT[0-3]
> hscin1_s : HS0DOUT[4-7]
> hscin2_s : HS1BCLKIN, HS1SYNCIN, HS1VALIN, HS1DIN0
> hsc
Hi Gabriel,
On 04/20/2018 11:09 AM, gabriel.fernan...@st.com wrote:
From: Gabriel Fernandez
This patch adds reset binding file.
Signed-off-by: Gabriel Fernandez
---
arch/arm/boot/dts/stm32mp157c.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi
b
On Thu, Apr 26, 2018 at 11:27 PM, Rob Herring wrote:
> Bindings are supposed to be organized by device class/function. Move
> bindings for various timers to timer/ binding directory.
>
> Cc: Linus Walleij
> Cc: Thierry Reding
> Signed-off-by: Rob Herring
Reviewed-by: Linus Walleij
Thank you
On Wed, 2 May 2018, Jörg Otte wrote:
> 2018-05-02 11:02 GMT+02:00 Thomas Gleixner :
> > Ok, I think I know what's going wrong in that steaming pile of horrors of
> > CPUID detection. I need to analyze it down to the roots, but if you have
> > cycles, can you please test the patch below?
> >
> > It'
On Wed, May 02, 2018 at 03:53:21PM +0800, Ganesh Mahendran wrote:
> Set ARCH_SUPPORTS_SPECULATIVE_PAGE_FAULT for arm64. This
> enables Speculative Page Fault handler.
Are there are tests for this? I'm really nervous about enabling it...
Will
>
> Signed-off-by: Ganesh Mahendran
> ---
> This pat
Hi Fabrice
On 04/18/2018 05:46 PM, Fabrice Gasnier wrote:
Add support for DAC (Digital to Analog Converter) to STM32MP157C.
STM32MP157C DAC has two output channels.
Signed-off-by: Fabrice Gasnier
---
arch/arm/boot/dts/stm32mp157c.dtsi | 24
1 file changed, 24 insert
On Sat, Apr 28, 2018 at 7:31 PM, H. Nikolaus Schaller
wrote:
> The register constants are so far defined in a way that they fit
> for the pcal9555a when shifted by the number of banks, i.e. are
> multiplied by 2 in the accessor function.
>
> Now, the pcal6524 has 3 banks which means the relative
On Mon, Apr 23, 2018 at 01:36:10PM +0100, Roman Gushchin wrote:
> @@ -59,6 +59,12 @@ enum memcg_memory_event {
> MEMCG_NR_MEMORY_EVENTS,
> };
>
> +enum mem_cgroup_protection {
> + MEMCG_PROT_NONE,
> + MEMCG_PROT_LOW,
> + MEMCG_PROT_HIGH,
Ha, HIGH doesn't make much sense, but I
On Sat, Apr 28, 2018 at 7:31 PM, H. Nikolaus Schaller
wrote:
> These mask bits are to be used to map the extended register
> addreseses (which are defined for an unsupported 8-bit pcal chip)
> to 16 and 24 bit chips (pcal6524).
>
> Signed-off-by: H. Nikolaus Schaller
> ---
> drivers/gpio/gpio-p
On Wed, 2 May 2018, Dongsong Yu wrote:
CC+ ARM64 folks which should have been cc'ed in the first place.
> Hi,
> I've got the following bug report while fuzzing linux kenrel (4.16.0) on
> arm64 with syzkaller.
> The kernel config file and poc generated by C reproducer are attached.
>
> Syzkaller
On 26 April 2018 at 10:52, Ulf Hansson wrote:
> While I was on working adding support for multiple PM domains to genpd, I
> stumbled over several problems in the error path related to
> dev_pm_domain_attach(). Hence, I decided to fix these problems first, which is
> what this series intends to add
On Sat, Apr 28, 2018 at 7:31 PM, H. Nikolaus Schaller
wrote:
> V5:
> * fix wrong split up between patches 1/7and 2/7.
>
> 2018-04-26 19:35:07: V4:
> * introduced PCA_LATCH_INT constant to make of_table more
> readable (suggested by Andy Shevchenko)
> * converted all register constants to hex in
On Wed, May 02, 2018 at 05:46:23PM +0800, Xin Long wrote:
> On Wed, May 2, 2018 at 5:06 PM, Michal Kubecek wrote:
> > Hello,
> >
> > while investigating a bug, we noticed that DLM tries to connect an SCTP
> > socket in non-blocking mode using
> >
> > result = sock->ops->connect(sock, (stru
On Fri, Apr 27, 2018 at 1:58 AM, Dmitry Osipenko wrote:
> Muxing of pins MCLK1/2 determine the muxing of the corresponding clocks.
> Make pinctrl driver to provide clock muxes for the CDEV1/2 pingroups, so
> that main clk-controller driver could get an actual parent clock for the
> CDEV1/2 clocks
Hi Andy,
> Am 02.05.2018 um 14:28 schrieb Andy Shevchenko :
>
> On Sat, Apr 28, 2018 at 7:31 PM, H. Nikolaus Schaller
> wrote:
>> The register constants are so far defined in a way that they fit
>> for the pcal9555a when shifted by the number of banks, i.e. are
>> multiplied by 2 in the accesso
On Wed, May 2, 2018 at 1:54 AM, Jose Abreu wrote:
> Hi Kees,
>
> On 01-05-2018 22:01, Kees Cook wrote:
>> In the quest to remove all stack VLAs from the kernel[1], this switches
>> the "status" stack buffer to use the existing small (8) upper bound on
>> how many queues can be checked for DMA, and
> Am 02.05.2018 um 14:29 schrieb Andy Shevchenko :
>
> On Sat, Apr 28, 2018 at 7:31 PM, H. Nikolaus Schaller
> wrote:
>> These mask bits are to be used to map the extended register
>> addreseses (which are defined for an unsupported 8-bit pcal chip)
>> to 16 and 24 bit chips (pcal6524).
>>
>>
On Wed, May 2, 2018 at 1:27 AM, Jagan Teki wrote:
> Hi Rob,
>
> On Tue, May 1, 2018 at 9:49 PM, Rob Herring wrote:
>>
>> On Mon, Apr 30, 2018 at 05:10:45PM +0530, Jagan Teki wrote:
>> > HDMI PHY on Allwinner A64 has similar like H3/H5.
>> >
>> > Signed-off-by: Jagan Teki
>> > ---
>> > Documenta
Hi Lu,
On Wed, 2018-05-02 at 14:34 +0800, Lu Baolu wrote:
> Hi,
>
> On 03/31/2018 08:33 AM, Dmitry Safonov wrote:
> > Theoretically, on some machines faults might be generated faster
> > than
> > they're cleared by CPU.
>
> Is this a real case?
No. 1/2 is a real case and this one was discussed
On Wed, May 02, 2018 at 09:46:31AM +0200, jacopo mondi wrote:
> Hi again Christoph,
>
> The gentle ping actually applies to this version of the patch.
>
> Sorry for the confusion.
I'd expect this to go in through the sh tree, but if the sh maintainers
are fine with it I can take it through t
On Mon, Apr 30, 2018 at 07:48:42AM +0200, Jan Kiszka wrote:
> From: Jan Kiszka
>
> There are no in-tree users remaining, all are converted to the managed
> variant. And it is unlikely that any out-of-tree user got the resource
> management right as well. So deprecate the interface and push users
On Wed, May 02, 2018 at 02:18:56PM +0200, Daniel Vetter wrote:
> Other dma-api backends like cma just shut up when __GFP_NOWARN is
> passed. And afaiui Christoph Hellwig has plans to nuke the DMA_ATTR
> stuff (or at least clean it up) - should we just remove
> DMA_ATTR_NO_WARN and instead only look
On Tue, May 01, 2018 at 03:24:11PM +0200, Michel Dänzer wrote:
> From: Michel Dänzer
>
> The result was printing the warning only when we were explicitly asked
> not to.
Thanks, applied to the dma-mapping tree for 4.17.
On Wed, May 02, 2018 at 11:05:01AM +0100, Chris Wilson wrote:
> This extends the warning suppression from commit d0bc0c2a31c9 ("swiotlb:
> suppress warning when __GFP_NOWARN is set") to suppress the warnings
> when DMA_ATTR_NO_WARN is given by caller. In such cases the caller wants
> to handle the
On Wed, 2018-05-02 at 17:11 +0800, Herbert Xu wrote:
> On Wed, May 02, 2018 at 03:02:20AM +0100, Dmitry Safonov wrote:
> > It seems to be a valid use case to add xfrm state without
> > Security Parameter Indexes (SPI) value associated:
> > ip xfrm state add src $src dst $dst proto $proto mode $mode
On Wed, May 2, 2018 at 2:04 AM, Chunfeng Yun wrote:
> Hi Rob,
> On Tue, 2018-05-01 at 09:24 -0500, Rob Herring wrote:
>> On Wed, Apr 25, 2018 at 03:45:28PM +0800, Chunfeng Yun wrote:
>> > Add a DT binding documentation of XS-PHY for MediaTek SoCs
>> > with USB3.1 GEN2 controller
[...]
>> > + r
Hi all,
On Wed, Apr 18, 2018 at 06:38:25PM -0500, Dennis Zhou wrote:
Hi,
On Wed, Apr 18, 2018 at 09:55:53PM +0800, Fengguang Wu wrote:
Hello,
FYI here is a slightly different boot error in mainline kernel 4.17.0-rc1.
It also dates back to v4.16 .
Now I find 2 more occurrances in v4.15 kern
On Mon, Apr 30, 2018 at 9:38 AM, Thierry Reding
wrote:
> From: Thierry Reding
>
> Use of_device_get_match_data() instead of open-coding it.
>
> Signed-off-by: Thierry Reding
All 12 patches applied!
Thanks for your cleanup efforts, much much appreciated!
Yours,
Linus Walleij
Please see response inline.
Thanks,
Liming
> -Original Message-
> From: Shawn Lin [mailto:shawn@rock-chips.com]
> Sent: Tuesday, May 1, 2018 9:02 PM
> To: Liming Sun ; Mark Rutland
> ; Jaehoon Chung ;
> Catalin Marinas ; Will Deacon
>
> Cc: Ulf Hansson ; Rob Herring
> ; shawn@roc
On Wed, 2 May 2018 21:29:48 +1000
Michael Ellerman wrote:
> config TRACING_SUPPORT has an exception for PPC32, because PPC32
> didn't have irqflags tracing support.
>
> But that hasn't been true since commit 5d38902c4838 ("powerpc: Add
> irqtrace support for 32-bit powerpc") (Jun 2009).
>
> So
On Tue, May 1, 2018 at 9:10 PM, Matheus Castello
wrote:
> For generic pinconf: print the dev_error with the pinctrl vendor
> driver name, error code, the sub-node property name used and the
> pin that was tried to set.
>
> Improves the undestading of the error if use a generic sub-node
> property
The 24bit RGB format configuration is currently missing, we add
it now.
Signed-off-by: Michael Grzeschik
---
drivers/gpu/ipu-v3/ipu-csi.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/ipu-v3/ipu-csi.c b/drivers/gpu/ipu-v3/ipu-csi.c
index caa05b0702e16..1a0ee65fd4859 10064
On Wed, May 02, 2018 at 08:30:40AM -0400, Johannes Weiner wrote:
> On Mon, Apr 23, 2018 at 01:36:10PM +0100, Roman Gushchin wrote:
> > @@ -59,6 +59,12 @@ enum memcg_memory_event {
> > MEMCG_NR_MEMORY_EVENTS,
> > };
> >
> > +enum mem_cgroup_protection {
> > + MEMCG_PROT_NONE,
> > + MEMCG_
On 26 April 2018 at 16:07, Icenowy Zheng wrote:
> The new Allwinner H6 SoC have 3 MMC controllers. The first and second
> ones are similar to the ones on A64, but the third one adds EMCE
> (Embedded Crypto Engine) support which does hardware transparent crypto
> on the eMMC.
>
> As we still do not
[ Please keep me in CC as I'm not subscribed to the list]
Hi All,
>From sound driver, I am wondering if we could get the timestamps when
It receives for example the first and last audio frames.
Is there any way we can extract or expose that information to user mode?
--
Thanks,
Sekhar
On Tue, May 1, 2018 at 9:10 PM, Matheus Castello
wrote:
> Set dt_params with the definitions of the generic sub-node properties
> global in pinconf-generic.h and add a function to pinconf-generic API
> to decode a packed param returning the string name from sub-node
> property.
>
> This can be us
On Mon, Apr 30, 2018 at 1:28 PM, Thierry Reding
wrote:
> Marc just pointed out to me on IRC that this fixes a regression that was
> introduced in v4.17-rc1.
>
> Can you guys pick this up into your -fixes branches?
OK I will pick mine independently to my fixes.
> Again, I volunteer
> to collect
On Wed, May 2, 2018 at 12:15 PM, Michal Simek wrote:
> On 2.5.2018 12:10, Linus Walleij wrote:
>> On Thu, Apr 26, 2018 at 3:35 PM, Michal Simek
>> wrote:
>>> Yes, it is about legacy application which I have seen recently and there
>>> is no source code for application calls it because board ven
Jann, Micha,
On 04/16/2018 11:11 PM, Michal Hocko wrote:
> On Mon 16-04-18 22:17:40, Jann Horn wrote:
>> On Mon, Apr 16, 2018 at 9:57 PM, Michal Hocko wrote:
>>> On Mon 16-04-18 21:30:09, Jann Horn wrote:
On Mon, Apr 16, 2018 at 9:18 PM, Michal Hocko wrote:
>>> [...]
> Yes, reasonably w
Add support for DFSDM (Digital Filter For Sigma Delta Modulators)
to STM32MP1. This variant is close to STM32H7 DFSDM, it implements
6 filter instances. Registers map is also increased.
Signed-off-by: Fabrice Gasnier
---
.../bindings/iio/adc/st,stm32-dfsdm-adc.txt | 7 +--
drivers/i
On Tue, May 01, 2018 at 02:31:26PM +0200, Mylène Josserand wrote:
> Add the initialization of CNTVOFF for sun8i-a83t.
>
> For boot CPU, create a new machine that handles this
> function's call in an "init_early" callback. We need to initialize
> CNTVOFF before the arch timer's initialization other
On Tue, May 01, 2018 at 02:31:28PM +0200, Mylène Josserand wrote:
> To prepare the support of sun8i-a83t, add a field in the smp_data
> structure to know if we are on sun9i-a80 or sun8i-a83t.
>
> Add also a global variable to retrieve which architecture we are
> having.
>
> Signed-off-by: Mylène
::vm-lkp-nhm-dp1-yocto-ia32-4::dhcp
root=/dev/ram0 user=lkp
job=/lkp/scheduled/vm-lkp-nhm-dp1-yocto-ia32-4/trinity-300s-yocto-tiny-i386-2016-04-22.cgz-6da6c0db5316275015e8cc2959f12a17584aeb64-20180502-79407-edwkjj-0.yaml
ARCH=x86_64 kconfig=x86_64-randconfig-s4-05020254 branch=linu
On Tue, May 01, 2018 at 02:31:29PM +0200, Mylène Josserand wrote:
> Add the support for A83T.
>
> A83T SoC has an additional register than A80 to handle CPU configurations:
> R_CPUS_CFG. Information about the register comes from Allwinner's BSP
> driver.
> An important difference is the Power Off
On 27 April 2018 at 13:47, Kishon Vijay Abraham I wrote:
> Add UHS/HS200 mode support in sdhci-omap. The programming sequence
> for voltage switching, tuning is followed from AM572x TRM
> http://www.ti.com/lit/ug/spruhz6j/spruhz6j.pdf
> (Similar to all AM57x/DRA7x SoCs). The patch series also impl
On Fri, Apr 20, 2018 at 03:38:10PM +0800, Anson Huang wrote:
> i.MX6SX has lvds2 (analog clock2), an I/O clock like lvds1.
> And this lvds2, along with lvds1, can be used to provide
> external clock source to the internal pll, such as pll4_audio
> and pll5_video.
>
> This patch mainly adds the lvd
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