On Thu, Apr 19, 2018 at 2:32 AM, Paolo Valente wrote:
> I'm missing something here. When the request gets completed in the
> first place, the hook bfq_finish_requeue_request gets called, and that
> hook clears both ->elv.priv elements (as the request has a non-null
> elv.icq). So, when bfq gets
On Wed, 18 Apr 2018 04:10:16 PDT (-0700), s...@shealevy.com wrote:
Hi all,
Shea Levy writes:
This function is effectively identical across 14 architectures, and
the generic implementation is small enough to be negligible in the
architectures that do override it. Many of the remaining divergen
On Apr 20, 2018, at 11:03 AM, Linus Torvalds
wrote:
>
> On Fri, Apr 20, 2018 at 5:35 AM, David Howells wrote:
>> In do_mount() when the MS_* flags are being converted to MNT_* flags,
>> MS_RDONLY got accidentally convered to SB_RDONLY.
>
> Applied.
>
> I guess they have the same value (1). Ho
On Fri, Apr 20, 2018 at 06:16:53PM +0200, Andrea Parri wrote:
> I moved to Amarula Solutions; switch to work e-mail address.
>
> Signed-off-by: Andrea Parri
> Cc: Alan Stern
> Cc: Will Deacon
> Cc: Peter Zijlstra
> Cc: Boqun Feng
> Cc: Nicholas Piggin
> Cc: David Howells
> Cc: Jade Alglave
On Fri 2018-04-20 15:30:03, Daniel Micay wrote:
> Well, that's not related, it's just this:
>
> #ifdef __GNUC__
> #if (__GNUC__ == 3 && __GNUC_MINOR__ < 3)
> #error Your compiler is too buggy; it is known to miscompile kernels.
> #errorKnown good compilers: 3.3, 4.x
> #endif
> #if GCC_VERSION
On Fri, Apr 20, 2018 at 06:30:11PM +0200, Andrea Parri wrote:
> A couple of fixes to our references and comments: the first updating
> ASPLOS information, the second adding a reference.
I applied both, thank you!
Thanx, Paul
> Cheers,
> A
Hi Linus,
Please pull the following Kselftest update for 4.17-rc2
This Kselftest update for 4.17-rc2 consists of a fix from Michael Ellerman
to not run dnotify_test by default to prevent Kselftest running forever.
diff is attached.
thanks,
-- Shuah
Hi Sergey,
I love your patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v4.17-rc1 next-20180420]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux
On Fri, Apr 20, 2018 at 03:10:26PM +0200, Ondřej Jirman wrote:
> Hello,
>
> On Thu, Apr 19, 2018 at 04:02:08PM +0200, Giulio Benetti wrote:
> > Hi everybody,
> >
> > Il 19/04/2018 15:36, Chen-Yu Tsai ha scritto:
> > > On Thu, Apr 19, 2018 at 9:34 PM, Ondřej Jirman
> > > wrote:
> > > > Hello Giul
Hi.
On 20.04.2018 22:23, Kees Cook wrote:
I don't know the "how", I only found the "what". :) If you want, grab
the reproducer VM linked to earlier in this thread; it'll hit the
problem within about 30 seconds of running the reproducer.
Just to avoid a possible confusion I should note that I'v
On Thu, Apr 19, 2018 at 01:59:36PM -0400, Paul Gortmaker wrote:
> It came to my attention that the file "whatisRCU.txt" does not
> manage to actually ever spell out what is RCU.
>
> This might not be an issue for a lot of people, but we have to
> assume the consumers of these documents are startin
Hi Roman,
this looks cool, and the implementation makes sense to me, so the
feedback I have is just smaller stuff.
On Fri, Apr 20, 2018 at 05:36:31PM +0100, Roman Gushchin wrote:
> Memory controller implements the memory.low best-effort memory
> protection mechanism, which works perfectly in many
On 04/20/18 13:01, Alexander Duyck wrote:
> On Fri, Apr 20, 2018 at 10:23 AM, Randy Dunlap wrote:
>> On 04/20/18 09:28, Alexander Duyck wrote:
>>> This series is meant to add support for SR-IOV on devices when the VFs are
>>> not managed by the kernel. Examples of recent patches attempting to do t
On 2018-04-20 16:22, Paul Moore wrote:
> On Fri, Apr 20, 2018 at 4:02 PM, Richard Guy Briggs wrote:
> > On 2018-04-18 21:46, Paul Moore wrote:
> >> On Fri, Mar 16, 2018 at 5:00 AM, Richard Guy Briggs
> >> wrote:
> >> > Audit events could happen in a network namespace outside of a task
> >> > con
On Mon, 26 Mar 2018 09:12:17 -0500
thor.tha...@linux.intel.com wrote:
> From: Thor Thayer
>
> The current Cadence QSPI driver caused a kernel panic when loading
> a Root Filesystem from QSPI. The problem was caused by reading more
> bytes than needed because the QSPI operated on 4 bytes at a tim
Add a selftest for the sparc64 privileged ADI driver. These
tests verify the read(), pread(), write(), pwrite(), and seek()
functionality of the driver. The tests also report simple
performance statistics:
Syscall CallAvgTime AvgSize
Count (ticks) (bytes)
--
ADI is a feature supported on SPARC M7 and newer processors to allow
hardware to catch rogue accesses to memory. ADI is supported for data
fetches only and not instruction fetches. An app can enable ADI on its
data pages, set version tags on them and use versioned addresses to
access the data pages
SPARC M7 and newer processors utilize ADI to version and
protect memory. This driver is capable of reading/writing
ADI/MCD versions from privileged user space processes.
Addresses in the adi file are mapped linearly to physical
memory at a ratio of 1:adi_blksz. Thus, a read (or write)
of offset K
On Fri, Apr 20, 2018 at 05:36:32PM +0100, Roman Gushchin wrote:
> We do store memory.min, memory.low and memory.max actual values
> in struct page_counter fields, while memory.high value is located
> in the struct mem_cgroup directly, which is not very consistent.
>
> This patch moves the high fie
On Fri, 20 Apr 2018, Michal Hocko wrote:
> On Thu 19-04-18 12:12:38, Mikulas Patocka wrote:
> [...]
> > From: Mikulas Patocka
> > Subject: [PATCH] kvmalloc: always use vmalloc if CONFIG_DEBUG_VM
> >
> > The kvmalloc function tries to use kmalloc and falls back to vmalloc if
> > kmalloc fails.
On Fri, 20 Apr 2018, Michal Hocko wrote:
> On Fri 20-04-18 06:41:36, Matthew Wilcox wrote:
> > On Fri, Apr 20, 2018 at 03:08:52PM +0200, Michal Hocko wrote:
> > > > In order to detect these bugs reliably I submit this patch that changes
> > > > kvmalloc to always use vmalloc if CONFIG_DEBUG_VM i
In case of errors in write/read config, st->vref is left undisabled.
Found by Linux Driver Verification project (linuxtesting.org).
Signed-off-by: Alexey Khoroshilov
Fixes: 0f7ddcc1bff1 ("iio:adc:ad799x: Write default config on probe and reset
alert status on probe")
---
drivers/iio/adc/ad799x
Hi Rob,
Thanks for the example. It was a good starting tutorial of sorts for me
to understand the format a bit.
On 04/18/18 15:29, Rob Herring wrote:
> The current DT binding documentation format of freeform text is painful
> to write, review, validate and maintain.
>
> This is just an example
On Sat, 21 Apr 2018 04:37:41 +0800 kbuild test robot wrote:
> I love your patch! Yet something to improve:
>
> [auto build test ERROR on linus/master]
> [also build test ERROR on v4.17-rc1 next-20180420]
> [if your patch is applied to the wrong git tree, please drop us a note to
On Fri, Apr 20, 2018 at 04:54:53PM -0400, Mikulas Patocka wrote:
> On Fri, 20 Apr 2018, Michal Hocko wrote:
> > No way. This is just wrong! First of all, you will explode most likely
> > on many allocations of small sizes. Second, CONFIG_DEBUG_VM tends to be
> > enabled quite often.
>
> You're an
Hello everyone,
This is a V7 of my series that adds SMP support for Allwinner sun8i-a83t.
Based on sunxi's tree, sunxi/for-next branch.
Depends on a patch from Doug Berger that allows to include the "cpu-type"
header on assembly files:
https://lkml.org/lkml/2018/2/23/1263
(applied on Broadcom's tr
Hello everyone,
This is a V7 of my series that adds SMP support for Allwinner sun8i-a83t.
Based on sunxi's tree, sunxi/for-next branch.
Depends on a patch from Doug Berger that allows to include the "cpu-type"
header on assembly files:
https://lkml.org/lkml/2018/2/23/1263
(applied on Broadcom's tr
Move the assembly code for cluster cache enabling and resuming
into an assembly file instead of having it directly in C code.
Remove the CFLAGS because we are using the ARM directive "arch"
instead.
Signed-off-by: Mylène Josserand
---
arch/arm/mach-sunxi/Makefile | 4 +--
arch/arm/mach-sunxi/
As we found in sun9i-a80, CPUCFG is a collection of registers that are
mapped to the SoC's signals from each individual processor core and
associated peripherals.
These registers are used for SMP bringup and CPU hotplugging.
Signed-off-by: Mylène Josserand
Reviewed-by: Chen-Yu Tsai
---
arch/ar
The R_CPUCFG is a collection of registers needed for SMP bringup
on clusters and cluster's reset.
For the moment, documentation about this register is found in
Allwinner's code only.
Signed-off-by: Mylène Josserand
Reviewed-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 5 +
1 fil
Add CCI-400 node and control-port on CPUs needed by SMP bringup.
Signed-off-by: Mylène Josserand
Reviewed-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 41 +++
1 file changed, 41 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
b/arch
Add the initialization of CNTVOFF for sun8i-a83t.
For boot CPU, create a new machine that handles this
function's call in an "init_early" callback. We need to initialize
CNTVOFF before the arch timer's initialization otherwise, it will
not be taken into account and fails to boot correctly.
Because
To prepare the support for sun8i-a83t, rename the macro that handles
the power-off of clusters because it is different from sun9i-a80 to
sun8i-a83t.
The power off register for clusters are different from a80 and a83t.
Signed-off-by: Mylène Josserand
Acked-by: Maxime Ripard
Reviewed-by: Chen-Yu
Add the use of enable-method property for SMP support which allows
to handle the SMP support for this specific SoC.
This commit adds enable-method properties to all CPU nodes.
Signed-off-by: Mylène Josserand
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 8
1 file changed, 8 insertions(+)
di
Now that a common function is available for CNTVOFF's
initialization, let's convert shmobile-apmu code to use
this function.
Signed-off-by: Mylène Josserand
Reviewed-by: Geert Uytterhoeven
Tested-by: Geert Uytterhoeven
---
arch/arm/mach-shmobile/common.h | 1 -
arch/arm/mach-shmobile
On Fri, Apr 20, 2018 at 02:56:36PM -0500, Kshitiz Gupta wrote:
> Currently the driver adjusts time by reading the current time and then
> modifying it before writing to SYSTIM register. This can introduce
> inaccuracies in SYSTIM. With a PREEMPT_RT kernel, spinlocks may be
> interrupted, which in t
To prepare the support of sun8i-a83t, add a field in the smp_data
structure to know if we are on sun9i-a80 or sun8i-a83t.
Add also a global variable to retrieve which architecture we are
having.
Signed-off-by: Mylène Josserand
---
arch/arm/mach-sunxi/mc_smp.c | 4
1 file changed, 4 inserti
Add the support for A83T.
A83T SoC has an additional register than A80 to handle CPU configurations:
R_CPUS_CFG. Information about the register comes from Allwinner's BSP
driver.
An important difference is the Power Off Gating register for clusters
which is BIT(4) in case of SUN9I-A80 and BIT(0) i
The CNTVOFF register from arch timer is uninitialized.
It should be done by the bootloader but it is currently not the case,
even for boot CPU because this SoC is booting in secure mode.
It leads to an random offset value meaning that each CPU will have a
different time, which isn't working very we
Add the possibility to apply and query the clock signal duty cycle ratio.
This is useful when the duty cycle of the clock signal depends on some
other parameters controlled by the clock framework.
For example, the duty cycle of a divider may depends on the raw divider
setting (ratio = N / div) ,
On Fri, 20 Apr 2018, Matthew Wilcox wrote:
> On Fri, Apr 20, 2018 at 04:54:53PM -0400, Mikulas Patocka wrote:
> > On Fri, 20 Apr 2018, Michal Hocko wrote:
> > > No way. This is just wrong! First of all, you will explode most likely
> > > on many allocations of small sizes. Second, CONFIG_DEBUG_V
Winbond spi-nor flash 32MB and larger have an 'Extended Address
Register' as one option for addressing beyond 16MB (Macronix
has the same concept, Spansion has EXTADD bits in the Bank Address
Register).
According to section
8.2.7 Write Extended Address Register (C5h)
of the Winbond W25Q256FV
Now that we have informed the firmware that the Power Button driver is
active, laptops such as the Acer Swift 3 will generate
a WMI key event with code 0x87 when the power button key is
pressed.
Add this keycode to the table so that it is converted to an appropriate
in
On Fri, Apr 20 2018, Boris Brezillon wrote:
> Hi Neil,
>
> On Mon, 16 Apr 2018 09:42:30 +1000
> NeilBrown wrote:
>
>> Winbond spi-nor flash 32MB and larger have an 'Extended Address
>> Register' as one option for addressing beyond 16MB (Macronix
>> has the same concept, Spansion has EXTADD bits i
On Fri, 20 Apr 2018, Peter Zijlstra wrote:
> On Fri, Apr 20, 2018 at 06:29:07PM +0200, Philipp Klocke wrote:
> > The gain is stopping a warning that clutters the output log of clang.
>
> Well, you should not be using clang anyway. It is known to miscompile
> the kernel.
>
There are some advant
Now that we have informed the firmware that the Power Button driver is
active, laptops such as the Acer Swift 3 will generate
a WMI key event with code 0x87 when the power button key is
pressed.
Add this keycode to the table so that it is converted to an appropriate
in
Hi Sergey,
I love your patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v4.17-rc1 next-20180420]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux
On Wed 18 Apr 15:29 PDT 2018, Rob Herring wrote:
> The current DT binding documentation format of freeform text is painful
> to write, review, validate and maintain.
>
> This is just an example of what a binding in the schema format looks
> like. It's using jsonschema vocabulary in a YAML encoded
On Fri, Apr 20, 2018 at 5:48 PM, Arnd Bergmann wrote:
> @@ -41,8 +39,7 @@ static void __init sh_late_time_init(void)
>
> void __init time_init(void)
> {
> - if (board_time_init)
> - board_time_init();
> + timer_init();
Testing revealed this to be broken, the fix is:
On Fri, Apr 20, 2018 at 12:42:11PM -0500, Mario Limonciello wrote:
> As reported by Randy Dunlap:
> >> WARNING: unmet direct dependencies detected for DELL_SMBIOS
> >> Depends on [m]: X86 [=y] && X86_PLATFORM_DEVICES [=y]
> >>&& (DCDBAS [=m] ||
> >> DCDBAS [=m]=n) && (ACPI_WMI [=n] || ACPI_WM
On Fri, Apr 20, 2018 at 05:55:28PM +, mario.limoncie...@dell.com wrote:
>
> > -Original Message-
> > From: platform-driver-x86-ow...@vger.kernel.org [mailto:platform-driver-x86-
> > ow...@vger.kernel.org] On Behalf Of Randy Dunlap
> > Sent: Friday, April 20, 2018 12:53 PM
> > To: Limon
On Fri, Apr 20, 2018 at 11:51:18PM +0200, Arnd Bergmann wrote:
> On Fri, Apr 20, 2018 at 5:48 PM, Arnd Bergmann wrote:
>
> > @@ -41,8 +39,7 @@ static void __init sh_late_time_init(void)
> >
> > void __init time_init(void)
> > {
> > - if (board_time_init)
> > - board_time_ini
On 04/20/2018 11:26 PM, NeilBrown wrote:
>
> Winbond spi-nor flash 32MB and larger have an 'Extended Address
> Register' as one option for addressing beyond 16MB (Macronix
> has the same concept, Spansion has EXTADD bits in the Bank Address
> Register).
>
> According to section
>8.2.7 Write E
The mm-of-the-moment snapshot 2018-04-20-14-58 has been uploaded to
http://www.ozlabs.org/~akpm/mmotm/
mmotm-readme.txt says
README for mm-of-the-moment:
http://www.ozlabs.org/~akpm/mmotm/
This is a snapshot of my -mm patch queue. Uploaded at random hopefully
more than once a week.
You wi
Hello,
On Fri, 20 Apr 2018 23:10:11 +0200
Mylène Josserand wrote:
> Hello everyone,
>
> This is a V7 of my series that adds SMP support for Allwinner sun8i-a83t.
> Based on sunxi's tree, sunxi/for-next branch.
> Depends on a patch from Doug Berger that allows to include the "cpu-type"
> header
On 04/20/2018 02:27 AM, James Morse wrote:
> Hi Alex,
>
> On 04/16/2018 10:59 PM, Alex G. wrote:
>> On 04/13/2018 11:38 AM, James Morse wrote:
>>> This assumes a cache-invalidate will clear the error, which I don't
> think we're
>>> guaranteed on arm.
>>> It also destroys any adjacent data, "eve
On 4/20/2018 9:28 AM, Alexander Duyck wrote:
This patch adds a common configuration function called
pci_sriov_configure_simple that will allow for managing VFs on devices
where the PF is not capable of managing VF resources.
Signed-off-by: Alexander Duyck
Tested-by: Mark Rustad
---
v5: New p
On 4/20/2018 9:31 AM, Alexander Duyck wrote:
Add a new driver called "pci-pf-stub" to act as a "white-list" for PF
devices that provide no other functionality other then acting as a means of
allocating a set of VFs. For now I only have one example ID provided by
Amazon in terms of devices that re
On 04/19/2018 09:16 AM, Doug Anderson wrote:
> On Wed, Apr 18, 2018 at 4:30 PM, David Collins
> wrote:
+ * @drms_mode: Array of regulator framework modes which
can
+ * be configured dynamically for this
regulator
+ *
On 4/20/2018 9:30 AM, Alexander Duyck wrote:
Instead of implementing our own version of a SR-IOV configuration stub in
the ena driver we can just reuse the existing
pci_sriov_configure_simple function.
Signed-off-by: Alexander Duyck
---
v5: Replaced call to pci_sriov_configure_unmanaged with
On Sat, 21 Apr 2018 07:28:19 +1000
NeilBrown wrote:
> On Fri, Apr 20 2018, Boris Brezillon wrote:
>
> > Hi Neil,
> >
> > On Mon, 16 Apr 2018 09:42:30 +1000
> > NeilBrown wrote:
> >
> >> Winbond spi-nor flash 32MB and larger have an 'Extended Address
> >> Register' as one option for addressing
On Wed, Apr 18, 2018 at 08:46:44AM +0300, Jani Nikula wrote:
> On Tue, 17 Apr 2018, Souptick Joarder wrote:
> > On 17-Apr-2018 9:45 PM, "Matthew Wilcox" wrote:
> >>
> >> On Tue, Apr 17, 2018 at 09:14:32PM +0530, Souptick Joarder wrote:
> >> > Not exactly. The plan for these patches is to introduc
On Fri, Apr 20, 2018 at 12:57:41PM -0700, Tim Chen wrote:
> On 04/04/2018 12:17 PM, jgli...@redhat.com wrote:
> > From: Jérôme Glisse
> >
> > https://cgit.freedesktop.org/~glisse/linux/log/?h=generic-write-protection-rfc
> >
> > This is an RFC for LSF/MM discussions. It impacts the file subsyste
From: Dave Hansen
0day reported warnings at boot on 32-bit systems without NX support:
[ 12.349193] attempted to set unsupported pgprot: 8025 bits:
8000 supported: 7fff
[ 12.350792] WARNING: CPU: 0 PID: 1 at arch/x86/include/asm/pgtable.h:540
handle_m
From: Dave Hansen
Part of the global bit _setting_ patches also includes clearing the
Global bit when we do not want it. That is done with
set_memory_nonglobal(), which uses change_page_attr_clear() in
pageattr.c under the covers.
The TLB flushing code inside pageattr.c has has checks like
BUG
Kees reported to me that I made too much of the kernel image global.
It was far more than just text:
I think this is too much set global: _end is after data,
bss, and brk, and all kinds of other stuff that could
hold secrets. I think this should match what
mark_rod
There have been a number of reports about issues with the patches that
restore the Global PTE bit when using KPIT. This set resolves all of
the issues that have been reported.
These have been pushed out to a git tree where 0day should be chewing
on them. Considering the troubles thus far, we sho
From: Dave Hansen
The pageattr.c code attempts to process "faults" when it goes looking
for PTEs to change and finds non-present entries. It allows these
faults in the linear map which is "expected to have holes", but
WARN()s about them elsewhere, like when called on the kernel image.
However,
I believe this was originally reported by the grsecurity team who
tweeted about it (link below).
RANDSTRUCT derives its hardening benefits from the attacker's lack of
knowledge about the layout of kernel data structures. Keep the kernel
image non-global in cases where RANDSTRUCT is in use to hel
On Tue, 17 Apr 2018 13:10:45 -0600
Alex Williamson wrote:
> On Mon, 16 Apr 2018 14:48:58 -0700
> Jacob Pan wrote:
>
> > When Shared Virtual Address (SVA) is enabled for a guest OS via
> > vIOMMU, we need to provide invalidation support at IOMMU API and
> > driver level. This patch adds Intel VT
Jia-Ju,
> st_probe() is never called in atomic context.
Applied patches 1 and 2 to 4.18/scsi-queue. Thanks!
--
Martin K. Petersen Oracle Linux Engineering
mba_sc is a feedback loop where we periodically read MBM counters and
try to restrict the bandwidth below a max value so the below is always
true:
"current bandwidth(cur_bw) < user specified bandwidth(user_bw)"
The frequency of these checks is currently 1s and we just tag along the
MBM overflow
Add documentation about the feedback loop mechanism (MBA software
controller) which lets the user specify the memory bandwidth allocation
in MBps. This includes some changes to "schemata" formati with
examples.
Signed-off-by: Vikas Shivappa
---
Documentation/x86/intel_rdt_ui.txt | 75 +++
Currently when user updates the "schemata" with new MBA percentage
values, kernel writes the corresponding bandwidth percentage values to
the IA32_MBA_THRTL_MSR.
When MBA is expressed in MBps, the schemata format is changed to have
the per package memory bandwidth in MBps instead of being specifie
Sending the second version of MBA software controller which addresses
the feedback on V1. Thanks to the feedback from Thomas on the V1. Thomas
was unhappy about the bad structure and english in the documentation and
comments explaining the changes and also about duct taping of data
structure which
This is a preparatory patch for the mba feedback loop. We add support to
measure the "bandwidth in MBps" and the "delta bandwidth". We measure it
reading the MBM IA32_QM_CTR MSRs and calculating the amount of "bytes"
moved. There is no user interface for this and will only be used by the
feedback l
Currently user does memory bandwidth allocation(MBA) by specifying the
bandwidth in percentage via the resctrl schemata file:
"/sys/fs/resctrl/schemata"
Add a new mount option "mba_MBps" to enable the user to specify MBA
in MBps:
$mount -t resctrl resctrl [-o cdp[,cdpl2][mba_MBps]] /sys/f
When MBA software controller is enabled, we need a per domain storage
for user specified bandwidth in "MBps" and the "percentage" values which
are programmed into the IA32_MBA_THRTL_MSR. Add support for these data
structures and initialization.
The MBA percentage values have a default max value of
> This patch isn't applyable because your mailer has changed all the tabs
> to spaces.
>
> I also think there's no need to do it this way. I think what we need
> is for fc_bsg_remove() to wait until the bsg queue is drained. It does
> look like the author thought this happened otherwise the co
On Fri, Apr 20 2018 at 13:07 -0600, David Collins wrote:
On 04/18/2018 10:55 PM, Stephen Boyd wrote:
Quoting David Collins (2018-03-22 18:30:06)
On 03/21/2018 12:07 PM, Stephen Boyd wrote:
Quoting David Collins (2018-03-16 18:09:10)
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/K
Good day,
I am seeking your concept with great gratitude to present you as a
representative to carry out business transactions with a reasonable share upon
your interest and cooperation to work with us in trust. If interested please
get back.
Regards
Kingsley
---
This email has been checked
Hi Palmer,
Palmer Dabbelt writes:
> On Wed, 18 Apr 2018 04:10:16 PDT (-0700), s...@shealevy.com wrote:
>> Hi all,
>>
>> Shea Levy writes:
>>
>>> This function is effectively identical across 14 architectures, and
>>> the generic implementation is small enough to be negligible in the
>>> archite
On 04/20/2018 03:23 AM, Matt Redfearn wrote:
> This series addresses a few issues with how the MIPS performance
> counters code supports the hardware multithreading MT ASE.
>
> Firstly, implementations of the MT ASE may implement performance
> counters
> per core or per thread(TC). MIPS Techologie
On Sat, Apr 21 2018, Boris Brezillon wrote:
> On Sat, 21 Apr 2018 07:28:19 +1000
> NeilBrown wrote:
>
>> On Fri, Apr 20 2018, Boris Brezillon wrote:
>>
>> > Hi Neil,
>> >
>> > On Mon, 16 Apr 2018 09:42:30 +1000
>> > NeilBrown wrote:
>> >
>> >> Winbond spi-nor flash 32MB and larger have an 'Ex
Good day,
I am seeking your concept with great gratitude to present you as a
representative to carry out business transactions with a reasonable share upon
your interest and cooperation to work with us in trust. If interested please
get back.
Regards
Kingsley
---
This email has been checked
Winbond spi-nor flash 32MB and larger have an 'Extended Address
Register' as one option for addressing beyond 16MB (Macronix
has the same concept, Spansion has EXTADD bits in the Bank Address
Register).
According to section
8.2.7 Write Extended Address Register (C5h)
of the Winbond W25Q256FV
On Thu, Apr 19, 2018 at 3:04 AM, Thomas Gleixner wrote:
> Kees tried to get rid of the Variable Length Arrays in the Reed-Solomon
> library by replacing them with fixed length arrays on stack. Though they
> are rather large and Andrew did not fall in love with that solution.
>
> This series addres
Martin,
> Here is another attempt to handle the special return codes for ABORTED
> COMMAND for certain SCSI devices. Following MKP's recommendation, I've
> created two new BLIST flags, simplifying the code in scsi_error.c
> compared to the previous versions. Rather than using "free" bits, I
> inc
On Tue, 17 Apr 2018 13:10:47 -0600
Alex Williamson wrote:
> On Mon, 16 Apr 2018 14:48:53 -0700
> Jacob Pan wrote:
>
> > Add Intel VT-d ops to the generic iommu_bind_pasid_table API
> > functions.
> >
> > The primary use case is for direct assignment of SVM capable
> > device. Originated from e
On Fri, 20 Apr 2018 08:59:15 +0900
Namhyung Kim wrote:
> The map_groups__fixup_end() was called to set end addresses of kernel
> map and module maps. But now machine__create_modules() is set the end
> address of modules properly, the only remaining piece is the kernel map.
> We can set it with a
Colin,
> In the case when the phy_mask is bitwise anded with the phy_index bit
> is zero the continue statement currently jumps to the next iteration
> of the while loop and phy_index is never actually incremented,
> potentially causing an infinite loop if phy_index is less than
> SCI_MAX_PHS. Fi
Improve fscrypt read performance by switching the decryption workqueue
from bound to unbound. With the bound workqueue, when multiple bios
completed on the same CPU, they were decrypted on that same CPU. But
with the unbound queue, they are now decrypted in parallel on any CPU.
Although fscrypt
Arnd,
> do_gettimeofday() is deprecated because of the y2038 overflow. Here,
> we use the result to pass into a 32-bit field in the firmware, which
> still risks an overflow, but if the firmware is written to expect
> unsigned values, it can at least last until y2106, and there is not
> much we
Arnd,
> do_gettimeofday() is deprecated since it will stop working in 2038 on
> 32-bit platforms, leading to incorrect times passed to the firmware.
> On 64-bit platforms the current code appears to be fine, as the
> calculation passes an 8-bit century number into the firmware that can
> represen
On Fri, 20 Apr 2018 19:25:34 +0100
Jean-Philippe Brucker wrote:
> On Tue, Apr 17, 2018 at 08:10:47PM +0100, Alex Williamson wrote:
> [...]
> > > + /* Assign guest PASID table pointer and size order */
> > > + ctx_lo = (pasidt_binfo->base_ptr & VTD_PAGE_MASK) |
> > > + (pasidt_binfo->pasid
Quoting Rob Herring (2018-04-20 11:15:04)
> On Fri, Apr 20, 2018 at 11:47 AM, Stephen Boyd wrote:
> > Quoting Rob Herring (2018-04-18 15:29:05)
> >> diff --git a/Documentation/devicetree/bindings/example-schema.yaml
> >> b/Documentation/devicetree/bindings/example-schema.yaml
> >> new file mode 1
Daniel Vetter writes:
> On Thu, Apr 19, 2018 at 12:20:35PM -0700, Eric Anholt wrote:
>> This driver will be used to support Mesa on the Broadcom 7268 and 7278
>> platforms.
>>
>> V3D 3.3 introduces an MMU, which means we no longer need CMA or vc4's
>> complicated CL/shader validation scheme. Th
On 04/20/2018 03:19 PM, Jerome Glisse wrote:
> On Fri, Apr 20, 2018 at 12:57:41PM -0700, Tim Chen wrote:
>> On 04/04/2018 12:17 PM, jgli...@redhat.com wrote:
>>
>>
>> Your approach seems useful if there are lots of locked pages sharing
>> the same wait queue.
>>
>> That said, in the original work
Here's a few minor fs thaw fixes and adjustments I ran accross
as I started to refresh my development for to use freeze_fs on
suspend/hibernation [0]. These are just prep commits for the real
work, I'm still reviewing feedback and adjusting the code for
that.
I've tested the patches with generic/0
On commit 08fdc8a0138a ("buffer.c: call thaw_super during emergency thaw")
Mateusz added thaw_super_locked() and made thaw_super() use it, but
forgot to move the documentation.
Signed-off-by: Luis R. Rodriguez
---
fs/super.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
dif
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