In make_dentry_ptr_block, it is confused with "&" for t->dentry_bitmap
but without "&" for t->dentry, so delete "&" to make code more readable.
Signed-off-by: Yunlong Song
---
fs/f2fs/f2fs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/f2fs/f2fs.h b/fs/f2fs/f2fs.h
index
From: Andrey Ryabinin
Changelog:
v3 - v2
- Remove this patch: 2 1-byte checks more safer for memory_is_poisoned_16
because a unaligned load/store of 16 bytes is rare on arm, and this
patch is very likely to affect the performance of modern CPUs.
---Acked by: Russell King - ARM Linux
- Fixe
Define KASAN_SHADOW_OFFSET,KASAN_SHADOW_START and KASAN_SHADOW_END for arm
kernel address sanitizer.
++ 0x
||
||
||
++ CONFIG_PAGE_OFFSET
|| || |-> module virtual address space area.
||/
++ MODULE_VADDR = KASA
The HP EliteBook G3 850 has a weird bug where a subsequent cold boot
hangs while plugged in if Linux enables the Host Notify features of
i2c-i801. The cold boot hang depends on how the system boots. It does
not hang on UEFI Grub text boot or legacy Grub text boot. But it does
hang on legacy Grub
From: Andrey Ryabinin
Disable instrumentation for arch/arm/boot/compressed/*
,arch/arm/kvm/hyp/* and arch/arm/vdso/* because those
code won't linkd with kernel image.
Disable kasan check in the function unwind_pop_register
because it doesn't matter that kasan checks failed when
unwind_pop_regist
From: Andrey Ryabinin
This patch initializes KASan shadow region's page table and memory.
There are two stage for KASan initializing:
1. At early boot stage the whole shadow region is mapped to just
one physical page (kasan_zero_page). It's finished by the function
kasan_early_init which is
From: Andrey Ryabinin
This patch enable kernel address sanitizer for arm.
Cc: Andrey Ryabinin
Acked-by: Dmitry Vyukov
Tested-by: Joel Stanley
Tested-by: Florian Fainelli
Tested-by: Abbott Liu
Signed-off-by: Abbott Liu
---
Documentation/dev-tools/kasan.rst | 2 +-
arch/arm/Kconfig
The purpose of this patch is to provide set_ttbr0/get_ttbr0
to kasan_init function. The definitions of cp15 registers
should be in arch/arm/include/asm/cp15.h rather than
arch/arm/include/asm/kvm_hyp.h, so move them.
Cc: Andrey Ryabinin
Reviewed-by: Marc Zyngier
Reviewed-by: Russell King - ARM L
From: Andrey Ryabinin
Functions like memset/memmove/memcpy do a lot of memory accesses.
If bad pointer passed to one of these function it is important
to catch this. Compiler's instrumentation cannot do this since
these functions are written in assembly.
KASan replaces memory functions with manu
This implements the baseline PMU for RISC-V platforms.
To ease future PMU portings, a guide is also written, containing
perf concepts, arch porting practices and some hints.
Changes in v2:
- Fix the bug reported by Alex, which was caused by not sufficient
initialization. Check https://lkml.o
Cc: Nick Hu
Cc: Greentime Hu
Signed-off-by: Alan Kao
---
Documentation/riscv/pmu.txt | 249
1 file changed, 249 insertions(+)
create mode 100644 Documentation/riscv/pmu.txt
diff --git a/Documentation/riscv/pmu.txt b/Documentation/riscv/pmu.txt
new
This patch provide a basic PMU, riscv_base_pmu, which supports two
general hardware event, instructions and cycles. Furthermore, this
PMU serves as a reference implementation to ease the portings in
the future.
riscv_base_pmu should be able to run on any RISC-V machine that
conforms to the Priv-S
On Monday, April 04/02/18, 2018 at 14:41:43 +0530, Jiri Pirko wrote:
> Fri, Mar 30, 2018 at 08:42:00PM CEST, ebied...@xmission.com wrote:
> >Rahul Lakkireddy writes:
> >
> >> On Friday, March 03/30/18, 2018 at 16:09:07 +0530, Jiri Pirko wrote:
> >>> Sat, Mar 24, 2018 at 11:56:33AM CET, rahul.lakki
On Tue, Mar 27, 2018 at 1:52 PM, Rishabh Bhatnagar
wrote:
> Documentation for last level cache controller device tree bindings,
> client bindings usage examples.
>
> Signed-off-by: Channagoud Kadabi
> Signed-off-by: Rishabh Bhatnagar
> ---
> .../devicetree/bindings/arm/msm/qcom,llcc.txt |
Sorry for the lack of version prefix in the title. This patchset should be
version 2.
On Mon, Apr 02, 2018 at 08:31:22PM +0800, Alan Kao wrote:
> This implements the baseline PMU for RISC-V platforms.
>
> To ease future PMU portings, a guide is also written, containing
> perf concepts, arch port
The HP EliteBook G3 850 has a weird bug where a subsequent cold boot
hangs while plugged in if Linux enables the Host Notify features of
i2c-i801. The cold boot hang depends on how the system boots. It does
not hang on UEFI Grub text boot or legacy Grub text boot. But it does
hang on legacy Grub
At the mentioned address there's nothing found. By searching information
on the controller chip still can be found, so update the link to the
resulting page.
Signed-off-by: Martin Kepplinger
---
drivers/input/touchscreen/mk712.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
The input/touchscreen/mk712.c driver has been rewritten for the common
input event system. in 2005. There shouldn't a special device node be
created anymore.
Signed-off-by: Martin Kepplinger
---
Please review this by looking at the driver too. Thanks,
martin
Documentatio
On Thu, 2018-03-22 at 00:36 -0500, Eric W. Biederman wrote:
> ebied...@xmission.com (Eric W. Biederman) writes:
>
> > Jeff Layton writes:
> >
> > > From: Jeff Layton
> > >
> > > POSIX mandates that open fds and their associated file locks should be
> > > preserved across an execve. This works,
2018-04-02 21:04 GMT+09:00 Andrew Lunn :
>> The maintainer of DWC3, Felipe Balbi, requested to
>> split the glue layer driver into small parts such as
>> reset, regulator, phy, etc.
>
> What exactly did Felipe ask for? Did he ask that the patch be split
> up, one patch per reset, regulator, phy etc
> -Original Message-
> From: Ard Biesheuvel
> Sent: Friday, March 30, 2018 7:25 AM
> To: Ghannam, Yazen
> Cc: Borislav Petkov ; linux-...@vger.kernel.org; linux-
> ker...@vger.kernel.org; x...@kernel.org; tony.l...@intel.com
> Subject: Re: [PATCH v3 3/8] efi: Decode IA32/X64 Processor Err
On 2 April 2018 at 15:21, Ghannam, Yazen wrote:
>> -Original Message-
>> From: Ard Biesheuvel
>> Sent: Friday, March 30, 2018 7:25 AM
>> To: Ghannam, Yazen
>> Cc: Borislav Petkov ; linux-...@vger.kernel.org; linux-
>> ker...@vger.kernel.org; x...@kernel.org; tony.l...@intel.com
>> Subjec
>
> > I'm still not convinced either way (high-level or low-level
> > interface), but I think this needs to be discussed with the networking
> > maintainers. Given the examples on the github page you linked to, the
> > high-level user space commands based on these ioctls
> >
> >ls-addni # a
In order to be able to provide correct driver_data for pci_epf device,
a separate configfs entry for each pci_epf_device_id table entry in
pci_epf_driver is required.
Add support to create configfs entry for each pci_epf_device_id
table entry here.
Signed-off-by: Kishon Vijay Abraham I
---
driv
On Mon, Apr 02, 2018 at 10:21:01PM +0900, Masahiro Yamada wrote:
> 2018-04-02 21:04 GMT+09:00 Andrew Lunn :
> >> The maintainer of DWC3, Felipe Balbi, requested to
> >> split the glue layer driver into small parts such as
> >> reset, regulator, phy, etc.
> >
> > What exactly did Felipe ask for? Did
Hi Linus,
The following changes since commit 0c8efd610b58cb23cefdfa12015799079aef94ae:
Linux 4.16-rc5 (2018-03-11 17:25:09 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k.git
tags/m68k-for-v4.17-tag1
for you to fetch ch
Hi Vladimir,
On Tuesday, 27 March 2018 14:03:25 EEST Vladimir Zapolskiy wrote:
> On 03/27/2018 01:10 PM, jacopo mondi wrote:
> > On Tue, Mar 27, 2018 at 12:37:31PM +0300, Vladimir Zapolskiy wrote:
> >> On 03/27/2018 11:57 AM, jacopo mondi wrote:
> >>> On Tue, Mar 27, 2018 at 11:30:29AM +0300, Vlad
On Mon, 02 Apr 2018 02:20:02 -0700
syzbot wrote:
> Hello,
>
> syzbot hit the following crash on upstream commit
> 0adb32858b0bddf4ada5f364a84ed60b196dbcda (Sun Apr 1 21:20:27 2018 +)
> Linux 4.16
> syzbot dashboard link:
> https://syzkaller.appspot.com/bug?extid=2dbc55da20fa246378fd
>
> U
Hi Ioana
> The commands listed above are for creating/destroying DPAA2 objects
> in Management Complex and not for runtime configuration where
> standard userspace tools are used.
Please can you explain why this is not just plumbing inside a
switchdev driver?
The hardware has a number of physica
On Fri, Mar 30, 2018 at 06:18:50PM -0300, Rodrigo R. Galvao wrote:
> sector = le64_to_cpu(write_zeroes->slba) <<
> (req->ns->blksize_shift - 9);
> nr_sector = (((sector_t)le16_to_cpu(write_zeroes->length)) <<
> - (req->ns->blksize_shift - 9)) + 1;
> +
> > Introduce the rescan attribute as a bus attribute to synchronize the
> > fsl-mc bus objects and the MC firmware.
> >
> > To rescan the fsl-mc bus, e.g.,
> > echo 1 > /sys/bus/fsl-mc/rescan
> >
> > Signed-off-by: Ioana Ciornei
> > ---
> > Changes in v2:
> > - added proper documentation in /Do
One thing that I just forgot to explain previously, but I think its
relevant:
1. The command is failing with 4k logical block size, but works with 512B
2. With the patch, the command is working for both 512B and 4K.
Here are some extra information I could get when executing the command
with
On 2018-03-30 12:00 PM, Colin King wrote:
> From: Colin Ian King
>
> Trivial fix to spelling mistake in DRM_ERROR error message text
>
> Signed-off-by: Colin Ian King
Reviewed-by: Harry Wentland
Harry
> ---
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++--
> 1 file changed, 2 i
On Sun, 2018-04-01 at 15:35 +0100, Sitsofe Wheeler wrote:
> While trying to boot an EeePC 900 on the latest git mainline kernel a
> hang is encountered while systemd is starting services but this did
> not happen with 4.15. A bisection narrowed it down to the commit
> 358f70da49d77c43f2ca11b5da5842
On Mon, 2018-04-02 at 11:37 +0200, Johannes Thumshirn wrote:
> Coverity reports that we're assigning shost->use_blk_mq twice. This
> looks like the result of a bad merge of commit 2f31115e940c ("scsi:
> core: introduce force_blk_mq")
>
> Signed-off-by: Johannes Thumshirn
> ---
> drivers/scsi/hos
Good evening from Singapore!
The foremost question which I want to ask is, what is the universal
(world wide) understanding behind degaussing hard drives?
I work for No Secrets Agency (NSA) Pte Ltd (fictitious company name
used). My sales manager Edward Joseph Snowden (fictitious individual
name
On Mon, Apr 2, 2018 at 3:20 PM, Vignesh R wrote:
> + pm_runtime_get_sync(dev);
> + if (!device_may_wakeup(dev))
> + priv->wer = 0;
Can it be
priv->wer = device_may_wakeup(dev);
?
> + serial_out(up, UART_OMAP_WER, priv->wer);
> + pm_runtime_mark_last_busy
On Mon, Apr 2, 2018 at 5:01 PM, Andy Shevchenko
wrote:
> On Mon, Apr 2, 2018 at 3:20 PM, Vignesh R wrote:
>> + if (!device_may_wakeup(dev))
>> + priv->wer = 0;
>
> Can it be
>
> priv->wer = device_may_wakeup(dev);
>
> ?
Answering to myself, missed that this value is used as
When extending the rmi_spi buffers, we must check that no out of memory
error occurs, otherwise we may access data above the currently allocated
memory.
Propagate the error code returned by 'rmi_spi_manage_pools()' instead.
Signed-off-by: Christophe JAILLET
---
drivers/input/rmi4/rmi_spi.c | 7
On Sun, 1 Apr 2018, Andrea Parri wrote:
> There appeared to be a certain, recurrent uncertainty concerning the
> semantics of spin_is_locked(), likely a consequence of the fact that
> this semantics remains undocumented or that it has been historically
> linked to the (likewise unclear) semantics
On Mon, Apr 02, 2018 at 10:34:58AM +0300, Tal Gilboa wrote:
> On 4/2/2018 3:40 AM, Bjorn Helgaas wrote:
> > On Sun, Apr 01, 2018 at 11:38:53PM +0300, Tal Gilboa wrote:
> > > On 3/31/2018 12:05 AM, Bjorn Helgaas wrote:
> > > > From: Tal Gilboa
> > > >
> > > > Add pcie_bandwidth_capable() to comput
Souptick and I have been auditing the various page fault handler routines
and we've noticed that graphics drivers assume that a signal should be
able to interrupt a page fault. In contrast, the page cache takes great
care to allow only fatal signals to interrupt a page fault.
I believe (but have
When we get a hung task it can often be valuable to see _all_ the hung
tasks on the system before calling panic().
Quoting from
https://syzkaller.appspot.com/text?tag=CrashReport&id=5412451675799552
INFO: task syz-executor3:13421 blocked for more than 120
On Thu, 2018-03-29 at 16:53 +0200, Petr Mladek wrote:
> On Fri 2018-03-16 20:19:35, Andy Shevchenko wrote:
> > On Thu, 2018-03-15 at 16:26 +0100, Petr Mladek wrote:
> > > On Thu 2018-03-15 15:09:03, Andy Shevchenko wrote:
> > > > I still think that printing a hex value of the error code is
> > > >
On Sun, 2018-04-01 at 10:56 +0200, Richard Weinberger wrote:
> Add a new format string to print in cowsay format.
>
Apparently NAK b/c missed test cases!
> Signed-off-by: Richard Weinberger
> ---
> lib/vsprintf.c | 52
>
> 1 file changed, 52
On Mon, Apr 02, 2018 at 10:47:10AM -0300, Rodrigo Rosatti Galvao wrote:
> One thing that I just forgot to explain previously, but I think its
> relevant:
>
> 1. The command is failing with 4k logical block size, but works with 512B
>
> 2. With the patch, the command is working for both 512B and 4
On Sat, Mar 31, 2018 at 05:34:26PM -0500, Bjorn Helgaas wrote:
> From: Bjorn Helgaas
>
> Rename from pcie-dpc.c to dpc.c. The path "drivers/pci/pcie/pcie-dpc.c"
> has more occurrences of "pci" than necessary.
>
> Signed-off-by: Bjorn Helgaas
Looks good.
Acked-by: Keith Busch
On 2018/4/2 14:37, Yisheng Xie wrote:
> Hi Neil,
>
> On 2018/4/1 13:44, Neil Leeder wrote:
>> Hi Yisheng Xie,
>>
>> On 3/29/2018 03:03 AM, Yisheng Xie wrote:
>>>
>>> Hi Neil,
>>>
>>> On 2017/8/5 3:59, Neil Leeder wrote:
+mem_resource_0 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>>>
The following changes since commit
7928b2cbe55b2a410a0f5c1f154610059c57b1b2:
Linux 4.16-rc1 (2018-02-11 15:04:29 -0800)
are available in the Git repository at:
git://git.lwn.net/linux.git tags/docs-4.17
for you to fetch changes up to 86afad7d87f535ebb1a0e978bc32a8c58ac99268:
Documentatio
Hi,
This serie is aimed at removing the dmaengine slave compat use, and transfer
knowledge of the DMA requestors into architecture code.
This was discussed/advised by Arnd a couple of years back, it's almost time.
The serie is divided in 3 phasees :
- phase 1 : patch 1/15 and patch 2/15
=> t
As the pxa architecture switched towards the dmaengine slave map, the
old compatibility mechanism to acquire the dma requestor line number and
priority are not needed anymore.
This patch simplifies the dma resource acquisition, using the more
generic function dma_request_slave_channel().
Signed-o
From: Robert Jarzmik
As the pxa architecture switched towards the dmaengine slave map, the
old compatibility mechanism to acquire the dma requestor line number and
priority are not needed anymore.
This patch simplifies the dma resource acquisition, using the more
generic function dma_request_sla
From: Robert Jarzmik
As the pxa architecture switched towards the dmaengine slave map, the
old compatibility mechanism to acquire the dma requestor line number and
priority are not needed anymore.
This patch simplifies the dma resource acquisition, using the more
generic function dma_request_sla
From: Robert Jarzmik
As the pxa architecture switched towards the dmaengine slave map, the
old compatibility mechanism to acquire the dma requestor line number and
priority are not needed anymore.
This patch simplifies the dma resource acquisition, using the more
generic function dma_request_sla
In order to remove the specific knowledge of the dma mapping from PXA
drivers, add a default slave map for pxa architectures.
This won't impact MMP architecture, but is aimed only at all PXA boards.
This is the first step, and once all drivers are converted,
pxad_filter_fn() will be made static,
As the last driver using the former mechanism to acquire the DMA
requestor line has be converted to the dma_slave_map, remove all these
resources from the PXA devices.
Signed-off-by: Robert Jarzmik
---
arch/arm/mach-pxa/devices.c | 136
1 file changed
In order to prepare for the dma_slave_map change for SSP DMA channels
allocation, the SSP platform devices will now include a platform data
structure which in turn selects which dma channel has to be used for
data transfers, especially the PCM ones.
Signed-off-by: Robert Jarzmik
---
arch/arm/mac
As the pxa architecture and all its related drivers do not rely anymore
on the filter function, thanks to the slave map conversion, make
pxad_filter_fn() static, and remove it from the global namespace.
Signed-off-by: Robert Jarzmik
---
drivers/dma/pxa_dma.c | 5 ++---
include/linux/dma/p
For revert commit, it might has two double quotation marks in its
commit log.
Relax the check condition for revert commit to avoid checkpatch
errors.
Without this patch, checkpatch.pl will report errors:
ERROR: Please use git commit description style
...
Attached testcases here:
[test case 1] tes
Now the dma_slave_map is available for PXA architecture, switch the SSP
device to it.
This specifically means that :
- for platform data based machines, the DMA requestor channels are
extracted from platform data and passed further to the SSP user,
ie. usually the pxa-pcm-audio driver
- for d
For revert commit, it might has two double quotation marks in its
commit log.
Relax the check condition for revert commit to avoid checkpatch
errors.
Signed-off-by: Jia He
---
scripts/checkpatch.pl | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/scripts/checkp
As the pxa architecture switched towards the dmaengine slave map, the
old compatibility mechanism to acquire the dma requestor line number and
priority are not needed anymore.
This patch simplifies the dma resource acquisition, using the more
generic function dma_request_slave_channel().
Signed-o
Add some documentation for the pxad_param structure, and describe the
contract behind the minimal required priority of a DMA channel.
Signed-off-by: Robert Jarzmik
---
include/linux/dma/pxa-dma.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/linux/dma/pxa-dma.h b/include/l
As the pxa architecture switched towards the dmaengine slave map, the
old compatibility mechanism to acquire the dma requestor line number and
priority are not needed anymore.
This patch simplifies the dma resource acquisition, using the more
generic function dma_request_slave_channel().
Signed-o
As the pxa architecture switched towards the dmaengine slave map, the
old compatibility mechanism to acquire the dma requestor line number and
priority are not needed anymore.
This patch simplifies the dma resource acquisition, using the more
generic function dma_request_slave_channel().
Signed-o
From: Robert Jarzmik
As the pxa architecture switched towards the dmaengine slave map, the
old compatibility mechanism to acquire the dma requestor line number and
priority are not needed anymore.
This patch simplifies the dma resource acquisition, using the more
generic function dma_request_sla
On 4/1/18 8:35 AM, Sitsofe Wheeler wrote:
> Hi,
>
> While trying to boot an EeePC 900 on the latest git mainline kernel a
> hang is encountered while systemd is starting services but this did
> not happen with 4.15. A bisection narrowed it down to the commit
> 358f70da49d77c43f2ca11b5da584213b2add
On Mon, Apr 02, 2018 at 07:40:22PM +0900, Tetsuo Handa wrote:
> That commit assumes that calling kill_sb() from deactivate_locked_super(s)
> without corresponding fill_super() is safe. We have so far crashed with
> rpc_mount() and kernfs_mount_ns(). Is that really safe?
Consider the case
On 4/2/2018 5:05 PM, Bjorn Helgaas wrote:
On Mon, Apr 02, 2018 at 10:34:58AM +0300, Tal Gilboa wrote:
On 4/2/2018 3:40 AM, Bjorn Helgaas wrote:
On Sun, Apr 01, 2018 at 11:38:53PM +0300, Tal Gilboa wrote:
On 3/31/2018 12:05 AM, Bjorn Helgaas wrote:
From: Tal Gilboa
Add pcie_bandwidth_capable
In order to remove the specific knowledge of the dma mapping from PXA
drivers, add a default slave map for pxa architectures.
This is the first step, and once all drivers are converted,
pxad_filter_fn() will be made static, and the DMA resources removed from
device.c.
Signed-off-by: Robert Jarzmi
On Fri, Mar 9, 2018 at 4:03 PM, Hans de Goede wrote:
> Add an entry with touchscreen info for the Yours Y8W81 8" tablet.
>
> This tablet has the same case and mostly the same internals as the Chuwi
> Vi8. Both seem to be from an ODM called inet-tek. Both are labelled:
> "INET-I86M-REVxx" on the PC
The netcp driver shouldn't proceed until the knav qmss and dma
devices are ready. So return -EPROBE_DEFER if these devices are not
ready.
Signed-off-by: Murali Karicheri
---
drivers/net/ethernet/ti/netcp_core.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/net/ethernet/ti/netcp
Introduce rgmii link status to handle link state events for 2u
cpsw hardware on K2G.
Signed-off-by: Murali Karicheri
---
drivers/net/ethernet/ti/netcp_ethss.c | 34 +++---
1 file changed, 27 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/ti/netcp_eth
As a preparatory patch to add support for 2u cpsw hardware found on
K2G SoC, make call to gbe_sgmii_config() conditional. This is required
since 2u uses RGMII interface instead of SGMII and to allow for driver
re-use.
Signed-off-by: Murali Karicheri
---
drivers/net/ethernet/ti/netcp_ethss.c | 6
As the probe sequence is not guaranteed contrary to the assumption
of the commit 2d8e276a9030, same has to be reverted.
commit 2d8e276a9030 ("net: netcp: remove dead code from the driver")
Signed-off-by: Murali Karicheri
---
drivers/net/ethernet/ti/netcp_core.c | 9 +
1 file changed, 9
This patch provide APIs to allow client drivers to support
probe deferral. On K2G SoC, devices can be probed only
after the ti_sci_pm_domains driver is probed and ready.
As drivers may get probed at different order, any driver
that depends on knav dma and qmss drivers, for example
netcp network dri
The phy used for K2G allows for internal delays to be added optionally
to the clock circuitry based on board desing. To add this support,
enhance the driver to use of_get_phy_mode() to read the phy-mode from
the phy device and pass the same to phy through of_phy_connect().
Signed-off-by: Murali Ka
Navigator Subsystem (NAVSS) available on K2G SoC has a cut down
version of QMSS with less number of queues, internal linking ram
with lesser number of buffers etc. It doesn't have status and
explicit push register space as in QMSS available on other K2 SoCs.
So define reg indices specific to QMSS
The stats block in 2u cpsw hardware is similar to the one on nu
and hence handle it in a similar way by using a macro that includes
2u hardware as well.
Signed-off-by: Murali Karicheri
---
drivers/net/ethernet/ti/netcp_ethss.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/d
Driver currently uses macro for NU and XBE hardwrae, while other
places for older hardware such as that on K2H/K SoC (version 1.4
of the cpsw hardware, it explicitly check for the ss_version
inline. Add a new macro for version 1.4 and use it to customize
code in the driver. While at it also fix sim
The driver currently support only vlan priority zero. So map the
vlan priorities to zero flow in hardware.
Signed-off-by: Murali Karicheri
---
drivers/net/ethernet/ti/netcp_ethss.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/net/ethernet/ti/netcp_ethss.c
b/drivers/net/e
K2G SoC is another variant of Keystone family of SoCs. This patch
series add support for NetCP driver on this SoC. The QMSS found on
K2G SoC is a cut down version of the QMSS found on other keystone
devices with less number of queues, internal link ram etc. The patch
series has 2 patch sets that go
2u cpsw hardware on K2G uses sgmii link to interface with Phy. So add
support for this interface in the code so that drover can be re-used
for 2u hardware.
Signed-off-by: Murali Karicheri
---
drivers/net/ethernet/ti/netcp.h | 2 ++
drivers/net/ethernet/ti/netcp_ethss.c | 15 +++---
The net-next tree is closed, please resubmit this after the merge window and
the net-next tree is open back up again.
When trying to issue write_zeroes command against TARGET with a 4K block
size, it ends up hitting the following condition at __blkdev_issue_zeroout:
if ((sector | nr_sects) & bs_mask)
return -EINVAL;
Causing the command to always fail.
Considering we need to add 1 to get the
Thanks Keith. The patch you proposed worked fine!!
I just sent a V2 with that change!
On 04/02/2018 11:21 AM, Keith Busch wrote:
On Mon, Apr 02, 2018 at 10:47:10AM -0300, Rodrigo Rosatti Galvao wrote:
One thing that I just forgot to explain previously, but I think its
relevant:
1. The comman
On Mon, Apr 02, 2018 at 11:49:41AM -0300, Rodrigo R. Galvao wrote:
> When trying to issue write_zeroes command against TARGET with a 4K block
> size, it ends up hitting the following condition at __blkdev_issue_zeroout:
>
> if ((sector | nr_sects) & bs_mask)
> return -EINVAL;
On Sat, 2018-03-31 at 20:45 +0200, Ingo Molnar wrote:
> * Andy Shevchenko wrote:
>
> > On Sat, Mar 31, 2018 at 3:06 PM, Andy Shevchenko
> > wrote:
> > > On Sat, Mar 31, 2018 at 1:22 PM, Ingo Molnar
> > > wrote:
> > > > * Ingo Molnar wrote:
> > > > [tip:x86/urgent 14/14]
> > > > drivers/infin
Hi Ilia,
> diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm
> index 7f56fe5..71350e2 100644
> --- a/drivers/cpufreq/Kconfig.arm
> +++ b/drivers/cpufreq/Kconfig.arm
> @@ -134,6 +134,17 @@ config ARM_OMAP2PLUS_CPUFREQ
> depends on ARCH_OMAP2PLUS
> default ARCH_OMAP2
On Mon, 2018-04-02 at 14:45 +0300, Dan Carpenter wrote:
> On Sat, Mar 31, 2018 at 07:12:53AM -0700, Joe Perches wrote:
> > On Sat, 2018-03-31 at 11:41 +0300, Dan Carpenter wrote:
> > > On Fri, Mar 30, 2018 at 11:36:13PM -0700, Joe Perches wrote:
> > > > On Fri, 2018-03-30 at 23:07 -0700, Quytelda K
On Thu, Mar 22, 2018 at 10:27:56PM -0600, Gang He wrote:
> Hello David,
>
> Do you agree to add this prompt to the user?
> Since sometimes customers attempted to setup SCTP protocol with two rings,
> but they could not get the expected result, then it maybe bring some concerns
> to the customer
On Sun, 1 Apr 2018, Alan Cox wrote:
> >Restartable sequences are atomic with respect to preemption
> >(making it atomic with respect to other threads running on the
> >same CPU), as well as signal delivery (user-space execution
> >contexts nested over the s
On 04/02/2018 10:40 AM, David Miller wrote:
>
> The net-next tree is closed, please resubmit this after the merge window and
> the net-next tree is open back up again.
>
Ok. Will do. Thanks
--
Murali Karicheri
Linux Kernel, Keystone
On Wed, Mar 28, 2018 at 04:02:19PM +0200, Sebastian Reichel wrote:
> In case of the last two variants, the bus clock is provided by
> CPCAP, so it needs to be enabled for any audio stream. I suppose
> the codec <-> codec as part of TDM is out of scope for the graph
> card and we need a Droid 4 spe
From: Yazen Ghannam
This series adds decoding for the IA32/X64 Common Platform Error Record.
Patch 1 fixes the IA32/X64 Processor Error Section definition to match
the UEFI spec.
Patches 2-8 add the new decoding. The patches incrementally add the
decoding starting from the top-level "Error Sect
From: Yazen Ghannam
Print the fields in the IA32/X64 Processor Error Info Structure.
Based on UEFI 2.7 Table 253. IA32/X64 Processor Error Information
Structure.
Signed-off-by: Yazen Ghannam
---
Link:
https://lkml.kernel.org/r/20180324184940.19762-4-yazen.ghan...@amd.com
v3->v4:
* Drop INDENT
From: Yazen Ghannam
Recognize the IA32/X64 Processor Error Section.
Do the section decoding in a new "cper-x86.c" file and add this to the
Makefile depending on a new "UEFI_CPER_X86" config option.
Print the Local APIC ID and CPUID info from the Processor Error Record.
The "Processor Error Inf
From: Yazen Ghannam
For easier handling, match the known IA32/X64 error structure GUIDs to
enums.
Also, print out the name of the matching Error Structure Type.
Only print the GUID for unknown types.
GUIDs taken from UEFI 2.7 section N.2.4.2.1 IA32/X64 Processor Error
Information Structure.
S
From: Yazen Ghannam
The "Participation Type", "Time Out", and "Address Space" fields are
unique to the IA32/X64 Bus Check structure. Print these fields.
Based on UEFI 2.7 Table 256. IA32/X64 Bus Check Structure
Signed-off-by: Yazen Ghannam
---
Link:
https://lkml.kernel.org/r/20180324184940.197
From: Yazen Ghannam
Print the fields of the IA32/X64 Context Information structure.
Print the "Register Array" as raw values. Some context types are defined
in the UEFI spec, so more detailed decoded may be added in the future.
Based on UEFI 2.7 section N.2.4.2.2 IA32/X64 Processor Context
Info
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