Call rtc_nvmem_register instead of letting the core do it and stop using
the nvmem_config member of struct rtc_device.
Signed-off-by: Alexandre Belloni
---
drivers/rtc/rtc-m48t86.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/rtc/rtc-m48t86.c b/drivers/rtc/rtc-m4
The nvmem interface appaeared in linux 4.13
Signed-off-by: Alexandre Belloni
---
Documentation/ABI/testing/sysfs-class-rtc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/ABI/testing/sysfs-class-rtc
b/Documentation/ABI/testing/sysfs-class-rtc
index cf604128
This series makes some change to the RTC nvmem API to simplify drivers
and clean the way the nvmem_config is used.
The main issue was the different lifecycle of the struct nvmem_config
(only needed at probe time) and rtc_device (needed for the lifetime of
the driver).
Then, it converts the remain
To be able to remove nvmem_config from struct rtc_device, pass it as a
parameter to rtc_nvmem_register.
Signed-off-by: Alexandre Belloni
---
drivers/rtc/class.c| 2 +-
drivers/rtc/nvmem.c| 17 +
drivers/rtc/rtc-core.h | 6 --
3 files changed, 14 insertions(+), 11 de
Make rtc_nvmem_register return -EBUSY when an nvmem is already registered
for that RTC.
Signed-off-by: Alexandre Belloni
---
drivers/rtc/nvmem.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/rtc/nvmem.c b/drivers/rtc/nvmem.c
index 293df6db7c42..fd1c39a5ade5 100644
--- a/drivers/
On Tue, Feb 13, 2018 at 9:34 AM, Guenter Roeck wrote:
> If KEXEC_CORE is not enabled, PowerNV builds fail as follows.
>
> arch/powerpc/platforms/powernv/smp.c: In function 'pnv_smp_cpu_kill_self':
> arch/powerpc/platforms/powernv/smp.c:236:4: error:
> implicit declaration of function 'cras
On Mon, Feb 12, 2018 at 2:53 PM, Jeff Moyer wrote:
> Dave Jiang writes:
>
>> Re-enable deep flush so that users always have a way to be sure that a write
>> does make it all the way out to the NVDIMM. The PMEM driver writes always
>> make it "all the way to the NVDIMM", and it relies on the ADR m
The following commit:
commit aa4d86163e4e ("block: loop: switch to VFS ITER_BVEC")
replaced __do_lo_send_write(), which used ITER_KVEC iterators, with
lo_write_bvec() which uses ITER_BVEC iterators. In this change, though,
the WRITE flag was lost:
- iov_iter_kvec(&from, ITER_KVEC | WRITE,
On Mon, Feb 12, 2018 at 03:05:10PM -0800, Dan Williams wrote:
> On Mon, Feb 12, 2018 at 2:53 PM, Jeff Moyer wrote:
> > Dave Jiang writes:
> >
> >> Re-enable deep flush so that users always have a way to be sure that a
> >> write
> >> does make it all the way out to the NVDIMM. The PMEM driver wr
Hi Dave,
On 02/12/2018 11:51 AM, Dave Watson wrote:
> +static int gcmaes_encrypt_sg(struct aead_request *req, unsigned int assoclen,
> + u8 *hash_subkey, u8 *iv, void *aes_ctx)
>
> +static int gcmaes_decrypt_sg(struct aead_request *req, unsigned int assoclen,
> +
+ devicetree mail list
On 02/10/18 07:52, Enrico Weigelt, metux IT consult wrote:
> Hi folks,
>
> I've regularily have the task of configuring a kernel for a given DT.
> To make this a little bit easier, I'd like to do this automatically.
>
> The tuff task here is getting a mapping between dt co
Hi Enrico,
On 02/12/18 15:13, Frank Rowand wrote:
> + devicetree mail list
>
> On 02/10/18 07:52, Enrico Weigelt, metux IT consult wrote:
>> Hi folks,
>>
>> I've regularily have the task of configuring a kernel for a given DT.
>> To make this a little bit easier, I'd like to do this automatically
On Tue, Feb 13, 2018 at 10:01:57AM +1100, Balbir Singh wrote:
> On Tue, Feb 13, 2018 at 9:34 AM, Guenter Roeck wrote:
> > If KEXEC_CORE is not enabled, PowerNV builds fail as follows.
> >
> > arch/powerpc/platforms/powernv/smp.c: In function 'pnv_smp_cpu_kill_self':
> > arch/powerpc/platforms/powe
On Sun, Feb 4, 2018 at 7:05 AM, Igor Stoppa wrote:
> On 04/02/18 00:29, Boris Lukashev wrote:
>> On Sat, Feb 3, 2018 at 3:32 PM, Igor Stoppa wrote:
>
> [...]
>
>>> What you are suggesting, if I have understood it correctly, is that,
>>> when the pool is protected, the addresses already given out,
On Mon, Feb 12, 2018 at 8:52 AM, Igor Stoppa wrote:
> This patch-set introduces the possibility of protecting memory that has
> been allocated dynamically.
>
> The memory is managed in pools: when a memory pool is turned into R/O,
> all the memory that is part of it, will become R/O.
>
> A R/O poo
This patch allows the CoreSight AUX info section to fit topologies where
only a subset of all available CPUs are present, avoiding at the same time
accessing the ETM configuration areas of CPUs that have been offlined.
Signed-off-by: Mathieu Poirier
---
tools/perf/arch/arm/util/cs-etm.c | 51 +++
Linus Torvalds writes:
> And some maintainers end up using multiple repositories as branches
> (the old _original_ git model). Again, you can just use "git fetch +
> git reset", of course, but that's a bit unsafe. In contrast, doing
> "git pull --ff-only" is a safe convenient operation that does
Hi Guenter,
On Mon, Feb 12, 2018 at 02:37:01PM -0800, Guenter Roeck wrote:
> Since commit 60f481b970386 ("i40e: change flags to use 64 bits"),
> the i40e driver uses cmpxchg64(). This causes mips:allmodconfig builds
> to fail with
>
> drivers/net/ethernet/intel/i40e/i40e_ethtool.c:
> In fun
On Mon, Feb 12, 2018 at 8:53 AM, Igor Stoppa wrote:
> Add basic self-test functionality for pmalloc.
>
> Signed-off-by: Igor Stoppa
> ---
> mm/Kconfig| 9
> mm/Makefile | 1 +
> mm/pmalloc-selftest.c | 64
> +++
>
On many platforms, including, but not limited to Brahma-B53 platforms,
the L1 cache line size is 64bytes. Increasing the value to 128bytes
appears to be creating performance problems for workloads involving
network drivers and lots of data movement. In order to keep what was
introduced with 9730348
On 02/12/2018 07:24 AM, Kees Cook wrote:
> On Mon, Feb 12, 2018 at 6:39 AM, Masahiro Yamada
> wrote:
>>> (And in thinking about this, does Kconfig know the true $CC in use?
>>> i.e. the configured cross compiler, etc?)
>>
>> I was thinking of removing CONFIG_CROSS_COMPILE.
>>
>> A user can dynami
When 'back_to_sleep()' is passed as the 'timeout' function,
the effect is to wait indefinitely for the event, polling
once after the timeout.
If LWI_ON_SIGNAL_NOOP is given, then after the timeout
we allow fatal signals to interrupt the wait.
Make this more obvious in both places "back_to_sleep()"
This waiter currently wakes up every second to re-test if
imp_flight is zero. If we ensure wakeup is called whenever
imp_flight is decremented to zero, we can just have a simple
wait_event_idle_timeout().
So add a wake_up_all to the one place it is missing, and simplify
the wait_event.
Reviewed-
Two places that LWI_TIMEOUT_INTERVAL() is used, the outcome is a
simple polling loop that polls every second for some event (with a
limit).
So write a simple loop to make this more apparent.
Reviewed-by: James Simmons
Signed-off-by: NeilBrown
---
drivers/staging/lustre/lustre/llite/llite_lib.c
This use of l_wait_event() is a polling loop that re-checks
every second. Make this more obvious with a while loop
and wait_event_idle_timeout().
Reviewed-by: James Simmons
Signed-off-by: NeilBrown
---
drivers/staging/lustre/lustre/ptlrpc/niobuf.c | 15 ---
1 file changed, 8 inse
Rather an using l_wait_event(), use wait_event_idle_timeout()
with an explicit loop so it is easier to see what is happening.
Reviewed-by: James Simmons
Signed-off-by: NeilBrown
---
drivers/staging/lustre/lustre/ptlrpc/service.c | 15 ---
1 file changed, 8 insertions(+), 7 deletio
This l_wait_event_exclusive_head() will wait indefinitely
if the timeout is zero. If it does wait with a timeout
and times out, the timeout for next time is set to zero.
The can be mapped to a call to either
wait_event_idle_exclusive()
or
wait_event_idle_exclusive_timeout()
depending in the tim
This is the last remaining use of l_wait_event().
It is the only use of LWI_TIMEOUT_INTR_ALL() which
has a meaning that timeouts can be interrupted.
Only interrupts by "fatal" signals are allowed, so
introduce l_wait_event_abortable_timeout() to
support this.
Reviewed-by: James Simmons
Signed-off
replace l_wait_event() with wait_event_idle_timeout() and explicit
loop. This approach is easier to understand.
Reviewed-by: James Simmons
Signed-off-by: NeilBrown
---
drivers/staging/lustre/lustre/ptlrpc/client.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --g
We can replace l_wait_event() with
wait_event_idle_timeout() here providing we call the
timeout function when wait_event_idle_timeout() returns zero.
As ptlrpc_expired_set() returns 1, the l_wait_event() aborts of the
first timeout.
Reviewed-by: James Simmons
Signed-off-by: NeilBrown
---
drive
Replace l_wait_event with wait_event_idle_timeout() and call the
handler function explicitly. This makes it more clear
what is happening.
Reviewed-by: James Simmons
Signed-off-by: NeilBrown
---
drivers/staging/lustre/lustre/ptlrpc/sec.c | 34
1 file changed, 24 i
On Mon, Feb 12, 2018 at 8:52 AM, Igor Stoppa wrote:
> Introduce a set of macros for writing concise test cases for genalloc.
>
> The test cases are meant to provide regression testing, when working on
> new functionality for genalloc.
>
> Primarily they are meant to confirm that the various alloca
These macros are no longer used, so they can
be removed.
Reviewed-by: James Simmons
Signed-off-by: NeilBrown
---
drivers/staging/lustre/lustre/include/lustre_lib.h | 249
1 file changed, 249 deletions(-)
diff --git a/drivers/staging/lustre/lustre/include/lustre_lib.h
b/d
On Mon, Feb 12, 2018 at 8:52 AM, Igor Stoppa wrote:
> @@ -738,14 +1031,16 @@ EXPORT_SYMBOL(devm_gen_pool_create);
>
> #ifdef CONFIG_OF
> /**
> - * of_gen_pool_get - find a pool by phandle property
> + * of_gen_pool_get() - find a pool by phandle property
> * @np: device node
> * @propname: p
On 02/12/2018 05:45 PM, Florian Fainelli wrote:
+config ARM64_L1_CACHE_SHIFT
+ int
+ default 7 if ARM64_L1_CACHE_SHIFT_7
+ default 6
Shouldn't this be the other way around? Everyone is used to 7 now, so
you're changing the default back to 6. I would think that it should be
On Mon, Feb 12, 2018 at 11:42:02PM +, James Hogan wrote:
> Hi Guenter,
>
> On Mon, Feb 12, 2018 at 02:37:01PM -0800, Guenter Roeck wrote:
> > Since commit 60f481b970386 ("i40e: change flags to use 64 bits"),
> > the i40e driver uses cmpxchg64(). This causes mips:allmodconfig builds
> > to fail
On Mon, Feb 12 2018, Patrick Farrell wrote:
> It's worth noting that the change from -EINTR to -ERESTARTSYS will
> modify the behavior of userspace slightly. Specifically, when a
> signal handler is setup with retry set (SA_RESTART flag set), the
> syscall will be restarted rather than aborted.
On 02/12/2018 03:52 PM, Timur Tabi wrote:
> On 02/12/2018 05:45 PM, Florian Fainelli wrote:
>> +config ARM64_L1_CACHE_SHIFT
>> + int
>> + default 7 if ARM64_L1_CACHE_SHIFT_7
>> + default 6
>
> Shouldn't this be the other way around? Everyone is used to 7 now, so
> you're changing the def
From: Andi Kleen
An earlier patch moved the RSB filling out of line, ending
it with a return. This results in the return buffer filling
only giving 15 instead of 16 usable returns because
the return from fill_rsb already uses one up.
Since the kernel call chains can be quite deep that's
somewhat
From: Andi Kleen
objtool suggests to put intra function calls, like used in
stuff rsb, into alternative, but then starts warning about the
alternative section too. Avoid these warnings.
Needed for the next patch.
Signed-off-by: Andi Kleen
---
tools/objtool/check.c | 3 ++-
1 file changed, 2 i
Checkpatch.pl produced errors regarding inline keyword placement and
parenthesis around returned value in 'myid'.
Place inline after static keyword and remove mentioned parenthesis.
Signed-off-by: Maciek Fijalkowski
---
drivers/staging/rtl8723bs/include/drv_types.h | 4 ++--
1 file changed, 2 in
On 02/12/2018 05:57 PM, Florian Fainelli wrote:
That is debatable, is there a good publicly available table of what the
typical L1 cache line size is on ARMv8 platforms?
I don't have that, but I was under the impression that we moved from 6
to 7 because more and more ARMv8 platforms have 128-b
On Mon, Feb 12 2018, Patrick Farrell wrote:
> Neil,
>
> I didn't get anything after 8/19 in this series. Is this just me? (I'd keep
> waiting, except I also found a few things in this patch.)
Not just you. My fault. They are appearing now.
>
> Minor:
> The line XXX ALLOCATE is out of date a
On 02/12/2018 04:10 PM, Timur Tabi wrote:
> On 02/12/2018 05:57 PM, Florian Fainelli wrote:
>> That is debatable, is there a good publicly available table of what the
>> typical L1 cache line size is on ARMv8 platforms?
>
> I don't have that, but I was under the impression that we moved from 6
> t
Em Mon, 12 Feb 2018 15:42:44 -0800
Junio C Hamano escreveu:
> Linus Torvalds writes:
>
> > And some maintainers end up using multiple repositories as branches
> > (the old _original_ git model). Again, you can just use "git fetch +
> > git reset", of course, but that's a bit unsafe. In contrast
Both kernelcore= and movablecore= can be used to define the amount of
ZONE_NORMAL and ZONE_MOVABLE on a system, respectively. This requires
the system memory capacity to be known when specifying the command line,
however.
This introduces the ability to define both kernelcore= and movablecore=
as
mirrored_kernelcore can be in __meminitdata, so move it there.
At the same time, fixup section specifiers to be after the name of the
variable per checkpatch.
---
mm/page_alloc.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/mm/page_alloc.c b/mm/page_allo
On Sun, Feb 11, 2018 at 10:15:10PM -0800, Namhyung Kim wrote:
> On Mon, Feb 12, 2018 at 12:48:15PM +0800, Du, Changbin wrote:
> > Hi,
> >
> > On Mon, Feb 12, 2018 at 10:55:27AM +0900, Namhyung Kim wrote:
> > > Hello,
> > >
> > > On Thu, Feb 08, 2018 at 04:13:20PM +0800, changbin...@intel.com wrot
Thanks, I will improve this change in v2. And also update related docs.
On Mon, Feb 12, 2018 at 12:04:52PM -0500, Steven Rostedt wrote:
> On Sun, 11 Feb 2018 18:50:04 +0800
> "Du, Changbin" wrote:
>
> > Steve, How abount DEFINE_EVENT_PRINT as below?
>
> Yes, DEFINE_EVENT_PRINT is better.
>
> >
Hi,
On 03/02/18 15:49, Icenowy Zheng wrote:
> The Allwinner H6 SoC has two pin controllers, one main controller
> (called CPUX-PORT in user manual) and one controller in CPUs power
> domain (called CPUS-PORT in user manual).
Leaving aside that I don't like this approach of stashing yet another
pi
On 02/12/2018 03:27 PM, Kees Cook wrote:
On Sun, Feb 4, 2018 at 7:05 AM, Igor Stoppa wrote:
On 04/02/18 00:29, Boris Lukashev wrote:
On Sat, Feb 3, 2018 at 3:32 PM, Igor Stoppa wrote:
[...]
What you are suggesting, if I have understood it correctly, is that,
when the pool is protected, th
Hi Igor,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v4.16-rc1 next-20180212]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux
On Mon, 12 Feb 2018, Geert Uytterhoeven wrote:
> Since commit ad67b74d2469d9b8 ("printk: hash addresses printed with
> %p"), the virtual memory layout printed during boot up contains "ptrval"
> instead of actual addresses:
>
> Memory: 268040K/276480K available (2979K kernel code, 310K rwdata,
Following command lines will cause perf crash.
perf record -j call -g -a
perf report --branch-history
*** Error in `perf': double free or corruption (!prev): 0x104aa040 ***
=== Backtrace: =
/lib/x86_64-linux-gnu/libc.so.6(+0x77725)[0x7f6b37254725]
/lib/x86_64-linux-gnu/libc.s
Hi,
On Sun, Feb 11, 2018 at 10:28 PM, Rajendra Nayak wrote:
> Add a skeletal sdm845 SoC dtsi and MTP board dts/dtsi files
>
> Signed-off-by: Rajendra Nayak
> ---
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 13 ++
> arch/arm64/boot/dts/qcom/sdm
ashmem_mutex create a chain of dependencies like so:
(1)
mmap syscall ->
mmap_sem -> (acquired)
ashmem_mmap
ashmem_mutex (try to acquire)
(block)
(2)
llseek syscall ->
ashmem_llseek ->
ashmem_mutex -> (acquired)
inode_lock ->
inode->i_rwsem (try to acquire)
(block)
(3)
getden
On 02/12/2018 08:18 PM, Michal Hocko wrote:
> Did you have any chance to test the following hack, Anshuman?
The system has some issues at the moment, will get back on this.
This patchset introduces dedicated vCPUs(vCPU pinning, and there is no
vCPU over-commitment) hint KVM_HINTS_DEDICATED, it has two users now:
1) Waiman Long mentioned that:
Generally speaking, unfair lock performs well for VMs with a small
number of vCPUs. Native qspinlock may perform bet
From: Wanpeng Li
vCPUs are very unlikely to get preempted when they are the only task
running on a CPU. PV TLB flush is slower that the native flush in that
case. In addition, avoid traversing all the cpus for pv tlb flush when
steal time is disabled since pv tlb flush depends on the field in st
On Mon, Feb 12, 2018 at 04:04:22PM -0800, Andi Kleen wrote:
> From: Andi Kleen
>
> An earlier patch moved the RSB filling out of line, ending
> it with a return. This results in the return buffer filling
> only giving 15 instead of 16 usable returns because
> the return from fill_rsb already uses
From: Wanpeng Li
This patch introduces dedicated vCPUs(vCPU pinning, and there is
no vCPU over-commitment) hint KVM_HINTS_DEDICATED, guest checks
this feature bit to determine if they run on dedicated vCPUs,
allowing optimizations.
Cc: Paolo Bonzini
Cc: Radim Krčmář
Cc: Eduardo Habkost
Sig
From: Wanpeng Li
Waiman Long mentioned that:
Generally speaking, unfair lock performs well for VMs with a small
number of vCPUs. Native qspinlock may perform better than pvqspinlock
if there is vCPU pinning and there is no vCPU over-commitment.
This patch uses a KVM_HINTS_DEDICATED performan
2018-02-12 22:12 GMT+08:00 Eduardo Habkost :
> On Sun, Feb 11, 2018 at 11:29:44AM +0800, Wanpeng Li wrote:
> [...]
>> +KVM_HINTS_DEDICATED|| 0 || guest checks this feature bit
>> + || || to determine if they run on
>> dedicated
>> +
On Mon 12 Feb 03:03 PST 2018, Amit Kucheria wrote:
> The APCS block is present on several Qualcomm SoCs e.g. 8916, 8996. On the
> 8916 it is needed to enable the clock controller that in turn enables
> cpufreq on the platform while on the 8996 it is needed for communication
> with RPM.
>
Acked-
On 2018/2/12 20:53, Miguel Ojeda wrote:
> On Tue, Jan 16, 2018 at 10:38 AM, Xiongfeng Wang
> wrote:
>> From: Xiongfeng Wang
>>
>> gcc-8 reports
>>
>> drivers/auxdisplay/panel.c: In function 'panel_attach':
>> ./include/linux/string.h:245:9: warning: '__builtin_strncpy' specified
>> bound 12 equ
On Mon, 12 Feb 2018, Laura Abbott wrote:
> On 02/09/2018 10:21 PM, Liam Mark wrote:
> > The ION begin_cpu_access and end_cpu_access functions use the
> > dma_sync_sg_for_cpu and dma_sync_sg_for_device APIs to perform cache
> > maintenance.
> >
> > Currently it is possible to apply cache maintenan
> -Original Message-
> From: Sudeep Holla [mailto:sudeep.ho...@arm.com]
> Sent: Monday, February 12, 2018 9:29 PM
> To: Gaku Inami ; gre...@linuxfoundation.org;
> linux-kernel@vger.kernel.org
> Cc: Sudeep Holla ; dietmar.eggem...@arm.com;
> juri.le...@redhat.com;
> psoda...@codeaurora.org
From: Randy Dunlap
lib/test_firmware.c has build errors on some $ARCH due to a
missing header file, so add it.
lib/test_firmware.c:134:2: error: implicit declaration of function 'vfree'
[-Werror=implicit-function-declaration]
lib/test_firmware.c:620:25: error: implicit declaration of functi
On Mon, Feb 12, 2018 at 4:40 PM, Laura Abbott wrote:
> On 02/12/2018 03:27 PM, Kees Cook wrote:
>>
>> On Sun, Feb 4, 2018 at 7:05 AM, Igor Stoppa
>> wrote:
>>>
>>> On 04/02/18 00:29, Boris Lukashev wrote:
On Sat, Feb 3, 2018 at 3:32 PM, Igor Stoppa
wrote:
>>>
>>>
>>> [...]
>>>
>>>
On 12.02.2018 19:21, Philipp Rossak wrote:
Hey,
When I try to boot my A31s (Bananapi M2) u-boot is showing only Starting
kernel ... . After enabling the earlyprintk I could capture this log: [1].
After reverting those 5 commits from Chen-Yu I was able to boot again:
clk: sunxi-ng: Support
From: Randy Dunlap
security/integrity/digsig.c has build errors on some $ARCH due to a
missing header file, so add it.
security/integrity/digsig.c:146:2: error: implicit declaration of function
'vfree' [-Werror=implicit-function-declaration]
Reported-by: Michael Ellerman
Signed-off-by: Rand
A 2MB shared memory region is used on MSM8996 for exchanging sector data
in rmtfs. Add this chunk of reserved memory now that we have the
rmtfs-mem compatible to describe it and its memory protection
properties.
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 11 ++
On some platform the remote processor's memory map is not statically
configured in TrustZone, so each memory region that is to be accessed by
the remote needs a call into TrustZone to set up the remote's
permissions.
Implement this for the rmtfs memory driver, to give the modem on 8996
access to t
On Sun, Feb 11, 2018 at 12:51:48PM +0100, Ingo Molnar wrote:
>
> * Paul E. McKenney wrote:
>
> > On Sat, Feb 10, 2018 at 08:46:25AM +0900, Akira Yokosawa wrote:
> > > >From 7c1f497a9a51e8db1a94c8a7ef0b74b235aaab88 Mon Sep 17 00:00:00 2001
> > > From: Akira Yokosawa
> > > Date: Fri, 9 Feb 2018 0
Hi Sagi
Thanks for your kindly response.
On 02/13/2018 02:37 AM, Sagi Grimberg wrote:
>
>> nvme cq irq is freed based on queue_count. When the sq/cq creation
>> fails, irq will not be setup. free_irq will warn 'Try to free
>> already-free irq'.
>>
>> To fix it, we only increase online_queues whe
2018-02-13 8:48 GMT+09:00 Randy Dunlap :
> On 02/12/2018 07:24 AM, Kees Cook wrote:
>> On Mon, Feb 12, 2018 at 6:39 AM, Masahiro Yamada
>> wrote:
>
(And in thinking about this, does Kconfig know the true $CC in use?
i.e. the configured cross compiler, etc?)
>>>
>>> I was thinking of remo
From: Huang Ying
When the swapin is performed, after getting the swap entry information
from the page table, system will swap in the swap entry, without any
lock held to prevent the swap device from being swapoff. This may
cause the race like below,
CPU 1 CPU 2
-
Thanks Guenter,
I actually got a similar report a few days ago and prepared the same
patch as part of the dma-mapping fixup series I'm about to send out:
http://git.infradead.org/users/hch/misc.git/commitdiff/f9f787e3fe227329d27768566e925e4d94c5f517
On Mon, Feb 12, 2018 at 10:52:46PM +0200, Meelis Roos wrote:
> I tested 4.16-rc1 on my PowerMac G4 and got the following warning from
> macio pata driver. Since pata-macio has no recent changes, dma-mapping.h
> changes seem to be related.
Thje are, as they add just that warning. But the root ca
Hi all,
After merging the sound-asoc tree, today's linux-next build (x86_64
allmodconfig) produced this warning:
sound/soc/codecs/wm9081.c: In function 'wm9081_digital_mute':
sound/soc/codecs/wm9081.c:1161:7: warning: 'reg' may be used uninitialized in
this function [-Wmaybe-uninitialized]
re
Hi Keith andn Sagi
Thanks for your kindly response and comment on this.
On 02/13/2018 03:15 AM, Keith Busch wrote:
> On Mon, Feb 12, 2018 at 08:43:58PM +0200, Sagi Grimberg wrote:
>>
>>> Currently, we will unquiesce the queues after the controller is
>>> shutdown to avoid residual requests to be
On 02/12/2018 05:44 PM, Christoph Hellwig wrote:
Thanks Guenter,
I actually got a similar report a few days ago and prepared the same
patch as part of the dma-mapping fixup series I'm about to send out:
http://git.infradead.org/users/hch/misc.git/commitdiff/f9f787e3fe227329d27768566e92
On 02/12/2018 05:41 PM, Masahiro Yamada wrote:
> 2018-02-13 8:48 GMT+09:00 Randy Dunlap :
>> On 02/12/2018 07:24 AM, Kees Cook wrote:
>>> On Mon, Feb 12, 2018 at 6:39 AM, Masahiro Yamada
>>> wrote:
>>
> (And in thinking about this, does Kconfig know the true $CC in use?
> i.e. the configur
Hi Brendan,
On Tue, Feb 13, 2018 at 7:28 AM, Brendan Higgins
wrote:
> Enable low-level debug support for Nuvoton NPCM7XX family by adding the
> debug port definitions for the SoC.
When playing with the Poleg boards at the recent OpenBMC hackathon
Jeremy discovered that the UART is a normal-ish 8
This reverts commit 452562abb5b7 ("base: arch_topology: fix section
mismatch build warnings"). It causes the notifier call hangs in some
use-cases.
In some cases with using maxcpus, some of cpus are booted first and
then the remaining cpus are booted. As an example, some users who want
to realize
Hi Keerthy,
On 01/09/2018 12:23 AM, J, KEERTHY wrote:
> The header file is currently under plat-omap directory
> under arch/omap. Move this out to an accessible place.
>
> No Code changes done to the header file.
>
> Signed-off-by: Keerthy
> Reviewed-by: Sebastian Reichel
> Tested-by: Ladislav
On Mon, 12 Feb 2018, Juergen Gross wrote:
> On 05/02/18 23:51, Stefano Stabellini wrote:
> > Passive sockets can have ongoing operations on them, specifically, we
> > have two wait_event_interruptable calls in pvcalls_front_accept.
> >
> > Add two wake_up calls in pvcalls_front_release, then wait
On Mon, 12 Feb 2018, Juergen Gross wrote:
> On 05/02/18 23:51, Stefano Stabellini wrote:
> > Introduce a per sock_mapping refcount, in addition to the existing
> > global refcount. Thanks to the sock_mapping refcount, we can safely wait
> > for it to be 1 in pvcalls_front_release before freeing an
On Thu, 08 Feb 2018 14:54:46 PST (-0800), ulfali...@gmail.com wrote:
The RISCV_IRQ_INTC configuration symbol is undefined, but RISCV selects
it. Quoting Palmer Dabbelt:
It looks like this slipped through, the symbol has been renamed
RISCV_INTC.
No RISCV_INTC configuration symbol
On Mon, Feb 12, 2018 at 5:59 PM, Joel Stanley wrote:
> Hi Brendan,
>
> On Tue, Feb 13, 2018 at 7:28 AM, Brendan Higgins
> wrote:
>> Enable low-level debug support for Nuvoton NPCM7XX family by adding the
>> debug port definitions for the SoC.
>
> When playing with the Poleg boards at the recent O
Hi all,
this small series introduces a per socket refcount to increase the
efficiency on socket release operations, and makes releasing passive
sockets safe.
Cheers,
Stefano
Changes in v2:
- add acked-by
- fix check in pvcalls_enter_soc
- fix code style
- nicer checks in pvcalls_front_release
Passive sockets can have ongoing operations on them, specifically, we
have two wait_event_interruptable calls in pvcalls_front_accept.
Add two wake_up calls in pvcalls_front_release, then wait for the
potential waiters to return and release the sock_mapping refcount.
Signed-off-by: Stefano Stabel
Introduce a per sock_mapping refcount, in addition to the existing
global refcount. Thanks to the sock_mapping refcount, we can safely wait
for it to be 1 in pvcalls_front_release before freeing an active socket,
instead of waiting for the global refcount to be 1.
Signed-off-by: Stefano Stabellini
| 15 ---
> 1 file changed, 12 insertions(+), 3 deletions(-)
>
> Applies to mainline 4.16-rc1.
>
> --- linux-next-20180212.orig/fs/signalfd.c
> +++ linux-next-20180212/fs/signalfd.c
> @@ -118,13 +118,22 @@ static int signalfd_copyinfo(struct sign
>
;
> Do you want to me to pick this one up? Or does it have another path
> into mainline?
>
Just via you or Al. You might as well take it.
Thanks.
>
>> ---
>> fs/signalfd.c | 15 ++++---
>> 1 file changed, 12 insertions(+), 3 deletions(-)
>>
&
Hi Keerthy,
On 01/09/2018 12:23 AM, J, KEERTHY wrote:
> Move the dmtimer driver out of plat-omap to clocksource.
> So that non-omap devices also could use this.
What non-omap devices do you have in mind? I don't think this driver is
ready for that yet. It still has a lot of OMAP dependencies. So
Hi,
On Mon, Jan 08, 2018 at 10:44:16AM +0100, Hans de Goede wrote:
> Commit 7d06d5895c15 ("Revert "Bluetooth: btusb: fix QCA...suspend/resume"")
> removed the setting of the BTUSB_RESET_RESUME quirk for QCA Rome devices,
> instead favoring adding USB_QUIRK_RESET_RESUME quirks in usb/core/quirks.c.
On Tue, Feb 13, 2018 at 5:07 AM, Philipp Rossak wrote:
> This patch fixes a bug, that prevents the Allwinner A83T and the A80
> from a successful boot. You can find the shortend trace below:
>
> Unable to handle kernel NULL pointer dereference at virtual address
>
> pgd = (ptrval)
> [
Hi Igor,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v4.16-rc1 next-20180212]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux
Hi Baoquan,
At 02/12/2018 11:08 AM, Eric W. Biederman wrote:
Baoquan He writes:
This is a regression fix.
Before, to fix erratum AVR31, commit 522e66464467 ("x86/apic: Disable
I/O APIC before shutdown of the local APIC") moved lapic_shutdown()
calling after disable_IO_APIC(). This introdued
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