Hey,
Since we've added support for IFLA_IF_NETNSID for RTM_{DEL,GET,SET,NEW}LINK
it is possible for userspace to send us requests with three different
properties to identify a target network namespace. This affects at least
RTM_{NEW,SET}LINK. Each of them could potentially refer to a different
net
Since we've added support for IFLA_IF_NETNSID for RTM_{DEL,GET,SET,NEW}LINK
it is possible for userspace to send us requests with three different
properties to identify a target network namespace. This affects at least
RTM_{NEW,SET}LINK. Each of them could potentially refer to a different
network n
On Wed, Feb 07, 2018 at 01:29:45PM +0100, Linus Walleij wrote:
> On Mon, Jan 22, 2018 at 6:04 AM, Jonathan Neuschäfer
> wrote:
>
> > The Nintendo Wii's chipset (called "Hollywood") has a GPIO controller
> > that supports a configurable number of pins (up to 32), interrupts, and
> > some special m
On Sun, Jan 21, 2018 at 9:32 PM, David Lechner wrote:
> This suppresses printing an error message during probe of gpio drivers
> when the error is EPROBE_DEFER.
>
> Cc: Linus Walleij
> Signed-off-by: David Lechner
I'm not sure about this.
GPIO can be very basic system components. If we don't
On Mon, Feb 5, 2018 at 8:16 PM, Georgi Djakov wrote:
> Add a CPU OPP table to allow CPU frequency scaling on msm8916 platforms.
>
> Signed-off-by: Georgi Djakov
For this series, please feel free to add my
Reviewed-by: Amit Kucheria
Tested-by: Amit Kucheria
It enables basic cpufreq on the DB4
The patchset does some ground work for MKTME enabling:
- Adds two new cpufeatures: TME and PCONFIG;
- Detects if BIOS enabled TME and MKTME;
- Enumerates what PCONFIG targets are supported;
- Provides helper to program encryption keys into CPU;
As part of TME enumeration we check of how ma
Intel PCONFIG targets are enumerated via new CPUID leaf 0x1b. This patch
detects all supported targets of PCONFIG and implements helper to check
if the target is supported.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/include/asm/intel_pconfig.h | 15 +++
arch/x86/kernel/cpu/Makefile
CPUID.0x7.0x0:EDX[18] indicates whether Intel CPU support PCONFIG instruction.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/include/asm/cpufeatures.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/include/asm/cpufeatures.h
b/arch/x86/include/asm/cpufeatures.h
index d3702d9ac012.
MKTME_KEY_PROG allows to manipulate MKTME keys in the CPU.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/include/asm/intel_pconfig.h | 50
1 file changed, 50 insertions(+)
diff --git a/arch/x86/include/asm/intel_pconfig.h
b/arch/x86/include/asm/intel_pconf
IA32_TME_ACTIVATE MSR (0x982) can be used to check if BIOS has enabled
TME and MKTME. It includes which encryption policy/algorithm is selected
for TME or available for MKTME. For MKTME, the MSR also enumerates how
many KeyIDs are available.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/kernel/
CPUID.0x7.0x0:ECX[13] indicates whether CPU supports Intel Total Memory
Encryption.
Signed-off-by: Kirill A. Shutemov
---
arch/x86/include/asm/cpufeatures.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/include/asm/cpufeatures.h
b/arch/x86/include/asm/cpufeatures.h
index 14c3aa2b
On Mon, Jan 22, 2018 at 12:09 AM, David Lechner wrote:
> This adds support for the pinmux gpio ranges feature to the DaVinci gpio
> driver. Only device tree is supported since the non-DT boards don't
> use a generic pinmux controller.
>
> Cc: Keerthy
> Cc: Linus Walleij
> Signed-off-by: David L
On Tue, 2018-02-06 at 20:48 +0300, Konstantin Khlebnikov wrote:
> On Tue, Feb 6, 2018 at 7:45 PM, David Woodhouse wrote:
> >
> > The documentation for ignore_rlimit_data says that it will print a warning
> > at first misuse. Yet it doesn't seem to do that. Fix the code to print
> > the warning
On 02/07/2018 12:24 PM, Chanwoo Choi wrote:
> Could you share your equation?
> because your result is a little bit different of my result.
> - my equation : ((mdiv + kdiv/65535) x 24MHz) / (pdiv x POWER(2,sdiv))
It resembles the code from samsung_pll36xx_recalc_rate():
(24 * 10^6 * (M * 2^16 + K)
On Wed, 2018-02-07 at 10:21 +0100, Miklos Szeredi wrote:
> On Tue, Jan 30, 2018 at 7:06 PM, Dongsu Park wrote:
> > From: Alban Crequy
> >
> > This new fs_type flag FS_IMA_NO_CACHE means files should be re-measured,
> > re-appraised and re-audited each time. Cached integrity results should
> > not
On Wednesday 07 February 2018 12:15 AM, Bartosz Golaszewski wrote:
> 2018-02-06 19:25 GMT+01:00 David Lechner :
>> On 02/06/2018 12:16 PM, David Lechner wrote:
>>>
>>> On 02/06/2018 07:51 AM, Sekhar Nori wrote:
On Tuesday 06 February 2018 06:38 PM, Bartosz Golaszewski wrote:
>
> 2
> -Original Message-
> From: Pali Rohár [mailto:pali.ro...@gmail.com]
> Sent: Wednesday, February 7, 2018 3:55 AM
> To: Rafael J. Wysocki
> Cc: Andy Shevchenko ; Limonciello, Mario
> ; andriy.shevche...@linux.intel.com;
> dvh...@infradead.org; platform-driver-...@vger.kernel.org;
> acelan.
This patchset depends on "crypto: engine - Permit to enqueue all async requests"
proposed by Corentin Labbe [https://lkml.org/lkml/2018/1/26/608].
stm32-cryp uses this updated crpyto engine to handle AEAD cipher algortihms.
Fabien Dessenne (2):
crypto: stm32/cryp - add aes gcm / ccm support
cr
Add AEAD cipher algorithms for aes gcm and ccm.
Signed-off-by: Fabien Dessenne
---
drivers/crypto/stm32/stm32-cryp.c | 931 --
1 file changed, 902 insertions(+), 29 deletions(-)
diff --git a/drivers/crypto/stm32/stm32-cryp.c
b/drivers/crypto/stm32/stm32-cryp
On Mon, Jan 22, 2018 at 5:05 PM, Andy Shevchenko
wrote:
> The DEFINE_SHOW_ATTRIBUTE() helper macro would be useful for current
> users, which are many of them, and for new comers to decrease code
> duplication.
>
> Signed-off-by: Andy Shevchenko
Obviously a good idea.
Reviewed-by: Linus Walleij
stm32mp1 differs from stm32f7 in the way it handles byte ordering and
padding for aes gcm & ccm algo.
Signed-off-by: Fabien Dessenne
---
drivers/crypto/stm32/stm32-cryp.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/crypto/stm32/stm32-cryp.c
b/drivers/crypto/stm32/stm32-cry
On Wed, Feb 07, 2018 at 11:52:01AM +0100, Artem Savkov wrote:
> On Wed, Feb 07, 2018 at 10:56:59AM +0100, Corentin Labbe wrote:
> > On Tue, Feb 06, 2018 at 10:20:21PM +0100, Artem Savkov wrote:
> > > According to crypto/rng.h generate function should return 0 on success
> > > and < 0 on error.
> >
Patchset contains documentation for two acpi drivers- dock and dptf. Description
was collected from git history and reading through code. This might be useful
for tracking changes in the ABI.
Aishwarya Pant (2):
acpi/dptf: document sysfs atttributes
acpi/dock: document sysfs interface
.../AB
The descriptions have been collected from git commit logs and reading
through code.
Signed-off-by: Aishwarya Pant
---
Documentation/ABI/testing/sysfs-platform-dptf | 30 +++
1 file changed, 30 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-platform-dptf
Description has been collected from git commit history and reading
through code.
Signed-off-by: Aishwarya Pant
---
.../ABI/testing/sysfs-devices-platform-dock| 38 ++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-devices-platform
On Wed, 2018-02-07 at 13:08 +, mario.limoncie...@dell.com wrote:
> > -Original Message-
> > From: Pali Rohár [mailto:pali.ro...@gmail.com]
> > Sent: Wednesday, February 7, 2018 3:55 AM
> > To: Rafael J. Wysocki
> > Cc: Andy Shevchenko ; Limonciello, Mario
> > ; andriy.shevche...@linux.
On 07.02.2018 15:53, Christian Brauner wrote:
> Since we've added support for IFLA_IF_NETNSID for RTM_{DEL,GET,SET,NEW}LINK
> it is possible for userspace to send us requests with three different
> properties to identify a target network namespace. This affects at least
> RTM_{NEW,SET}LINK. Each
On Saturday 20 January 2018 10:44 PM, David Lechner wrote:
> This switches ARCH_DAVINCI to use the common clock framework. The legacy
> clock code in arch/arm/mach-davinci/ is no longer used. New drivers in
> drivers/clk/davinci/ are used instead.
>
> A few macros had to be moved to prevent compil
From: Colin Ian King
The functions rts5260_get_ocpstat, rts5260_get_ocpstat2,
rts5260_clear_ocpstat, rts5260_process_ocp, rts5260_init_hw and
rts5260_set_aspm are local to the source and do not need to be
in global scope, so make them static.
Cleans up sparse warnings:
symbol 'rts5260_get_ocpsta
On 07/02/18 12:34, Dave Martin wrote:
On Wed, Feb 07, 2018 at 11:41:17AM +, Suzuki K Poulose wrote:
On 07/02/18 10:40, Dave Martin wrote:
...
To summarise, I can add LOR/HPD changes. But the others requires a bit more
work and can be done as a separate series.
I've wondered in the past
On Saturday 20 January 2018 10:44 PM, David Lechner wrote:
> This removes the unused legacy clock init code from
> arch/arm/mach-davinci/da830.c.
>
> Signed-off-by: David Lechner
Reviewed-by: Sekhar Nori
Thanks,
Sekhar
On Wed, Feb 07, 2018 at 05:03:19AM +0200, Ivan Khoronzhuk wrote:
> On Tue, Feb 06, 2018 at 07:17:06PM -0600, Grygorii Strashko wrote:
> > It was discovered that simple program which indefinitely sends 200b UDP
> > packets and runs on TI AM574x SoC (SMP) under RT Kernel triggers network
> > watchdog
Hi Stephen,
nice work!
On Fri, Jan 26, 2018 at 2:13 AM, Stephen Boyd wrote:
> For now, we plumb this into the gpiochip irq APIs so that
> GPIO/pinctrl drivers can use the gpiochip_irqchip_irq_valid() to
> test validity of GPIOs.
But is that the right thing to do, given that we just took the
tr
Update cpuidle documentation using git logs and existing documentation
in Documentation/cpuidle/sysfs.txt. This might be useful for scripting
and tracking changes in the ABI.
Signed-off-by: Aishwarya Pant
---
Changes in v5:
- Update contact information- LKML -> power management mailing list
v4:
-
On Wed, Feb 07, 2018 at 04:20:01PM +0300, Kirill Tkhai wrote:
>
>
> On 07.02.2018 15:53, Christian Brauner wrote:
> > Since we've added support for IFLA_IF_NETNSID for RTM_{DEL,GET,SET,NEW}LINK
> > it is possible for userspace to send us requests with three different
> > properties to identify a
On Saturday 20 January 2018 10:44 PM, David Lechner wrote:
> This removes the unused legacy clock init code from
> arch/arm/mach-davinci/da850.c.
>
> Signed-off-by: David Lechner
Reviewed-by: Sekhar Nori
Thanks,
Sekhar
ts-and-its-users/20180207-195707
in testcase: boot
on test machine: qemu-system-x86_64 -enable-kvm -m 512M
caused below changes (please refer to attached dmesg/kmsg for entire
log
On Saturday 20 January 2018 10:44 PM, David Lechner wrote:
> This removes the unused legacy clock init code from
> arch/arm/mach-davinci/dm355.c.
>
> Signed-off-by: David Lechner
Reviewed-by: Sekhar Nori
Thanks,
Sekhar
ts-and-its-users/20180207-195707
in testcase: boot
on test machine: qemu-system-x86_64 -enable-kvm -m 512M
caused below changes (please refer to attached dmesg/kmsg for entire
log
On Saturday 20 January 2018 10:44 PM, David Lechner wrote:
> This removes the unused legacy clock init code from
> arch/arm/mach-davinci/dm365.c.
>
> Signed-off-by: David Lechner
Reviewed-by: Sekhar Nori
Thanks,
Sekhar
From: Bartosz Golaszewski
Automatically select the genpd framework in DT mode.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/mach-davinci/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index da8a039d65f9..cb5dd239e375
From: Bartosz Golaszewski
Make all devices managed by PSCs use the genpd driver.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/boot/dts/da850.dtsi | 33 +
1 file changed, 33 insertions(+)
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/arm/boot/dts/da850.dts
From: Bartosz Golaszewski
As the first step in switching to using the genpd driver in DT mode,
check if a relevant genpd node exists and don't setup the clock pm in
this case.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/mach-davinci/pm_domain.c | 9 -
1 file changed, 8 insertions(+
From: Bartosz Golaszewski
Hi Sekhar et al,
please take a look at the following patches. They add a simple genpd
driver and use it in DT mode on da850 boards.
I was trying to use genpd in legacy mode too, but couldn't find neither
any interfaces nor users that would do that. For now I added a ch
From: Bartosz Golaszewski
We can now use the generic power domains driver in DT mode. Reflect
that in the defconfig.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/configs/davinci_all_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/davinci_all_defconfig
b/arc
From: Bartosz Golaszewski
Add two power controller nodes corresponding with the two PSC modules
present on the da850 SoC.
Signed-off-by: Bartosz Golaszewski
---
arch/arm/boot/dts/da850.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/da850.dtsi b/arch/a
Darren, I have checked change on git.kernel.org and it seems to be merged twice:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/platform/x86/dell-laptop.c?id=fe486138788ba435ffa918c8d7aba05a77b6289a
How it can be fixed?
2018-01-26 17:42 GMT+03:00 :
>
> > -Or
From: Bartosz Golaszewski
Add a simple clock_pm-based driver for DaVinci SoCs. This is required
to complete the transision to using the common clock framework for this
architecture.
Signed-off-by: Bartosz Golaszewski
---
drivers/soc/Kconfig | 1 +
drivers/soc/Makefile
From: Bartosz Golaszewski
Add a simple document for the DaVinci genpd driver. We use clock pm
exclusively hence no reg property.
Signed-off-by: Bartosz Golaszewski
---
.../devicetree/bindings/soc/ti,davinci-pm-domains.txt | 13 +
1 file changed, 13 insertions(+)
create mode
On Saturday 20 January 2018 10:44 PM, David Lechner wrote:
> This removes the unused legacy clock init code from
> arch/arm/mach-davinci/dm644x.c.
>
> Signed-off-by: David Lechner
Reviewed-by: Sekhar Nori
Thanks,
Sekhar
Hi Linus,
This, due to dependencies, is sent separately since affected changes
wasn't in your tree yet. The rationale of doing this now is to allow use of
new macro in v4.17 cycle in a conflictless manner.
Thanks,
With Best Regards,
Andy Shevchenko
The following changes since commit a2e5790d841
On Mon, Jan 29, 2018 at 1:59 AM, Bjorn Andersson
wrote:
> The base of the TLMM gpiochip should not be statically defined as 0, fix
> this to not artificially restrict the existence of multiple pinctrl-msm
> devices.
>
> Fixes: f365be092572 ("pinctrl: Add Qualcomm TLMM driver")
> Reported-by: Timu
On 2/7/2018 7:59 AM, Li Wang wrote:
Hi Kernel-developers,
The flowing call trace was catch from kernel-v4.15, could anyone help
to analysis the cpuidle problem?
or, if you need any more detail info pls let me know.
Test Env:
IBM KVM Guest on ibm-p8-kvm-03
POWER8E (raw), altivec supported
9216 M
On Wed, 7 Feb 2018 14:36:21 +0100, Christian Brauner wrote:
> On Wed, Feb 07, 2018 at 04:20:01PM +0300, Kirill Tkhai wrote:
> > Can't we write these 3 above branches more compact? Something like this:
> >
> > if (!!tb[IFLA_NET_NS_FD] + !!tb[IFLA_IF_NETNSID] +
> > !!tb[IFLA_NET_NS_PID] <= 1)
>
On Thu, Feb 1, 2018 at 10:34 AM, Ludovic Desroches
wrote:
> Use GPIO descriptors instead of relying on the old method.
> Include irq.h header since it is needed and was indirectly
> included through of_gpio.h.
>
> Signed-off-by: Ludovic Desroches
Reviewed-by: Linus Walleij
Thank you for doing
On Tue, Feb 6, 2018 at 8:16 PM, Kees Cook wrote:
> On Wed, Feb 7, 2018 at 4:33 AM, Dmitry Vyukov wrote:
>> On Tue, Feb 6, 2018 at 6:31 PM, syzbot
>> wrote:
>>> Hello,
>>>
>>> syzbot hit the following crash on upstream commit
>>> e237f98a9c134c3d600353f21e07db915516875b (Mon Feb 5 21:35:56 2018 +
Hi,
These patches add support for using perf inject to generate branch events,
instruction events and branch stacks from CoreSight ETM traces.
They apply to linus's tree with the memory cleanup fix from
https://lkml.org/lkml/2018/1/25/432
Regards
Rob Walker
Robert Walker (2):
perf tools: inj
On Wed, 7 Feb 2018 00:31:04 -0800
"Paul E. McKenney" wrote:
> I see problems. We would then have two different names for exactly the
> same thing.
>
> Seems like it would be a lot easier to simply document the existing
> kfree_rcu() behavior, especially given that it apparently already works.
>
Hi,
These patches add support for using perf inject to generate branch events,
instruction events and branch stacks from CoreSight ETM traces.
They apply to linus's tree with the memory cleanup fix from
https://lkml.org/lkml/2018/1/25/432
Regards
Rob Walker
Robert Walker (2):
perf tools: inj
There may be discontinuities in the ETM trace stream due to overflows or
ETM configuration for selective trace. This patch emits an instruction
sample with the pending branch stack when a TRACE ON packet occurs
indicating a discontinuity in the trace data.
A new packet type CS_ETM_TRACE_ON is add
Added user space perf functionality to translate CoreSight traces into
instruction events with branch stack.
To invoke the new functionality, use the perf inject
tool with --itrace=il. For example, to translate the ETM trace from
perf.data into last branch records in a new inj.data file:
$ pe
On Tue, 05 Dec, at 01:09:07PM, Atish Patra wrote:
> Currently, multiple tasks can wakeup on same cpu from
> select_idle_sibiling() path in case they wakeup simulatenously
> and last ran on the same llc. This happens because an idle cpu
> is not updated until idle task is scheduled out. Any task wak
On Wed, Feb 07, 2018 at 10:20:58AM +0100, Rafael J. Wysocki wrote:
> On Tuesday, February 6, 2018 7:26:17 PM CET Ville Syrjälä wrote:
> > On Tue, Feb 06, 2018 at 07:02:58PM +0100, Rafael J. Wysocki wrote:
> > > From: Rafael J. Wysocki
> > >
> > > Update the APM driver overlooked by commit 1b39e3f
On Wed, Feb 7, 2018 at 1:48 PM, Alexandre Belloni
wrote:
> On 07/02/2018 at 11:33:55 +0100, Arnd Bergmann wrote:
>> On Wed, Feb 7, 2018 at 2:55 AM, Alexandre Belloni
>> >> $ cat /proc/driver/nvram
>> >> Checksum status: valid
>> >> # floppies : 0
>> >> Floppy 0 type : none
>> >> Floppy 1 typ
On 02/07/2018 07:18 AM, Steven Rostedt wrote:
> On Sun, 4 Feb 2018 11:20:13 +0800
> szts...@gmail.com wrote:
>
>> From: Zamir SUN
>>
>> The current detection for swig will cause output to be
>> /usr/bin/swig
>> y
>> So this will never be equal to y. With this patch, the swig path is
>> removed
Hello Borislav,
On Fri, 2018-01-26 at 15:49 +0100, Borislav Petkov wrote:
> On Fri, Jan 26, 2018 at 02:50:00PM +0100, Petr Oros wrote:
> > But what in production? Edit boot params, restart server, grep
> > /proc/cpuinfo and
> > restart again? Why i can not read it just from dmesg?
>
> Because you
On Wed, 7 Feb 2018 15:48:26 +1100
Alexey Kardashevskiy wrote:
> On 07/02/18 15:25, Alex Williamson wrote:
> > On Wed, 7 Feb 2018 15:09:22 +1100
> > Alexey Kardashevskiy wrote:
> >> On 07/02/18 11:08, Alex Williamson wrote:
> >>> diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfi
Setting num-interpolated-steps in the dts will allow you to have linear
interpolation between values of brightness-levels. This way a high
resolution pwm duty cycle can be used without having to list out every
possible value in the dts. This system also allows for gamma corrected
values.
The most
Dear all,
This series is a second patchset integrating the requested changes.
The first and second patch what tries to solve is the problem of
granularity for high resolution PWMs. The idea is simple interpolate
between 2 brightness values so we can have a high PWM duty cycle (a
16 bits PWM is up
The patch 'backlight: pwm_bl: compute brightness of LED linearly to
human eye' introduced a default brightness-levels table that is used
when brightness-levels is not available in the dts. So move
brightness-levels and default-brightness-level to be optional.
Signed-off-by: Enric Balletbo i Serra
The num-interpolated-steps property specifies the number of
interpolated steps between each value of brightness-level table. This is
useful for high resolution PWMs to not have to list out every possible
value in the brightness-level array.
Signed-off-by: Enric Balletbo i Serra
---
Changes since
When you want to change the brightness using a PWM signal, one thing you
need to consider is how human perceive the brightness. Human perceive
the brightness change non-linearly, we have better sensitivity at low
luminance than high luminance, so to achieve perceived linear dimming,
the brightness
On Fri, Jan 26, 2018 at 1:28 PM, Mark Brown wrote:
> On Fri, Jan 26, 2018 at 03:16:00PM +0800, Donglin Peng wrote:
>> On Wed, Jan 24, 2018 at 1:37 AM, Mark Brown wrote:
>
>> > Too late, I already applied this - a further conversion for the new
>> > macro would be good.
>
>> I can send another pat
On 07/02/2018 07:25, Wanpeng Li wrote:
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 786cd00..445e702 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -7458,6 +7458,11 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu,
> struct kvm_run *kvm_run)
>
On Wed, Jan 31, 2018 at 5:17 PM, Will Deacon wrote:
>> > * Will Deacon wrote:
>> >> e.g. for atomic[64]_read, your asm-generic header looks like:
>> >>
>> >> #ifndef _LINUX_ATOMIC_INSTRUMENTED_H
>> >> #define _LINUX_ATOMIC_INSTRUMENTED_H
>> >>
>> >> #include
>> >> #include
>> >>
>> >> static __
On Wed, Feb 7, 2018 at 3:47 PM, Alexander Abrosimov
wrote:
> Darren, I have checked change on git.kernel.org and it seems to be merged
> twice:
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/platform/x86/dell-laptop.c?id=fe486138788ba435ffa918c8d7aba05a77b6289
Em Fri, 19 Jan 2018 16:46:10 +0100
Frederic Weisbecker escreveu:
> As per Linus suggestion, this take doesn't limit the number of occurences
> per jiffy anymore but instead defers a vector to workqueues as soon as
> it gets re-enqueued on IRQ tail.
>
> No tunable here, so testing should be easie
On Wed, Feb 07, 2018 at 02:37:51PM +0200, Peter De Schrijver wrote:
> On Wed, Feb 07, 2018 at 10:43:51AM +, Mark Brown wrote:
> > On Wed, Feb 07, 2018 at 10:47:44AM +0200, Peter De Schrijver wrote:
> > > On Tue, Feb 06, 2018 at 04:35:44PM +, Mark Brown wrote:
> > > > On Tue, Feb 06, 2018 at
We treat most of the feature bits in the ID registers as STRICT,
implying that all CPUs should match it the boot CPU state. However,
for most of the features, we can handle if there are any mismatches
by using the safe value. e.g, HWCAPs and other features used by the
kernel. Relax the constraint o
Expose the new features introduced by Arm v8.4 extensions to
Arm v8-A profile.
These include :
1) Data indpendent timing of instructions. (DIT, exposed as HWCAP_DIT)
2) Unaligned atomic instructions and Single-copy atomicity of loads
and stores. (AT, expose as HWCAP_USCAT)
3) LDAPR and STL
On Wed, Feb 07, 2018 at 02:18:46PM +, Mark Brown wrote:
> On Wed, Feb 07, 2018 at 02:37:51PM +0200, Peter De Schrijver wrote:
> > On Wed, Feb 07, 2018 at 10:43:51AM +, Mark Brown wrote:
> > > On Wed, Feb 07, 2018 at 10:47:44AM +0200, Peter De Schrijver wrote:
> > > > On Tue, Feb 06, 2018 at
We'd never implemented Multi-MSI support with GICv2m, because
it is weird and clunky, and you'd think people would rather use
MSI-X.
Turns out there is still plenty of devices out there that rely
on Multi-MSI. Oh well, let's teach that trick to the v2m widget,
it is not a big deal anyway.
Signed-
From: Robin Murphy
Juno's GICv2m implementation consists of four frames providing 32
interrupts each. Since it is possible to plug in enough PCIe endpoints
to consume more than 32 MSIs, and the driver already has a bodge to
handle multiple frames, let's expose the other three as well.
Signed-off
It's been recently reported that GICv2m doesn't handle the Multi-MSI
variant (it only deals with a single MSI, or the full blown
MSI-X). For better or worse, Multi-MSI is still a thing, and it'd be
better if we dealt with it.
This tiny series aims at teaching this old trick to GICv2m, together
wit
Hello Yisheng,
On 7 February 2018 at 09:29, Yisheng Xie wrote:
> Now we call dma_map in the dma_buf API callbacks and handle explicit
> caching by the dma_buf sync API, which make cache and uncache pools
> in the same handling flow, which can be combined.
>
Thanks for the patch! Perhaps you shoul
On Tue, Feb 06, 2018 at 03:24:44PM +0100, Borislav Petkov wrote:
> On Tue, Feb 06, 2018 at 02:09:35PM +, Rolf Neugebauer wrote:
> > The backport of 7e702d17ed1 ("x86/microcode/intel: Extend BDW
> > late-loading further with LLC size check") to 4.9.79 and 4.4.14 causes
> > a division by zero pan
Hi Yisheng,
On 7 February 2018 at 09:29, Yisheng Xie wrote:
> ion_page_pool_alloc_pages calls alloc_pages to allocate pages for page
> pools. If alloc_pages return NULL, it will return NULL, or it will
> return the pages allocate from alloc_pages. So we can just return
> alloc_pages without any j
2018-02-06 22:43 GMT+00:00 Steven Rostedt :
> From: "Steven Rostedt (VMware)"
>
> __unregister_ftrace_function_probe() will incorrectly parse the glob filter
> because it resets the search variable that was setup by filter_parse_regex().
>
> Al Viro reported this:
>
> After that call of filter
On Tue, Feb 06, 2018 at 06:48:17AM -0800, Guenter Roeck wrote:
> On 02/06/2018 05:14 AM, Greg Kroah-Hartman wrote:
> > Thanks for letting me know, that's great to hear as I just had a
> > question from some companies who are worried that taking stable patches
> > will cause tons of merge issues. I
On 10/6/2017 4:06 PM, Christophe Leroy wrote:
> At every request, we map and unmap the same hash hw_context.
>
> This patch moves the dma mapping/unmapping in functions ahash_init()
> and ahash_import().
>
> Signed-off-by: Christophe Leroy
> ---
> drivers/crypto/talitos.c | 80
> ++
On Wed, 7 Feb 2018 22:01:46 +0800
Zamir SUN wrote:
> Thanks for the heads-up! I did not see that before.
>
> While just a note for this, in Fedora 27:
>
> $ if command -v swig; then echo 1; else echo 0; fi
> /usr/bin/swig
> 1
>
> Actually this test has the same problem as of `which swig` - Wh
On 07/02/18 10:37, Dave Martin wrote:
On Wed, Jan 31, 2018 at 06:27:49PM +, Suzuki K Poulose wrote:
We trigger CPU errata work around check on the boot CPU from
smp_prepare_boot_cpu() to make sure that we run the checks only
after the CPU feature infrastructure is initialised. While this
is
There's no need for kernel maps to be allocated at this
point - sample processing.
We search for kernel maps using the kernel map_groups in
machine::kmaps which is static. If vmlinux maps for any
reason still don't exist, the search correctly fails
because they are not in the map group.
Link: htt
And replacing it with __machine__load_kallsyms function.
The current machine__load_kallsyms function has no caller,
so replacing it directly with __machine__load_kallsyms.
Also removing the no_kcore argument as it was always called
with true value.
Link: http://lkml.kernel.org/n/tip-kj9bpn6v213n6
Current code in dso__load calls the is_regular_file function,
but it checks its return value only after calling symsrc__init.
That can make symsrc__init block in elf_* functions on reading
the file if the file happens to be device and not regular one.
Make the check before calling symsrc__init.
The machine__set_kernel_mmap does the same job as map_groups__fixup_end
when used on kernel maps within machine__create_kernel_maps call.
This way we can also remove map_groups__fixup_end function, because there's
no user to it. Also moving machine__set_kernel_mmap up in code, so we don't
need for
So it could be called without event object, just with start
and end values. It will be used in following patch.
Link: http://lkml.kernel.org/n/tip-u4hu7m5fmwwsscy6ki70h...@git.kernel.org
Signed-off-by: Jiri Olsa
---
tools/perf/util/machine.c | 13 +++--
1 file changed, 7 insertions(+), 6
Freeing root_dir in machine__init error path.
Link: http://lkml.kernel.org/n/tip-ng92slsanexqw7h1d6sad...@git.kernel.org
Signed-off-by: Jiri Olsa
---
tools/perf/util/machine.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/tools/perf/util/machine.c b/tools/perf/util/m
There's no need to keep the '__' prefix now when there's
map_groups__fixup_end function gone.
Link: http://lkml.kernel.org/n/tip-xq9wpm97spnpaxfjhaz1a...@git.kernel.org
Signed-off-by: Jiri Olsa
---
tools/perf/util/machine.c| 2 +-
tools/perf/util/symbol-elf.c | 2 +-
tools/perf/util/symbol.c
We should not search for kernel start address in
__machine__create_kernel_maps function, because it's being
used in 'report' code path, where we are interested in kernel
MMAP data address instead of in current kernel address
The __machine__create_kernel_maps serves purely for creating
the machines
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