Building the amd display driver with link-time optimizations revealed a bug
that caused dal_cmd_tbl_helper_dce80_get_table() and
dal_cmd_tbl_helper_dce110_get_table() get called with an incompatible
return type between the two callers in command_table_helper.c and
command_table_helper2.c:
drivers/
On Thu, Feb 01, 2018 at 11:46:42AM +, Marc Zyngier wrote:
> When handling an SMC trap, the "preferred return address" is set
> to that of the SMC, and not the next PC (which is a departure from
> the behaviour of an SMC that isn't trapped).
>
> Increment PC in the handler, as the guest is othe
On Thu, Feb 01, 2018 at 11:46:44AM +, Marc Zyngier wrote:
> As we're about to trigger a PSCI version explosion, it doesn't
> hurt to introduce a PSCI_VERSION helper that is going to be
> used everywhere.
>
Reviewed-by: Christoffer Dall
> Signed-off-by: Marc Zyngier
> ---
> include/kvm/arm
On Thu, Feb 01, 2018 at 11:46:43AM +, Marc Zyngier wrote:
> As we're about to update the PSCI support, and because I'm lazy,
> let's move the PSCI include file to include/kvm so that both
> ARM architectures can find it.
>
Acked-by: Christoffer Dall
> Signed-off-by: Marc Zyngier
> ---
> ar
On Thu, Feb 01, 2018 at 11:46:46AM +, Marc Zyngier wrote:
> PSCI 1.0 can be trivially implemented by having PSCI 0.2 and
> the FEATURES call. Of, and returning 1.0 as the PSCI version.
Of? (Oh ?)
>
> We happily ignore everything else, as it is optional.
nit: Might be worth mentioning that
On Thu, Feb 01, 2018 at 11:46:45AM +, Marc Zyngier wrote:
> Instead of open coding the accesses to the various registers,
> let's add explicit SMCCC accessors.
>
Reviewed-by: Christoffer Dall
> Signed-off-by: Marc Zyngier
> ---
> virt/kvm/arm/psci.c | 52 ++
On Fri, Feb 02, 2018 at 12:42:29PM +0100, Rafael J. Wysocki wrote:
> > If you really care you can do async IPIs and do a custom serialization
> > that only waits when you do back-to-back things, which should be fairly
> > uncommon I'd think.
>
> In this particular case we don't want to return to u
This patch renames macro IS_MFCV8 to IS_MFCV8_PLUS so that the MFCv8
code can be resued for MFCv10.10 support. Since the MFCv8 specific code
holds good for MFC v10.10 also.
Signed-off-by: Smitha T Murthy
Acked-by: Andrzej Hajda
Acked-by: Hans Verkuil
---
drivers/media/platform/s5p-mfc/s5p_mfc_
This patch series adds MFC v10.10 support. MFC v10.10 is used in some
of Exynos7 variants.
This adds support for following:
* Add support for HEVC encoder and decoder
* Add support for VP9 decoder
* Update Documentation for control id definitions
* Update computation of min scratch buffer size re
On 02/02/2018 03:15 AM, Michael S. Tsirkin wrote:
On Thu, Jan 25, 2018 at 05:14:04PM +0800, Wei Wang wrote:
This patch series is separated from the previous "Virtio-balloon
Enhancement" series. The new feature, VIRTIO_BALLOON_F_FREE_PAGE_HINT,
implemented by this series enables the virtio-balloo
After MFC v8.0, mfc f/w lets the driver know how much scratch buffer
size is required for decoder. If mfc f/w has the functionality,
E_MIN_SCRATCH_BUFFER_SIZE, driver can know how much scratch buffer size
is required for encoder too.
Signed-off-by: Smitha T Murthy
Reviewed-by: Andrzej Hajda
Acke
Adding the support for MFC v10.10, with new register file and
necessary hw control, decoder, encoder and structural changes.
CC: Rob Herring
CC: devicet...@vger.kernel.org
Signed-off-by: Smitha T Murthy
Reviewed-by: Andrzej Hajda
Acked-by: Rob Herring
Acked-by: Hans Verkuil
---
.../devicetre
Added V4l2 controls for HEVC encoder
Signed-off-by: Smitha T Murthy
---
Documentation/media/uapi/v4l/extended-controls.rst | 410 +
1 file changed, 410 insertions(+)
diff --git a/Documentation/media/uapi/v4l/extended-controls.rst
b/Documentation/media/uapi/v4l/extended-cont
On Thu, 2018-02-01 at 09:43 -0800, Stephen Boyd wrote:
> > > > Applied to clk-protect-rate, with the exception that I did not apply
> > > > "clk: fix CLK_SET_RATE_GATE with clock rate protection" as it breaks
> > > > qcom clk code.
> > > >
> > > > Stephen, do you plan to fix up the qcom clock code
Add HEVC encoder support and necessary registers, V4L2 CIDs,
and hevc encoder parameters
Signed-off-by: Smitha T Murthy
Acked-by: Hans Verkuil
---
drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 28 +-
drivers/media/platform/s5p-mfc/s5p_mfc.c| 1 +
drivers/media/platform/s5p-mfc/s5
Add v4l2 controls for HEVC encoder
Signed-off-by: Smitha T Murthy
Reviewed-by: Andrzej Hajda
Acked-by: Hans Verkuil
---
drivers/media/v4l2-core/v4l2-ctrls.c | 119 +++
include/uapi/linux/v4l2-controls.h | 93 ++-
2 files changed, 211 i
Add support for codec definition and corresponding buffer
requirements for HEVC decoder.
Signed-off-by: Smitha T Murthy
Reviewed-by: Andrzej Hajda
Acked-by: Hans Verkuil
---
drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 1 +
drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c | 3 +++
driver
HEVC is a video coding format
Signed-off-by: Smitha T Murthy
Reviewed-by: Stanimir Varbanov
Acked-by: Hans Verkuil
---
drivers/media/v4l2-core/v4l2-ioctl.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/media/v4l2-core/v4l2-ioctl.c
b/drivers/media/v4l2-core/v4l2-ioctl.c
index 796
Add support for codec definition and corresponding buffer
requirements for VP9 decoder.
Signed-off-by: Smitha T Murthy
Reviewed-by: Andrzej Hajda
Acked-by: Hans Verkuil
---
drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 6 ++
drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c | 3 +++
dr
Add V4L2 definition for HEVC compressed format
Signed-off-by: Smitha T Murthy
Reviewed-by: Andrzej Hajda
Reviewed-by: Stanimir Varbanov
Acked-by: Hans Verkuil
---
include/uapi/linux/videodev2.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/l
Add V4L2 definition for HEVC compressed format which is also
known as H.265.
Signed-off-by: Smitha T Murthy
Reviewed-by: Andrzej Hajda
Reviewed-by: Stanimir Varbanov
Acked-by: Hans Verkuil
---
Documentation/media/uapi/v4l/pixfmt-compressed.rst | 5 +
1 file changed, 5 insertions(+)
diff
> -Original Message-
> From: Francois Romieu [mailto:rom...@fr.zoreil.com]
> Sent: Friday, February 2, 2018 7:27 AM
> To: Hau
> Cc: net...@vger.kernel.org; nic_swsd ; linux-
> ker...@vger.kernel.org
> Subject: Re: [PATCH net-next] r8169: add module param for control of ASPM
> disable
>
>
Hi Mathieu,
On 01/02/18 09:51, Mathieu Poirier wrote:
> When the topology of root domains is modified by CPUset or CPUhotplug
> operations information about the current deadline bandwidth held in the
> root domain is lost.
>
> This patch address the issue by recalculating the lost deadline
> band
Aligning the luma_dpb_size, chroma_dpb_size, mv_size and me_buffer_size
for MFCv10.10.
Signed-off-by: Smitha T Murthy
Reviewed-by: Andrzej Hajda
Acked-by: Kamil Debski
Acked-by: Hans Verkuil
---
drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 19 +
drivers/media/platform/s5p-mfc/s5p_mfc
On 02/02/2018 05:18 PM, Rafael J. Wysocki wrote:
> On Friday, February 2, 2018 12:41:58 PM CET Prateek Sood wrote:
>> Hi Viresh,
>>
>> One scenario is there where a kernel panic is observed in
>> cpufreq during suspend/resume.
>>
>> pm_suspend()
>> suspend_devices_and_enter()
>> dpm_suspend_s
On Fri, 2018-02-02 at 11:20 +, Bryan O'Donoghue wrote:
> On 01/02/18 12:16, Horia Geantă wrote:
> > If the loop cannot exit based on value of "ret" != -EAGAIN, then it
> > means
> > caam_probe() will eventually fail due to ret == -EAGAIN:
> > if (ret) {
> > dev_err(dev, "failed
On Fri, Feb 02, 2018 at 01:46:47PM +0100, Peter Zijlstra wrote:
> +static void __intel_pstate_hwp_set_desired(int val)
> +{
> + u64 value;
> +
> + value = rdmsrl(MSR_HWP_REQUEST);
> + value &= ~GENMASK_ULL(23, 16);
> + value |= (val & 0xff) << 16;
> + wrmsrl(MSR_HWP_REQUEST, val
On Fri, Feb 02, 2018 at 12:42:29PM +0100, Rafael J. Wysocki wrote:
> > Yes, too many synchronous IPIs, which themselves are typically already
> > more expensive than the MSR access.
>
> We could do all of the updates in one IPI (as Srinivas said), but it would be
> more code, and custom code for t
_dev_ is being dereferenced before it is null checked, hence there
is a potential null pointer dereference.
Fix this by moving the pointer dereference after _dev_ has been
null checked.
Fixes: d4e7f38d70ef ("drm/msm/dsi: check msm_dsi and dsi pointers before use")
Signed-off-by: Gustavo A. R. Sil
Hi everybody
this series adds the kexec_file_load system call to s390. Before the system
call is added there are some preparations/clean ups to common
kexec_file_load. In detail this series contains:
Patch #1&2: Minor cleanups/fixes.
Patch #3-9: Clean up the purgatory load/relocation code. Espec
The kexec_purgatory buffer is read-only. Thus all pointers into
kexec_purgatory are read-only, too. Point this out by explicitly marking
purgatory_info->ehdr as 'const' and update the comments in purgatory_info.
Signed-off-by: Philipp Rudo
---
include/linux/kexec.h | 17 +++--
kernel
To update the entry point there is an extra loop over all section headers
although this can be done in the main loop. So move it there and eliminate
the extra loop and variable to store the 'entry section index'.
Also, in the main loop, move the usual case, i.e. non-bss section, out of
the extra i
When inspecting __kexec_load_purgatory you find that it has two tasks
1) setting up the kexec_buffer for the new kernel and,
2) setting up pi->sechdrs for the final load address.
The two tasks are independent of each other. To improve readability split
up __kexec_load_purgatory in
The stripped purgatory does not contain a symtab. So when looking for
symbols this is done in read-only kexec_purgatory. Highlight this by
marking the corresponding variables as 'const'.
Signed-off-by: Philipp Rudo
---
kernel/kexec_file.c | 38 ++
1 file chang
When the relocations are applied to the purgatory only the section the
relocations are applied to is writable. The other sections, i.e. the symtab
and .rel/.rela, are in read-only kexec_purgatory. Highlight this by marking
the corresponding variables as 'const'.
While at it also change the signatu
Before the purgatory is loaded several checks are done whether the ELF file
in kexec_purgatory is valid or not. These checks are incomplete. For
example they don't check for the total size of the sections defined in the
section header table or if the entry point actually points into the
purgatory.
When building the kernel with CONFIG_KEXEC_FILE enabled gcc prints a
compile warning multiple times.
In file included from /linux/init/initramfs.c:526:0:
/include/linux/kexec.h:120:9: warning: ‘struct kimage’ declared inside
parameter list [enabled by default]
unsigned long cmdline_len);
The current code uses the sh_offset field in purgatory_info->sechdrs to
store a pointer to the current load address of the section. Depending
whether the section will be loaded or not this is either a pointer into
purgatory_info->purgatory_buf or kexec_purgatory. This is not only a
violation of the
The main loop currently uses quite a lot of variables to update the section
headers. Some of them are unnecessary. So clean them up a little.
Signed-off-by: Philipp Rudo
---
kernel/kexec_file.c | 34 --
1 file changed, 12 insertions(+), 22 deletions(-)
diff --git
Add an ELF loader for kexec_file. The main task here is to do proper sanity
checks on the ELF file. Basically all other functionality was already
implemented for the image loader.
Signed-off-by: Philipp Rudo
---
arch/s390/include/asm/kexec.h | 1 +
arch/s390/kernel/Makefile
Add support to load a crash kernel to the image loader. This requires
extending the purgatory.
Signed-off-by: Philipp Rudo
Reviewed-by: Martin Schwidefsky
---
arch/s390/kernel/kexec_image.c| 6 +-
arch/s390/kernel/machine_kexec_file.c | 45 -
arch/s390/purgatory/head.S
kexec_file_load needs to prepare the new kernels before they are loaded.
For that it has to know the offsets in head.S, e.g. to register the new
command line. Unfortunately there are no macros right now defining those
offsets. Define them now.
Signed-off-by: Philipp Rudo
---
arch/s390/include/as
This patch adds the kexec_file_load system call to s390 as well as the arch
specific functions common code requires to work. Loaders for the different
file types will be added later.
Signed-off-by: Philipp Rudo
---
arch/s390/Kconfig | 4 +
arch/s390/kernel/Makefile
Add an image loader for kexec_file_load. For simplicity first skip crash
support. The functions defined in machine_kexec_file will later be shared
with the ELF loader.
Signed-off-by: Philipp Rudo
Reviewed-by: Martin Schwidefsky
---
arch/s390/include/asm/kexec.h | 22 ++
arch/s39
The common code expects the architecture to have a purgatory that runs
between the two kernels. Add it now. For simplicity first skip crash
support.
Signed-off-by: Philipp Rudo
---
arch/s390/Kbuild | 1 +
arch/s390/include/asm/purgatory.h | 17 +++
arch/s390/kernel/asm-offs
The code to verify the new kernels sha digest are applicable for all
architectures. Move it to common code.
Signed-off-by: Philipp Rudo
---
arch/x86/purgatory/Makefile| 3 +++
arch/x86/purgatory/purgatory.c | 2 +-
{arch/x86/purgatory => include/linux}/sha25
For s390 new kernels are loaded to fixed addresses in memory before they
are booted. With the current code this is a problem as it assumes the
kernel will be loaded to an 'arbitrary' address. In particular,
kexec_locate_mem_hole searches for a large enough memory region and sets
the load address (k
struct fc_fdmi_attr_entry contains a variable-length string at
the end, which is encoded as a one-byte array. gcc-8 notices that
we copy strings into it that obviously go beyond that one byte:
In function 'fc_ct_ms_fill',
inlined from 'fc_elsct_send' at include/scsi/fc_encode.h:518:8:
include
On Fri, Feb 02, 2018 at 12:44:38PM +0200, Jani Nikula wrote:
>
> +Knut, Fengguang
>
> On Fri, 02 Feb 2018, Greg KH wrote:
> > - If clang now builds the kernel "cleanly", yes, I want to take
> > warning fixes in the stable tree. And even better yet, if you
> > keep working to ens
Hi Robin,
On 2/2/2018 5:01 PM, Robin Murphy wrote:
> On 02/02/18 05:40, Sricharan R wrote:
>> Hi Robin/Vivek,
>>
>> On 2/1/2018 2:23 PM, Vivek Gautam wrote:
>>> Hi,
>>>
>>>
>>> On 1/31/2018 6:39 PM, Robin Murphy wrote:
On 19/01/18 11:43, Vivek Gautam wrote:
> From: Sricharan R
>
The prototype for qedf_dbg_fops/qedf_debugfs_ops doesn't match the definition,
which causes the final link to fail with link-time optimizations:
drivers/scsi/qedf/qedf_main.c:34: error: type of 'qedf_dbg_fops' does not match
original declaration [-Werror=lto-type-mismatch]
extern struct file_ope
Building with link time optimizations produces a false-postive section
mismatch warning:
WARNING: vmlinux.o(.data+0xf7e8): Section mismatch in reference from the
variable driver_template.lto_priv.6914 to the function
.init.text:NCR53c406a_detect()
The variable driver_template.lto_priv.6914 refer
When link-time optimizations are enabled, qedi fails to build because
of mismatched prototypes:
drivers/scsi/qedi/qedi_gbl.h:27:37: error: type of 'qedi_dbg_fops' does not
match original declaration [-Werror=lto-type-mismatch]
extern const struct file_operations qedi_dbg_fops;
On 02/02/18 04:05, Hanjun Guo wrote:
> Hi Marc,
>
> Thank you for keeping me in the loop, just minor comments below.
>
> On 2018/2/1 19:46, Marc Zyngier wrote:
>> Now that we've standardised on SMCCC v1.1 to perform the branch
>> prediction invalidation, let's drop the previous band-aid.
>> If ve
Building with link time optimizations produces a false-postive section
mismatch warning:
WARNING: vmlinux.o(.data+0xf8c8): Section mismatch in reference from the
variable driver_template.lto_priv.6915 to the function
.init.text:sym53c416_detect()
The variable driver_template.lto_priv.6915 refere
On Fri, Feb 2, 2018 at 1:53 PM, Prateek Sood wrote:
> On 02/02/2018 05:18 PM, Rafael J. Wysocki wrote:
>> On Friday, February 2, 2018 12:41:58 PM CET Prateek Sood wrote:
>>> Hi Viresh,
>>>
>>> One scenario is there where a kernel panic is observed in
>>> cpufreq during suspend/resume.
>>>
>>> pm_s
gcc-8 warns during link-time optimization that the strncpy() call
passes the size of the source buffer rather than the destination:
drivers/scsi/qedf/qedf_dbg.c: In function 'qedf_uevent_emit':
include/linux/string.h:253: error: 'strncpy' specified bound depends on the
length of the source argume
On Saturday 20 January 2018 10:43 PM, David Lechner wrote:
> +static const struct clk_ops da8xx_cfgchip_div4p5_clk_ops = {
> + .enable = da8xx_cfgchip_gate_clk_enable,
> + .disable= da8xx_cfgchip_gate_clk_disable,
> + .is_enabled = da8xx_cfgchip_gate_clk_is_enabled,
Hi Adrian,
On Thursday 11 January 2018 02:16 PM, Adrian Hunter wrote:
> On 04/01/18 14:59, Kishon Vijay Abraham I wrote:
>> Hi Adrian,
>>
>> On Wednesday 20 December 2017 07:41 PM, Adrian Hunter wrote:
>>> On 14/12/17 15:09, Kishon Vijay Abraham I wrote:
Errata i834 in AM572x Sitara Processor
On Fri, Feb 02, 2018 at 12:42:29PM +0100, Rafael J. Wysocki wrote:
> > > > But now that you made me look, intel_pstate_hwp_set() is horrible crap.
> > > > You should _never_ do things like:
> > > >
> > > > rdmsr_on_cpu()
> > > > /* frob value */
> > > > wrmsr_on_cpu()
> > > >
> > > > That's
Hi Linus,
here is the big slew of changes in pin control for the v4.16 cycle.
Like with GPIO it is actually a bit calm this time. The patches moving
AXP209 from GPIO to pin control appear again (with the same
hashes) and everything should be just smooth.
Details are in the signed tag as usual.
P
On 02/02/2018 06:49 PM, Rafael J. Wysocki wrote:
> On Fri, Feb 2, 2018 at 1:53 PM, Prateek Sood wrote:
>> On 02/02/2018 05:18 PM, Rafael J. Wysocki wrote:
>>> On Friday, February 2, 2018 12:41:58 PM CET Prateek Sood wrote:
Hi Viresh,
One scenario is there where a kernel panic is obs
Hi all,
I found v9fs always set SB_NOATIME into sb->s_flags in v9fs_fill_super,
even if user use mount option relatime, I am very curious about this
thing, can anyone tell me?
Thanks,
Yiwen Jiang.
Hi All,
I have fixed both the issue with perf test.
1) 16: Try 'import perf' in python, checking link problems : FAILED!
To fix this issue, I have to install:
pip install --upgrade pip
pip2.7 install perf
2) 37.2: Test BPF prologue generation : FAILED!
To fix this
On 02/02/2018 13:10, Wei Xu wrote:
> Hi Daniel,
>
> On 2018/2/2 12:05, Daniel Lezcano wrote:
>> On 02/02/2018 12:42, Wei Xu wrote:
>>> Hi Daniel,
>>>
>>> On 2018/2/2 6:59, Daniel Lezcano wrote:
Hi Wei Xu,
I found in the MAINTAINERS file the hisilicon tree is at:
https
On Fri, Feb 02, 2018 at 11:57:20AM +0100, Giulio Benetti wrote:
> Il 02/02/2018 11:53, Maxime Ripard ha scritto:
> > Hi,
> >
> > On Thu, Feb 01, 2018 at 05:17:11PM +0100, Giulio Benetti wrote:
> > > > > > What kernel version did you use?
> > > > >
> > > > > Latest mainline.
> > > >
> > > > I gue
Em Thu, Feb 01, 2018 at 04:52:16PM -0500, William Cohen escreveu:
> On 02/01/2018 03:51 PM, Arnaldo Carvalho de Melo wrote:
> > Em Thu, Feb 01, 2018 at 10:12:59AM -0500, William Cohen escreveu:
> >> On 02/01/2018 09:43 AM, Arnaldo Carvalho de Melo wrote:
> >>> Em Tue, Jan 30, 2018 at 10:28:13PM -05
Linus,
please pull from the tag "firewire-updates" at
git://git.kernel.org/pub/scm/linux/kernel/git/ieee1394/linux1394.git
firewire-updates
to receive the following
IEEE 1394 subsystem patches:
- make JMicron JMB38x controllers work with IOMMU-equipped systems
- IP-over-1394: allow use
Hi Linus,
Please pull powerpc updates for 4.16.
We've added a new driver in drivers/misc, which Greg was OK for us to
merge via powerpc, though it has still resulted in a trivial
conflict in the Makefile and Kconfig.
There's also a conflict with the nvdimm tree, which you haven't merged
yet AFIA
On 02/01/2018 07:33 PM, Wang, Haiyue wrote:
On 2018-02-02 09:10, Corey Minyard wrote:
I loaded this in, tried a compile on x86_64, and got the following:
In file included from ../drivers/char/ipmi/kcs_bmc.c:15:0:
../drivers/char/ipmi/kcs_bmc.h: In function ‘kcs_bmc_priv’:
../drivers/char/ipm
On Thu, Feb 01, 2018 at 02:29:09PM +0100, Peter Zijlstra wrote:
> On Thu, Feb 01, 2018 at 09:27:50PM +0900, Stafford Horne wrote:
> > I tried to clarify some of this in the spec v1.2 [0] which help formalize
> > some of
> > the techniques we used for the SMP implementation. Its probably not
> >
This series contains the remaining (rebased) patches that were not applied
to the pdx tree earlier. This also includes Acked-by / Reviewed-by tags from
Rafael and Thomas.
Rebased and tested on:
http://git.infradead.org/linux-platform-drivers-x86.git/shortlog/refs/heads/review-andy
Cc: Rafael J. W
From: Srinivas Pandruvada
Read SLP_S0 address from ACPI LPIT table when present and use PMC
specific SLP_S0 offset to get the base address of PMC MMIO.
Signed-off-by: Rajneesh Bhardwaj
Signed-off-by: Srinivas Pandruvada
---
drivers/platform/x86/intel_pmc_core.c | 9 -
1 file changed,
Add CPUID of Cannonlake (CNL) processors to Intel family list.
Cc: Dave Hansen
Cc: Thomas Gleixner
cc: Ingo Molnar
Cc: "H. Peter Anvin"
Cc: x...@kernel.org
Reviewed-by: Thomas Gleixner
Suggested-by: Tony Luck
Signed-off-by: Megha Dey
Signed-off-by: Rajneesh Bhardwaj
---
arch/x86/include/
This adds support for Cannonlake PCH which is used by Cannonlake and
Coffeelake SoCs.
Signed-off-by: Srinivas Pandruvada
Signed-off-by: Rajneesh Bhardwaj
---
drivers/platform/x86/intel_pmc_core.c | 85 +++
drivers/platform/x86/intel_pmc_core.h | 11 +
2 files
Hi Daniel,
On 2018/2/2 13:34, Daniel Lezcano wrote:
> On 02/02/2018 13:10, Wei Xu wrote:
>> Hi Daniel,
>>
>> On 2018/2/2 12:05, Daniel Lezcano wrote:
>>> On 02/02/2018 12:42, Wei Xu wrote:
Hi Daniel,
On 2018/2/2 6:59, Daniel Lezcano wrote:
>
> Hi Wei Xu,
>
> I found
Intel CoffeeLake SoC uses CPU ID of KabyLake but has Cannonlake PCH, so in
this case PMC register details from Cannonlake PCH must be used.
In order to identify whether the given platform is Coffeelake, scan for the
Sunrisepoint PMC PCI Id.
KBL CPUID SPT PCIID
--
From: Srinivas Pandruvada
Export lpit_read_residency_count_address(), so that it can be used from
drivers built as module. With the recent changes, the builtin_pci
functionality of the intel_pmc_core driver is removed and now it can be
built as a module to read this exported interface to calculat
On 02/01/2018 08:16 PM, Haiyue Wang wrote:
---
v4->v5
- Fix -Wdiscarded-qualifiers 'const' compile warning.
- Fix size_t printk compile error.
v3->v4
- Change to accept WRITE_START any time.
v2->v3
- Update the KCS phase state machine.
- Fix the race condition of read/write.
v1->v2
- Divide
On 02/02/2018 14:48, Wei Xu wrote:
> Hi Daniel,
>
> On 2018/2/2 13:34, Daniel Lezcano wrote:
>> On 02/02/2018 13:10, Wei Xu wrote:
>>> Hi Daniel,
>>>
>>> On 2018/2/2 12:05, Daniel Lezcano wrote:
On 02/02/2018 12:42, Wei Xu wrote:
> Hi Daniel,
>
> On 2018/2/2 6:59, Daniel Lezcano w
On Friday 02 February 2018 06:49 PM, Sekhar Nori wrote:
> On Saturday 20 January 2018 10:43 PM, David Lechner wrote:
>> +static const struct clk_ops da8xx_cfgchip_div4p5_clk_ops = {
>> +.enable = da8xx_cfgchip_gate_clk_enable,
>> +.disable= da8xx_cfgchip_gate_clk_disable,
>>
On Fri, Feb 2, 2018 at 2:48 PM, syzbot
wrote:
> Hello,
>
> syzbot hit the following crash on upstream commit
> 7109a04eae81c41ed529da9f3c48c3655ccea741 (Thu Feb 1 17:37:30 2018 +)
> Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/ide
>
> So far this crash happened 4 times on net-next
On Saturday 20 January 2018 10:43 PM, David Lechner wrote:
> diff --git a/include/linux/clk/davinci.h b/include/linux/clk/davinci.h
> index 54ea3ff..04b48b3 100644
> --- a/include/linux/clk/davinci.h
> +++ b/include/linux/clk/davinci.h
> @@ -9,6 +9,9 @@
>
> #include
>
> +struct clk;
> +struct
Here's the Allwinner V3s audio codec device tree changes, which used to
be blocked by the DMA engine code.
The first patch adds the DMA engine device tree node, and the second
adds the codec nodes (digital and analog).
The thrid patch is for Lichee Pi Zero with Dock board to enable the
audio jack
Allwinner V3s SoC features a DMA engine.
Add it in the DTSI file.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 443b083c6adc..20edebd983f0 1
Allwinner V3s SoC features an internal audio codec like the one in H3,
and a analog codec like the one in H3/A23 (but much simpler).
Add them in the DTSI file.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --gi
On 02/02/18 13:25, Smitha T Murthy wrote:
> Added V4l2 controls for HEVC encoder
>
> Signed-off-by: Smitha T Murthy
Looks good.
Acked-by: Hans Verkuil
Regards,
Hans
The Lichee Pi Zero Dock board has an audio jack and an onboard MIC.
Enable them.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero-dock.dts
b/arch/arm/boot/d
Hi Daniel,
On 2018/2/2 13:53, Daniel Lezcano wrote:
> On 02/02/2018 14:48, Wei Xu wrote:
>> Hi Daniel,
>>
>> On 2018/2/2 13:34, Daniel Lezcano wrote:
>>> On 02/02/2018 13:10, Wei Xu wrote:
Hi Daniel,
On 2018/2/2 12:05, Daniel Lezcano wrote:
> On 02/02/2018 12:42, Wei Xu wrote:
>
From: Gabriel Fernandez
This patch adds Kernel timers.
This patch adds timers kernel clock.
Timers are gather into two groups corresponding to the APB bus
they are attached to.
Each group has its own prescaler, managed in this patch.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp
From: Gabriel Fernandez
RCC manages clock for debug and trace.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c
index 0402a0e..eafc95a 100644
--- a/driv
From: Gabriel Fernandez
Two micro-controller clock output (MCO) pins are available: MCO1 and MCO2.
For each output, it is possible to select a clock source.
The selected clock can be divided thanks to configurable prescaler.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 23
From: Gabriel Fernandez
Some peripherals need also a dedicated clock for their communication
interface, this clock is generally asynchronous with respect to the bus
interface clock (peripheral clock), and is named kernel clock.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c |
From: Gabriel Fernandez
This patch-set introduces clock driver for STM32MP157 based on Arm Cortex-A7.
The driver patch is splitted in several patches (by kind of clock) to facilitate
code reviewing.
Gabriel Fernandez (14):
dt-bindings: Document STM32MP1 Reset Clock Controller (RCC) bindings
From: Gabriel Fernandez
Each peripheral requires a bus interface clock.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 114 +
1 file changed, 114 insertions(+)
diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c
i
From: Gabriel Fernandez
The RCC handles three sub-system clocks: ck_mpuss, ck_axiss and ck_mcuss.
This patch adds also some MUX system and several prescalers.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 61 ++
1 file changed, 61
From: Gabriel Fernandez
Each PLL has 3 outputs with post-dividers.
pll1_p is dedicated for Cortex-A7
pll1_q is not connected
pll1_r is not connected
pll2_p is dedicated for AXI
pll2_q is dedicated for GPU
pll2_r is dedicated for DDR
pll3_p is dedicated for mcu
pll3_q is for Peripheral Kernel C
From: Gabriel Fernandez
This patch adds source clocks for PLLs
This patch also introduces MUX clock API.
Signed-off-by: Gabriel Fernandez
---
drivers/clk/clk-stm32mp1.c | 48 ++
1 file changed, 48 insertions(+)
diff --git a/drivers/clk/clk-stm32mp1.
From: Gabriel Fernandez
The RCC block is responsible of the management of the clock and reset
generation for the complete circuit.
Signed-off-by: Gabriel Fernandez
---
.../devicetree/bindings/mfd/st,stm32-rcc.txt | 85 ++
1 file changed, 85 insertions(+)
create mode
From: Gabriel Fernandez
This patch introduces the mechanism to probe stm32mp1 driver.
It also defines registers and clocks source definition.
This patch also introduces the generic mechanism to register
a clock (a simple gate).
All clocks will be defined in one table.
Signed-off-by: Gabriel F
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